A pixel circuit, a driving method thereof, and a display device

Abstract

The present invention provides a pixel circuit, a driving method thereof, and a display device. The pixel circuit includes: a first reset transistor coupled between the gate of a driving transistor and a first initialization signal terminal, and the gate is coupled to a reset control terminal; a compensation transistor coupled between the gate of the driving transistor and a first pole, and the gate is coupled to a first scan control terminal; a data writing transistor includes a first sub-transistor and a second sub-transistor with opposite types; the first sub-transistor is coupled between the first pole of the second sub-transistor and a data signal terminal, and the gate is coupled to the first scan control terminal; the second sub-transistor is coupled between the second pole of the driving transistor and the first pole of the first sub-transistor, and the gate is coupled to the second pole of the driving transistor; a first light-emitting control transistor is coupled between a first power supply terminal and the second pole of the driving transistor, and the gate is coupled to a second scan control terminal.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and particularly to a pixel circuit, a driving method thereof, and a display device. Background Art

[0002] With the development of display technologies, Organic Light Emitting Diode (OLED) display devices are developing towards high integration and low cost. To reduce the power consumption of the display device, a lower refresh rate (such as 10 Hz) can be used to drive the display device when displaying a static picture. However, when driving with a pixel circuit entirely composed of Low Temperature Poly-silicon (LTPS) type transistors, due to the high mobility of the polysilicon active layer and large leakage current, and in addition, the human eye is very sensitive to low-frequency flicker, resulting in low-frequency screen flickering (Flicker).

[0003] In related technologies, Low Temperature Poly-silicon + Oxide (LTPO) technology is often used to fabricate pixel circuits in the driving backplane of display products. This LTPO technology utilizes both Low Temperature Poly-silicon Thin Film Transistor (LTPSTFT) and Oxide Thin Film Transistor (Oxide TFT) as functional transistors in the pixel circuit. Since the low temperature poly-silicon thin film transistor has a high mobility, it can accelerate the charging speed of the pixel capacitor, and the metal oxide thin film transistor has a lower leakage current. Combining the advantages of these two transistors helps in the development of display products with high resolution, low power consumption, and high image quality.

[0004] However, in a conventional LTPO pixel circuit, the driving transistor (Driver Thin Flim Transistor) is an LTPS type transistor, and there is still a risk of black screen leakage. To eliminate the leakage phenomenon generated by the black screen, low gray scale, or high gray scale, the aging method is often used in the module preparation process to eliminate the defect states of the DTFT and avoid the leakage risk. Since VGD and VDS have a large voltage during the aging process, resulting in a large Vdata voltage or a large VDD voltage, it is extremely easy to form a loop between Vdata and VDD, affecting the driving ability of the pixel circuit. Summary of the Invention

[0005] The present invention provides a pixel circuit, a driving method thereof, and a display device for eliminating the leakage problem of the pixel circuit.

[0006] In a first aspect, an embodiment of the present invention provides a pixel circuit, including:

[0007] a first reset transistor, a compensation transistor, a driving transistor, a data writing transistor, a first light-emitting control transistor, a second light-emitting control transistor, a second reset transistor, a light-emitting device, and a storage capacitor; wherein:

[0008] The first reset transistor is coupled between the gate of the driving transistor and a first initialization signal terminal, and its gate is coupled to a reset control terminal;

[0009] The compensation transistor is coupled between the gate of the driving transistor and a first pole, and its gate is coupled to a first scan control terminal;

[0010] The data writing transistor includes a first sub-transistor and a second sub-transistor of opposite types; the first sub-transistor is coupled between the first pole of the second sub-transistor and a data signal terminal, and its gate is coupled to the first scan control terminal; the second sub-transistor is coupled between the second pole of the driving transistor and the first pole of the first sub-transistor, and its gate is coupled to the second pole of the driving transistor;

[0011] The first light-emitting control transistor is coupled between a first power supply terminal and the second pole of the driving transistor, and its gate is coupled to a second scan control terminal;

[0012] The second light-emitting control transistor is coupled between the first pole of the driving transistor and the first pole of the light-emitting device, and its gate is coupled to a light-emitting control terminal, and the second pole of the light-emitting device is coupled to a second power supply terminal;

[0013] The second reset transistor is coupled between the first pole of the light-emitting device and a second initialization signal terminal, and its gate is coupled to the second scan control terminal;

[0014] The storage capacitor is coupled between the gate of the driving transistor and the first power supply terminal;

[0015] Wherein, the first reset transistor, the compensation transistor, the first sub-transistor, and the first light-emitting control transistor are of the same type.

[0016] In a possible implementation, the first scan control terminal, the second scan control terminal, and the reset control terminal are respectively coupled to different gate driving units.

[0017] In a possible implementation, the reset control terminal and the first scan control terminal are respectively coupled to output terminals of different levels of the same gate driving unit, and the reset control signal provided by the reset control terminal is earlier than the first scan control signal provided by the first scan control terminal.

[0018] In a possible implementation, the first initialization signal terminal is coupled to the second initialization signal terminal.

[0019] In a possible implementation, the first initialization signal terminal is respectively coupled to different control terminals, and the voltage value of the second initialization signal provided by the second initialization signal terminal is negative.

[0020] In a possible implementation, the first reset transistor, the compensation transistor, the first sub-transistor, and the first light-emitting control transistor are all N-type transistors, and the driving transistor, the second light-emitting control transistor, and the second sub-transistor are all P-type transistors.

[0021] In a possible implementation, the first reset transistor, the compensation transistor, the first sub-transistor, and the first light-emitting control transistor are all oxide transistors, and the driving transistor, the second light-emitting control transistor, and the second sub-transistor are all polysilicon transistors.

[0022] In a second aspect, an embodiment of the present invention further provides a display device, including:

[0023] A plurality of pixel circuits as described in any one of the above in a display area, and a gate driving circuit disposed in a non-display area, where the gate driving circuit is configured to provide corresponding signals to a first scan control terminal, a second scan control terminal, and a reset control terminal of the pixel circuit.

[0024] In a possible implementation, the gate driving circuit includes a first gate driving unit and a second gate driving unit, the first gate driving unit is coupled to the first scan control terminal of each pixel circuit, and the second gate driving unit is coupled to the second scan control terminal of each pixel circuit.

[0025] In a possible implementation, the gate driving circuit further includes a reset driving unit, and the reset driving unit is coupled to the reset control terminal of each pixel circuit.

[0026] In a possible implementation, the first gate driving unit is coupled to the reset control terminal of each pixel circuit, and the reset control terminal and the first scan control terminal of the same pixel circuit are respectively coupled to different stage output terminals of the first gate driving unit.

[0027] In a third aspect, an embodiment of the present invention further provides a driving method for a pixel circuit as described in any one of the above, including:

[0028] In the initialization stage, control the first reset transistor and the second reset transistor to be turned on, reset the gate of the driving transistor through the first initialization signal terminal, and reset the potential of the first pole of the light-emitting device through the second initialization signal terminal;

[0029] In the data writing stage, control the compensation transistor, the first sub-transistor, and the second sub-transistor to be turned on, write the data signal provided by the data signal terminal to the second pole of the driving transistor, and write the threshold voltage of the driving transistor and the data signal to the storage capacitor;

[0030] In the light-emitting stage, control the first light-emitting control transistor and the second light-emitting control transistor to be turned on, so that the driving transistor stably outputs a driving current under the voltage of the signal written and maintained by the storage capacitor to drive the light-emitting device to emit light.

[0031] The beneficial effects of the present invention are as follows:

[0032] The embodiment of the present invention provides a pixel circuit, a driving method thereof, and a display device. Among them, the pixel circuit provided by the embodiment of the present invention can turn on the first reset transistor under the control of the reset control terminal, so as to reset the gate of the driving transistor through the first initialization signal terminal; under the control of the second scan control terminal, the second reset transistor can be turned on, so as to reset the first pole of the light-emitting device through the second initialization signal terminal. When the first pole of the light-emitting device is the anode, the problem of frequency-cutting flicker is avoided; when the first sub-transistor and the second sub-transistor included in the data writing transistor are turned on, and the compensation transistor is turned on, the data signal provided by the data signal terminal can be written to the gate of the driving transistor, and the threshold voltage of the driving transistor and the data signal are written to the storage capacitor; in addition, under the control of the second scan control terminal, the first light-emitting control transistor can be turned on, and under the control of the light-emitting control terminal, the second light-emitting control transistor can be turned on, so that the driving transistor stably outputs a driving current under the voltage of the signal written and maintained by the storage capacitor, thereby driving the light-emitting device to emit light, thereby ensuring the driving ability of the pixel circuit; the pixel circuit provided by the embodiment of the present invention, due to the addition of the second sub-transistor, avoids the generation of a loop between the data signal terminal and the first power supply terminal, thereby avoiding the leakage problem of the driving transistor and ensuring the driving ability of the pixel circuit. Description of the Drawings

[0033] Figure 1 It is a schematic structural diagram of one of the pixel circuits adopted in the related art;

[0034] Figure 2 For Figure 1 One of the timing diagrams adopted by the pixel circuit shown;

[0035] Figure 3 One of the schematic structural diagrams of a pixel circuit provided by an embodiment of the present invention;

[0036] Figure 4 is Figure 3 One of the timing diagrams corresponding to the pixel circuit shown;

[0037] Figure 5 One of the schematic structural diagrams of a display device provided by an embodiment of the present invention;

[0038] Figure 6 One of the schematic structural diagrams of a display device provided by an embodiment of the present invention;

[0039] Figure 7 One of the schematic structural diagrams of a display device provided by an embodiment of the present invention;

[0040] Figure 8 One of the schematic structural diagrams of a display device provided by an embodiment of the present invention;

[0041] Figure 9 One of the method flowcharts of a driving method for a pixel circuit provided by an embodiment of the present invention. Detailed implementation manners

[0042] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. And, without conflict, the embodiments and features in the embodiments of the present invention can be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0043] Unless otherwise defined, the technical terms or scientific terms used in the present invention shall have the ordinary meanings understood by those of ordinary skill in the art to which the present invention pertains. The terms "including" or "comprising" and the like used in the present invention mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items.

[0044] It should be noted that the sizes and shapes of the various figures in the drawings do not reflect the actual proportions, and the purpose is only to schematically illustrate the content of the present invention. Also, the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions throughout.

[0045] In the related art, it is often adopted such as Figure 1The pixel circuit shown and Figure 2 The timing diagram shown, where M3 represents a DTFT, L represents a light-emitting device, Cst represents a capacitor, n01, n02, and n03 respectively represent the nodes where each transistor is correspondingly coupled to each pole of the DTFT, M1 and M2 are N-type transistors, M3, M4, M5, M6, and M7 are P-type transistors, M1 and M2 are metal-oxide transistors, and M3 to M7 are low-temperature polysilicon transistors. Compensate for the threshold voltage of the DTFT to ensure the uniformity of the DTFT threshold voltage and improve the problem of low-frequency flicker.

[0046] In Figure 1 In the pixel circuit shown, it is possible to compensate for the threshold voltage of the DTFT. Since M1 and M2 are metal-oxide transistors, the problem of DTFT gate leakage is avoided, and anode reset can be performed during the hold frame, thus avoiding low-frequency flicker.

[0047] Still in combination with Figure 1 and Figure 2 Shown, in the 01 stage, the n01 node and the anode of the light-emitting device (corresponding to the n04 node in Figure 1 ) are reset; in the 02 stage, the data signal is written to compensate for the threshold voltage of the DTFT; in the 03 stage, the light-emitting device L emits light. In this way, when Vdata is much larger than VDD, for example, Vdata = 10V, the M4 and M5 transistors coupled to the source of the DTFT in the three stages will both turn on, forming a loop from Vdata to VDD; when VDD is much larger than Vdata, for example, VDD = 10V, M4 and M5 will both turn on in the three stages, forming a loop from VDD to Vdata. On the one hand, it causes burning of the pixel circuit traces, and on the other hand, it affects the aging effect. In addition, for Figure 1 The specific working process of the pixel circuit shown can refer to the specific implementation in the related art and will not be elaborated here.

[0048] In view of this, the embodiments of the present invention provide a pixel circuit, its driving method, and a display device for eliminating the leakage problem of the pixel circuit.

[0049] As Figure 3 Shown, the embodiments of the present invention provide a pixel circuit, which includes:

[0050] A first reset transistor T1, a compensation transistor T2, a driving transistor T3, a data writing transistor 10, a first light-emitting control transistor T5, a second light-emitting control transistor T6, a second reset transistor T7, a light-emitting device 20, and a storage capacitor C; where:

[0051] The first reset transistor T1 is coupled between the gate of the driving transistor T3 and the first initialization signal terminal Vinit1, and its gate is coupled to the reset control terminal Re_N;

[0052] The compensation transistor T2 is coupled between the gate of the driving transistor T3 and the first pole, and its gate is coupled to the first scan control terminal Gate_N;

[0053] The data writing transistor 10 includes a first sub-transistor T4 and a second sub-transistor T8 of opposite types; the first sub-transistor T4 is coupled between the first pole of the second sub-transistor T8 and the data signal terminal Vdata, and its gate is coupled to the first scan control terminal Gate_N; the second sub-transistor T8 is coupled between the second pole of the driving transistor T3 and the first pole of the first sub-transistor T4, and its gate is coupled to the second pole of the driving transistor T3;

[0054] The first light-emitting control transistor T5 is coupled between the first power supply terminal VDD and the second pole of the driving transistor T3, and its gate is coupled to the second scan control terminal Gate_P;

[0055] The second light-emitting control transistor T6 is coupled between the first pole of the driving transistor T3 and the first pole of the light-emitting device 20, and its gate is coupled to the light-emitting control terminal EM, and the second pole of the light-emitting device 20 is coupled to the second power supply terminal VSS;

[0056] The second reset transistor T7 is coupled between the first pole of the light-emitting device 20 and the second initialization signal terminal Vinit2, and its gate is coupled to the second scan control terminal Gate_P;

[0057] The storage capacitor C is coupled between the gate of the driving transistor T3 and the first power supply terminal VDD;

[0058] Wherein, the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are of the same type.

[0059] Still combined with Figure 3As shown, the pixel circuit provided by the embodiment of the present invention includes a first reset transistor T1, a compensation transistor T2, a driving transistor T3, a data writing transistor 10, a first light-emitting control transistor T5, a second light-emitting control transistor T6, a second reset transistor T7, a light-emitting device 20, and a storage capacitor C; in a specific implementation process, the first reset transistor T1 is coupled between the gate of the driving transistor T3 and the first initialization signal terminal Vinit1, and the gate is coupled to the reset control terminal Re_N. In this way, under the control of the reset control terminal Re_N, the first reset transistor T1 can be turned on, so as to write the signal provided by the first initialization signal terminal Vinit1 into the gate of the driving transistor T3, realizing the reset of the gate potential of the driving transistor T3; moreover, the compensation transistor T2 is coupled between the gate of the driving transistor T3 and the first pole, and the gate is coupled to the first scan control terminal Gate_N. In this way, under the control of the first scan control terminal Gate_N, the compensation transistor T2 can be turned on; the data writing transistor 10 includes a first sub-transistor T4 and a second sub-transistor T8 with opposite types. The first sub-transistor T4 is coupled between the first pole of the second sub-transistor T8 and the data signal terminal Vdata, and the gate is coupled to the first scan control terminal Gate_N. The second sub-transistor T8 is coupled between the second pole of the driving transistor T3 and the first pole of the first sub-transistor T4, and the gate is coupled to the second pole of the driving transistor T3. In this way, under the control of the first scan control terminal Gate_N, the first sub-transistor T4 can be turned on; when the first sub-transistor T4 and the second sub-transistor T8 in the data writing transistor 10, and the compensation transistor T2 are all turned on, the data signal provided by the data signal terminal Vdata and the threshold voltage of the driving transistor T3 can be written into the gate of the driving transistor T3 and stored in the storage capacitor C, thereby realizing the compensation of the threshold voltage of the driving transistor T3.

[0060] In addition, a first light-emitting control transistor T5 is coupled between a first power supply terminal VDD and a second pole of the driving transistor T3, and its gate is coupled to a second light-emitting control terminal EM. In this way, the first light-emitting control transistor T5 can be turned on under the control of the second light-emitting control terminal EM. A second light-emitting control transistor T6 is coupled between a first pole of the driving transistor T3 and a first pole of the light-emitting device 20, and its gate is coupled to the light-emitting control terminal EM. A second pole of the light-emitting device 20 is coupled to a second power supply terminal VSS. In this way, the second light-emitting control transistor T6 can be turned on under the control of the light-emitting control terminal EM. When both the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on, the driving transistor T3 can stably output a driving current while the storage capacitor C maintains the voltage of the written signal, thereby driving the light-emitting device 20 to emit light, ensuring the driving ability of the pixel circuit. In the pixel circuit provided by the embodiment of the present invention, due to the addition of the second sub-transistor T8, the generation of a loop between the data signal terminal Vdata and the first power supply terminal VDD is avoided, thereby avoiding the leakage problem of the driving transistor T3 and ensuring the driving ability of the pixel circuit.

[0061] It should be noted that the first sub-transistor T4 and the second sub-transistor T8 are of opposite types, and the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are of the same type. In one exemplary embodiment, the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are all N-type transistors, and correspondingly, their transistor types are the same. In this exemplary embodiment, the second sub-transistor T8 is a P-type transistor, and its transistor type is opposite to that of the first sub-transistor T4.

[0062] In one exemplary embodiment, the first scan control terminal Gate_N, the second scan control terminal Gate_P, and the reset control terminal Re_N are respectively coupled to different gate driving units. Compared with Figure 1 the situation where three different gate driving units are still required for driving as shown, the number of gate driving units is less, ensuring a narrow border design.

[0063] In one exemplary embodiment, the reset control terminal Re_N and the first scan control terminal Gate_N are respectively coupled to output terminals of different stages of the same gate driving unit, and the reset control signal provided by the reset control terminal Re_N is earlier than the first scan control signal provided by the first scan control terminal Gate_N. That is to say, the reset control terminal Re_N and the first scan control terminal Gate_N are respectively coupled to output terminals of different stages of the same gate driving unit, and the second scan control terminal Gate_P is coupled to other gate driving units. In this way, the pixel circuit provided by the embodiment of the present invention requires two gate driving units for driving. Compared withFigure 1 In terms of this, the number of required gate drive units is small, which is more conducive to a narrow border design. In addition, the reset control signal is earlier than the first scan control signal. In this way, it can be ensured that the first initialization signal provided by the first initialization signal terminal Vinit1 is written into the gate of the driving transistor T3 first, and then the data writing transistor 10 and the compensation transistor T2 are turned on to write the signal provided by the data signal terminal Vdata into the second pole of the driving transistor T3, realizing the compensation of the threshold voltage of the driving transistor T3.

[0064] In one exemplary embodiment, the first initialization signal terminal Vinit1 is coupled to the second initialization signal terminal Vinit2. Correspondingly, the first initialization signal provided by the first initialization signal terminal Vinit1 and the second initialization signal provided by the second initialization signal terminal Vinit2 may be the same signal.

[0065] In one exemplary embodiment, the first initialization signal terminal Vinit1 is respectively coupled to different control terminals, and the voltage value of the second initialization signal provided by the second initialization signal terminal Vinit2 is negative. In the specific implementation process, the voltage value of the second initialization signal provided by the second initialization signal terminal Vinit2 is negative. When the first pole of the light-emitting device 20 is the anode, it is equivalent to applying a negative voltage to the anode of the light-emitting device 20. In the process of testing the life of the light-emitting device 20 in the present invention, it is found that applying a pulsed reverse negative voltage to the light-emitting device 20 can effectively improve the life of the light-emitting device 20. During the test, applying a voltage of -2V on the anode surface can increase the life to 133%. In this way, by providing the second initialization signal with a negative voltage value to the anode of the light-emitting device 20 through the second initialization signal terminal Vinit2, the life of the light-emitting device 20 can be effectively improved, thereby improving the usage performance of the pixel circuit.

[0066] In the embodiment of the present invention, as Figure 3 shown, the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are all N-type transistors, and the driving transistor T3, the second light-emitting control transistor T6, and the second sub-transistor T8 are all P-type transistors.

[0067] Still combined with Figure 3As shown, the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are all N-type transistors, and the driving transistor T3, the second light-emitting control transistor T6, and the second sub-transistor T8 are all P-type transistors. In this case, only when the reset control signal provided by the reset control terminal Re_N is at a high level, the first reset transistor T1 will conduct; only when the first scan control signal provided by the first scan control terminal Gate_N is at a high level, the compensation transistor T2 and the first sub-transistor T4 will conduct; only when the second scan control signal provided by the second scan control terminal Gate_P is at a high level, the first light-emitting control transistor T5 will conduct; only when the second scan control signal provided by the second scan control terminal Gate_P is at a low level, the second reset transistor T7 will conduct; only when the light-emitting control signal provided by the light-emitting control terminal EM is at a low level, the second light-emitting control transistor T6 will conduct. In practical applications, corresponding signals can be respectively loaded onto the first scan control terminal Gate_N, the second scan control terminal Gate_P, the reset control terminal Re_N, and the light-emitting control signal terminal to control the conduction and cutoff of the corresponding transistors, thereby improving the control effect of the pixel circuit.

[0068] In the embodiment of the present invention, still in combination with Figure 3 As shown, the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are all oxide transistors, and the driving transistor T3, the second light-emitting control transistor T6, and the second sub-transistor T8 are all polysilicon transistors.

[0069] Still in combination with Figure 3As shown, the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are all oxide transistors. In one exemplary embodiment, the active layers of the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 are all metal oxide semiconductor materials. Correspondingly, the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 can be N-type transistors with metal oxide semiconductor materials as the active layer, thus ensuring that the first reset transistor T1, the compensation transistor T2, the first sub-transistor T4, and the first light-emitting control transistor T5 have small leakage currents and reducing the power consumption of the pixel circuit. The driving transistor T3, the second light-emitting control transistor T6, and the second sub-transistor T8 are all polysilicon transistors. In one exemplary embodiment, the driving transistor T3, the second light-emitting control transistor T6, and the second sub-transistor T8 can be P-type transistors (i.e., LTPS-type transistors) with low-temperature polysilicon materials as the active layer, thus ensuring that the driving transistor T3, the second light-emitting control transistor T6, and the second sub-transistor T8 have high mobilities, and can be made thinner and have lower power consumption, etc. In this way, the pixel circuit provided by the embodiment of the present invention is essentially a low-temperature poly-silicon + oxide (LTPO) pixel circuit prepared by combining the two processes of preparing transistors, namely LTPS-type transistors and oxide transistors, thus ensuring that the leakage current of the gate of the driving transistor T3DT is small and the power consumption is low.

[0070] It should be noted that the light-emitting device 20 in the embodiment of the present invention can be set as an electroluminescent diode, such as at least one of an organic light-emitting diode (OLED), a quantum dot light-emitting diode (QLED), and a micro inorganic light-emitting diode (micro Light Emitting Diode / Mini Light Emitting Diode), which is not limited herein. Among them, the light-emitting device 20 may include an anode, a light-emitting layer, and a cathode arranged in a stacked manner. Further, the light-emitting layer may further include film layers such as a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. Of course, in practical applications, the light-emitting device 20 can be designed according to the requirements of the actual application environment, which is not limited herein.

[0071] The first and second poles of each of the transistors mentioned above can have their functions interchanged according to the corresponding type and the signal of the signal terminal. For example, the first pole can be the source electrode, and correspondingly the second pole can be the drain electrode. Another example is that the first pole can be the drain electrode, and correspondingly the second pole can be the source electrode. This is not limited herein. Each transistor can be a thin film transistor (TFT, Thin Film Transistor), or a metal oxide semiconductor field effect transistor (MOS, Metal Oxide Semiconductor). This is not limited herein. Of course, the specific type of each transistor can also be set according to actual application needs. This is not limited herein.

[0072] The above is only an example to illustrate the specific structure of the pixel circuit provided by the embodiments of the present invention. In specific implementation, the specific structure of the above pixel circuit is not limited to the above structure provided by the embodiments of the present invention, and can also be other structures known to those skilled in the art. All of these are within the protection scope of the present invention and are not specifically limited herein.

[0073] Next, taking Figure 3 the pixel circuit structure shown in Figure 4 and the timing diagram shown in

[0074] as an example, the working process of the pixel circuit provided by the embodiments of the present invention will be described. Among them, the potential signal provided by the first power supply terminal VDD is a high level, and the potential signal provided by the second power supply terminal VSS is a low level. Among them, "0" represents a low level, and "1" represents a high level. It should be noted that the embodiments of the present invention are for better explaining the pixel circuit provided by the present invention and do not limit the specific implementation of the present invention.

[0075] In the initialization stage t1, under the control of the high level of the first reset control terminal Re_N, the first reset transistor T1 writes the provided first initialization signal to the gate of the driving transistor T3 through the first initialization signal terminal Vinit1 to reset the gate of the driving transistor T3; under the control of the low level of the second scan control terminal Gate_P, the provided second initialization signal is written to the anode of the light-emitting device 20 through the second initialization signal terminal Vinit2 to reset the first pole of the light-emitting device 20. When the first pole of the light-emitting device 20 is the anode, the problem of frequency-cutting flicker is avoided. At this time, under the control of the low level of the second scan control terminal Gate_P, the first light-emitting control transistor T5 is turned off. Under the control of the low level of the first scan control terminal Gate_N, the first sub-transistor T4 is turned off. In this way, even when the voltage provided by the data signal terminal Vdata is large or the voltage provided by the first power supply terminal VDD is large, no loop current will be formed between the data signal terminal Vdata and the first power supply terminal VDD, avoiding the problems of pixel circuit trace burning and leakage of the driving transistor T3, and ensuring the driving ability of the pixel circuit.

[0076] In the data writing stage t2, Re_N (reset control terminal Re_N) = 0, Gate_N (first scan control terminal Gate_N) = 1, Gate_P (second scan control terminal Gate_P) = 0, EM (light-emitting control terminal EM) = 1;

[0077] In the data writing stage t2, under the control of the high level loaded on the first scan control terminal Gate_N, the compensation transistor T2 and the first sub-transistor T4 are turned on. At this time, the data signal provided by the data signal terminal Vdata can be written to the second pole of the driving transistor T3 through the turned-on first sub-transistor T4 and the second sub-transistor T8, and the data signal and the threshold voltage of the driving transistor T3 can be written to the storage capacitor C through the turned-on compensation transistor T2. In addition, under the control of the low level of the second scan control terminal Gate_P, the first light-emitting control transistor T5 is turned off. Under the control of the high level of the first scan control terminal Gate_N, the first sub-transistor T4 is turned on. In this way, even when the voltage provided by the data signal terminal Vdata is large or the voltage provided by the first power supply terminal VDD is large, no loop current will be formed between the data signal terminal Vdata and the first power supply terminal VDD, avoiding the problems of pixel circuit trace burning and leakage of the driving transistor T3, and ensuring the driving ability of the pixel circuit.

[0078] In the light-emitting stage t3, Re_N (reset control terminal Re_N) = 0, Gate_N (first scan control terminal Gate_N) = 0, Gate_P (second scan control terminal Gate_P) = 1, EM (light-emitting control terminal EM) = 0;

[0079] In the light-emitting stage t3, under the control of the high level of the second scan control terminal Gate_P, the first light-emitting control transistor T5 is turned on; under the control of the low level of the light-emitting control terminal EM, the second light-emitting control transistor T6 is turned on, and the driving transistor T3 stably outputs a driving current under the voltage of the storage capacitor C maintaining the written signal, thereby driving the light-emitting device 20 to emit light. In addition, under the control of the low level of the first scan control terminal Gate_N, the first sub-transistor T4 is turned off. In this way, even when the voltage provided by the data signal terminal Vdata is large or the voltage provided by the first power supply terminal VDD is large, no loop current is formed between the data signal terminal Vdata and the first power supply terminal VDD, avoiding the problem of pixel circuit trace burning and leakage of the driving transistor T3, and ensuring the driving ability of the pixel circuit.

[0080] Based on the same inventive concept, as Figure 5 shown, an embodiment of the present invention further provides a display device, which includes:

[0081] A plurality of pixel circuits 100 as described above provided in the display area A, and a gate driving circuit 200 provided in the non-display area B, where the gate driving circuit 200 is configured to provide corresponding signals to the first scan control terminal Gate_N, the second scan control terminal Gate_P, and the reset control terminal Re_N of the pixel circuit 100.

[0082] In a specific implementation process, one of the distribution schematic diagrams of the display area A and the non-display area B may be as Figure 5 shown, and the display area A and the non-display area B can also be divided according to actual application needs, which will not be elaborated here.

[0083] In one exemplary embodiment, as Figure 6 shown, the gate driving circuit 200 includes a first gate driving unit 201 and a second gate driving unit 202. The first gate driving unit 201 is coupled to the first scan control terminal Gate_N of each pixel circuit 100, and the second gate driving unit 202 is coupled to the second scan control terminal Gate_P of each pixel circuit 100.

[0084] Still referring to Figure 6 shown, the first gate driving unit 201 is configured to provide a first scan control signal to the first scan control terminal Gate_N, and the second gate driving unit 202 is configured to provide a second scan control signal to the second scan control terminal Gate_P.

[0085] In one exemplary embodiment, as Figure 7As shown, the gate driving circuit 200 further includes a reset driving unit 203, and the reset driving unit 203 is coupled to the reset control terminals Re_N of the respective pixel circuits 100.

[0086] In one exemplary embodiment, as Figure 8 shown, the first gate driving unit 201 is coupled to the reset control terminals Re_N of the respective pixel circuits 100, and the reset control terminal Re_N and the first scan control terminal Gate_N of the same pixel circuit 100 are respectively coupled to different stage output terminals of the first gate driving unit 201.

[0087] Since the principle of the display device for solving the problem is similar to that of the foregoing pixel circuit 100, the implementation of the display device can refer to the implementation of the foregoing pixel circuit 100, and the repeated parts will not be described again. The structure of the pixel circuit 100 provided in the embodiments of the present invention can refer to the description of the foregoing relevant parts and will not be described here again.

[0088] In a specific implementation process, the display device provided in the embodiments of the present invention can be a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or any other product or component with a display function. Other essential components of the display device should be understood by those of ordinary skill in the art and will not be described here, nor should they be regarded as a limitation to the present invention.

[0089] Based on the same inventive concept, as Figure 9 shown, the embodiments of the present invention further provide a driving method for the foregoing pixel circuit, and the driving method includes:

[0090] S101: In the initialization stage, control the first reset transistor and the second reset transistor to conduct, reset the gate of the driving transistor through the first initialization signal terminal, and reset the potential of the first pole of the light-emitting device through the second initialization signal terminal;

[0091] S102: In the data writing stage, control the compensation transistor, the first sub-transistor, and the second sub-transistor to conduct, write the data signal provided by the data signal terminal to the second pole of the driving transistor, and write the threshold voltage of the driving transistor and the data signal to the storage capacitor;

[0092] S103: In the light-emitting stage, control the first light-emitting control transistor and the second light-emitting control transistor to conduct, so that the driving transistor stably outputs a driving current under the voltage of the signal written in the storage capacitor to drive the light-emitting device to emit light.

[0093] In the specific implementation process, for the specific implementation processes of steps S101 to S103, reference may be made to the descriptions of the corresponding parts of the pixel circuit structure shown by Figure 3 and the timing diagram shown by Figure 4 , which will not be elaborated herein.

[0094] An embodiment of the present invention provides a pixel circuit, a driving method thereof, and a display device. Among them, the pixel circuit provided by the embodiment of the present invention can turn on a first reset transistor under the control of a reset control terminal, so as to reset the gate of a driving transistor through a first initialization signal terminal; under the control of a second scan control terminal, a second reset transistor can be turned on, so as to reset a first pole of a light-emitting device through a second initialization signal terminal. When the first pole of the light-emitting device is an anode, the problem of frequency-cutting flicker is avoided; when a first sub-transistor and a second sub-transistor included in a data writing transistor 10 are turned on and a compensation transistor is turned on, a data signal provided by a data signal terminal can be written into the gate of the driving transistor, and the threshold voltage of the driving transistor and the data signal are written into a storage capacitor; in addition, under the control of the second scan control terminal, a first light-emitting control transistor can be turned on, and under the control of a light-emitting control terminal, a second light-emitting control transistor can be turned on, so that the driving transistor stably outputs a driving current under the voltage of the signal written and maintained by the storage capacitor, so as to drive the light-emitting device to emit light, thereby ensuring the driving ability of the pixel circuit; for the pixel circuit provided by the embodiment of the present invention, due to the addition of a second sub-transistor, the generation of a loop between the data signal terminal and the first power supply terminal is avoided, thereby avoiding the leakage problem of the driving transistor and ensuring the driving ability of the pixel circuit.

[0095] Although the preferred embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications to these embodiments once they know the basic creative concept. Therefore, the appended claims are intended to be construed as including the preferred embodiments and all changes and modifications falling within the scope of the present invention.

[0096] Obviously, those skilled in the art can make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, this application is also intended to include these changes and modifications.

Claims

1. A pixel circuit, characterized in that, comprising: a first reset transistor, a compensation transistor, a driving transistor, a data writing transistor, a first light-emitting control transistor, a second light-emitting control transistor, a second reset transistor, a light-emitting device, and a storage capacitor; wherein: The first reset transistor is coupled between the gate of the driving transistor and a first initialization signal terminal, and the gate is coupled to a reset control terminal; The compensation transistor is coupled between the gate of the driving transistor and a first pole, and the gate is coupled to a first scan control terminal; The data writing transistor includes a first sub-transistor and a second sub-transistor with opposite types; the first sub-transistor is coupled between the first pole of the second sub-transistor and a data signal terminal, and the gate is coupled to the first scan control terminal; the second sub-transistor is coupled between the second pole of the driving transistor and the first pole of the first sub-transistor, and the gate is coupled to the second pole of the driving transistor; The first light-emitting control transistor is coupled between a first power supply terminal and the second pole of the driving transistor, and the gate is coupled to a second scan control terminal; The second light-emitting control transistor is coupled between the first pole of the driving transistor and the first pole of the light-emitting device, and the gate is coupled to a light-emitting control terminal, and the second pole of the light-emitting device is coupled to a second power supply terminal; The second reset transistor is coupled between the first pole of the light-emitting device and a second initialization signal terminal, and the gate is coupled to the second scan control terminal; The storage capacitor is coupled between the gate of the driving transistor and the first power supply terminal; wherein, the first reset transistor, the compensation transistor, the first sub-transistor, and the first light-emitting control transistor are of the same type.

2. The pixel circuit according to claim 1, characterized in that, The first scan control terminal, the second scan control terminal, and the reset control terminal are respectively coupled to different gate driving units.

3. The pixel circuit according to claim 1, characterized in that, The reset control terminal and the first scan control terminal are respectively coupled to output terminals of different stages of the same gate driving unit, and the reset control signal provided by the reset control terminal is earlier than the first scan control signal provided by the first scan control terminal.

4. The pixel circuit according to claim 1, characterized in that, The first initialization signal terminal is coupled to the second initialization signal terminal.

5. The pixel circuit according to claim 1, characterized in that, The first initialization signal terminal is respectively coupled to different control terminals, and the voltage value of the second initialization signal provided by the second initialization signal terminal is negative.

6. The pixel circuit according to any one of claims 1-5, characterized in that, The first reset transistor, the compensation transistor, the first sub-transistor, and the first light-emitting control transistor are all N-type transistors, and the driving transistor, the second light-emitting control transistor, and the second sub-transistor are all P-type transistors.

7. The pixel circuit according to claim 6, characterized in that, The first reset transistor, the compensation transistor, the first sub-transistor, and the first light-emitting control transistor are all oxide transistors, and the driving transistor, the second light-emitting control transistor, and the second sub-transistor are all polysilicon transistors.

8. A display device, characterized in that it includes: a plurality of pixel circuits as described in any one of claims 1-7 provided in a display area, and a gate driving circuit provided in a non-display area, where the gate driving circuit is configured to provide corresponding signals to a first scan control terminal, a second scan control terminal, and a reset control terminal of the pixel circuit.

9. The display device as claimed in claim 8, characterized in that the gate driving circuit includes a first gate driving unit and a second gate driving unit, the first gate driving unit is coupled to the first scan control terminal of each pixel circuit, and the second gate driving unit is coupled to the second scan control terminal of each pixel circuit.

10. The display device as claimed in claim 9, characterized in that the gate driving circuit further includes a reset driving unit, and the reset driving unit is coupled to the reset control terminal of each pixel circuit.

11. The display device as claimed in claim 10, characterized in that the first gate driving unit is coupled to the reset control terminal of each pixel circuit, and the reset control terminal and the first scan control terminal of the same pixel circuit are respectively coupled to different-stage output terminals of the first gate driving unit.

12. A driving method for a pixel circuit as described in any one of claims 1-7, characterized in that it includes: In an initialization stage, controlling the first reset transistor and the second reset transistor to conduct, resetting the gate of the driving transistor through the first initialization signal terminal, and resetting the potential of the first pole of the light-emitting device through the second initialization signal terminal; In a data writing stage, controlling the compensation transistor, the first sub-transistor, and the second sub-transistor to conduct, writing the data signal provided by the data signal terminal into the second pole of the driving transistor, and writing the threshold voltage of the driving transistor and the data signal into the storage capacitor; In a light-emitting stage, controlling the first light-emitting control transistor and the second light-emitting control transistor to conduct, so that the driving transistor stably outputs a driving current under the voltage of the signal written in the storage capacitor to drive the light-emitting device to emit light.

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