Light emitting diode with improved light extraction efficiency and method of manufacturing the same
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HC SEMITEK ZHEJIANG CO LTD
- Filing Date
- 2022-09-16
- Publication Date
- 2026-06-09
AI Technical Summary
In existing light-emitting diodes, the reflection effect of the substrate reduces the light extraction efficiency, and the oblique light rays are emitted in the direction of the substrate sidewall, which affects the amount of light.
An isolation region is set on the substrate of the light-emitting diode, and a reflective structure is filled in the groove to form a reflective surface to guide light to reflect onto the second surface, thereby improving the light extraction efficiency.
By setting grooves and reflective structures in the isolation region of the substrate, the amount of light emitted from the light-emitting diode is increased, thereby improving the light extraction efficiency.
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Figure CN115663081B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting diode with improved light extraction efficiency and a method for its fabrication. Background Technology
[0002] Light-emitting diodes (LEDs) are highly influential new products in the optoelectronics industry. They are characterized by their small size, long lifespan, rich and colorful colors, and low energy consumption. They are widely used in lighting, displays, signal lights, backlights, toys, and other fields.
[0003] In related technologies, light-emitting diodes typically include a substrate, an epitaxial layer, and electrodes stacked sequentially. Light emitted from the epitaxial layer is usually emitted through a transparent substrate.
[0004] Because the substrate has a certain thickness, the oblique light emitted from the epitaxial layer is easily reflected at the light-emitting surface of the substrate. The reflected light will be emitted towards the sidewall of the substrate and eventually exit from the sidewall of the substrate, thereby reducing the amount of light emitted from the light-emitting surface of the substrate and affecting the light-emitting efficiency of the light-emitting diode. Summary of the Invention
[0005] This disclosure provides a light-emitting diode (LED) with improved light extraction efficiency and its fabrication method, which can increase the amount of light emitted from the light-emitting surface of the LED and improve its light extraction efficiency. The technical solution is as follows:
[0006] This disclosure provides a light-emitting diode (LED) comprising: a substrate and a light-emitting structure. The substrate includes a light-emitting region and an isolation region located at the edge of the light-emitting region. The light-emitting structure is located on a first surface of the substrate and at least in the light-emitting region. The first surface has a plurality of grooves located in the isolation region. The plurality of grooves are provided with a reflective structure for reflecting light toward a second surface of the substrate. The first surface and the second surface are two opposite surfaces of the substrate.
[0007] In one implementation of this disclosure, the thickness of the substrate in the isolation region is less than the thickness in the light-emitting region.
[0008] In another implementation of the present disclosure, the thickness of the substrate in the isolation region is not less than half the thickness of the light-emitting region.
[0009] In another implementation of this disclosure, the reflective structure is flush with the first surface in the isolated region.
[0010] In another implementation of the embodiments of this disclosure, the reflective structure includes an inorganic material layer and / or an organic material layer.
[0011] In another implementation of the embodiments of this disclosure, the reflective structure includes a distributed Bragg reflector layer.
[0012] In another implementation of this disclosure, the light-emitting structure includes an epitaxial layer and a passivation layer, wherein the epitaxial layer is located in the light-emitting region, and the passivation layer is located on the surface of the epitaxial layer and in the isolation region.
[0013] In another implementation of the present disclosure, the light-emitting region has multiple protrusions, and the light-emitting structure is located on the surface of the multiple protrusions.
[0014] This disclosure provides a method for fabricating a light-emitting diode (LED). The method includes: fabricating a substrate, the substrate including a light-emitting region and an isolation region located at the edge of the light-emitting region, the substrate having a first surface and a second surface opposite to each other, the first surface having a plurality of grooves located in the isolation region, the plurality of grooves having a reflective structure for reflecting light toward the second surface of the substrate; and forming a light-emitting structure on the first surface, at least a portion of the light-emitting structure being located in the light-emitting region.
[0015] In another implementation of the present disclosure, the substrate fabrication includes: providing a substrate; fabricating a plurality of protrusions in the light-emitting region of the substrate; fabricating a plurality of grooves in the isolation region of the substrate; filling the plurality of grooves with silicon oxide material to form a reflective structure, wherein the reflective structure is flush with the first surface in the isolation region.
[0016] The beneficial effects of the technical solutions provided in this disclosure include at least the following:
[0017] The light-emitting diode (LED) provided in this embodiment includes a substrate and a light-emitting structure. The light-emitting structure is disposed on a first surface of the substrate and is at least partially located in the light-emitting region. Multiple grooves are provided on an isolation region of the substrate, and a reflective structure is also provided within each groove. Thus, the interface between the reflective structure and the substrate forms a reflective surface to reflect light. When light emitted from the light-emitting structure enters the substrate from the light-emitting region, if the light obliquely illuminates the light-emitting surface of the substrate, the light will be reflected from the light-emitting surface and reflected towards the sidewall of the substrate. Because the isolation region surrounding the light-emitting region has a reflective surface formed by the reflective structure and grooves, and the reflective surface is located in the direction of light reflection, when the reflected light illuminates the reflective surface, it is reflected and guided towards the second surface of the substrate, thereby increasing the amount of light emitted from the LED and improving the light extraction efficiency of the LED. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure;
[0020] Figure 2 This is a schematic diagram of another light-emitting diode structure provided in an embodiment of this disclosure;
[0021] Figure 3 This is a flowchart of a method for fabricating a light-emitting diode provided in an embodiment of this disclosure.
[0022] The markings in the diagram are explained as follows:
[0023] 10. Substrate; 11. First surface; 12. Second surface; 101. Light-emitting area; 102. Isolation area; 13. Groove; 14. Protrusion; 15. Reflective structure;
[0024] 20. Epitaxial layer; 21. n-type layer; 22. Emissive layer; 23. p-type layer;
[0025] 31. Passivation layer; 32. Transparent conductive layer; 33. Electrode; 34. Via; 35. Solder block. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.
[0027] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.
[0028] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure. For example... Figure 1 As shown, the light-emitting diode includes: a substrate 10 and a light-emitting structure. The substrate 10 includes a light-emitting region 101 and an isolation region 102 located at the edge of the light-emitting region 101. The light-emitting structure is located on a first surface 11 of the substrate 10 and is at least located in the light-emitting region 101. The first surface 11 has a plurality of grooves 13. The plurality of grooves 13 are located in the isolation region 102. The plurality of grooves 13 are provided with a reflective structure 15 for reflecting light toward a second surface 12 of the substrate 10. The first surface 11 and the second surface 12 are two opposite surfaces of the substrate 10.
[0029] The light-emitting diode provided in this embodiment includes a substrate 10 and a light-emitting structure. The light-emitting structure is disposed on a first surface 11 of the substrate 10 and is at least partially located in the light-emitting region 101. A plurality of grooves 13 are disposed on an isolation region 102 on the substrate 10, and a reflective structure 15 is also disposed in the grooves 13. In this way, the interface between the reflective structure 15 and the substrate 10 can form a reflective surface to reflect light.
[0030] See Figure 1As shown by the middle arrow, after the light emitted from the light-emitting structure enters the substrate 10 from the light-emitting region 101, if the light obliquely strikes the light-emitting surface of the substrate 10 within the substrate 10, the light will be reflected from the light-emitting surface of the substrate 10 and then reflected towards the sidewall of the substrate 10. Since the isolation region 102 surrounding the light-emitting region 101 has a reflective surface formed by the reflective structure 15 and the groove 13, and the reflective surface is located in the direction of light reflection, when the reflected light strikes the reflective surface, it is reflected and guided towards the second surface 12 of the substrate 10, thereby increasing the amount of light emitted from the second surface 12 of the light-emitting diode and improving the light extraction efficiency of the light-emitting diode.
[0031] Optionally, the substrate 10 may be a sapphire substrate 10, a silicon substrate 10, or a silicon carbide substrate 10. The substrate 10 may be a flat substrate 10 or a patterned substrate 10.
[0032] As an example, in this embodiment of the disclosure, the substrate 10 is a sapphire substrate 10. The sapphire substrate 10 is a commonly used substrate 10, with mature technology and low cost. Specifically, it can be a patterned sapphire substrate 10 or a flat sapphire substrate 10.
[0033] Optionally, the light-emitting structure may include an epitaxial layer 20 located in the light-emitting region 101 of the first surface 11. The epitaxial layer 20 may include an n-type layer 21, a light-emitting layer 22, and a p-type layer 23 stacked sequentially.
[0034] For example, p-type layer 23 can be a p-type AlInP layer.
[0035] For example, the light-emitting layer 22 may include alternately grown InGaN quantum well layers and GaN quantum barrier layers. The light-emitting layer 22 may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.
[0036] For example, the n-type layer 21 can be an n-type GaN layer.
[0037] Optionally, the light-emitting region 101 has a plurality of protrusions 14, and the light-emitting structure is located on the surface of the plurality of protrusions 14. By providing a plurality of protrusions 14 in the light-emitting region 101 for growing the epitaxial layer 20 on the substrate 10, a patterned substrate 10 is formed, which is beneficial to improving the growth quality of the epitaxial layer 20.
[0038] like Figure 1 As shown, the light-emitting structure also includes a passivation layer 31, two electrodes 33 and two solder blocks 35. The surface of the p-type layer 23 on the epitaxial layer 20 has a groove that exposes the n-type layer 21. One electrode 33 is located on the surface of the p-type layer 23, and the other electrode 33 is located in the groove and on the surface of the n-type layer 21.
[0039] The passivation layer 31 is located at least on the surface of the p-type layer 23, within the groove, on the surfaces of the two electrodes 33, and on the surface of the n-type layer 21. The surface of the passivation layer 31 also has two vias 34 exposing the two electrodes 33 respectively. Two solder joints 35 are located on the surface of the passivation layer 31, with one solder joint 35 connected to the electrode 33 on the p-type layer 23 through one via 34, and the other solder joint 35 connected to the electrode 33 on the n-type layer 21 through the other via 34.
[0040] This exposes the solder joint 35 to the passivation layer 31, facilitating connection with an external power source and allowing the epitaxial layer 20 to emit light when powered.
[0041] In the example system, the passivation layer 31 can be a distributed Bragg reflection, or DBR layer for short. The DBR layer consists of multiple periodically alternating layers of SiO2 and TiO2. The number of periods in the DBR layer can be between 20 and 50. For example, the number of periods in the DBR layer is 32.
[0042] The thickness of the SiO2 layer in the DBR layer can be from 800 angstroms to 1200 angstroms, and the thickness of the TiO2 layer can be from 500 angstroms to 900 angstroms.
[0043] In addition to its passivation function, the DBR layer also reflects light emitted from the light-emitting layer 22 toward the DBR layer back to the substrate, thereby improving the light emission effect.
[0044] For example, such as Figure 1 As shown, the light-emitting structure may also include a transparent conductive layer 32, which is located between the p-type layer 23 and the electrode 33.
[0045] Optionally, the transparent conductive layer 32 can be an indium tin oxide (ITO) film. Indium tin oxide films have good transmittance and low resistivity. Using an indium tin oxide film as the transparent conductive layer 32 allows more light to pass through, thus ensuring optimal performance. Simultaneously, due to its low resistivity, it also facilitates carrier conduction, improving injection efficiency.
[0046] For example, when the transparent conductive layer 32 is an ITO layer, the thickness of the transparent conductive layer 32 can be from 50 angstroms to 5000 angstroms.
[0047] Optionally, the transparent conductive layer 32 can be a NiAu layer. The NiAu layer has good light transmittance, which not only facilitates carrier conduction but also effectively prevents the light from being blocked from the epitaxial layer 20.
[0048] For example, when the transparent conductive layer 32 is a NiAu layer, the thickness of the transparent conductive layer 32 may not exceed 20 angstroms.
[0049] Figure 2 This is a schematic diagram of another light-emitting diode structure provided in an embodiment of this disclosure. For example... Figure 2 As shown, the thickness L1 of the substrate 10 in the isolation region 102 is less than the thickness L2 in the light-emitting region 101.
[0050] The isolation region 102 is positioned closer to the second surface 12, that is, closer to the light-emitting surface of the light-emitting diode. Thus, when light is reflected from the second surface 12 towards the sidewall of the substrate 10, and then reflected again through the groove 13 of the isolation region 102 and the reflective surface of the reflective structure 15 back to the second surface 12, the path of the light is shorter. This reduces the amount of light absorbed within the substrate 10 and increases the amount of light emitted from the second surface 12, thereby improving the light emission performance of the light-emitting diode.
[0051] For example, such as Figure 2 As shown, the thickness L1 of the substrate 10 in the isolation region 102 is not less than half the thickness L2 of the substrate 10 in the light-emitting region 101. For example, the ratio of the thickness L1 of the substrate 10 in the isolation region 102 to the thickness L2 of the substrate 10 in the light-emitting region 101 can be one-half, that is, the isolation region 102 of the substrate 10 is located in the middle of the sidewall of the substrate 10.
[0052] By setting the ratio of the thickness of the substrate 10 in the isolation region 102 to the thickness of the substrate 10 in the light-emitting region 101 within the aforementioned range, it is possible to avoid setting the ratio of the thickness of the substrate 10 in the isolation region 102 to the thickness of the substrate 10 in the light-emitting region 101 too large, which would cause the groove 13 to be positioned closer to the first surface 11, thus failing to shorten the light reflection path. It is also possible to avoid setting the ratio of the thickness of the substrate 10 in the isolation region 102 to the thickness of the substrate 10 in the light-emitting region 101 too small, which would cause the groove 13 to be positioned closer to the second surface 12, making it difficult for light to be reflected onto the reflective surface formed between the groove 13 and the reflective structure 15, thus affecting the light emission effect.
[0053] Optionally, such as Figure 1 , 2 As shown, in the isolation region 102, the reflective structure 15 is flush with the first surface 11.
[0054] In the above implementation, the groove 13 is completely filled by the reflective structure 15 so that the surface of the reflective structure 15 is flush with the surface of the isolation area 102, thus making the surface of the isolation area 102 smoother.
[0055] Since the passivation layer 31 in the epitaxial layer 20 is located on the surface of the epitaxial layer 20 and the isolation region 102, that is, the passivation layer 31 extends from the light-emitting region 101 to the isolation region 102, the surface of the isolation region 102 is made smoother by completely filling the groove 13, thereby avoiding the problem of the passivation layer 31 breaking in the isolation region 102.
[0056] Optionally, the reflective structure 15 may include an inorganic material layer and / or an organic material layer.
[0057] For example, the inorganic material layer may include a silicon oxide layer.
[0058] In this embodiment of the disclosure, the substrate 10 may be a sapphire substrate 10, and the refractive index of silicon oxide is different from that of the sapphire substrate 10. In this way, the interface between the silicon oxide and the surface of the groove 13 can form a reflective surface for light reflection.
[0059] For example, the inorganic material layer may include a metal layer. For instance, the metal layer may be a Cu layer or an Au layer.
[0060] For example, the reflective structure may also include a distributed Bragg mirror layer. That is, the reflective structure may be a DBR layer.
[0061] The reflective structure comprises multiple periodically alternating layers of SiO2 and TiO2. The number of periods in the DBR layer can range from 20 to 50. For example, the DBR layer has 22 periods.
[0062] The thickness of the SiO2 layer in the DBR layer can be from 800 angstroms to 1000 angstroms, and the thickness of the TiO2 layer can be from 300 angstroms to 800 angstroms.
[0063] Figure 3 This is a flowchart illustrating a method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. Figure 3 As shown, the preparation method includes:
[0064] S11: Fabrication of substrate.
[0065] The substrate includes a light-emitting region and an isolation region located at the edge of the light-emitting region. The substrate has a first surface and a second surface that are opposite to each other. The first surface has a plurality of grooves located in the isolation region. The grooves are provided with reflective structures for reflecting light toward the second surface of the substrate.
[0066] S12: A light-emitting structure is formed on the first surface, at least a portion of which is located in the light-emitting region.
[0067] The light-emitting diode (LED) fabricated by this method includes a substrate and a light-emitting structure. The light-emitting structure is disposed on a first surface of the substrate and is at least partially located in the light-emitting region. Multiple grooves are formed on an isolation region of the substrate, and reflective structures are also provided within the grooves. Thus, the interface between the reflective structure and the substrate forms a reflective surface to reflect light. When light emitted from the light-emitting structure enters the substrate from the light-emitting region, if the light obliquely strikes the light-emitting surface of the substrate, the light will be reflected at the light-emitting surface and reflected towards the sidewalls of the substrate. Because the isolation region surrounding the light-emitting region has a reflective surface formed by the reflective structure and grooves, and the reflective surface is located in the direction of light reflection, when the reflected light strikes the reflective surface, it is reflected and guided towards the second surface of the substrate, thereby increasing the amount of light emitted from the LED and improving the light extraction efficiency of the LED.
[0068] The process of preparing the substrate in step S11 may include the following steps:
[0069] The first step is to provide a substrate.
[0070] The substrate can be a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.
[0071] As an example, in this embodiment of the disclosure, the substrate is a sapphire substrate. Sapphire substrates are a commonly used substrate, with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a flat sapphire substrate.
[0072] The second step is to create multiple protrusions in the light-emitting area of the substrate.
[0073] Specifically, a mask can be formed on the first surface of the substrate, and multiple protrusions can be formed in the light-emitting area by etching.
[0074] The third step is to create multiple grooves in the isolation area of the substrate.
[0075] Specifically, a mask can be formed on the first surface of the substrate, and multiple grooves can be formed in the isolation area by etching.
[0076] The fourth step is to fill the multiple grooves with silicon oxide material to form a reflective structure.
[0077] In the isolated area, the reflective structure is flush with the first surface.
[0078] Specifically, a mask is formed on the first surface of the substrate. The mask has through holes that expose the grooves. A reflective structure is formed by vapor deposition through the through holes into the grooves.
[0079] In this embodiment of the disclosure, the light-emitting structure may include an epitaxial layer 20, a transparent conductive layer 32, a passivation layer 31, two electrodes 33, and two solder blocks 35.
[0080] like Figure 1 As shown, the epitaxial layer 20 is located in the light-emitting region 101 of the first surface 11. The epitaxial layer 20 may include an n-type layer 21, a light-emitting layer 22, and a p-type layer 23 stacked sequentially.
[0081] For example, p-type layer 23 can be a p-type AlInP layer.
[0082] For example, the light-emitting layer 22 may include alternately grown InGaN quantum well layers and GaN quantum barrier layers. The light-emitting layer 22 may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.
[0083] For example, the n-type layer 21 can be an n-type GaN layer.
[0084] like Figure 1 As shown, the surface of the p-type layer 23 on the epitaxial layer 20 has a groove that exposes the n-type layer 21. One electrode 33 is located on the surface of the p-type layer 23, and another electrode 33 is located in the groove and on the surface of the n-type layer 21.
[0085] The passivation layer 31 is located at least on the surface of the p-type layer 23, within the groove, on the surfaces of the two electrodes 33, and on the surface of the n-type layer 21. The surface of the passivation layer 31 also has two vias 34 exposing the two electrodes 33 respectively. Two solder joints 35 are located on the surface of the passivation layer 31, with one solder joint 35 connected to the electrode 33 on the p-type layer 23 through one via 34, and the other solder joint 35 connected to the electrode 33 on the n-type layer 21 through the other via 34.
[0086] For example, such as Figure 1 As shown, the transparent conductive layer 32 is located between the p-type layer 23 and the electrode 33.
[0087] Optionally, the transparent conductive layer 32 may be an ITO layer.
[0088] The process of preparing the light-emitting structure in step S12 may include the following steps:
[0089] The first step is to grow an n-type layer, a light-emitting layer, and a p-type layer sequentially in the light-emitting region of the substrate to form an epitaxial layer.
[0090] Among them, the p-type layer can be a p-type AlInP layer.
[0091] For example, the thickness of the p-type layer can be from 100 nm to 800 nm, such as 450 nm.
[0092] For example, the doping concentration of the p-type dopant in the p-type layer can be 10. 18 / cm 3 Up to 10 20 / cm 3 For example, a doping concentration of 10 19 / cm 3 .
[0093] The light-emitting layer may include alternating InGaN quantum well layers and GaN quantum barrier layers. The light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.
[0094] For example, the thickness of the InGaN quantum well can be from 2.5 nm to 3.5 nm, for example, the thickness of the InGaN quantum well is 3 nm; the thickness of the GaN quantum barrier can be from 9 nm to 20 nm, for example, the thickness of the GaN quantum barrier is 15 nm.
[0095] For example, the number of InGaN quantum well layers is the same as the number of GaN quantum barrier layers. The number of InGaN quantum well layers can be from 3 to 8, for example, the number of InGaN quantum well layers is 7.
[0096] The n-type layer can be an n-type GaN layer.
[0097] For example, the thickness of the n-type layer can be from 1 μm to 5 μm, such as 3 μm.
[0098] For example, the doping concentration of the n-type dopant in the n-type layer can be 10. 18 / cm 3 Up to 10 19 / cm 3 For example, a doping concentration of 5 × 10 18 / cm 3 .
[0099] The second step is to etch grooves on the surface of the p-type layer to expose the n-type layer.
[0100] Specifically, this process may involve: forming a photoresist pattern on a p-type layer using photolithography; then, dry etching the p-type layer and emissive layer that are not covered by photoresist to create a groove exposing the n-type layer; and finally, removing the photoresist.
[0101] The third step is to form a transparent conductive layer on the surface of the p-type layer.
[0102] The preparation of a transparent conductive layer may include: first laying an indium tin oxide film, and then using photolithography and etching techniques to pattern the indium tin oxide film to obtain a transparent conductive layer.
[0103] Step four, two electrodes.
[0104] One electrode is connected to the transparent conductive layer, and the other electrode is located in the groove and connected to the n-type layer.
[0105] Optionally, both electrodes comprise one or more of the following metals: gold (Au), aluminum (Al), nickel (Ni), platinum (Pt), chromium (Cr), and titanium (Ti).
[0106] The fifth step is to form a passivation layer on the p-type layer, the groove, the n-type layer, and the two electrodes.
[0107] For example, the passivation layer may be a SiO2 layer.
[0108] The process of forming the passivation layer may include: first laying a SiO2 layer, and then using photolithography and etching techniques to pattern the SiO2 layer to obtain the passivation layer.
[0109] Step 6: Erase two vias on the surface of the passivation layer and fabricate two solder blocks on the surface of the passivation layer. One solder block is connected to the electrode on the p-type layer through a via, and the other solder block is connected to the electrode on the n-type layer through another via.
[0110] The above is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above through embodiments, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.
Claims
1. A light-emitting diode, characterized in that, The light-emitting diode includes a substrate (10) and a light-emitting structure. The substrate (10) includes a light-emitting region (101) and an isolation region (102) located at the edge of the light-emitting region (101). The light-emitting structure is located on a first surface (11) of the substrate (10) and is located on the light-emitting region (101). The isolation region (102) surrounds the light-emitting structure. The first surface (11) has a plurality of grooves (13). The plurality of grooves (13) are located on the isolation region (102). The plurality of grooves (13) are provided with a reflective structure (15) for reflecting light to a second surface (12) of the substrate (10). The first surface (11) and the second surface (12) are two opposite surfaces of the substrate (10).
2. The light-emitting diode according to claim 1, characterized in that, The thickness of the substrate (10) in the isolation region (102) is less than the thickness in the light-emitting region (101).
3. The light-emitting diode according to claim 2, characterized in that, The thickness of the substrate (10) in the isolation region (102) is not less than half the thickness of the light-emitting region (101).
4. The light-emitting diode according to claim 1, characterized in that, In the isolation area (102), the reflective structure (15) is flush with the first surface (11).
5. The light-emitting diode according to claim 4, characterized in that, The reflective structure (15) includes an inorganic material layer and / or an organic material layer.
6. The light-emitting diode according to claim 4, characterized in that, The reflective structure (15) includes a distributed Bragg reflector layer.
7. The light-emitting diode according to claim 4, characterized in that, The light-emitting structure includes an epitaxial layer (20) and a passivation layer (31), wherein the epitaxial layer (20) is located in the light-emitting region (101), and the passivation layer (31) is located on the surface of the epitaxial layer (20) and the isolation region (102).
8. The light-emitting diode according to any one of claims 1 to 7, characterized in that, The light-emitting area (101) has a plurality of protrusions (14), and the light-emitting structure is located on the surface of the plurality of protrusions (14).
9. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: A substrate is fabricated, the substrate including a light-emitting region and an isolation region located at the edge of the light-emitting region, the substrate having a first surface and a second surface opposite to each other, the first surface having a plurality of grooves located in the isolation region, and the plurality of grooves having a reflective structure for reflecting light toward the second surface of the substrate; A light-emitting structure is formed on the first surface, the light-emitting structure is located in the light-emitting region, and the isolation region surrounds the light-emitting structure.
10. The preparation method according to claim 9, characterized in that, The substrate fabrication includes: Provide a substrate; Multiple protrusions are formed in the light-emitting region of the substrate; Multiple grooves are formed in the isolation region of the substrate; Silicon oxide material is filled into the plurality of grooves to form a reflective structure, and in the isolation area, the reflective structure is flush with the first surface.