High crystal quality light emitting diode epitaxial wafer and method of manufacturing the same
By using high-temperature recrystallization of the buffer layer and a three-dimensional nucleation layer deposition process in a nitrogen-free atmosphere, the crystal quality and defect problems of GaN epitaxial layers were solved, thus improving the overall performance of light-emitting diodes.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- JUCAN PHOTOELECTRIC TECH (SUQIAN) CO LTD
- Filing Date
- 2025-12-10
- Publication Date
- 2026-06-30
AI Technical Summary
In the prior art, the lattice and thermal mismatch between the sapphire substrate and GaN leads to high-density crystal defects in the GaN epitaxial layer, resulting in low crystal quality, low nonradiative recombination efficiency, large leakage current, and poor electrostatic breakdown resistance.
High-temperature recrystallization is performed on the buffer layer, and a three-dimensional nucleation layer is deposited in a high H2/low NH3 atmosphere without N2, including a low-temperature, three-dimensional nucleation transition layer and a high-temperature three-dimensional nucleation layer. High-quality nucleation sites and surfaces are formed by controlling the gradual process of deposition temperature and flow rate.
It significantly reduces the defect density of GaN epitaxial layers, improves crystal quality, reduces nonradiative recombination efficiency, and enhances electrostatic breakdown resistance and leakage current performance.
Smart Images
Figure CN121665782B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and more specifically, to a high-crystal-quality gallium nitride (GaN)-based light-emitting diode (LED) epitaxial wafer and its fabrication method. Background Technology
[0002] Wide-bandgap III-V semiconductor materials, especially gallium nitride (GaN) and its alloys, have been widely used in microelectronic and optoelectronic devices due to their excellent high-temperature and high-power characteristics. The MOCVD technique for growing GaN epitaxial materials on sapphire (Al2O3) substrates and fabricating blue light-emitting diodes is currently one of the most widely used techniques.
[0003] However, a significant lattice and thermal mismatch exists between the sapphire substrate and GaN, leading to a high density of crystal defects, such as threading dislocations (TDDs), in the low-temperature buffer layer and subsequent epitaxial layers. These defects permeate the entire epitaxial structure, extending into the active region (i.e., the multi-quantum-well layer), becoming non-radiative recombination centers. This severely reduces the device's internal quantum efficiency, increases leakage current, and degrades the device's reliability and electrostatic discharge (ESD) resistance.
[0004] To address this issue, existing technologies primarily focus on optimizing the growth processes of the buffer layer and nucleation layer. Chinese patent CN104465918B describes growing a three-layered "buffer recovery layer" after a three-dimensional recrystallized nucleation layer, and controlling the growth rate of this recovery layer to a "slow-fast-slow" pattern. Another Chinese patent, CN109920722B, discloses a method for growing three GaN nucleation layers on an AlN thin film buffer layer, the key being controlling the growth pressure of the three nucleation sublayers to a "low-high-low" pattern. Furthermore, Chinese patent CN115020552A discloses a structure including a "three-dimensional nucleation temperature transition layer," wherein the temperature of this transition layer "gradually increases."
[0005] However, in the process of realizing this invention, the inventors discovered that the prior art still has the following drawbacks: First, the deposition temperature of the buffer layer is relatively low, resulting in poor crystal quality. If the nucleation layer is deposited directly on it without effective high-temperature treatment, the crystal quality of the three-dimensional nucleation layer will be limited. Second, current three-dimensional nucleation layers (such as those disclosed in CN114883460B) are usually deposited in a mixed atmosphere of N2, H2, and NH3. The inventors found that this mixed atmosphere (especially the presence of N2) is not conducive to the formation of high-quality crystals, easily leading to low crystal quality of the epitaxial layer, more defects (especially N vacancies) and dislocations, poor electrostatic breakdown resistance, and low radiative recombination efficiency.
[0006] Therefore, the existing technology still does not provide a solution that can simultaneously solve the problem of the initial quality of the buffer layer and the problem of the influence of N2 atmosphere on the quality of the nucleation layer. As a result, the final GaN epitaxial layer still has many XRD 002 / 102 defects, low crystal quality, and poor leakage and ESD capabilities. Summary of the Invention
[0007] The main objective of this invention is to provide a method for preparing high-crystal-quality light-emitting diode epitaxial wafers, in order to solve the problems mentioned in the background art, such as poor quality of GaN epitaxial layers, numerous defects and dislocations, high non-radiative recombination efficiency, and poor leakage current and electrostatic discharge (ESD) resistance, which are caused by poor quality of buffer layers and improper growth atmosphere of nucleation layers.
[0008] To achieve the above objectives, the present invention provides a method for fabricating a high-crystal-quality light-emitting diode epitaxial wafer, the method comprising the steps of sequentially depositing a buffer layer and a three-dimensional nucleation layer on a substrate;
[0009] The method is characterized in that it further includes:
[0010] Before depositing the three-dimensional nucleation layer, the buffer layer is subjected to high-temperature recrystallization treatment, which is carried out under low pressure and high temperature conditions in an atmosphere containing H2 and NH3 but without N2.
[0011] The three-dimensional nucleation layer is deposited, which includes a low-temperature three-dimensional nucleation layer, a three-dimensional nucleation transition layer, and a high-temperature three-dimensional nucleation layer deposited sequentially.
[0012] The deposition process of the three-dimensional nucleation transition layer includes the following: the deposition temperature and the flow rate of trimethylgallium (TMGa) gradually increase with the deposition time.
[0013] Preferably, the NH3 / H2 ratio of the high-temperature recrystallization treatment is between 1:5 and 1:15, the pressure is between 100 and 200 torr, and the temperature is between 1000 and 1100°C.
[0014] Preferably, the deposition of the low-temperature three-dimensional nucleation layer, the three-dimensional nucleation transition layer, and the high-temperature three-dimensional nucleation layer are all carried out in an atmosphere containing H2 and NH3 but without N2, with an NH3 / H2 ratio between 1:5 and 1:15 and a pressure between 100 and 200 torr. Deposition in an atmosphere without N2 (i.e., high H2 / low NH3) can effectively reduce N vacancies, thereby reducing XRD002 / 102 defects and improving crystal quality.
[0015] Preferably, the low-temperature three-dimensional nucleation layer is an undoped GaN layer with a thickness of 0.01-0.1 μm, deposited at a deposition temperature of 1000-1050℃ with a constant trimethylgallium flow rate (i.e., low-flow constant flow). The low pressure and flow rate in this step are beneficial for the formation of nucleation sites on the surface of the buffer layer.
[0016] Preferably, the three-dimensional nucleation transition layer is an undoped GaN layer with a thickness of 0.1-1.5 μm. The deposition temperature gradually increases with deposition time within the range of 1050-1100℃, and the trimethylgallium flow rate gradually increases with deposition time (i.e., low-to-high flow rate gradient). The final flow rate is 1-2 times the constant flow rate of the low-temperature three-dimensional nucleation layer. This "dual gradient" step, where the flow rate and temperature gradually increase with deposition time, allows for precise control of the gradual increase in the size of the nucleation points, preventing premature fusion of the nucleation layer and thus reducing crystal quality.
[0017] Preferably, the high-temperature three-dimensional nucleation layer is an undoped GaN layer with a thickness of 0.1-1.5 μm. The deposition temperature is 10-50°C higher than the final deposition temperature of the three-dimensional nucleation transition layer, and it is deposited at a constant trimethylgallium flow rate (i.e., high-flow constant flow) consistent with the final deposition temperature of the three-dimensional nucleation transition layer. In this high-temperature, high-flow step, as the temperature increases, the GaN islands (i.e., nucleation points) gradually merge and fuse, thereby forming a relatively flat surface, providing a high-quality, flat substrate for the subsequent deposition of the undoped GaN layer.
[0018] Preferably, the method further includes: sequentially depositing an undoped GaN layer, an n-type GaN layer, an active layer, and a second semiconductor layer on the three-dimensional nucleation layer.
[0019] Another aspect of the present invention provides a high crystal quality light-emitting diode epitaxial wafer, said epitaxial wafer being prepared according to any of the methods described above.
[0020] Compared with the prior art, the present invention has the following beneficial effects:
[0021] 1. By subjecting the buffer layer to high H2 / low NH3 (no N2) atmosphere, low pressure, and high temperature recrystallization treatment before depositing the three-dimensional nucleation layer, the poor crystal quality of the low-temperature buffer layer can be improved, thereby enhancing its crystal quality and providing a smooth nucleation surface for the subsequent growth of the three-dimensional nucleation layer.
[0022] 2. By depositing a three-dimensional nucleation layer (including three sublayers) in a “N2-free” high H2 / low NH3 atmosphere, N vacancies can be effectively reduced, significantly reducing the XRD 002 / 102 defects of the GaN epitaxial layer and improving the overall crystal quality of the epitaxial wafer.
[0023] 3. By using a "dual gradient" process (i.e., temperature and TMGa flow rate gradually increase simultaneously) to deposit a three-dimensional nucleation transition layer, the gradual increase of nucleation points (GaN islands) can be precisely controlled, avoiding premature fusion of the nucleation layer and the resulting decrease in crystal quality.
[0024] 4. Through the subsequent deposition of the high-temperature three-dimensional nucleation layer at high temperature and high flow rate, the GaN islands are gradually merged and fused to form a relatively flat surface, providing a high-quality flat substrate for the subsequent growth of undoped GaN layers.
[0025] In summary, the epitaxial wafers prepared by this invention have high crystal quality and low defect density, thereby reducing the non-radiative recombination efficiency of light-emitting diodes caused by defects, significantly reducing leakage current, and improving electrostatic discharge (ESD) resistance. Attached Figure Description
[0026] Figure 1 This is a schematic diagram of a high-crystal-quality light-emitting diode epitaxial wafer structure provided in an embodiment of the present invention. In the figure:
[0027] 100: Patterned substrate; 200: First semiconductor layer; 210: Buffer layer; 220: Three-dimensional nucleation layer; 221: Low-temperature three-dimensional nucleation layer; 222: Three-dimensional nucleation transition layer; 223: High-temperature three-dimensional nucleation layer; 230: Undoped GaN layer; 240: n-type GaN layer; 300: Active layer; 310: Quantum well layer; 320: Quantum barrier layer; 400: Second semiconductor layer; 410: Electron blocking layer; 420: P-type GaN layer. Detailed Implementation
[0028] To make the objectives, technical solutions, and advantages of this invention clearer, the following description will be provided in conjunction with the appendix. Figure 1 The embodiments of the present invention will be described in further detail below. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention.
[0029] Example
[0030] Reference Figure 1 This invention provides a high-crystal-quality light-emitting diode epitaxial wafer. The epitaxial wafer structure includes a substrate 100, preferably a patterned sapphire substrate (PSS). A first semiconductor layer 200, an active layer 300, and a second semiconductor layer 400 are sequentially deposited on the substrate 100 using an MOCVD device.
[0031] like Figure 1 As shown, the first semiconductor layer 200 includes a buffer layer 210, a three-dimensional nucleation layer 220, an undoped GaN layer 230, and an n-type GaN layer 240. The active layer 300 includes a quantum well layer 310 and a quantum barrier layer 320 (typically a multi-quantum well structure). The second semiconductor layer 400 includes an electron blocking layer 410 and a p-type GaN layer 420. The three-dimensional nucleation layer 220 is one of the key structures of this invention, and it includes a low-temperature three-dimensional nucleation layer 221, a three-dimensional nucleation transition layer 222, and a high-temperature three-dimensional nucleation layer 223 stacked sequentially.
[0032] The core preparation steps in this embodiment are detailed below:
[0033] Step 1: Deposit a buffer layer 210 on the substrate 100. The buffer layer 210 can be deposited using conventional low-temperature GaN or AlN buffer layer techniques in the art, for example, at about 500-600°C.
[0034] Step Two: High-Temperature Recrystallization Treatment of the Buffer Layer 210. After the deposition of the buffer layer 210 and before the deposition of the three-dimensional nucleation layer 220, a high H2 / low NH3 (N2-free) atmosphere is introduced, and high-temperature recrystallization treatment is performed under low pressure. In this embodiment, the NH3 / H2 flow ratio is 1:10, the pressure is 150 torr, and the temperature is 1050℃. This step aims to improve the crystal quality of the buffer layer 210 itself and provide a smooth nucleation surface for Step Three.
[0035] Step 3: Deposit a three-dimensional nucleation layer at 220°C. This step is maintained in a high H₂ / low NH₃ (N₂-free) atmosphere at a pressure of 150 torr. This step specifically includes three sub-steps:
[0036] (1) Deposition of a low-temperature three-dimensional nucleation layer 221: A low-temperature undoped GaN layer is deposited on the recrystallized buffer layer 210 as a low-temperature three-dimensional nucleation layer 221. In this embodiment, the thickness is 0.05 μm, the NH3 / H2 flow ratio is maintained at 1:10, the pressure is 150 torr, the deposition temperature is kept constant at 1035℃, and the trimethylgallium (TMGa) flow rate is maintained at 650 slm. This step is used to form nucleation sites on the surface.
[0037] (2) Deposition of a three-dimensional nucleation transition layer 222: An undoped GaN layer is deposited on the low-temperature three-dimensional nucleation layer 221 as the three-dimensional nucleation transition layer 222. In this embodiment, the thickness is 0.6 μm, and the atmosphere and pressure remain constant (H2 / NH3 is 1:10, 150 torr). Crucially, the deposition temperature and TMGa flow rate gradually increase with deposition time. The deposition temperature gradually increases from 1035°C to a final temperature of 1085°C; the TMGa flow rate also gradually increases until its final flow rate reaches 1.5 times the constant flow rate of the low-temperature three-dimensional nucleation layer 221. This "double gradient" step is used to control the gradual increase in the size of the nucleation sites (GaN islands) while avoiding premature fusion.
[0038] (3) Deposition of a high-temperature three-dimensional nucleation layer 223: An undoped GaN layer is deposited on the three-dimensional nucleation transition layer 222 as the high-temperature three-dimensional nucleation layer 223. In this embodiment, the thickness is 1.1 μm, and the atmosphere and pressure remain constant (NH3 / H2 = 1:10, 150 torr). The deposition temperature is increased and kept constant at 1120°C (i.e., 35°C higher than the end temperature of the transition layer 222, which is 1085°C). The TMGa flow rate remains constant, consistent with the flow rate at the end of the growth of the three-dimensional nucleation transition layer 222. This high-temperature, high-flow-rate step promotes the merging and fusion of GaN islands, forming a smooth surface.
[0039] For clarity, the core process parameters for steps two and three in this embodiment are summarized in Table 1 below:
[0040] Table 1: Summary of Process Parameters for Examples
[0041] Growth steps Sub-layer marking <![CDATA[气氛 (H2 / NH3 ratio, N2)]]> stress (torr) Temperature (°C) TMGa flow rate (relative value) Thickness (μm) Buffer layer recrystallization 210 <![CDATA[10:1, without N2]]> 150 1050 (constant) N / A N / A Low-temperature three-dimensional nucleation layer 221 <![CDATA[10:1, without N2]]> 150 1035 (constant) Constant (x1) 0.05 Three-dimensional nucleation transition layer 222 <![CDATA[10:1, no N2]]> 150 1035→1085 (gradient) Gradient (x1 → x1.5) 0.6 High-temperature three-dimensional nucleation layer 223 <![CDATA[10:1, no N2]]> 150 1120 (constant) Constant (x1.5) 1.1
[0042] Step 4: On the three-dimensional nucleation layer 220 (specifically, the high-temperature three-dimensional nucleation layer 223), subsequent epitaxial layers are deposited. This includes depositing an undoped GaN layer 230 (1-3 μm thick) to further improve crystal quality; followed by depositing an n-type GaN layer 240 (Si-doped); then depositing an active layer 300 (e.g., InGaN / GaN multiple quantum wells); and finally depositing a second semiconductor layer 400, including an electron blocking layer 410 (e.g., p-AlGaN) and a p-type GaN layer 420 (Mg-doped). The growth of these subsequent layers can be performed using conventional processes in the art.
[0043] By employing the methods described in the above embodiments, particularly the buffer layer recrystallization treatment in step two and the "N2-free" atmosphere and "double gradient" transition layer process in step three, the prepared epitaxial wafers have lower defect densities (especially N vacancies and XRD002 / 102 defects), significantly improved crystal quality, and ultimately, the devices exhibit lower leakage current and higher electrostatic discharge (ESD) resistance.
[0044] Those skilled in the art should understand that the above embodiments are merely preferred examples of the present invention, and the present invention is not limited thereto. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
[0045] For example, in other embodiments, the NH3 / H2 ratio in the high-temperature recrystallization treatment (step two) can be arbitrarily selected in the range of 1:5 to 1:15; the pressure can be selected in the range of 100-200 torr; and the temperature can be selected in the range of 1000-1100℃.
[0046] Similarly, the thickness of the low-temperature three-dimensional nucleation layer 221 (step three (1)) can be selected in the range of 0.01-0.1 μm; the deposition temperature can be selected in the range of 1000-1050℃.
[0047] The thickness of the three-dimensional nucleation transition layer 222 (step 3 (2)) can be selected in the range of 0.1-1.5 μm; its deposition temperature can be gradually increased in the range of 1050-1100℃; and the increase in its TMGa flow rate (i.e., the multiple relative to the low temperature layer) can be selected in the range of 1-2 times.
[0048] The thickness of the high-temperature three-dimensional nucleation layer 223 (step 3) can be selected in the range of 0.1-1.5 μm; its deposition temperature can be 10-50℃ higher than the end temperature of the transition layer 222.
[0049] The epitaxial wafer was fabricated into a 15 mil * 30 mil LED chip, and the ESD yield and leakage current yield were tested. The data are shown in Table 2.
[0050] Table 2
[0051] sample XRD 002 XRD 102 ESD 8000 Yield Leakage rate Table 1 Examples 90 170 99% 98.5% <![CDATA[Comparative example: The ratio of H2 / NH3 / N2 is 5:2:1]]> 108 193 97.4% 97.1%
[0052] As can be seen from the test results in Table 2, the epitaxial wafer of this invention is significantly superior to the comparative example in both XRD 002 and XRD 102, two key crystal quality parameters. Specifically, XRD 002 decreased from 108 in the comparative example to 90, and XRD 102 decreased from 193 to 170. This indicates that the present invention, through high-temperature recrystallization and the "N2-free" three-dimensional nucleation layer growth process, effectively reduces the density of N vacancies and penetrating dislocations, significantly improving the crystal quality of the epitaxial wafer. Regarding device reliability, the ESD 8000 V yield of the sample of this invention reaches 99%, a significant improvement compared to the 97.4% of the comparative example; the leakage current yield also increased from 97.1% in the comparative example to 98.5%. These data fully demonstrate that the high H2 / low NH3, N2-free three-dimensional nucleation process and the "dual-gradient" transition layer design adopted in this invention can effectively improve crystal integrity, reduce defects, and thus significantly improve leakage current suppression and electrostatic breakdown performance. The overall technical effect is superior to existing technologies.
[0053] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method for fabricating a high-crystal-quality light-emitting diode epitaxial wafer, the method comprising the steps of sequentially depositing a buffer layer (210) and a three-dimensional nucleation layer (220) on a substrate (100), characterized in that, The method further includes: Before depositing the three-dimensional nucleation layer (220), the buffer layer (210) is subjected to high-temperature recrystallization treatment in an atmosphere containing H2 and NH3 but without N2, with an NH3 / H2 ratio between 1:5 and 1:15, a pressure between 100 and 200 torr, and a temperature between 1000 and 1100°C. The three-dimensional nucleation layer (220) is deposited, comprising a low-temperature three-dimensional nucleation layer (221), a three-dimensional nucleation transition layer (222), and a high-temperature three-dimensional nucleation layer (223) deposited sequentially. The deposition of the low-temperature three-dimensional nucleation layer (221), the three-dimensional nucleation transition layer (222), and the high-temperature three-dimensional nucleation layer (223) is carried out in an atmosphere containing H2 and NH3 but without N2, with an NH3 / H2 ratio between 1:5 and 1:15 and a pressure of 100-200 kJ / kg. The deposition temperature of the low-temperature three-dimensional nucleation layer (221) is between 1000-1050℃, and it is deposited with a constant trimethylgallium flow rate. The deposition temperature of the three-dimensional nucleation transition layer (222) gradually increases with the deposition time in the range of 1050-1100℃, and the trimethylgallium flow rate gradually increases with the deposition time to 1-2 times the constant flow rate of the low-temperature three-dimensional nucleation layer (221). The deposition temperature of the high-temperature three-dimensional nucleation layer (223) is 10-50℃ higher than the end deposition temperature of the three-dimensional nucleation transition layer (222), and it is deposited with a constant trimethylgallium flow rate consistent with the end of the growth of the three-dimensional nucleation transition layer (222).
2. The method according to claim 1, characterized in that, The low-temperature three-dimensional nucleation layer (221) is an undoped GaN layer with a thickness of 0.01-0.1 μm.
3. The method according to claim 1, characterized in that, The three-dimensional nucleation transition layer (222) is an undoped GaN layer with a thickness of 0.1-1.5 μm.
4. The method according to claim 1, characterized in that, The high-temperature three-dimensional nucleation layer (223) is an undoped GaN layer with a thickness of 0.1-1.5 μm.
5. The method according to claim 1, characterized in that, The high-temperature recrystallization treatment has an H2 / NH3 ratio of 1:10, a pressure of 150 torr, and a temperature of 1050℃.
6. The method according to claim 1, characterized in that: The thickness of the low-temperature three-dimensional nucleation layer (221) is 0.05 μm, and the deposition temperature is 1035 °C; the thickness of the three-dimensional nucleation transition layer (222) is 0.6 μm, the final deposition temperature is 1085 °C, and the final trimethylgallium flow rate is 1.5 times the constant flow rate of the low-temperature three-dimensional nucleation layer (221); the thickness of the high-temperature three-dimensional nucleation layer (223) is 1.1 μm, and the deposition temperature is 1120 °C.
7. The method according to claim 1, characterized in that, The method further includes: sequentially depositing an undoped GaN layer (230), an n-type GaN layer (240), an active layer (300), and a second semiconductor layer (400) on the three-dimensional nucleation layer (220).
8. A high-crystal-quality light-emitting diode epitaxial wafer, characterized in that, The epitaxial wafer is prepared according to the method described in any one of claims 1 to 7.