Initialization method of PCIE device and server

Abstract

A kind of initialization method of PCIE device, comprising: in the server startup process, the BIOS is enumerated to the PCIE device connected on the server, and the enumerated PCIE device is as the PCIE device in first set;The BIOS obtains the PCIE device in second set, the PCIE device in second set is the PCIE device connected on the server for the BMC acquisition;The BIOS matches the PCIE device in first set with the PCIE device in second set;If the number of the PCIE device in first set is less than the number of the PCIE device in second set, the BIOS waits for a first time period, and establishes connection with the PCIE device in third set, the PCIE device in third set is the PCIE device contained in second set and not contained in first set.Solved the problem of card drop that occurs in the server startup process PCIE device, ensure the stability of server system, and increase the diversity of server system.

Description

Technical Field

[0001] This invention relates to the field of server technology, and in particular to a method for initializing a PCIe device and a server. Background Technology

[0002] With the rapid development of the computer industry, computer systems are increasingly reliant on devices based on the high-speed Serial Computer Expansion Bus standard (PCIe). More and more general-purpose and specially designed PCIe devices are being used in the computer industry. Big data statistical analysis reveals that the more types and quantities of PCIe devices a server has, the more competitive it is in the market. Similarly, the more types and data volumes of PCIe devices a server carries, the greater the probability of PCIe device failure, which can easily cause server system lag or interruptions. Summary of the Invention

[0003] This application provides a PCIe device initialization method and server, which solves the problem of PCIe device card dropping during server startup, ensures the stability of the server system, and increases the versatility of the server system.

[0004] In a first aspect, this application provides a method for initializing PCIe devices. This method is applied to a server, which includes a BIOS and a BMC. The method includes: during server startup, the BIOS reads the PCIe devices connected to the server to obtain a first set of PCIe devices and establishes connections with the PCIe devices in the first set, the first set including at least one PCIe device; the BIOS obtains a second set of PCIe devices through the BMC, the second set including at least one PCIe device, the PCIe devices in the second set being obtained from the server by the BMC; if the number of PCIe devices in the first set is less than the number of PCIe devices in the second set, the BIOS establishes connections with at least a portion of the PCIe devices in the second set, the first set not containing at least a portion of the PCIe devices.

[0005] In other words, during server startup, after the BIOS enumerates the PCIe devices on the server, it compares the presence status of these devices obtained by the BMC with the enumeration results. If at least one PCIe device is present but the enumeration fails, it can be determined that at least one PCIe device has been lost. In this case, the BIOS can wait for a period of time and then reconnect to the lost PCIe device. This resolves the issue of PCIe device loss during server startup, ensuring server system stability and increasing system diversity.

[0006] In one possible implementation, before the BIOS establishes a connection with at least a portion of the PCIe devices in the second PCIe device set, the method further includes: the BIOS comparing the identifiers of each PCIe device in the first PCIe device set with the identifiers of each PCIe device in the second PCIe device set, and determining the identifiers of at least a portion of the PCIe devices in the second PCIe device set, wherein at least a portion of the PCIe devices are not included in the first PCIe device set.

[0007] In other words, when the number of enumerated PICE devices is less than the number of PCIe devices in place, the BIOS can determine that there are PCIe devices on the server that are in a lost state. At this time, the BIOS needs to match the hardware IDs of the in-place PCIe devices reported by the BMC with the hardware IDs of the PCIe devices enumerated by the BIOS to determine the hardware ID of the PCIe device in a lost state.

[0008] In one possible implementation, the BIOS establishes a connection with at least a portion of the PCIe devices in the second set of PCIe devices, including: the BIOS waiting for a preset time before establishing a connection with at least a portion of the PCIe devices in the second set of PCIe devices.

[0009] In other words, after the BIOS determines that a PCIe device on the server is in a lost state, the BIOS can wait for a period of time before reconnecting to the lost PCIe device. This ensures a higher success rate for the BIOS to connect to the lost PCIe device.

[0010] In one possible implementation, the BIOS establishes a connection with at least a portion of the PCIe devices in the second set of PCIe devices, including: the BIOS performs PCIe link training on at least a portion of the PCIe devices in the second set of PCIe devices to ensure that the PCIe link information between at least a portion of the PCIe devices in the second set of PCIe devices and the BIOS meets preset link requirements.

[0011] In other words, the process of establishing a connection between the BIOS and a PCIe device involves the BIOS training the PCIe link between the PCIe device and the BIOS to ensure that the PCIe link information between the successfully enumerated PCIe devices and the BIOS meets the preset link requirements. If the PCIe link information between the PCIe device and the BIOS meets the preset link requirements, then the PCIe device can be considered to have successfully connected to the BIOS.

[0012] In one possible implementation, before the BIOS reads the PCIe devices connected to the server, the method further includes: after all the PCIe devices connected to the server have completed initialization, the BIOS controls the server to perform a hot reset.

[0013] In other words, during the server startup process, the BIOS can trigger a server restart by initiating a hot reset while the server remains powered on.

[0014] Secondly, this application provides a server, including a BIOS and a BMC.

[0015] During the server startup process, the BIOS reads the PCIe devices connected to the server to obtain a first set of PCIe devices and establishes connections with the PCIe devices in the first set of PCIe devices, which includes at least one PCIe device.

[0016] The BIOS is also used to obtain a second set of PCIe devices through the BMC, the second set of PCIe devices including at least one PCIe device, the PCIe devices in the second set of PCIe devices being obtained by the BMC from the server;

[0017] The BIOS is also used to establish a connection with at least a portion of the PCIe devices in the second PCIe device set when the number of PCIe devices in the first PCIe device set is less than the number of PCIe devices in the second PCIe device set, wherein the first PCIe device set does not contain at least a portion of the PCIe devices.

[0018] In one possible implementation, before the BIOS establishes a connection with at least a portion of the PCIe devices in the second set of PCIe devices, the BIOS also performs the following:

[0019] The identifiers of each PCIe device in the first PCIe device set are compared with the identifiers of each PCIe device in the second PCIe device set to determine the identifiers of at least a portion of the PCIe devices in the second PCIe device set, wherein at least a portion of the PCIe devices are not included in the first PCIe device set.

[0020] In one possible implementation, the BIOS is used for:

[0021] After waiting for a preset time, a connection is established with at least a portion of the PCIe devices in the second set of PCIe devices.

[0022] In one possible implementation, the BIOS is used for:

[0023] PCIe link training is performed on at least a portion of the PCIe devices in the second PCIe device set to ensure that the PCIe link information between at least a portion of the PCIe devices in the second PCIe device set and the BIOS meets preset link requirements.

[0024] In one possible implementation, before the BIOS reads the PCIe devices connected to the server, the BIOS also performs the following:

[0025] Once all PCIe devices connected to the server have completed initialization, the server is controlled to perform a hot reset.

[0026] Thirdly, this application provides a method for initializing a PCIe device, characterized in that it is applied to a server, the server including a BIOS and a BMC, the method comprising:

[0027] During the server startup process, the BIOS reads the PCIe devices connected to the server to obtain the first set of PCIe devices, and establishes connections with the PCIe devices in the first set of PCIe devices, which includes at least one PCIe device.

[0028] If at least one PCIe device in the first set of PCIe devices cannot establish a connection with the BIOS, the BIOS sends a first message to the BMC, which carries device information of at least one PCIe device.

[0029] Based on the device information of at least one PCIe device carried in the first message, BMC determines whether at least one PCIe device is connected to the server.

[0030] If the BMC determines that at least one PCIe device is connected to the server, the BMC will trigger a server restart.

[0031] In one possible implementation, the method further includes: if the BMC determines that at least one PCIe device is connected to the server, the BMC sends a second message to the BIOS, the second message indicating that at least one PCIe device is connected to the server;

[0032] The BIOS triggers a server system restart based on the second message.

[0033] Fourthly, this application provides an electronic device, characterized in that it comprises:

[0034] At least one memory for storing programs;

[0035] At least one processor is configured to execute a program stored in memory, wherein, when the program stored in memory is executed, the processor is configured to perform the method described in the first aspect or any possible implementation thereof.

[0036] Fifthly, this application provides a computer-readable medium storing instructions that, when executed on a computer, cause the computer to perform the method described in the first aspect or any possible implementation thereof.

[0037] In a sixth aspect, this application provides a computer program product containing instructions that, when executed on a computer, cause the computer to perform the method described in the first aspect or any possible implementation thereof.

[0038] It is understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0039] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 A schematic diagram illustrating a server startup scenario provided in an embodiment of this application;

[0041] Figure 2 A schematic diagram of a server structure provided in an embodiment of this application;

[0042] Figure 3 A flowchart illustrating a PCIe device initialization method provided in an embodiment of this application;

[0043] Figure 4 A flowchart illustrating another PCIe device initialization method provided in this application embodiment;

[0044] Figure 5 A flowchart illustrating another PCIe device initialization method provided in this application embodiment;

[0045] Figure 6This is a schematic diagram of the structure of a chip provided in an embodiment of this application. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be described below with reference to the accompanying drawings.

[0047] In the description of the embodiments in this application, any embodiment or design that is “exemplary,” “for example,” or “by way of example” should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as “exemplary,” “for example,” or “by way of example” is intended to present the relevant concepts in a concrete manner.

[0048] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. The terms "comprising," "including," "having," and their variations all mean "including but not limited to," unless otherwise specifically emphasized.

[0049] Before introducing the solution of this invention application, the key data required in the embodiments of this invention application will be explained first.

[0050] 1. PCIe: PCIe is a high-speed serial point-to-point dual-channel high-bandwidth transmission technology. Each connected device is allocated its own dedicated channel bandwidth and does not share the bus bandwidth. It primarily supports active power management, error reporting, end-to-end reliable transmission, hot-swapping, and Quality of Service (QoS) features. PCIe devices are still configured in complex computer systems, such as servers. Common PCIe devices include network cards, graphics cards, and host bus adapters (HBAs).

[0051] 2. Card Loss: For PCIe devices connected to the server, if a PCIe device connected to the server is in a present state but is not enumerated by the BIOS during the server startup process, it can be considered that the PCIe device is in a lost state.

[0052] 3. Keying, or connection establishment, involves the BIOS training the PCIe device's link after power-on, ensuring the link information between the PCIe and BIOS meets preset requirements. Once the keying is successful, the BIOS and PCIe device can communicate via the PCIe link.

[0053] 4. Warm reset: Resets can be divided into cold resets and warm resets. A cold reset is the automatic reset that occurs when a server goes from being unpowered to being powered on; a warm reset is the reset signal given to a server that is already powered on.

[0054] 5. Enumeration: A data type that only contains custom-defined data; it's a collection of data with common characteristics. For example, color can be defined as an enumeration type, containing any color you define. When needed, it can be accessed simply through the enumeration. In this embodiment, the PCIe devices connected to the server can be defined as an enumeration type. When the server powers on, the BIOS can retrieve the connected PCIe devices through enumeration calls.

[0055] The technical solutions involved in this application will then be introduced.

[0056] When a PCIe device is connected to the server, during the server startup process, according to the PCIe protocol, the PCIe device needs to meet certain startup time requirements to complete its initialization. Once the server's basic input / output system (BIOS) recognizes that the PCIe device has completed initialization, the BIOS executes a reboot procedure, and a connection is established between the BIOS and the PCIe device after the server restarts.

[0057] For example, Figure 1 The power-on initialization process of a PCIe device is illustrated. For example... Figure 1 As shown, in an ideal boot scenario, the server powers on at time t1, and the firmware on the PCIe devices also begins initialization at time t1, completing initialization at time t4. Once the BIOS on the server detects that the firmware on the PCIe devices has completed initialization, the BIOS triggers the server's reboot program, causing the server to restart to optimize the hardware configuration. The BIOS system triggers the server reboot at time t4, and the reboot is complete at time t5. After the server reboots, the PCIe devices begin initialization at time t5, completing initialization at time t7. After the PCIe devices have finished initializing, the BIOS begins enumerating the PCIe devices connected to the server at time t7 and establishes connections with the enumerated PCIe devices.

[0058] In a real-world startup scenario, the BIOS on the server detects that the PCIe device initialization is complete at time t2 and triggers the server's reboot program, causing the server to restart (i.e., the BIOS initiates a Perst reset). After the server completes the reboot at time t3 (i.e., the server de-resets using Perst), the BIOS begins enumerating the PCIe devices connected to the server and establishes connections for the enumerated PCIe devices at time t6.

[0059] Reference Figure 1 It is known that during the actual server startup process, after the server restarts, the startup response time and initialization time of the PCIe devices are too long (possibly up to 15 seconds). By the time the PCIe devices are initialized, the BIOS's PCIe device enumeration time point may have been missed, which may cause the PCIe devices on the server to drop out.

[0060] In view of this, this application provides a PCIe device initialization method to address the issue of PCIe card loss during server startup. After the server powers on and restarts (Perst reset), the BIOS normally enumerates all PCIe devices connected to the server. After the BIOS has enumerated the PCIe devices on the server, it also needs to obtain information about the PCIe devices connected to the server obtained by the baseboard management controller (BMC) during server startup. Then, the BIOS compares the enumerated PCIe devices with the PCIe devices obtained by the BMC. When the BIOS determines that the number of PCIe devices obtained by the BMC is greater than the number of PCIe devices enumerated by the BIOS, the BIOS reconnects the PCIe devices obtained by the BMC but not enumerated by the BIOS to avoid PCIe card loss during server startup, ensuring the stability of the server system and increasing system diversity, meaning the server can connect to various types of PCIe devices without card loss.

[0061] For example, Figure 2 A schematic diagram of a server structure is shown. Figure 2As shown, a server includes: BIOS, Riser Card, BMC, and PCIe devices. The BIOS is a set of programs embedded in a ROM chip on the server's internal board. It stores the computer's (server's) most important basic input / output programs, system settings, power-on self-test (POST) programs, and system boot programs. Its primary function is to provide the lowest-level and most direct hardware settings and control for the computer. A Riser Card, also called a PCIe Riser Card, generally refers to a function expansion card or adapter card that plugs into a PCIe interface; it's a new generation of bus interface. For example, a server motherboard might provide a relatively long slot (non-standard PCIe interface), into which the Riser Card is inserted. The Riser Card typically has one or more standard PCIe slots, allowing various PCIe devices (such as network cards, HBA cards, graphics cards, etc.) to be inserted into the server. The BMC is a control unit deployed on the server board with independent power supply and independent I / O interfaces. It does not rely on the server's processor, BIOS, or operating system to operate; it is a standalone agentless management subsystem running within the server.

[0062] The BIOS communicates with the BMC via the Enhanced Serial Peripheral (ESPI) bus. The BIOS can also obtain initialization information for PCIe devices through the PCIe interface (or the Host Bridge). The BMC communicates with the Riser card via the Inter-Integrated Circuit (I2C) bus to read Riser card information. The BMC can read the hardware ID or initialization information of the PCIe device through general purpose I / O ports (GPIO), or it can read the pin signals of the PCA9555 via the I2C bus to obtain the PCIe device's ID or initialization information, or it can read information from the complex programming logic device (CPLD) via the I2C bus to obtain the PCIe device's ID or initialization information. PCIe devices communicate with the Riser card via the I2C bus.

[0063] Next, based on the content described above, an initialization method for a PCIe device provided in the embodiments of this application will be introduced.

[0064] Please see Figure 3 , Figure 3 This is a flowchart illustrating a PCIe device initialization method provided in an embodiment of this application. This method can be... Figure 2The BIOS is executed in the server shown. Figure 3 As shown, the method includes: S301-S305.

[0065] S301: When the server powers on, the BIOS obtains the initialization status of the PCIe devices on the server.

[0066] In this embodiment, after the server powers on, the BIOS obtains the initialization status of the PCIe device through the PCIe interface between the BIOS and the PCIe device. The initialization status of the PCIe device includes: PCIe device initialization complete, and PCIe device initialization incomplete.

[0067] In one possible example, after power-on, the PCIe device initializes and stores the initialization results in the CPLD register within the PCIe device. The BIOS can determine whether the PCIe device has completed initialization by reading the value of the CPLD register on the PCIe device through the PCIe interface.

[0068] In one possible example, after the server powers on, the BIOS can determine the initialization state of the PCIe device by reading the voltage levels on its GPIO pins. For instance, the GPIO pins of the PCIe device are low before power-on. Once the PCIe device has completed initialization, the voltage levels on its GPIO pins are pulled high.

[0069] S302: When the PCIe devices connected to the server have completed initialization, the BIOS triggers a server restart, enumerates the PCIe devices connected to the server, and sets key chains for the enumerated PCIe devices.

[0070] In this embodiment, once the BIOS determines that all PCIe devices connected to the server have completed initialization, the BIOS needs to trigger a server restart, for example, by initiating a PERST reset and then resetting. After the server restarts (i.e., the server resets via PERST), the BIOS needs to enumerate and scan the PCIe devices on the server and establish connections with the enumerated PCIe devices.

[0071] In one possible example, when enumerating PCIe devices on the scan server, the BIOS can use a depth-first search (DFS) algorithm to traverse all PCIe buses and obtain the PCIe devices connected to those buses.

[0072] In one possible example, the BIOS's process of enumerating and scanning PCIe devices on a service includes the process of keying the enumerated PCIe devices.

[0073] S303: The BIOS determines whether there is a PCIe device in a lost state on the server based on the PCIe device presence information obtained from the BMC on the server. If there is a PCIe device in a lost state on the server, proceed to S304; otherwise, proceed to S305.

[0074] In this embodiment, the BMC is a dedicated microcontroller embedded on the server motherboard. The BMC is responsible for managing the interface between the system management software and the platform hardware. During server power-on, the BMC also powers on synchronously, enabling it to start. After startup, the BMC automatically obtains the presence information of connected PCIe devices on the server. This PCIe device presence information includes the number of connected PCIe devices on the server. It is understood that because the BMC is a control unit deployed on the server board with independent power supply and independent I / O interfaces, it does not rely on the server's processor, BIOS, or operating system to operate; it is a standalone agentless management subsystem running within the server. That is, a server restart will not affect the BMC's initialization state.

[0075] In one possible example, since the PCIe device is plugged into a PCIe slot on the server—meaning the PCIe device needs to be inserted into the server via a Riser card—the BMC can first obtain information about the inserted Riser card when acquiring data about the connected PCIe devices on the server. Then, the BMC can further obtain the hardware information of the PCIe device inserted into the Riser card.

[0076] In one possible example, the BMC can determine the presence of a PCIe device by obtaining hardware information (such as the hardware ID) of the PCIe device connected to the server. If the BMC can read the hardware ID of a PCIe device, it determines that the PCIe device is present. For example, in some examples, the PCIe device includes GPIO pins that can output high / low levels. The BMC can obtain the hardware ID of the PCIe device by reading the level information on the GPIO pins of the PCIe device inserted on the Riser card via the bus. In other examples, the PCIe device includes a CPLD. During the production setup phase, the manufacturer can pre-write the hardware ID of the PCIe device into the CPLD of the PCIe device. The BMC can read the hardware ID information stored in the CPLD of the PCIe device inserted on the Riser card via the I2C bus. In other examples, the PCIe device also includes a PCA9555 register. During the production setup phase, the manufacturer can pre-write the hardware ID of the PCIe device into the PCA9555 register of the PCIe device. BMC can read the hardware ID information stored in the PCA9555 on the PCIe device inserted into the Riser card via the I2C bus.

[0077] After the BIOS obtains the presence information of the PCIe devices connected to the server as determined by the BMC, it can compare the number of enumerated PCIe devices with the number of PCIe devices present as obtained by the BMC. If the number of present PCIe devices obtained by the BMC is greater than the number of PCIe devices enumerated by the BIOS, the BIOS can assume that some PCIe devices on the server are in a lost state. At this point, the BIOS needs to identify the PCIe devices in a lost state. Specifically, if a PCIe device is identified as present by the BMC but not enumerated by the BIOS, it can be considered to be in a lost state.

[0078] In one possible example, after the BIOS determines that the number of PCIe devices present in the system, as identified by the BMC, is greater than the number of PCIe devices enumerated by the BIOS, the BIOS needs to match the ID information of each enumerated PCIe device with the ID information of the present PCIe devices identified by the BMC to determine which PCIe devices were recognized by the BMC but not enumerated by the BIOS. If the BIOS determines that the number of PCIe devices enumerated by the BIOS is the same as the number of present PCIe devices identified by the BMC, the BIOS can determine that no PCIe devices have been lost, and the server can start normally.

[0079] In one possible example, the BIOS enumerates the PCIe devices on the server to obtain a first set of PCIe devices. The BMC retrieves the in-place PCIe devices on the server to obtain a second set of PCIe devices. The BIOS can compare the PCIe devices in the first set with those in the second set to determine if any PCIe devices on the server are in a lost state. When a lost PCIe device is found, the BIOS can reconnect to it.

[0080] In one possible example, the BIOS can directly compare the IDs of PCIe devices in the first set of PCIe devices with the IDs of PCIe devices in the second set of PCIe devices to determine if any PCIe devices on the server are in a lost state. When a PCIe device on the server is in a lost state, the BIOS determines the ID of the lost PCIe device and establishes a connection with it based on that ID.

[0081] In another possible example, the BIOS can first compare the number of PCIe devices in the first set of PCIe devices with the number of PCIe devices in the second set of PCIe devices. If the number of PCIe devices in the first set of PCIe devices is less than the number of PCIe devices in the second set of PCIe devices, the BIOS compares the IDs of the PCIe devices in the first set with the IDs of the PCIe devices in the second set of PCIe devices to determine the ID of the PCIe device that is in a lost state, and establishes a connection with the PCIe device based on that ID.

[0082] S304, the BIOS re-links PCIe devices that are in a lost-card state.

[0083] In this embodiment, after the BIOS identifies a PCIe device in a lost state, it can wait for a fixed period of time before re-establishing a connection with the device, i.e., the BIOS re-performs Linkretrain. In one possible example, the waiting time for the BIOS to re-establish a connection with the lost PCIe device can be set by the user during the device's usage phase. For example, the user can access the server boot settings interface through server system commands and enter the user-defined waiting time. In another possible example, the waiting time for the BIOS to re-establish a connection with the lost PCIe device can also be set by the manufacturer based on the server's performance requirements and written into the BIOS during the server's production phase.

[0084] In one possible example, re-establishing the connection between the BIOS and the PCIe device involves the BIOS training the PCIe link to obtain the link information of the PCIe device. The BIOS then determines whether the obtained link information meets preset link requirements. If the BIOS determines that the obtained link information meets the preset requirements, the link between the BIOS and the PCIe device is successful, and they can communicate via the PCIe link. Further, after successful linking, the BIOS can configure the base address register on the server to allocate address space to the PCIe device. If the BIOS determines that the obtained link information does not meet the preset requirements, the BIOS can continue training the PCIe link until it meets the preset requirements.

[0085] In one possible example, the link information of the PCIe device obtained by the BIOS includes the PCIe link's transmission rate and bandwidth. When determining whether the PCIe device's link information meets preset link requirements, the BIOS can determine whether the PCIe link's transmission rate and bandwidth meet the preset transmission rate and preset bandwidth, respectively.

[0086] S305, the server started normally.

[0087] In this embodiment, during server startup, the presence information of PCIe devices on the server is obtained through the BMC and sent to the BIOS. This allows the BIOS to enumerate and scan the PCIe devices on the server, and then determine whether any PCIe devices on the server are in a lost state based on the enumerated PCIe device information and the presence information reported by the BMC. When the BIOS determines that a PCIe device is in a lost state, it obtains the information of the lost PCIe device and reconnects it. This solves the problem of PCIe devices easily losing their cards during power-on initialization.

[0088] For example, this application also provides a method for initializing a PCIe device. Figure 4 This is a flowchart illustrating a method for initializing a PCIe device according to an embodiment of this application. The method can be implemented by... Figure 2 The server shown is executing. (As shown) Figure 4 As shown, the method includes: S401-S404.

[0089] S401: When the server powers on, the BIOS obtains the initialization status of the PCIe devices on the server.

[0090] In this embodiment, after the server is powered on, the BIOS obtains the initialization status of the PCIe device through the PCIe interface between the BIOS and the PCIe device. The process by which the BIOS obtains the initialization status of the PCIe device on the server can be referred to in S301, and will not be repeated here.

[0091] S402: After the initialization of the PCIe devices connected to the server is completed, the BIOS triggers a server restart, enumerates the PCIe devices connected to the server, and sets key chains for the enumerated PCIe devices.

[0092] In this embodiment, once the BIOS determines that all PCIe devices connected to the server have completed initialization, the BIOS needs to trigger a server restart, for example, by initiating a PERST reset and then resetting, to optimize the connection configuration parameters between the server and the PCIe devices connected to it. After the server restarts, the BIOS needs to enumerate and scan the PCIe devices on the server and establish connections with the enumerated PCIe devices.

[0093] S403, the BIOS scans the PCIe devices on the server. If the BIOS determines that at least one PCIe device among the connected PCIe devices on the server is abnormal, the BIOS sends an exception message to the BMC, which includes the device information of the abnormal PCIe device.

[0094] In this embodiment, after the BIOS links with the PCIe devices on the server, the server starts normally. When the server boots the operating system (OS), the BIOS needs to scan the connected PCIe devices on the server to obtain the resource requirements of each PCIe device. If the BIOS finds an abnormal PCIe device during the scan, the BIOS needs to send an exception message to the BMC. This exception message carries the device information of the abnormal device, such as the hardware ID of the abnormal PCIe device.

[0095] S404, the BMC determines whether the PCIe device is present based on the PCIe device information carried in the BIOS. If the PCIe device is present, the BMC triggers a server system restart.

[0096] In this embodiment, after receiving the exception message from the BIOS, the BMC will further determine the type of exception for the abnormal PCIe device based on the hardware ID of the abnormal PCIe device carried in the received exception information. The exception types for abnormal PCIe devices include: PCIe device lost, PCIe device not present, etc.

[0097] In one possible example, after receiving an exception message from the BIOS, the BMC can determine whether the faulty PCIe device is present based on the hardware ID of the faulty PCIe device carried in the received exception message. Specifically, the BMC can obtain the hardware IDs of multiple PCIe devices connected to the server. Then, the BMC matches the hardware ID of the faulty PCIe device with the hardware IDs of the PCIe cards connected to the server that it has obtained. When the hardware ID of one of the multiple PCIe devices connected to the server that the BMC has obtained matches the hardware ID of the faulty PCIe device, the BMC can determine that the faulty PCIe device is present. Otherwise, the BMC can determine that the faulty PCIe device is not present, that is, the faulty PCIe device is not plugged into the server, or the faulty PCIe device is plugged into the server, but the hardware connection between the faulty PCIe device and the server has failed.

[0098] In one possible example, a PCIe device includes GPIOs, which are pins on the PCIe device that can output high / low levels. The BMC can obtain the hardware ID of the PCIe device by reading the level information on the GPIO pins of the PCIe device inserted into the Riser card via the bus.

[0099] In one possible example, the PCIe device includes a CPLD. During the production setup phase, the manufacturer can pre-write the hardware ID of the PCIe device into its CPLD. The BMC can read the hardware ID information stored in the CPLD of the PCIe device inserted into the Riser card via the I2C bus.

[0100] In one possible example, the PCIe device also includes a PCA9555 register. During the production setup phase, the manufacturer can pre-write the hardware ID of the PCIe device into the PCA9555 register. The BMC can read the hardware ID information stored in the PCA9555 register of the PCIe device inserted into the Riser card via the I2C bus.

[0101] If the BMC can obtain the hardware ID information of the malfunctioning PCIe device, it indicates that the malfunctioning PCIe device is present. At this time, the BMC can trigger a server restart, which allows the BIOS to re-link with the malfunctioning PCIe device during the server restart process.

[0102] In this embodiment, a PCIe device absence detection and alarm mechanism is incorporated into the BMC startup phase. When the BMC detects that the PCIe device is absent, the BMC can skip issuing an alarm and directly perform a forced restart of the server system to resolve the card drop issue during server startup.

[0103] For example, embodiments of this application also provide a method for initializing a PCIe device. Figure 5 This is a flowchart illustrating a method for initializing a PCIe device according to an embodiment of this application. The method can be implemented by... Figure 2 The server shown is executing. (As shown) Figure 5 As shown, the method includes: S501-S505. Among them, the processes of S501-S503 are the same as those of S401-S403, and will not be described again here.

[0104] S501: When the server powers on, the BIOS obtains the initialization status of the PCIe devices on the server.

[0105] S502: When the PCIe devices connected to the server have completed initialization, the BIOS triggers a server restart, enumerates the PCIe devices connected to the server, and sets key chains for the enumerated PCIe devices.

[0106] S503: The BIOS scans the PCIe devices on the server. If the BIOS determines that at least one PCIe device among the connected PCIe devices on the server is malfunctioning, the BIOS sends an exception message to the BMC, which includes the device information of the malfunctioning PCIe device.

[0107] S504, the BMC determines whether the PCIe device is present based on the PCIe device information carried in the BIOS. If the PCIe device is present, the BMC sends feedback information to the BIOS. This feedback information is used to indicate that the abnormal PCIe device is present.

[0108] In this embodiment, when determining whether a PCIe device is present, the BMC can read the device number of the PCIe device via I2C to determine its presence. If the PCIe device is present, the BMC can send the presence information obtained by the BMC to the BIOS.

[0109] In one possible example, when the PCIe device is a network card, the BMC can obtain the device number of the network card's chip via I2C. If the BMC can read the device number of the network card's chip, the BMC can determine that the network card is present.

[0110] After receiving feedback information from the BMC, the BIOS triggers the server to restart.

[0111] In this embodiment, after receiving feedback information from the BMC, the BIOS can establish a connection with the malfunctioning PCIe device by restarting the system. For example, the BMC can power down the server system.

[0112] In one possible example, the BIOS can also restart the server system via a hot reset. In this embodiment, a hot reset is performed during the server startup process to address the scenario where a PCIe device connected to the server experiences a card failure, thereby increasing the availability and maintainability of the server system.

[0113] Based on the methods in the above embodiments, this application provides a computer-readable storage medium storing a computer program that, when run on a processor, causes the processor to execute the methods in the above embodiments.

[0114] Based on the methods in the above embodiments, this application provides a computer program product, characterized in that, when the computer program product is run on a processor, the processor executes the methods in the above embodiments.

[0115] Based on the methods in the above embodiments, this application provides a computing device, which includes a motherboard and a chip. The chip is integrated on the motherboard and includes at least one memory for storing a program; and at least one processor for executing the program stored in the memory. When the program stored in the memory is executed, the processor executes the methods in the above embodiments. In this application, the computing device can be a server, host, or other network device. The chip can be a BMC, a chip storing BIOS, etc. This application does not limit the type of computing device or the type of chip.

[0116] It should be noted that in other embodiments, the BMC has different names in different computing devices. For example, the BMC of Huawei servers and Super Fusion servers is called iBMC, the BMC of HPE servers is called iLO, and the BMC of DELL servers is called iDRAC.

[0117] Based on the methods described in the above embodiments, this application also provides a chip. Please refer to... Figure 6 , Figure 6 This is a schematic diagram of a chip structure provided in an embodiment of this application. Figure 6 As shown, chip 600 includes one or more processors 601 and interface circuitry 602. Optionally, chip 600 may also include a bus 603. Wherein:

[0118] Processor 601 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed through integrated logic circuits in the hardware of processor 601 or through software instructions. Processor 601 may be a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods and steps disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor.

[0119] The interface circuit 602 can be used to send or receive data, instructions or information. The processor 601 can use the data, instructions or other information received by the interface circuit 602 to process the data, instructions or other information, and can send the processed information out through the interface circuit 602.

[0120] Optionally, chip 600 also includes memory, which may include read-only memory and random access memory, and provides operation instructions and data to the processor. A portion of the memory may also include non-volatile random access memory (NVRAM).

[0121] Optionally, the memory stores executable software modules or data structures, and the processor can execute corresponding operations by calling the operation instructions stored in the memory (which may be stored in the operating system).

[0122] Optionally, the interface circuit 602 can be used to output the execution results of the processor 601.

[0123] It should be noted that the functions of the processor 601 and the interface circuit 602 can be implemented through hardware design, software design, or a combination of hardware and software; no restrictions are imposed here.

[0124] It should be understood that each step of the above method embodiments can be completed by hardware logic circuits or software instructions in a processor.

[0125] It is understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. Furthermore, in some possible implementations, each step in the above embodiments may be selectively executed according to actual circumstances; it may be partially or fully executed, without limitation here. Additionally, all or part of any feature in the above embodiments can be freely and arbitrarily combined without contradiction. The combined technical solutions are also within the scope of this application.

[0126] The method steps in the embodiments of this application can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can reside in an ASIC.

[0127] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state disk (SSD)).

[0128] It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application.

Claims

1. A method for initializing a PCIe device, characterized in that, Applied to a server, the server including a BIOS and a BMC, the method includes: During the server startup process, the BIOS reads the PCIe devices connected to the server to obtain a first set of PCIe devices, and establishes a connection with the PCIe devices in the first set of PCIe devices, wherein the first set of PCIe devices includes at least one PCIe device. The BIOS obtains a second set of PCIe devices through the BMC. The second set of PCIe devices includes at least one PCIe device. The PCIe devices in the second set of PCIe devices are obtained by the BMC based on the hardware information of the PCIe devices connected to the server. If the number of PCIe devices in the first PCIe device set is less than the number of PCIe devices in the second PCIe device set, the BIOS waits for a preset time and then establishes a connection with at least a portion of the PCIe devices in the second PCIe device set to complete the normal startup of the server. The first PCIe device set does not include the at least a portion of the PCIe devices.

2. The method according to claim 1, characterized in that, Before the BIOS establishes a connection with at least a portion of the PCIe devices in the second set of PCIe devices, the method further includes: The BIOS compares the identifiers of each PCIe device in the first PCIe device set with the identifiers of each PCIe device in the second PCIe device set to determine the identifiers of at least a portion of the PCIe devices in the second PCIe device set, wherein the at least a portion of the PCIe devices are not included in the first PCIe device set.

3. The method according to any one of claims 1-2, characterized in that, The BIOS establishes a connection with at least a portion of the PCIe devices in the second set of PCIe devices, including: The BIOS performs PCIe link training on at least a portion of the PCIe devices in the second PCIe device set, so that the PCIe link information between at least a portion of the PCIe devices in the second PCIe device set and the BIOS meets preset link requirements.

4. The method according to any one of claims 1-3, characterized in that, Before the BIOS reads the PCIe devices connected to the server, the method further includes: With all PCIe devices connected to the server having completed initialization, the BIOS controls the server to perform a hot reset.

5. A server, characterized in that, include: BIOS and BMC During the server startup process, the BIOS reads the PCIe devices connected to the server to obtain a first set of PCIe devices and establishes a connection with the PCIe devices in the first set of PCIe devices, wherein the first set of PCIe devices includes at least one PCIe device. The BIOS is also configured to obtain a second set of PCIe devices through the BMC, the second set of PCIe devices including at least one PCIe device, and the PCIe devices in the second set of PCIe devices are obtained by the BMC based on the hardware information of the PCIe devices connected to the server. The BIOS is further configured to, when the number of PCIe devices in the first PCIe device set is less than the number of PCIe devices in the second PCIe device set, wait for a preset time and then establish a connection with at least a portion of the PCIe devices in the second PCIe device set to complete the normal startup of the server, wherein the first PCIe device set does not include the at least a portion of the PCIe devices.

6. The server according to claim 5, characterized in that, Before the BIOS establishes a connection with at least a portion of the PCIe devices in the second set of PCIe devices, the BIOS is further configured to: The identifiers of each PCIe device in the first PCIe device set are compared with the identifiers of each PCIe device in the second PCIe device set to determine the identifiers of at least a portion of the PCIe devices in the second PCIe device set, wherein the at least a portion of the PCIe devices are not included in the first PCIe device set.

7. The server according to any one of claims 5-6, characterized in that, The BIOS is used for: PCIe link training is performed on at least a portion of the PCIe devices in the second PCIe device set to ensure that the PCIe link information between at least a portion of the PCIe devices in the second PCIe device set and the BIOS meets preset link requirements.

8. The server according to any one of claims 5-7, characterized in that, Before the BIOS reads the PCIe devices connected to the server, the BIOS is also used to: Once all PCIe devices connected to the server have completed initialization, control the server to perform a hot reset.

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