Display device and server

Abstract

Embodiments of the present disclosure relate to a display apparatus and a server. More particularly, a display apparatus can be provided that includes a light-receiving transistor and a light-receiving layer in an active area and provides a light signal receiver in the active area so that a separate space for the light signal receiver need not be ensured and high-speed optical communication is possible.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0101137, filed on August 2, 2021 in the Republic of Korea, the entire contents of which are hereby expressly incorporated by reference. Technical Field

[0003] Embodiments of this disclosure relate to display devices and servers. Background Technology

[0004] Display devices that display various information on a screen are a key technology in the information and communication technology era, and with the development of technology, they are becoming lighter and easier to carry.

[0005] Because display devices are used as information processing terminals, they can perform a variety of other functions besides their unique ability to display images. Display devices can also function as information processing terminals, and existing communication technologies (such as 4G and 5G) within specific frequency ranges are already used in them. However, a potential limitation of these information and communication technologies is the possibility of crosstalk within the same frequency band.

[0006] The use of visible light communication (VLC) technology can resolve crosstalk that can occur in existing communication technologies using specific frequency ranges. Visible light communication is one type of wireless communication technology that uses visible light with wavelengths from 380 nm to 780 nm. Such a technology uses the flickering of light-emitting diodes (LEDs) as a transmission signal and performs communication using a light signal receiver comprising a photodiode for receiving the signal transmitted by the LED. An advantage of using visible light for this type of communication is that crosstalk with existing communication technologies using specific frequency ranges (such as 4G and 5G) is less likely to occur.

[0007] To apply visible light communication technology to display devices, a separate optical signal receiver is required within the display device. This can lead to limitations, such as increasing the area of ​​the bezel region or decreasing the area of ​​the active region. Furthermore, when using a separate optical signal receiver utilizing a photodiode, the communication speed can be determined by the receiver's location within a limited area, potentially making it difficult to ensure sufficient communication speed. Therefore, the inventors of this disclosure have specifically invented an improved display device and an improved server that can perform optical communication without a separate optical signal receiver and ensure sufficient communication speed. Summary of the Invention

[0008] Furthermore, embodiments of this disclosure provide an improved display device and an improved server that address the limitations and drawbacks associated with the related art.

[0009] Furthermore, embodiments of this disclosure may provide a display device including a light-receiving transistor and a light-receiving layer located in an active region, thereby providing a light signal receiver in the active region, eliminating the need to ensure a separate space for providing the light signal receiver, and enabling improved optical communication at high speed.

[0010] Embodiments of this disclosure may provide a server that includes a processor, an optical signal receiver, and an optical signal transmitter, and multiple display devices that use optical signals to perform parallel processing.

[0011] Embodiments of this disclosure may provide a display device including an active region, a light-emitting element located in the active region, a light-receiving transistor located in the active region, and a light-receiving layer located in the active region.

[0012] The light-receiving layer can be electrically connected to the light-receiving transistor and can at least partially overlap with the light-emitting element.

[0013] Embodiments of this disclosure may provide a server including a first display device and a second display device, wherein the first display device and the second display device perform parallel processing using optical signals.

[0014] Each of the first display device and the second display device may be a display device according to the above embodiments of the present disclosure.

[0015] According to embodiments of the present disclosure, a display device may be provided, which includes a light-receiving transistor located in an active region and a light-receiving layer located in an active region, thereby performing optical communication using a light signal transmitter and a light signal receiver located in the active region.

[0016] According to embodiments of the present disclosure, a server may be provided that includes a plurality of display devices, each of which includes a processor, an optical signal transmitter, and an optical signal receiver, such that the processor of the display devices performs parallel processing. Attached Figure Description

[0017] The above and other objects, features and advantages of this disclosure will become more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0018] Figure 1 This is a system configuration diagram of a display device according to an embodiment of the present disclosure.

[0019] Figure 2It is the equivalent circuit of a sub-pixel of a display device according to an embodiment of the present disclosure.

[0020] Figure 3 This is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0021] Figure 4 This is a view showing the change in the work function depending on the material type and thickness of the light-receiving layer.

[0022] Figure 5 and Figure 6 This is a plan view of a display device according to an embodiment of the present disclosure.

[0023] Figure 7 This is a cross-sectional view of a non-photoelectric receiving transistor according to an embodiment of the present disclosure.

[0024] Figure 8 This is a cross-sectional view of a light-receiving transistor according to an embodiment of the present disclosure.

[0025] Figure 9 and Figure 10 This is a view illustrating a display device for performing optical communication according to an embodiment of the present disclosure.

[0026] Figure 11 This is a view illustrating optical communication using a dimension unit of a display device according to an embodiment of the present disclosure.

[0027] Figure 12 This is a view illustrating an algorithm for performing optical communication by a display device according to an embodiment of the present disclosure.

[0028] Figure 13 and Figure 14 This is a view illustrating a server according to an embodiment of this disclosure. Detailed Implementation

[0029] In the following description of examples or embodiments of the invention, reference will be made to the accompanying drawings, in which specific examples or embodiments that can be implemented are illustrated by way of illustration, and these reference numerals and symbols may be used to denote the same or similar parts even when shown in different drawings. Furthermore, in the following description of examples or embodiments of the invention, a detailed description of well-known functions and parts incorporated herein will be omitted where it is determined that such detailed description would obscure the subject matter of some embodiments of the invention. Terms used herein (e.g., “comprising,” “having,” “including,” “constitute,” “forming,” “comprise,” and “form”) are generally intended to allow for the addition of additional parts unless the term is used in conjunction with the term “only”. As used herein, the singular form is intended to include the plural form unless the context clearly indicates otherwise.

[0030] Terms (such as "first", "second", "A", "B", "(A)" or "(B)") may be used herein to describe elements of the invention. Each of these terms is not intended to define the nature, order, sequence or number of elements, but only to distinguish the corresponding element from other elements.

[0031] When referring to the first element and the second element as "connected or coupled," "in contact or overlapping," etc., it should be interpreted as follows: not only can the first element be "directly connected or coupled" or "directly in contact or overlapping" with the second element, but a third element can also be "inserted" between the first and second elements, or the first and second elements can be "connected or coupled," "in contact or overlapping," etc., with each other via a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or coupled," "in contact or overlapping," etc., with each other.

[0032] When time-related terms such as “after,” “following,” “next,” “before” are used to describe a process or operation of an element or configuration, or a flow or step in an operation, process, or manufacturing method, these terms may be used to describe a non-continuous or non-sequential process or operation, unless the terms “directly” or “immediately following” are used together.

[0033] Additionally, when referring to any relative size, etc., it should be considered that, even without a specific description, the numerical values ​​or corresponding information of an element or feature (e.g., level, range, etc.) include tolerances or error ranges that can be caused by various factors (e.g., process factors, internal or external shocks, noise, etc.). Furthermore, the term "may" fully encompasses all the meanings of the term "capable". Various embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. All components of each display device according to all embodiments of this disclosure are operatively coupled and configured.

[0034] Figure 1 This is a system configuration diagram of an organic light-emitting display device 100 according to an embodiment of the present disclosure.

[0035] refer to Figure 1 An organic light-emitting display device 100 according to an embodiment of the present disclosure may include a display panel PNL having a plurality of data lines DL and a plurality of gate lines GL disposed thereon and a plurality of sub-pixels 120 connected to the plurality of data lines DL and the plurality of gate lines GL arranged thereon, and includes a driving circuit for driving the display panel PNL.

[0036] Functionally, the driving circuit may include a data driving circuit DDC that drives multiple data lines DL, a gate driving circuit GDC that drives multiple gate lines GL, and a controller CTR for controlling the data driving circuit DDC and the gate driving circuit GDC.

[0037] In a display panel PNL, multiple data lines DL and multiple gate lines GL can be configured to intersect each other. For example, the multiple data lines DL can be arranged in rows or columns, and the multiple gate lines GL can be arranged in columns or rows. For ease of description, it is assumed below that the multiple data lines DL are arranged in rows and the multiple gate lines GL are arranged in columns.

[0038] The controller CTR can provide various control signals DCS and GCS required for the operation of the data drive circuit DDC and the gate drive circuit GDC to control the data drive circuit DDC and the gate drive circuit GDC.

[0039] The controller CTR can start scanning according to the timing implemented in each frame, convert input image data from external sources according to the data signal format used in the data drive circuit DDC, output converted image data DATA, and control data drive at appropriate times according to the scan.

[0040] The controller CTR can be a timing controller used in typical display technologies, or a control device capable of further performing other control functions including the timing controller.

[0041] The controller CTR can be implemented as a separate component from the data drive circuit DDC, or it can be integrated with the data drive circuit DDC to be implemented as an integrated circuit.

[0042] The data drive circuit DDC can receive image data DATA from the controller CTR and provide data voltage to multiple data lines DL to drive them. Here, the data drive circuit DDC can also be referred to as the source drive circuit.

[0043] A data drive circuit (DDC) can be implemented by including at least one source driver integrated circuit (S-DIC). Each source driver integrated circuit (S-DIC) may include a shift register, latch circuit, digital-to-analog converter (DAC), output buffer, etc. In some cases, each source driver integrated circuit (S-DIC) may further include an analog-to-digital converter (ADC).

[0044] Each source driver integrated circuit (S-DIC) can be connected to the bonding pads of the display panel PNL via a tape-on-absence (TAB) method or a chip-on-glass (COG) method, or it can be directly disposed on the display panel PNL. In some cases, each source driver integrated circuit (S-DIC) can be integrated and disposed on the display panel PNL. Furthermore, each source driver integrated circuit (S-DIC) can be implemented using a chip-on-film (COF) method, where it is mounted on the source circuit film connected to the display panel PNL.

[0045] The gate drive circuit GDC can sequentially drive multiple gate lines GL by providing scan signals to them sequentially. Here, the gate drive circuit GDC can also be referred to as the scan drive circuit.

[0046] The gate driver circuit (GDC) can be connected to the bonding pads of the display panel PNL via a tape-on-absence (TAB) method or a chip-on-glass (COG) method, or it can be implemented as a gate-in-panel (GIP) type and directly disposed on the display panel PNL. In some cases, the gate driver circuit (GDC) can be integrated and disposed on the display panel PNL. Furthermore, the gate driver circuit (GDC) can be implemented using a chip-on-film (COF) method, where the gate driver circuit (GDC) is implemented by multiple gate driver integrated circuits (G-DICs) and mounted on the gate circuit film connected to the display panel PNL.

[0047] The gate drive circuit GDC, under the control of the controller CTR, can sequentially provide the scanning signals of the turn-on voltage or turn-off voltage to multiple gate lines GL.

[0048] When a specific gate line is disconnected by the gate drive circuit GDC, the data drive circuit DDC can convert the image data DATA received from the controller CTR into analog data voltage and provide it to multiple data lines DL.

[0049] The data driving circuit DDC may be located only on one side of the display panel PNL (e.g., the top or the bottom), and in some cases, depending on the driving method, panel design method, etc., the data driving circuit DDC may be located on both sides of the display panel PNL (e.g., the top and the bottom).

[0050] The gate drive circuit GDC may be located only on one side of the display panel PNL (e.g., the left or right side), and in some cases, depending on the driving method, panel design method, etc., the gate drive circuit GDC may be located on both sides of the display panel PNL (e.g., the left and right sides).

[0051] The multiple gate lines GL disposed on the display panel PNL can include multiple scan lines SCL, multiple sensing lines SENL, and multiple light-emitting control lines EML. The scan lines SCL, sensing lines SENL, and light-emitting control lines EML are wirings that transmit different types of gate signals (scan signals, sensing signals, and light-emitting control signals) to the gate nodes of different types of transistors (scan transistors, sensing transistors, and light-emitting control transistors). The following will refer to... Figure 2 Describe it.

[0052] When the organic light-emitting display device 100 according to the embodiments of the present disclosure is an OLED display, each sub-pixel 120 may include an organic light-emitting diode (OLED) that emits light as a light-emitting element.

[0053] However, this disclosure is not limited thereto, and the organic light-emitting display device 100 according to embodiments of this disclosure may include light-emitting elements made of quantum dots. The organic light-emitting display device 100 may also include micro light-emitting diodes (LEDs) that emit light themselves as light-emitting elements and are made of inorganic materials.

[0054] Figure 2 This is the equivalent circuit of the sub-pixel 120 of the organic light-emitting display device 100 according to an embodiment of the present disclosure.

[0055] refer to Figure 2 In the organic light-emitting display device 100 according to an embodiment of the present disclosure, each sub-pixel 120 may include a light-emitting element 210, a driving transistor DRT for controlling the current flowing through the light-emitting element 210, a scanning transistor SCT for transmitting a data voltage Vdata to the driving transistor DRT, a sensing transistor SENT for initialization operation, a light-emitting control transistor EMT for light emission control, and a storage capacitor Cst for maintaining the voltage for a predetermined time period.

[0056] The light-emitting element 210 may include a first electrode 211, a second electrode 212, and a light-emitting layer 213 located between the first electrode 211 and the second electrode 212. The first electrode 211 of the light-emitting element 210 may be an anode electrode or a cathode electrode, and the second electrode 212 may be a cathode electrode or an anode electrode. The light-emitting element 210 may be, for example, an organic light-emitting diode (OLED), a light-emitting diode (LED), or a quantum dot light-emitting element.

[0057] The second electrode 212 of the light-emitting element 210 can be a common electrode.

[0058] The driving transistor DRT is a transistor used to drive the light-emitting element 210, and may include a first node N1, a second node N2, and a third node N3.

[0059] The first node N1 of the driving transistor DRT is the node corresponding to the gate node and can be electrically connected to the source node or drain node of the scanning transistor SCT. The second node N2 of the driving transistor DRT can be electrically connected to the first electrode 211 of the light-emitting element 210 and can be either the source node or the drain node. The third node N3 of the driving transistor DRT is the node to which the driving voltage EVDD is applied and can be electrically connected to the driving voltage line DVL that provides the driving voltage EVDD, and can be either the drain node or the source node. In the following description, for ease of description, it can be described as an example where the second node N2 of the driving transistor DRT is the source node and the third node N3 is the drain node.

[0060] The scanning transistor SCT can control the connection between the first node N1 of the driving transistor DRT and the corresponding data line DL of the multiple data lines DL in response to the scanning signal SCAN provided from the corresponding scan line SCL among the multiple scan lines SCL, wherein the scan line SCL is a type of gate line GL.

[0061] The drain or source node of the scan transistor SCT can be electrically connected to the corresponding data line DL. The source or drain node of the scan transistor SCT can be electrically connected to the first node N1 of the driving transistor DRT. The gate node of the scan transistor SCT can be electrically connected to the scan line SCL, which is a type of gate line GL, to receive the applied scan signal SCAN.

[0062] The scanning transistor SCT can be turned on by the scanning signal SCAN with a conduction level voltage, and can transmit the data voltage Vdata provided from the corresponding data line DL to the first node N1 of the driving transistor DRT.

[0063] The sensing transistor SENT can control the connection between the second node N2 of the first electrode 211 of the light-emitting element 210 and the corresponding reference line RVL of the multiple reference lines SENL in response to the sensing signal SENSE provided from the corresponding sensing line SENL of the multiple sensing lines SENL. The sensing line SENL is a type of gate line GL.

[0064] The drain or source node of the sensing transistor SENT can be electrically connected to the reference line RVL. The source or drain node of the sensing transistor SENT can be electrically connected to the second node N2 of the driving transistor DRT, and can also be electrically connected to the first electrode 211 of the light-emitting element 210. The gate node of the sensing transistor SENT can be electrically connected to the sensing line SENL, which is a type of gate line GL, to receive the applied sensing signal SENSE.

[0065] The sensing transistor SENT can be turned on to apply the reference voltage Vref provided from the reference line RVL to the second node N2 of the driving transistor DRT.

[0066] The sensing transistor SENT can be turned on by a sensing signal SENSE at the on-level voltage and turned off by a sensing signal SENSE at the off-level voltage.

[0067] The light-emitting control transistor (EMT) can control the connection between the third node N3 of the driving transistor DRT and the corresponding driving line DVL among the multiple driving lines DVL, in response to a light-emitting control signal EM provided from a corresponding light-emitting control line EML among multiple light-emitting control lines EML. The light-emitting control line EML is a type of gate line GL. That is, as... Figure 2 As shown, the light-emitting control transistor EMT can be electrically connected between the third node N3 of the driving transistor DRT and the driving line DVL.

[0068] The drain or source node of the light-emitting control transistor (EMT) can be electrically connected to the drive line DVL. The source or drain node of the EMT can be electrically connected to the third node N3 of the drive transistor DRT. The gate node of the EMT can be electrically connected to the light-emitting control line EML, which is a type of gate line GL, to receive the applied light-emitting control signal EM.

[0069] Alternatively, the light-emitting control transistor EMT can also control the connection between the second node N2 of the driving transistor DRT and the first electrode 211 of the light-emitting element 210. That is, with Figure 2 Unlike the previous example, the light-emitting control transistor EMT can be electrically connected between the second node N2 of the driving transistor DRT and the light-emitting element 210.

[0070] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT to hold the data voltage Vdata, which corresponds to the image signal voltage, or the voltage corresponding to it, for one frame time.

[0071] Figure 2 Each subpixel structure shown is merely an example for description and may also include one or more transistors, or in some cases, one or more capacitors. Alternatively, each of the multiple subpixels may have the same structure, and some of the multiple subpixels may have different structures.

[0072] Figure 3 This is a cross-sectional view of the active region of the display device 100 according to an embodiment of the present disclosure.

[0073] refer to Figure 3The display device 100 may include an active area, a light-emitting element, a light-receiving transistor 320, and a light-receiving layer 350.

[0074] The light-emitting element is located in the active region of the display device 100. The light-emitting element may include a first electrode 211, a second electrode 212, and light-emitting layers 213a and 213b located between the first electrode and the second electrode.

[0075] The first electrode 211 can be an anode electrode or a cathode electrode. For example, the first electrode 211 can be a pixel electrode formed to correspond to a sub-pixel. The first electrode 211 can be a reflective electrode. When the first electrode 211 is a reflective electrode, the first electrode 211 can reflect light emitted from the light-emitting layers 213a and 213b to emit light to the outside of the display device 100, thereby improving the efficiency of the display device 100.

[0076] The second electrode 212 can be an anode electrode or a cathode electrode. For example, the second electrode 212 can be a common electrode of a sub-pixel located in the active region. The second electrode 212 can be a transparent electrode or a semi-transparent electrode.

[0077] There may be one or more light-emitting layers. For example, a light-emitting element may include a single light-emitting layer. In another example, a light-emitting element may include a first light-emitting layer 213a and a second light-emitting layer 213b. When a light-emitting element includes two or more light-emitting layers, the light-emitting element may be a so-called tandem light-emitting element.

[0078] The light-emitting element may also include a functional layer other than the light-emitting layer between the first electrode 211 and the second electrode 212. The functional layer may be at least one of, for example, a hole injection layer, a hole transport layer, a charge generation layer, an electron transport layer, and an electron injection layer. For example, the light-emitting element may include a charge generation layer 314 located between the first light-emitting layer 213a and the second light-emitting layer 213b.

[0079] The light-receiving transistor 320 may be located in the active area of ​​the display device 100. The light-receiving transistor 320 refers to a transistor used to receive light signals, and unlike the non-light-receiving transistor 330 used to drive pixels, the light-receiving transistor 320 does not operate for pixel driving.

[0080] According to embodiments of the present disclosure, the display device 100 can use a light-receiving transistor 320 located in the active region to receive optical signals, so that a separate optical signal receiver using a photodiode or the like is not provided in the non-active region other than the active region. Therefore, the display device 100 can utilize part or all of the active region as an optical signal receiver during optical communication.

[0081] The optical receiving layer 350 is located in the active region. Because the optical receiving layer 350 is located in the active region, it is not necessary to provide a separate optical signal receiver in the non-active region other than the active region, and during optical communication, part or all of the active region can be used as an optical signal receiver.

[0082] The light receiving layer 350 can be electrically connected to the light receiving transistor 320. The light receiving layer 350 may include a material capable of generating current through the photoelectric effect, and the current generated by the light signal can flow through the light receiving transistor 320.

[0083] The material type of the light-receiving layer 350 is not particularly restricted, and any material can be used, as long as a voltage that can be input to the light-receiving transistor 320 can be generated through the photoelectric effect.

[0084] Figure 4 This is a view showing the variation of the work function depending on the type and thickness of the material of the light-receiving layer 350.

[0085] refer to Figure 4 The light-receiving layer 350 may be formed of a material having a work function from, for example, 1.0 eV to 9.0 eV. The light-receiving layer 350 may include, for example, Li, LiF, Li3PO4, or Li2CO3. For example, considering the consistency of the work function with respect to thickness variation, LiF may be used as the light-receiving layer 350.

[0086] refer to Figure 3 The light receiving layer 350 may at least partially overlap with the light-emitting element. For example, the light-emitting element may be located over the entire active area of ​​the display device 100, and the light receiving layer 350 may be positioned to overlap with the light-emitting element such that the light receiving layer 350 may be located in at least a portion of the active area to receive light signals.

[0087] One of the first electrode 211 and the second electrode 212 of the light-emitting element may be a layer of the same material as the gate electrode 321 of the photoreceiving transistor 320. The fact that one of the first electrode 211 and the second electrode 212 is a layer of the same material as the gate electrode 321 means that one of the first electrode 211 and the second electrode 212 is formed using the same mask process as the gate electrode, or it means that one of the first electrode 211 and the second electrode 212 is made of substantially the same material as the gate electrode 321. (Reference) Figure 3 The first electrode 211 can be a pixel electrode, and the first electrode 211 can be the same material layer as the gate electrode 321. For example, the second electrode 212 and the gate electrode 321 can be the same material layer, and the second electrode 212 and the gate electrode 321 can be transparent electrodes or semi-transparent electrodes.

[0088] The light-receiving layer 350 can contact the gate electrode 321 of the light-receiving transistor 320. The fact that the light-receiving layer 350 contacts the gate electrode 321 can mean direct contact. When the light-receiving layer 350 contacts the gate electrode 321, the current generated by the photoelectric effect can input a voltage to the gate electrode 321 of the light-receiving transistor 320.

[0089] The display device 100 may include a light-blocking layer 340. A light-receiving transistor 320 may be positioned not to overlap with the light-blocking layer 340. The light-receiving transistor 320 may be positioned not to overlap with the light-blocking layer 340, thereby ensuring space for pixel circuitry units located in the region that overlaps with the light-blocking layer 340.

[0090] The display device 100 may include a non-light-receiving transistor 330. The non-light-receiving transistor 330 may be a driving transistor or a scanning transistor constituting a sub-pixel. The non-light-receiving transistor 330 may be positioned to overlap with the light-blocking layer 340. Because the non-light-receiving transistor 330 is positioned to overlap with the light-blocking layer 340, light degradation of the sub-pixel circuitry can be prevented.

[0091] The display device 100 may include a substrate 310, a first passivation layer 311 on the substrate 310, a light blocking layer 340 on the first passivation layer 311, and a second passivation layer 312 on the light blocking layer 340.

[0092] The substrate 310 can be glass or plastic, such as polyimide, and its type is not particularly limited.

[0093] The phototransistor 320 and the non-phototransistor 330 may be located on the substrate. The capacitor may be located on the substrate 310.

[0094] The first passivation layer 311 is an insulating layer located on the substrate and can be a layer that protects various circuit elements formed on the substrate 310. The first passivation layer 311 can be positioned on the photoreceiving transistor 320 and the non-photoreceiving transistor 330 located on the substrate 310.

[0095] The light-blocking layer 340 may be a layer used to prevent light degradation of the circuit elements of the display device 100 from light incident on the display device 100 from the outside of the display device 100.

[0096] The second passivation layer 312 is an insulating film located on the light blocking layer 340, and can be a layer that protects various metal layers formed on the first passivation layer 311. The second passivation layer 312 can be disposed on the first passivation layer 311.

[0097] The gate electrode 321 of the phototransistor 320 can contact the photoreceiving layer 350 on the second passivation layer 312. For example, the gate electrode 321 can directly contact the photoreceiving layer 350 on the second passivation layer 312.

[0098] The first electrode 211 of the light-emitting element may be located on the second passivation layer 312. In addition, the gate electrode 321 of the light-receiving transistor 320 may be located on the second passivation layer 312.

[0099] The embankment 313 may be located on the first electrode 211. The light-emitting area of ​​the light-emitting element may be defined by the embankment 313. The embankment 313 may be made of organic material.

[0100] The first light-emitting layer 213a may be located on the embankment 313. The charge-generating layer 314 may be located on the first light-emitting layer 213a. The second light-emitting layer 213b may be located on the charge-generating layer 314. The first light-emitting layer 213a and the second light-emitting layer 213b may emit light of the same color or different colors.

[0101] The charge generation layer 314 may be located between the first light-emitting layer 213a and the second light-emitting layer 213b, and may include, for example, Li, LiF, Li3PO4, or Li2CO3. For example, considering the consistency of the work function according to the thickness variation, LiF may be used as the charge generation layer 314.

[0102] The second electrode 212 may be located on the second light-emitting layer 213b. The capping layer 360 may be located on the second electrode 212. The capping layer 360 may flatten the steps between multiple light-emitting elements and may have a thickness that optimizes the efficiency of light emitted from the light-emitting elements.

[0103] The encapsulation layer 315 may be located on the cover layer 360. The encapsulation layer 315 may be a single layer or multiple layers, and may include organic or inorganic materials. The encapsulation layer 315 may be used to protect the light-emitting elements and various circuit components from the effects of moisture and oxygen outside the display device 100.

[0104] Color filter 316 can be located on encapsulation layer 315. Color filter 316 can extract light of a specific color from the light emitted by the light-emitting element.

[0105] The outer coating 317 may be located on the color filter 316. The outer coating 317 may planarize the color filter 316.

[0106] exist Figure 3 In the display device 100 shown, the light receiving layer 350 may be the charge generating layer 314, but in other embodiments of this disclosure, the light receiving layer 350 may be the cover layer 360.

[0107] In embodiments where the cover layer of this disclosure is a light-receiving layer, except that the charge-generating layer is not electrically connected to the light-receiving transistor and the cover layer is electrically connected to the light-receiving transistor, ... Figure 3 The different structures shown in the embodiments can be the same.

[0108] Figure 5 This is a plan view of the active region 500 of a display device according to an embodiment of the present disclosure.

[0109] refer to Figure 5 The active region 500 may include the light-emitting region 510 and the non-light-emitting region 520.

[0110] The light-emitting region 510 may be defined by, for example, a embankment, and may be the region in which light is emitted from the light-emitting element. The light-emitting region 510 may include, for example, a region emitting red (R) light, a region emitting green (G) light, and a region emitting blue (B) light.

[0111] The non-light-emitting region 520 can be a region in the active region 500 other than the light-emitting region 510, and can be a region from which no light is emitted.

[0112] In the non-light-emitting region 520, the data line DL can be located in the column direction. In the non-light-emitting region 520, the gate line GL can be located in the row direction. The circuit region 521, where the circuit elements for driving the pixels are located, can be located in the non-light-emitting region 520.

[0113] The data line DL and the gate line GL can be located between the light-emitting regions 510. The data line DL and the gate line GL can be electrically connected to various circuit elements located in the circuit region 521 while passing through the circuit region 521.

[0114] Figure 6 It is based on Figure 5 An enlarged and simplified view of a portion of the active region shown in an embodiment of this disclosure.

[0115] refer to Figure 6 The active region may include the light-emitting region 510 and the circuit region 521.

[0116] Circuit region 521 may include pixel circuit unit 630 and light-receiving transistor 320. Pixel circuit unit 630 is a circuit for driving the light-emitting element and may include driving transistor DRT, scanning transistor SCT, and storage capacitor Cst. Light-receiving transistor 320 may include source / drain 622 and gate electrode 321.

[0117] The first electrode 211 and the charge generation layer 314 can be located in the light-emitting region 510. The first electrode 211 can contact the driving transistor DRT of the pixel circuit unit 630 located outside the light-emitting region 510. The charge generation layer 314 can contact the gate electrode 321 of the light-receiving transistor 320 and can be used as a light-receiving layer.

[0118] The light receiving layer may include a first portion 651 and a second portion 652. (See reference) Figure 6 The charge generation layer 314, which serves as the light receiving layer, may include a first portion 651 and a second portion 652.

[0119] The first portion 651 may at least partially overlap with the light-emitting region 510. The first portion 651 may be the portion substantially corresponding to the light-emitting region 510 in the light-receiving layer. (See reference) Figure 6 The first part 651 may be a part that substantially corresponds to the light-emitting region 510 in the charge generation layer 314 used as a light receiving layer.

[0120] The second portion 652 may at least partially overlap with the non-light-emitting region, and the first portion 651 may be connected to the light-receiving transistor 320. The second portion 652 may be a portion of the light-receiving layer extending from the first portion 651, such that the light-receiving layer can contact the light-receiving transistor 320 within the light-receiving layer. (Reference) Figure 6 In the charge generation layer 314, which serves as a light receiving layer, the second portion 652 may be a portion of the charge generation layer 314 extending from the first portion 651, such that the charge generation layer 314 may contact the light receiving transistor 320.

[0121] The second part 652 may be the portion of the light-receiving layer that directly contacts the gate electrode 321 of the light-receiving transistor 320. (See reference) Figure 6 In the charge generation layer 314, which serves as a light receiving layer, the second part 652 may be the part of the charge generation layer 314 that is in direct contact with the gate electrode 321 of the light receiving transistor 320.

[0122] Figure 7 This is a cross-sectional view of a non-photosensitive transistor included in a display device according to an embodiment of the present disclosure.

[0123] refer to Figure 7 The non-photodetector transistor 330 may include a substrate 310, a gate electrode 710 on the substrate, a gate insulating film 720 on the gate electrode, a semiconductor layer 730 on the gate insulating film, an etch stop layer 740 on the semiconductor layer, and a source / drain 750.

[0124] The passivation layer 760 can be located on the non-photodetector transistor 330. The passivation layer 760 can be a single layer or multiple layers.

[0125] The source / drain 750 of the non-photodetector transistor 330 can contact the first electrode 211 of the light-emitting element.

[0126] The structure of the non-photodetector transistor of the display device according to embodiments of the present disclosure is not limited to... Figure 7 The structure shown.

[0127] Figure 8 This is a cross-sectional view of a light-receiving transistor included in a display device according to an embodiment of the present disclosure.

[0128] refer to Figure 8 The phototransistor 320 may include a substrate 310, a gate insulating film 720 on the substrate 310, a semiconductor layer 730 on the gate insulating film 720, a gate insulating film 810 on the semiconductor layer 730, a source / drain 750, and a gate electrode 321.

[0129] The gate insulating film 720 can be the same material layer as the gate insulating film of a non-photosensitive transistor.

[0130] In an embodiment where the light-receiving layer is a charge-generating layer 314, the charge-generating layer 314 is in contact with the gate electrode 321. The gate electrode 314 can be directly located on the charge-generating layer 314. Thus, since the charge-generating layer 314 is in contact with the gate electrode 314, the current generated in the charge-generating layer 314 through the photoelectric effect can be input to the gate electrode 321 of the phototransistor 320.

[0131] Figure 9 This is a view illustrating a display device for performing optical communication according to an embodiment of the present disclosure.

[0132] refer to Figure 9 The display device 100a may include an optical signal transmitter 910 and an optical signal receiver 920.

[0133] The optical signal transmitter 910 may overlap with the active area of ​​the display device 100a. Since the optical signal used for optical communication uses a light-emitting element, the active area where the light-emitting element is located and the optical signal transmitter 910 may overlap with each other, and essentially the entire active area may be the optical signal transmitter 910.

[0134] The optical signal receiver 920 may overlap with the active region of the display device 100a. In the display device according to embodiments of the present disclosure, optical signal reception can be performed by inputting a current generated by the photoelectric effect in the light-receiving layer to the light-receiving transistor, and the light-receiving layer may overlap with the active region as described above. Therefore, the optical signal receiver 920 may overlap with the active region of the display device 100a, and the optical signal receiver 920 may be located above the entire active region.

[0135] The optical signal transmitter 910 may include a first dimension 911, and the optical signal receiver 920 may include a second dimension 921. A dimension can refer to a unit used for transmitting / receiving optical signals in optical communication, and a dimension may include one or more sub-pixels. This dimension may also be referred to herein as a dimension unit.

[0136] refer to Figure 9 Information can be exchanged via optical communication in the areas of the first display device 100a and the second display device 100b.

[0137] Figure 10 This is a view illustrating a display device performing optical communication according to an embodiment of the present disclosure.

[0138] refer to Figure 10 The area 911 of the optical signal transmitter 910 of the first display device 100a and the area 1021 of the optical signal receiver 1020 of the second display device 100b can exchange information via optical communication.

[0139] The area 1011 of the optical signal transmitter 1010 of the second display device 100b may include, for example, nine sub-pixels, each sub-pixel including a light-emitting area 510. The area 1021 of the optical signal receiver 1020 of the second display device 100b may include, for example, four sub-pixels, each sub-pixel including a light-emitting area 510. The number of sub-pixels constituting an area can be varied. When multiple sub-pixels constitute an area, the light intensity required for optical communication can be easily met, thereby enabling smooth optical communication.

[0140] Optical signal transmitters and optical signal receivers are not limited to Figure 9 and Figure 10 The shapes shown are variable, and the shapes of the optical signal transmitter and optical signal receiver can be varied according to the display device performing optical communication. A light-emitting element included in any region of the active area of ​​the display device can be operated as an optical signal transmitter, and a light-receiving layer and light-receiving transistor included in any region of the active area of ​​the display device can be used as an optical signal receiver.

[0141] Figure 11This is a view showing the use of optical communication within a region.

[0142] For example, the state where the light-emitting elements in one area are turned on can be defined as 1, and the state where the light-emitting elements in one area are turned off can be defined as 0. When an area is used for optical communication, data consisting of 0s and 1s can be transmitted by causing the light-emitting elements included in that area to blink at a specific frequency. However, when using an area, a potential limitation is that the communication speed may be limited by the frequency at which the light-emitting elements can blink.

[0143] For example, when eight cells are used for optical communication, each cell can independently transmit 0 or 1 data because the light-emitting elements that make up the multiple cells can operate independently. Therefore, when using eight cells, data can be sent and received at a much higher speed than when using one cell.

[0144] When a light-emitting element constitutes a patch, the number of patches constituting the optical signal transmitter is equal to the number of light-emitting elements included in the entire active area of ​​the display device. Since a sufficient number of patches can be ensured even when using a portable display device, optical communication can be performed at very high speeds according to embodiments of this disclosure.

[0145] Figure 12 This is a view illustrating an algorithm for performing optical communication by a display device according to an embodiment of the present disclosure.

[0146] refer to Figure 12 In order for devices (A) and (B) to perform optical communication, area photonic communication (DPC) can be performed after determining the number of subpixels required to form the optimal area for performing smooth optical communication by exchanging information about the size of the display panel included in each display device, the number of subpixels included, and the light-emitting characteristics of the light-emitting elements. When optical communication is performed by this algorithm, smooth optical communication can be performed even between display devices that include different display panels.

[0147] The display device according to the embodiments of this disclosure can be used as a security identifier (ID) when applied to vehicle windows or building doors and optical communications, and can be used to transmit product advertising information through the identifier.

[0148] According to other embodiments of this disclosure, a server including a first display device and a second display device may be provided.

[0149] Figure 13 This is a view illustrating a server according to an embodiment of this disclosure.

[0150] refer to Figure 13According to embodiments of this disclosure, the server may include a first display device 100a, a second display device 100b, a third display device 100c, and a fourth display device 100d. Although Figure 13 A server comprising four display devices is shown, but the server according to embodiments of this disclosure is not limited thereto, and the server according to embodiments of this disclosure may include two or more display devices. The multiple display devices included in the server may be the same or different from each other.

[0151] In a server according to an embodiment of this disclosure, a display device, such as a first display device, may be the display device described above according to an embodiment of this disclosure. Therefore, unless otherwise described regarding the display device of a server according to an embodiment of this disclosure, details regarding the display device according to an embodiment of this disclosure and the display device according to an embodiment of this disclosure (e.g., such as...) will not be repeated. Figure 1-3 The same as those described in (as shown in 5-12).

[0152] refer to Figure 13 The first display device 100a may include a processor, an optical signal transmitter 910, and an optical signal receiver 920. The optical signal transmitter 910 may include a first area 911, and the optical signal receiver 920 may include a second area 921.

[0153] although Figure 13 Not shown, but each of the second to fourth display devices may further include a processor, an optical signal transmitter and an optical signal receiver, and each of the optical signal transmitter and the optical signal receiver may include a panel.

[0154] In the server according to embodiments of the present disclosure, the display device can use an optical signal transmitter and an optical signal receiver to perform optical communication, and the processor included in each display device can perform parallel processing.

[0155] Figure 14 This is a view illustrating the operation of a server according to an embodiment of this disclosure.

[0156] refer to Figure 14 The first display device 100a to the fourth display device 100d may respectively include processors 1410a, 1410b, 1410c and 1410d.

[0157] The first to fourth display devices can send / receive data via area photonic communication (DPC), and the processors 1410a, 1410b, 1410c and 1410d included in each display device can perform parallel processing.

[0158] The first to fourth display devices can transmit the data processed in parallel to an external communication terminal using wireless communication such as Wi-Fi or Bluetooth while performing parallel processing via a DPC. By performing parallel processing via a DPC that functions as optical communication, and by sending or receiving data to or from an external communication terminal using existing radio frequency wireless communication during the parallel processing, crosstalk can be effectively prevented or minimized.

[0159] The embodiments of the above disclosure will now be briefly described.

[0160] The display device 100 according to embodiments of the present disclosure may include an active region 500, a light-emitting element 210 located in the active region, a light-receiving transistor 320 located in the active region, and a light-receiving layer 350 located in the active region.

[0161] The light-receiving layer 350 can be electrically connected to the light-receiving transistor 320 and can at least partially overlap with the light-emitting element 210.

[0162] The light-emitting element 210 may include a first electrode 211 and a second electrode 212. One of the first electrode and the second electrode may be a material layer of the same type as the gate electrode 321 of the light-receiving transistor 320.

[0163] The light-receiving layer 350 can contact the gate electrode 321 of the light-receiving transistor 320.

[0164] The light-receiving layer 350 may include a material with a work function of 1.0 eV to 9.0 eV.

[0165] The display device 100 may also include a light blocking layer 340, and the light receiving transistor 320 may be positioned so as not to overlap with the light blocking layer.

[0166] The display device 100 may further include a light-blocking layer 340 and a non-light-receiving transistor 330. The non-light-receiving transistor 330 may be positioned to overlap with the light-blocking layer 340.

[0167] The display device 100 may further include a substrate 310; a first passivation layer 311 on the substrate; a light blocking layer 340 on the first passivation layer; and a second passivation layer 312 on the light blocking layer. The gate electrode 321 of the light receiving transistor 320 may contact the light receiving layer 350 on the second passivation layer 312.

[0168] The light-emitting element 210 may include multiple light-emitting layers. The light-receiving layer 350 may be a charge-generating layer 314 located between the multiple light-emitting layers.

[0169] The active region 500 may include a light-emitting region 510 and a non-light-emitting region 520. The light-receiving layer 350 may include a first portion 651 and a second portion 652. The first portion 651 may at least partially overlap with the light-emitting region. The second portion 652 may at least partially overlap with the non-light-emitting region, and the first portion 651 may be connected to the light-receiving transistor 320.

[0170] The light receiving layer 350 can be a cover layer 360 of the light-emitting element 210.

[0171] Display device 100a may include an optical signal transmitter 910 and an optical signal receiver 920. The optical signal transmitter 910 may overlap with an active region. The optical signal receiver 920 may overlap with an active region.

[0172] The optical signal receiver 920 can be positioned above the entire active area.

[0173] The optical signal transmitter 910 may include a first region 911, and the optical signal receiver 920 may include a second region 921. The first region 911 may include one or more sub-pixels, and the second region 921 may include one or more sub-pixels.

[0174] Embodiments of this disclosure may provide a server including a first display device 100a and a second display device 100b. The first display device 100a may include a processor 1410a, an optical signal transmitter 910, and an optical signal receiver 920. The second display device 100b may include a processor 1410b, an optical signal transmitter 1010, and an optical signal receiver 1020. The first display device 100a and the second display device 100b may perform parallel processing using optical signals.

[0175] Each of the first display device 100a and the second display device 100b may include an active region 500, a light-emitting element 210 located in the active region, a light-receiving transistor 320 located in the active region, and a light-receiving layer 350 located in the active region. The light-receiving layer may at least partially overlap with the light-emitting element.

[0176] The foregoing description has been presented to enable any person skilled in the art to make and use the technical concepts of the invention, and has been provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the invention. The foregoing description and drawings provide examples of the technical concepts of the invention for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical concepts of the invention. Therefore, the scope of the invention is not limited to the embodiments shown, but should be given the widest scope consistent with the claims. The scope of protection of the invention should be interpreted based on the appended claims, and all technical concepts within the scope of their equivalents should be interpreted as being included within the scope of the invention.

Claims

1. A display device comprising: an active area; a light emitting element in the active area; a light receiving transistor in the active area; and a light receiving layer in the active area, the light receiving layer electrically connected to the light receiving transistor and at least partially overlapping the light emitting element, wherein the light receiving layer is in contact with a gate electrode of the light receiving transistor. the light emitting element comprises a first electrode and a second electrode, and 2. The display device according to claim 1, wherein wherein one of the first electrode and the second electrode is a same material layer as the gate electrode of the light receiving transistor. the light receiving layer comprises a material having a work function of 1.0 eV to 9.0 eV.

3. The display device according to claim 1, wherein 4. The display device according to claim 1, further comprising a light blocking layer, the light receiving transistor is positioned not to overlap the light blocking layer. wherein 5. The display device according to claim 1, further comprising a light blocking layer and a non-light receiving transistor, the non-light receiving transistor is positioned to overlap the light blocking layer. wherein a substrate; 6. The display device of claim 1, further comprising: a first passivation layer on the substrate; a light blocking layer on the first passivation layer; and a second passivation layer on the light blocking layer, wherein the gate electrode of the light receiving transistor is in contact with the light receiving layer on the second passivation layer. the light emitting element comprises a plurality of light emitting layers, and 7. The display device according to claim 1, wherein wherein the light receiving layer is a charge generating layer between the plurality of light emitting layers. the active area comprises a light emitting region and a non-light emitting region, and 8. The display device according to claim 1, wherein wherein the light receiving layer comprises a first portion at least partially overlapping the light emitting region and a second portion at least partially overlapping the non-light emitting region and connecting the first portion to the light receiving transistor. the light receiving layer is a cover layer of the light emitting element.

9. The display device according to claim 1, wherein 10. The display device according to claim 1, further comprising a light signal emitter and a light signal receiver, the light signal emitter overlaps the active area, and wherein wherein the light signal receiver overlaps the active area. the light signal receiver is positioned over the entire active area.

11. The display device of claim 10, wherein, the light signal emitter comprises a first patch unit, 12. The display device of claim 10, wherein, wherein the light signal receiver comprises a second patch unit, wherein the first patch unit comprises one or more sub-pixels, and wherein the second patch unit comprises one or more sub-pixels.

13. A server comprising: a first display device comprising a processor, a light signal emitter, and a light signal receiver; and a second display device comprising a processor, a light signal emitter, and a light signal receiver, wherein the first display device and the second display device perform parallel processing using light signals, wherein each of the first display device and the second display device comprises: an active area; a light emitting element in the active area; a light receiving transistor in the active area; and a light receiving layer in the active area, the light receiving layer electrically connected to the light receiving transistor and at least partially overlapping the light emitting element, wherein the light receiving layer is in contact with a gate electrode of the light receiving transistor. ​ ​ 14. The server of claim 13, wherein, The light-emitting element includes a first electrode and a second electrode, and wherein one of the first electrode and the second electrode is a material layer that is the same as a gate electrode of the light-receiving transistor.

15. The server of claim 13, wherein, The light-receiving layer includes a material having a work function of 1.0 eV to 9.0 eV.

16. The server of claim 13, wherein, Each of the first display device and the second display device further includes a light-blocking layer, and wherein the light-receiving transistor is positioned not to overlap the light-blocking layer.

17. The server of claim 13, wherein, Each of the first display device and the second display device further includes a light-blocking layer and a non-light-receiving transistor, and wherein the non-light-receiving transistor is positioned to overlap the light-blocking layer.

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