Semiconductor structure manufacturing method and semiconductor structure

Abstract

The present disclosure provides a method for manufacturing a semiconductor structure and a semiconductor structure. The method includes providing an initial structure, the initial structure including a substrate and an initial trench provided on the substrate; forming a first contact portion, the first contact portion covering the bottom wall and a portion of the sidewall of the initial trench, the first contact portion having a first trench, a longitudinal section of a plane perpendicular to the substrate and perpendicular to the extension direction of the first contact portion, the projected size of the top opening of the first trench on the longitudinal section being larger than the projected size of the bottom wall of the first trench on the longitudinal section; and forming a second contact portion, the second contact portion filling the first trench and an area within the initial trench not covered by the first contact portion, the first contact portion and the second contact portion forming a contact structure. In the present disclosure, the contact structure has a good filling effect, no filling gaps, and a high yield and good conductivity of the semiconductor structure.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a method for manufacturing a semiconductor structure and a semiconductor structure. Background Art

[0002] As semiconductor integration increases, the process line width of semiconductor manufacturing technology continues to shrink. In order to meet the capacitance requirements of semiconductor devices, semiconductor devices are developing towards high aspect ratios. More and more semiconductor devices have high aspect ratio trenches. Semiconductor devices with high aspect ratio trenches are affected by the edge effect caused by the high aspect ratio during the manufacturing process, and are prone to incomplete filling, resulting in gaps in the middle of the trench, affecting the yield and conductivity of the semiconductor devices. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail in this disclosure. This overview is not intended to limit the scope of the claims.

[0004] The present disclosure provides a method for manufacturing a semiconductor structure and a semiconductor structure.

[0005] A first aspect of the present disclosure provides a method for manufacturing a semiconductor structure, the method comprising:

[0006] Providing an initial structure, the initial structure comprising a substrate and an initial trench disposed on the substrate;

[0007] forming a first contact portion, the first contact portion covering a bottom wall and a portion of a side wall of the initial trench, the first contact portion having a first trench, wherein a projection of a top opening of the first trench on a plane perpendicular to the substrate and perpendicular to an extension direction of the first contact portion is larger than a projection of a bottom wall of the first trench on the longitudinal section;

[0008] A second contact portion is formed, wherein the second contact portion fills the first trench and an area in the initial trench not covered by the first contact portion, and the first contact portion and the second contact portion form a contact structure.

[0009] According to some embodiments of the present disclosure, forming the first contact portion includes:

[0010] forming a stacked structure, wherein the stacked structure covers the bottom wall and side walls of the initial trench;

[0011] A portion of the stacked structure is removed, and the remaining stacked structure forms the first contact portion.

[0012] According to some embodiments of the present disclosure, forming the stacked structure includes:

[0013] Depositing a first material to form a first contact layer, wherein the first contact layer covers the sidewalls and bottom wall of the initial trench, and the first contact layer has a second trench;

[0014] A second material is deposited to form an auxiliary layer, where the auxiliary layer covers the second trench and a top surface of the first contact layer.

[0015] According to some embodiments of the present disclosure, removing part of the stacked structure includes:

[0016] removing a portion of the auxiliary layer and a portion of the first contact layer of the stacked structure, so that the remaining auxiliary layer and the first contact layer form an intermediate structure;

[0017] A portion of the intermediate structure is removed, and the remaining intermediate structure forms the first contact portion.

[0018] According to some embodiments of the present disclosure, removing part of the auxiliary layer and part of the first contact layer of the stacked structure includes:

[0019] The stacked structure is etched by a first process to remove a portion of the auxiliary layer and a portion of the first contact layer, and a top surface of the retained auxiliary layer is higher than a top surface of the retained first contact layer.

[0020] According to some embodiments of the present disclosure, the first process is a dry etching process, and when etching is performed using the first process, the etching selectivity of the second material is greater than the etching selectivity of the first material.

[0021] According to some embodiments of the present disclosure, removing part of the intermediate structure includes:

[0022] The auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure are removed, and the first trench is formed in the first contact layer.

[0023] According to some embodiments of the present disclosure, removing the auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure includes:

[0024] The intermediate structure is etched by a second process to remove the auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure.

[0025] According to some embodiments of the present disclosure, the second process is a wet etching process. When etching is performed using the second process, the etching selectivity of the second material is greater than the etching selectivity of the first material.

[0026] According to some embodiments of the present disclosure, forming the second contact portion includes:

[0027] A third material is deposited to fill the first trench and an area in the initial trench not covered by the first contact portion, thereby forming the second contact portion.

[0028] A second aspect of the present disclosure provides a semiconductor structure, comprising:

[0029] substrate;

[0030] an initial trench, disposed on the substrate;

[0031] a first contact portion, the first contact portion covering a bottom wall and a portion of a side wall of the initial trench, the first contact portion having a first trench, and a longitudinal section taken along a plane perpendicular to the substrate and perpendicular to an extension direction of the first contact portion, wherein a projection dimension of a top opening of the first trench on the longitudinal section is larger than a projection dimension of a bottom wall of the first trench on the longitudinal section;

[0032] A second contact portion is provided, wherein the second contact portion fills the first trench and an area of ​​the initial trench not covered by the first contact portion.

[0033] According to some embodiments of the present disclosure, the projection of the first groove on the longitudinal section is an isosceles trapezoid, and the upper base of the isosceles trapezoid is larger than the lower base.

[0034] According to some embodiments of the present disclosure, the bottom of the second contact portion has a convex portion, and the convex portion covers the first groove.

[0035] According to some embodiments of the present disclosure, a projection of the protrusion on the longitudinal section and a projection of the first groove on the longitudinal section are the same isosceles trapezoid.

[0036] According to some embodiments of the present disclosure, the second contact portion covers a top surface around the initial trench.

[0037] In the manufacturing method and semiconductor structure of the semiconductor structure provided by the embodiments of the present disclosure, a first contact portion having a first trench is first formed in the initial trench, and then a second contact portion is formed. Since the first contact portion has already filled part of the initial trench, the aspect ratio of the trench filled by the second contact portion is reduced, and the formed second contact portion has no gaps, the filling effect of the contact structure is good, and the yield and conductivity of the semiconductor structure are high.

[0038] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The accompanying drawings, which are incorporated into and constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, are used to explain the principles of the embodiments of the present disclosure. In these drawings, similar reference numerals are used to represent similar elements. The drawings described below are some embodiments of the present disclosure, not all embodiments. For those skilled in the art, other drawings can be derived from these drawings without inventive effort.

[0040] Figure 1 is a flow chart showing a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0041] Figure 2 is a flow chart showing a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0042] Figure 3 is a flow chart showing a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0043] Figure 4 is a flow chart showing a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0044] Figure 5 is a flow chart showing a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0045] Figure 6 is a flow chart showing a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0046] Figure 7 is a flow chart showing a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0047] Figure 8 is a schematic diagram of an initial structure provided in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0048] Figure 9 is a schematic diagram illustrating forming a first contact layer in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0049] Figure 10 is a schematic diagram illustrating forming an auxiliary layer in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0050] Figure 11 is a schematic diagram illustrating forming a stacked structure in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0051] Figure 12is a schematic diagram illustrating forming an intermediate structure in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0052] Figure 13 is a schematic diagram illustrating forming a first contact portion in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0053] Figure 14 is a schematic diagram illustrating forming a second contact layer in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0054] Figure 15 is a schematic diagram illustrating forming a second contact portion in a method for manufacturing a semiconductor structure according to an exemplary embodiment;

[0055] Figure 16 FIG. 1 is a schematic diagram illustrating forming a second contact portion in a method for manufacturing a semiconductor structure according to an exemplary embodiment.

[0056] Reference numerals:

[0057] 100, initial structure; 110, substrate; 120, initial trench; 130, bit line structure;

[0058] 200, stacked structure; 210, first contact layer; 220, auxiliary layer; 230, second trench;

[0059] 300, intermediate structure;

[0060] 400, contact structure; 410, first contact portion; 420, first trench; 430, second contact portion;

[0061] 500. Second contact layer. DETAILED DESCRIPTION

[0062] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the disclosed embodiments will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present disclosure. It should be noted that, in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other.

[0063] As integrated circuits develop towards miniaturization, in order to ensure the capacitance requirements of semiconductor devices, a solution commonly used in related technologies is to increase the height of semiconductor devices. Therefore, the trenches of semiconductor devices gradually evolve towards a high aspect ratio.

[0064] In the manufacturing process of semiconductor structures, the filling of trenches is usually done by a Chemical Vapor Deposition (CVD) process or a Low-Pressure Chemical Vapor Deposition (LPCVD) process. The filling process is affected by the trench edge effect caused by the high aspect ratio, and the trench may not be fully filled, resulting in voids in the formed semiconductor structure. Moreover, the voids formed by filling high aspect ratio trenches are usually located in the middle of the trench and the gaps are narrow. Even if part of the filling material is etched back to expose the voids formed by the filling, forming a V-shaped or U-shaped profile in the trench, it is still difficult to fill the narrow gaps after filling the formed V-shaped or U-shaped profile again. Therefore, the formed semiconductor structure is prone to voids or poor surface filling effects, which seriously affects the yield and conductivity of the semiconductor structure.

[0065] In an exemplary embodiment of the present disclosure, a method for manufacturing a semiconductor structure is provided. Figure 1 As shown, Figure 1 FIG2 shows a flow chart of a method for manufacturing a semiconductor structure according to an exemplary embodiment of the present disclosure. Figures 8-16 The schematic diagram of each stage of the semiconductor structure manufacturing method is shown below. Figures 8-16 The fabrication method of semiconductor structures is introduced.

[0066] This embodiment does not limit the semiconductor structure. The semiconductor structure will be described below using a dynamic random access memory (DRAM) as an example, but this embodiment is not limited thereto. The semiconductor structure in this embodiment may also be other semiconductor devices.

[0067] like Figure 1 As shown, an exemplary embodiment of the present disclosure provides a method for manufacturing a semiconductor structure, comprising the following steps:

[0068] Step S110: providing an initial structure, the initial structure including a substrate and an initial trench provided on the substrate.

[0069] like Figure 8 As shown, the initial structure 100 includes a substrate 110 and an initial trench 120 formed in the substrate 110. The substrate 110 is a semiconductor substrate including silicon-containing materials, for example, a silicon substrate, a silicon germanium substrate or an SOI (silicon on insulator) substrate.

[0070] The initial trench 120 in this embodiment may be a bit line contact hole, a capacitor contact hole, a wiring hole or other through holes.

[0071] Step S120: forming a first contact portion, the first contact portion covering the bottom wall and part of the side wall of the initial groove, the first contact portion having a first groove, with a plane perpendicular to the substrate and perpendicular to the extension direction of the first contact portion as the longitudinal section, and a projection size of the top opening of the first groove on the longitudinal section being larger than a projection size of the bottom wall of the first groove on the longitudinal section.

[0072] like Figure 13 As shown, refer to Figure 8 The first contact portion 410 may be formed by deposition using a low-pressure chemical vapor deposition (LPCVD) process. The first contact portion 410 includes a first trench 420 . The top opening of the first trench 420 is larger than the bottom wall of the first trench 420 .

[0073] Step S130 : forming a second contact portion, the second contact portion filling the first trench and the area in the initial trench not covered by the first contact portion, the first contact portion and the second contact portion forming a contact structure.

[0074] like Figure 15 、 Figure 16 As shown, refer to Figure 13 The second contact portion 430 can be formed by depositing a chemical vapor deposition (CVD) process or a low-pressure chemical vapor deposition (LPCVD) process, and the second contact portion 430 fills the area in the first trench 420 and the initial trench 120 that is not covered by the first contact portion 410.

[0075] In this embodiment, a first contact portion having a first groove is first formed in the initial groove, and then a second contact portion is formed. The second contact portion fills the first groove of the first contact portion and the area in the initial groove not covered by the first contact portion. Since the first contact portion has filled part of the initial groove, the aspect ratio of the groove filled by the second contact portion is reduced, so that the formed second contact portion and the first contact portion are fitted and connected, and the formed contact structure has no gaps, the filling effect of the contact structure is good, and the yield of the semiconductor structure is high and the conductivity is good.

[0076] According to an exemplary embodiment, this embodiment provides a method for manufacturing a semiconductor structure, such as Figure 2 As shown, the following steps are included:

[0077] Step S210: providing an initial structure, the initial structure including a substrate and an initial trench provided on the substrate.

[0078] Step S220 : forming a stacked structure, where the stacked structure covers the bottom wall and side walls of the initial trench.

[0079] Step S230 : removing a portion of the stacked structure, and the remaining stacked structure forms a first contact portion.

[0080] like Figure 13 As shown, the first contact portion 410 has a first groove 420, with a plane perpendicular to the substrate 110 and perpendicular to the extension direction of the first contact portion 410 as the longitudinal section, and the projection size of the top opening of the first groove 420 on the longitudinal section is larger than the projection size of the bottom wall of the first groove 420 on the longitudinal section.

[0081] Step S240 : forming a second contact portion, the second contact portion filling the first trench and the area in the initial trench not covered by the first contact portion, the first contact portion and the second contact portion forming a contact structure.

[0082] Step S210 of this embodiment is implemented in the same manner as step S110 of the above embodiment, and step S240 of this embodiment is implemented in the same manner as step S130 of the above embodiment, which will not be described in detail here.

[0083] In step S220, Figure 11 As shown, refer to Figure 8 The formed stacked structure 200 includes at least a first contact layer 210 and an auxiliary layer 220, the first contact layer 210 covers the bottom wall and side wall of the initial trench 110, and the auxiliary layer 220 covers at least the first contact layer 310, wherein the auxiliary layer 320 can be a single layer or multi-layer structure.

[0084] In step S230, if Figure 13 As shown, refer to Figure 11 The stacked structure 200 can be etched by a dry or wet etching process, and the auxiliary layer 220 and a portion of the first contact layer 210 can be removed by etching by selecting the etching selectivity of the auxiliary layer 220 and the first contact layer 210, and a first trench 420 is formed on the retained first contact layer 210, and the retained first contact layer 210 forms a first contact portion 410 having a first trench 420.

[0085] In this embodiment, a first contact layer and an auxiliary layer are deposited to form a stacked structure. By adjusting the etching selectivity ratio of the auxiliary layer and the first contact layer in the process of etching the stacked structure, the auxiliary layer and part of the first contact layer are removed by etching the stacked structure, so that the formed first contact portion has a first groove, so that the second contact portion can completely fill the first groove and the area in the initial groove not covered by the first contact portion, with good filling effect and the formed contact structure having no gaps.

[0086] According to an exemplary embodiment, this embodiment is an explanation of step S220 of the above embodiment. Figure 3 As shown, forming a stacked structure includes the following steps:

[0087] Step S221 : depositing a first material to form a first contact layer, wherein the first contact layer covers the sidewalls and bottom wall of the initial trench, and the first contact layer has a second trench.

[0088] like Figure 9 As shown, refer to Figure 8 A low-pressure chemical vapor deposition (LPCVD) process can be used to deposit a first material, and the first material covers the sidewalls, bottom walls, and top surface of the initial trench 120 and the initial structure 100 to form a first contact layer 210 . The first contact layer 210 forms a second trench 230 in the initial trench 120 .

[0089] Step 222 : depositing a second material to form an auxiliary layer, wherein the auxiliary layer covers the second trench and the top surface of the first contact layer.

[0090] like Figure 10 As shown, refer to Figure 9 A second material may be deposited using a low-pressure chemical vapor deposition (LPCVD) process. The second material fills the second trench 230 and covers the top surface of the first contact layer 210 to form the auxiliary layer 220. The second material may be one or more materials different from the first material. For example, the first material may be polysilicon with a first doping concentration, and the second material may be undoped polysilicon or polysilicon with a second doping concentration, where the first doping concentration is greater than the second doping concentration.

[0091] When depositing the auxiliary layer 220, one second material may be deposited to form a single layer structure, or two or more second materials may be deposited in sequence in the second trench to form a multilayer structure. Figure 10 As shown, in this embodiment, the initial trench 120 has a high aspect ratio, and the second trench 230 formed by the first contact layer 210 in the initial trench 120 also has a high aspect ratio. When the second material fills the second trench 230 with a high aspect ratio, it is affected by the edge effect and an air gap is formed in the auxiliary layer 220.

[0092] like Figure 11 As shown, refer to Figure 10 , a portion of the auxiliary layer 220 and the first contact layer 210 is removed by dry or wet etching process to expose the top surface of the initial structure 100, and the retained auxiliary layer 220 and the first contact layer 210 form a stacked structure 200, which is located in the initial trench 120 (refer to Figure 8 ).

[0093] In this embodiment, a first material is deposited in an initial groove to form a first contact layer, and a second material different from the first material is deposited in a second groove formed by the first contact layer to form an auxiliary layer, so that when the stacked structure is subsequently etched, the etching process can be adjusted to select the first material and the second layer of material to remove part of the first contact layer and the auxiliary layer together, and the other part of the first contact layer is retained to form a first contact portion, and the etching process forms a first groove on the retained first contact layer.

[0094] According to an exemplary embodiment, this embodiment provides a method for manufacturing a semiconductor structure, such as Figure 4 As shown, the following steps are included:

[0095] Step S310: providing an initial structure, the initial structure including a substrate and an initial trench provided on the substrate.

[0096] like Figure 8 As shown, the initial structure 100 includes a substrate 110 and an initial trench 120 formed on the substrate 110, wherein the substrate 110 is a semiconductor substrate including a silicon-containing material, for example, the semiconductor substrate can be a silicon substrate, a silicon germanium substrate or an SOI (silicon on insulator) substrate.

[0097] Step S320 : depositing a first material to form a first contact layer, wherein the first contact layer covers the sidewalls and bottom wall of the initial trench, and the first contact layer has a second trench.

[0098] like Figure 9 As shown, refer to Figure 8 A low-pressure chemical vapor deposition (LPCVD) process can be used to deposit a first material, and the first material covers the sidewalls and bottom walls of the initial trench 120 and the top surface of the initial structure 100 to form a first contact layer 210. The first contact layer 210 forms a second trench 230 in the initial trench 120.

[0099] Step S330 : depositing a second material to form an auxiliary layer, the auxiliary layer covers the second trench and the top surface of the first contact layer, and the auxiliary layer and the first contact layer form a stacked structure.

[0100] like Figure 10 As shown, refer to Figure 9A second material may be deposited by a low-pressure chemical vapor deposition (LPCVD) process to fill the second trench 230 and cover the top surface of the first contact layer 210 to form the auxiliary layer 220. The second material is different from the first material.

[0101] like Figure 11 As shown, refer to Figure 10 , a portion of the auxiliary layer 220 and the first contact layer 210 are removed by dry or wet etching process to expose the top surface of the initial structure 100 , and the retained auxiliary layer 220 and the first contact layer 210 form a stacked structure 200 .

[0102] Step S340: removing part of the auxiliary layer and part of the first contact layer of the stacked structure, and the remaining auxiliary layer and the first contact layer form an intermediate structure.

[0103] like Figure 12 As shown, refer to Figure 11 The stacked structure 200 is etched by the first process to remove a portion of the auxiliary layer 220 and a portion of the first contact layer 210 , and the top surface of the retained auxiliary layer 220 is higher than the top surface of the retained first contact layer 210 .

[0104] In this embodiment, the first process is a dry etching process. When etching is performed using the first process, the etching selectivity of the first process for the second material is greater than the etching selectivity of the first material, that is, the speed at which the first process etches the second material is greater than the speed at which the first material is etched. The retained auxiliary layer 220 in the intermediate structure 300 formed by etching by the first process is higher than the retained first contact layer 210.

[0105] Step S350: removing a portion of the intermediate structure, and the remaining intermediate structure forms a first contact portion.

[0106] The first contact portion 410 has a first groove 420, with a plane perpendicular to the substrate 110 and perpendicular to the extension direction of the first contact portion 410 as the longitudinal section, and the projection size of the top opening of the first groove 420 on the longitudinal section is larger than the projection size of the bottom wall of the first groove 420 on the longitudinal section.

[0107] Step S360: forming a second contact portion, the second contact portion filling the first trench and the area in the initial trench not covered by the first contact portion, the first contact portion and the second contact portion forming a contact structure.

[0108] The second contact 430 may be formed by deposition, and the second contact 430 fills the first trench 420 and the area of ​​the preliminary trench 120 not covered by the first contact 410 .

[0109] In this embodiment, the auxiliary layer and the first contact layer are etched by the first process to remove part of the auxiliary layer and part of the first contact layer. By adjusting the etching selectivity of the first process to the first material and the second material, the top surface profile of the formed intermediate structure is defined so that the first contact portion formed subsequently has a first groove.

[0110] According to an exemplary embodiment, this embodiment provides a method for manufacturing a semiconductor structure, such as Figure 5 As shown, the following steps are included:

[0111] Step S410: providing an initial structure, the initial structure including a substrate and an initial trench provided on the substrate.

[0112] Step S420 : depositing a first material to form a first contact layer, wherein the first contact layer covers the sidewalls and bottom wall of the initial trench, and the first contact layer has a second trench.

[0113] Step S430: depositing a second material to form an auxiliary layer, the auxiliary layer covers the second trench and the top surface of the first contact layer, and the auxiliary layer and the first contact layer form a stacked structure.

[0114] Step S440: removing part of the auxiliary layer and part of the first contact layer of the stacked structure, and the remaining auxiliary layer and the first contact layer form an intermediate structure.

[0115] Step S450: removing the auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure, forming a first trench in the first contact layer, and the retained intermediate structure forms a first contact portion.

[0116] Step S460: forming a second contact portion, the second contact portion filling the first trench and the area in the initial trench not covered by the first contact portion, the first contact portion and the second contact portion forming a contact structure.

[0117] Steps S410-S440 of this embodiment are implemented in the same manner as steps S310-S340 of the above embodiment. Step S460 of this embodiment is implemented in the same manner as step S360 of the above embodiment, and will not be described in detail herein.

[0118] In step S450 of this embodiment, Figure 13 As shown, refer to Figure 12 The intermediate structure 300 is etched by a second process to remove the auxiliary layer 210 of the intermediate structure 300 and a portion of the first contact layer 210 in the intermediate structure 300. When etching by the second process, the etching selectivity of the second material is greater than the etching selectivity of the first material.

[0119] According to the above embodiment, it can be seen that Figure 12The retained auxiliary layer 220 in the intermediate structure 300 is higher than the retained first auxiliary layer 220. In this embodiment, the intermediate structure 300 is etched by the second process, and the etching selectivity of the second process to the second material is greater than the etching selectivity to the first material. The second process etches the intermediate structure 300 based on the top surface profile of the intermediate structure 300, removes the remaining auxiliary layer 220 and part of the first contact layer 210, and forms a first trench 420 on the retained first contact layer 210. The projection of the first trench 420 on the longitudinal section is an isosceles trapezoid (refer to Figure 13 ), the upper base of the isosceles trapezoid is larger than the lower base. The second process may be a wet etching process.

[0120] In this embodiment, the stacked structure is etched twice using a first process and a second process. The stacked structure is etched using the first process to form an intermediate structure. The top surface profile of the intermediate structure is defined by adjusting the etching selectivity of the first process to the first material and the second material. The intermediate structure is etched based on the top surface profile of the intermediate structure by the second process. The etching selectivity of the second process to the first material and the second material is adjusted so that the formed first contact portion has a first groove, and the top opening of the first groove is larger than the bottom wall, so that the second contact portion formed by subsequent deposition fills the first groove and other areas of the initial groove not filled by the first contact portion will not be insufficiently filled, resulting in gaps in the formed semiconductor structure.

[0121] According to an exemplary embodiment, this embodiment provides a method for manufacturing a semiconductor structure, such as Figure 6 As shown, the following steps are included:

[0122] Step S510: providing an initial structure, the initial structure including a substrate and an initial trench provided on the substrate.

[0123] Step S520: forming a first contact portion, the first contact portion covering the bottom wall and part of the side wall of the initial groove, the first contact portion having a first groove, with a plane perpendicular to the substrate and perpendicular to the extension direction of the first contact portion as the longitudinal section, and a projection size of the top opening of the first groove on the longitudinal section being larger than a projection size of the bottom wall of the first groove on the longitudinal section.

[0124] Step S530 : depositing a third material to fill the first trench and the area in the initial trench not covered by the first contact portion, forming a second contact portion. The first contact portion and the second contact portion form a contact structure.

[0125] Steps S510 - S530 of this embodiment are implemented in the same manner as steps S110 - S130 of the above embodiment, and are not described in detail herein.

[0126] like Figure 14 As shown, refer to Figure 13In this embodiment, a third material can be deposited using a chemical vapor deposition (CVD) process or a low-pressure chemical vapor deposition (LPCVD) process to form the second contact layer 500. The second contact layer 500 fills the first trench 420, the area within the initial trench 120 not covered by the first contact portion 410, and covers the exposed top surface of the initial structure 100. The third material can be the same as or different from the first material. For example, the first material is polysilicon with a first doping concentration, and the third material can be polysilicon with the first doping concentration or polysilicon with a third doping concentration.

[0127] Then, if Figure 15 、 Figure 16 As shown, a dry or wet etching process can be used to remove part of the second contact layer 500 to expose part of the top surface of the initial structure 100. The retained second contact layer 500 forms a second contact portion 420, which fills the first trench 420 and the area in the initial trench 120 that is not covered by the first contact portion 410. In this embodiment, as shown in FIG. Figure 16 As shown, the second contact portion 420 also covers the initial trench 120 (see Figure 8 ) around the top surface.

[0128] In the semiconductor structure formed in this embodiment, the second contact portion fills the first trench, the second contact portion and the first contact portion are bonded and connected, and there is no gap in the second contact portion due to insufficient filling. The semiconductor structure formed in this embodiment has a good effect of filling the initial trench with the contact structure, and the semiconductor structure has a high yield and good conductivity.

[0129] According to an exemplary embodiment, a method for manufacturing a semiconductor structure provided in this embodiment is described by taking the formation of a capacitor contact structure in a capacitor trench of the semiconductor structure as an example. In this embodiment, the method for manufacturing the semiconductor structure is as follows: Figure 7 As shown, the following steps are included:

[0130] Step S610: providing an initial structure, the initial structure including a substrate and a bit line structure spaced apart on the substrate, wherein the bit line structure and the exposed top surface of the substrate form an initial trench.

[0131] like Figure 8 As shown, the initial structure 100 includes a substrate 110 and a bit line structure 130 spaced apart on the substrate 110. The bit line structure 130 and the exposed top surface of the substrate 110 form an initial trench 120, wherein the initial trench 120 of this embodiment is a capacitor contact trench for forming a capacitor contact structure.

[0132] Step S620 : depositing a first material to form a first contact layer, the first contact layer covers the sidewalls and bottom wall of the initial trench and the top surface of the bit line structure, and the first contact layer has a second trench.

[0133] like Figure 9 As shown, refer to Figure 8 In this embodiment, the first material is doped polysilicon doped with boron ions, arsenic ions, and boron ions. The semiconductor structure is placed in a reaction chamber. Silicon source gas, diborane (B2H4), phosphine (PH3), and arsine (AsH3) are supplied to the reaction chamber. Low-pressure chemical vapor deposition (LPCVD) is used to deposit doped polysilicon. The doped polysilicon covers the sidewalls and bottom of the initial trench 120 and the top surface of the bitline structure 130, forming a first contact layer 210. The first contact layer 210 has a second trench 230.

[0134] The doped polysilicon as the first material has a doping concentration of 2.0E+1 to +23 / cm 3 .

[0135] Step S630 : depositing a second material to form an auxiliary layer, wherein the auxiliary layer covers the second trench and a top surface of the first contact layer.

[0136] like Figure 10 As shown, refer to Figure 9 The second material is undoped polysilicon or polysilicon with a low doping concentration (lower than the doping concentration of the first material). In this embodiment, a low-pressure chemical vapor deposition process is used to deposit undoped polysilicon to form an auxiliary layer 220. The auxiliary layer 220 covers the second trench 230 and the top surface of the first contact layer 210.

[0137] Step S640: removing the auxiliary layer and the first contact layer covering the top surface of the bit line structure to expose the top surface of the bit line structure, and the retained auxiliary layer and the first contact layer form a stacked structure.

[0138] like Figure 11 As shown, refer to Figure 10 Using carbon tetrafluoride (CF4) as an etching gas, a dry or wet etching process is adopted to remove the auxiliary layer 220 and the first contact layer 210 covering the top surface of the bit line structure 130, exposing the top surface of the bit line structure 130, and the retained auxiliary layer 210 and the first contact layer 220 form a stacked structure 200.

[0139] Step S650: using the first process to etch and remove a portion of the auxiliary layer and a portion of the first contact layer of the stacked structure, and the retained auxiliary layer and the first contact layer form an intermediate structure.

[0140] like Figure 12 As shown, refer to Figure 11The first process is a dry etching process. The etching selectivity of the first process for the second material is greater than the etching selectivity for the first material. A mixed gas of chlorine (Cl2) and bromine (Br) is used as the etching gas. The stacked structure 200 is dry-etched by the first process to remove part of the auxiliary layer 220 and part of the first contact layer 220. The etching is stopped after part of the sidewall of the initial trench 120 is exposed. The retained auxiliary layer 220 and the first contact layer 210 form an intermediate structure 300. The retained auxiliary layer 220 is higher than the retained first contact layer 210.

[0141] Step S660: using a second process to remove the auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure, forming a first trench in the first contact layer, and the retained intermediate structure forms a first contact portion.

[0142] like Figure 13 As shown, refer to Figure 12 The second process is a wet etching process, and the second process has a higher etching selectivity for the second material than for the first material. In this embodiment, hydrofluoric acid (DHF) is injected into the initial trench 120 exposed by the intermediate structure 300 formed in step S640. The hydrofluoric acid removes undoped polysilicon at a faster rate than doped polysilicon. After the auxiliary layer 220 is completely removed by the hydrofluoric acid, etching is stopped. A portion of the first contact layer 210 and the auxiliary layer 220 are removed together, forming a first trench 420 in the retained first contact layer 210, thereby forming a first contact portion 410 having the first trench 420.

[0143] Step S670: depositing a third material to fill the first trench and the area in the initial trench not covered by the first contact portion, forming a second contact portion. The first contact portion and the second contact portion form a contact structure.

[0144] like Figure 14 As shown, refer to Figure 13 The third material is doped polysilicon doped with boron ions, arsenic ions, and boron ions. The third material is deposited using a low-pressure chemical vapor deposition process. The third material fills the first trench 420, the area in the initial trench 120 not covered by the first contact portion 410, and covers the exposed top surface of the initial structure 100 to form a second contact layer 500.

[0145] like Figure 15 、 Figure 16As shown, a dry or wet etching process can be used to remove a portion of the second contact layer 500, exposing a portion of the top surface of the initial structure 100. The retained second contact layer 500 forms a second contact portion 420, which fills the first trench 420 and the area within the initial trench 120 not covered by the first contact portion 410. The first contact portion 410 and the second contact portion 430 form a contact structure 400, that is, the contact structure 400 is a capacitor contact structure formed in the capacitor contact trench.

[0146] The contact structure formed in this embodiment has no voids, high yield and good conductivity.

[0147] An exemplary embodiment of the present disclosure provides a semiconductor structure, such as Figure 15 、 Figure 16 As shown, refer to Figure 8 The semiconductor structure includes a substrate 110, an initial trench 120 disposed on the substrate 110, a first contact portion 410, and a second contact portion 430. The first contact portion 410 covers the bottom wall and a portion of the sidewall of the initial trench 120. The first contact portion 410 has a first trench 420. With a plane perpendicular to the substrate 110 and perpendicular to the extension direction of the first contact portion 410 as a longitudinal section, the projected size of the top opening of the first trench 420 on the longitudinal section is larger than the projected size of the bottom wall of the first trench 420 on the longitudinal section. The second contact portion 430 fills the first trench 420 and the area of ​​the initial trench 120 not covered by the first contact portion 410.

[0148] In the semiconductor structure of this embodiment, the second contact portion 430 fills the first trench 420 of the first contact portion 410 and the area not covered by the first contact portion 410 and the area within the initial trench 120 not covered by the first contact portion 410. Since the first contact portion 410 has already filled part of the initial trench 120, the aspect ratio of the trench filled by the second contact portion 430 is reduced, so that the formed contact structure 400 has no gaps, the contact structure 400 has a good filling effect, and the semiconductor structure has a high yield and good conductivity.

[0149] According to an exemplary embodiment, most of the contents of the semiconductor structure of this embodiment are the same as those of the above embodiment. The difference between this embodiment and the above embodiment is that, Figure 13 As shown, the projection of the first groove 420 on the longitudinal section is an isosceles trapezoid, and the upper base of the isosceles trapezoid is larger than the lower base.

[0150] like Figure 15 、 Figure 16 As shown, the bottom of the second contact portion 430 has a protrusion 431, which covers the first groove 420. The projection of the protrusion 431 on the longitudinal section and the projection of the first groove 420 on the longitudinal section are the same isosceles trapezoid.

[0151] like Figure 16 As shown, the second contact portion 430 also covers the top surface around the initial trench 120 .

[0152] In the semiconductor structure of this embodiment, the bottom surface of the second contact portion 430 and the top surface of the first contact portion 410 are bonded together, the protrusion 431 of the second contact portion 430 fills the first trench 420, and the remaining portion of the second contact portion 430 fills the area in the initial trench 120 not covered by the first contact portion 410. The formed contact structure 400 has no gaps and the contact structure 400 has a good filling effect.

[0153] The various embodiments or implementation methods in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referenced to each other.

[0154] In the description of this specification, reference to the terms "embodiment", "exemplary embodiment", "some embodiments", "illustrative embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure.

[0155] In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any suitable manner in any one or more embodiments or examples.

[0156] In the description of the present disclosure, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present disclosure.

[0157] It is to be understood that the terms "first", "second", etc. used in the present disclosure can be used to describe various structures in the present disclosure, but these structures are not limited by these terms. These terms are only used to distinguish a first structure from another structure.

[0158] In one or more of the accompanying drawings, identical elements are represented by similar reference numerals. For clarity, many parts in the accompanying drawings are not drawn to scale. In addition, certain well-known parts may not be shown. For simplicity, a structure obtained after several steps may be described in a single figure. Many specific details of the present disclosure, such as device structure, materials, dimensions, processing techniques, and technologies, are described below to facilitate a clearer understanding of the present disclosure. However, as will be appreciated by those skilled in the art, the present disclosure may be practiced without following these specific details.

[0159] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that: The method for manufacturing the semiconductor structure comprises: Providing an initial structure, the initial structure comprising a substrate and an initial trench disposed on the substrate; forming a first contact portion, the first contact portion covering a bottom wall and a portion of a side wall of the initial trench, the first contact portion having a first trench, wherein a projection of a top opening of the first trench on a plane perpendicular to the substrate and perpendicular to an extension direction of the first contact portion is larger than a projection of a bottom wall of the first trench on the longitudinal section; forming a second contact portion, wherein the second contact portion fills the first trench and an area in the initial trench not covered by the first contact portion, the first contact portion and the second contact portion forming a contact structure; The method of forming the first contact portion includes: forming a stacked structure, the stacked structure covering the bottom wall and sidewalls of the initial trench, the stacked structure comprising a first contact layer and an auxiliary layer; removing a portion of the auxiliary layer and a portion of the first contact layer of the stacked structure, so that the remaining auxiliary layer and the first contact layer form an intermediate structure; The auxiliary layer retained in the intermediate structure is higher than the first contact layer retained. Part of the intermediate structure is etched away by a second process to form the first groove. The projection of the first groove on the longitudinal section is an isosceles trapezoid. The second process is a wet etching process. When etching is performed using the second process, the etching selectivity of the auxiliary layer is greater than the etching selectivity of the first contact layer.

2. The method for manufacturing a semiconductor structure according to claim 1, wherein: The forming of the stacked structure comprises: Depositing a first material to form the first contact layer, wherein the first contact layer covers the sidewalls and the bottom wall of the initial trench, and the first contact layer has a second trench; A second material is deposited to form the auxiliary layer, where the auxiliary layer covers the second trench and top surfaces of the first contact layer.

3. The method for manufacturing a semiconductor structure according to claim 2, wherein: The removing of a portion of the auxiliary layer and a portion of the first contact layer of the stacked structure includes: The stacked structure is etched by a first process to remove a portion of the auxiliary layer and a portion of the first contact layer, and a top surface of the retained auxiliary layer is higher than a top surface of the retained first contact layer.

4. The method for manufacturing a semiconductor structure according to claim 3, wherein: The first process is a dry etching process. When etching is performed using the first process, the etching selectivity of the second material is greater than the etching selectivity of the first material.

5. The method for manufacturing a semiconductor structure according to claim 1, wherein: The step of removing part of the intermediate structure comprises: The auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure are removed, and the first trench is formed in the first contact layer.

6. The method for manufacturing a semiconductor structure according to claim 5, wherein: The removing of the auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure includes: The intermediate structure is etched by a second process to remove the auxiliary layer of the intermediate structure and a portion of the first contact layer of the intermediate structure.

7. The method for manufacturing a semiconductor structure according to claim 1, wherein: The forming of the second contact portion includes: A third material is deposited to fill the first trench and an area in the initial trench not covered by the first contact portion, thereby forming the second contact portion.

8. A semiconductor structure, prepared by the method according to any one of claims 1 to 7, characterized in that: include: substrate; an initial trench, disposed on the substrate; a first contact portion, the first contact portion covering a bottom wall and a portion of a side wall of the initial trench, the first contact portion having a first trench, and a longitudinal section taken along a plane perpendicular to the substrate and perpendicular to an extension direction of the first contact portion, wherein a projection dimension of a top opening of the first trench on the longitudinal section is larger than a projection dimension of a bottom wall of the first trench on the longitudinal section; A second contact portion is provided, wherein the second contact portion fills the first trench and an area of ​​the initial trench not covered by the first contact portion.

9. The semiconductor structure according to claim 8, wherein: The projection of the first groove on the longitudinal section is an isosceles trapezoid, and the upper base of the isosceles trapezoid is larger than the lower base.

10. The semiconductor structure according to claim 9, wherein: The second contact portion has a convex portion at its bottom, and the convex portion covers the first groove.

11. The semiconductor structure according to claim 10, wherein: The projection of the convex portion on the longitudinal section and the projection of the first groove on the longitudinal section are the same isosceles trapezoid.

12. The semiconductor structure according to claim 8, wherein: The second contact portion covers a top surface around the initial trench.

Images