A resistance test structure and a resistance test method
By designing a series contact structure in the resistance test structure and using the test voltage and output current method, the problem of accurately testing the contact condition of the shared contact hole was solved, thus improving the accuracy and reliability of the test.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GTA SEMICON CO LTD
- Filing Date
- 2022-11-29
- Publication Date
- 2026-05-22
Smart Images
Figure CN115714122B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit manufacturing technology, and in particular to a resistance testing structure and a resistance testing method. Background Technology
[0002] Static Random Access Memory (SRAM) is widely used due to its low-voltage operation and fast read / write speeds, with 6T-SRAM, which uses six transistors as a storage cell, being the most common. In a 6T-SRAM layout, the use of more transistors occupies more area. To reduce the area of SRAM in integrated circuits, shared contact via (CT) structures have been introduced in more advanced processes. Compared to ordinary contact via (CT) structures, shared contact vias operate in a more complex environment. Overlay accuracy, salicide formation, and gate morphology (e.g., using polysilicon) all affect the contact of the shared contact via, thereby increasing the overall system resistance.
[0003] like Figure 1 The diagram illustrates two possible contact problems with shared contact holes. Area A shows overlay misalignment, while area B shows metal silicide loss. These issues can cause contact problems with shared contact holes, thereby increasing the overall system resistance.
[0004] Therefore, how to accurately test the contact condition of shared contact holes and thus avoid increasing the resistance of the entire system is an urgent problem to be solved. Summary of the Invention
[0005] The technical problem to be solved by the present invention is to provide a resistance testing structure and a resistance testing method to achieve accurate testing and monitoring of the contact resistance and contact condition of the component under test.
[0006] To address the aforementioned problems, one embodiment of the present invention provides a resistance testing structure, comprising: a plurality of first test modules; each first test module comprising: two spaced-apart first contact structures and second contact structures formed on the active region of the same semiconductor device; the first contact structure of one first test module and the second contact structure of the other first test module are adjacent and electrically connected, thereby forming a first series structure with the plurality of first test modules, and each end of the first series structure is electrically connected to a first test pad; wherein, by applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current, the corresponding contact resistance of the first test module is tested and monitored.
[0007] In some embodiments, the active region is a heavily doped region of a first doping type; the first contact structure is a contact hole structure, and a first contact resistance is formed between the contact hole structure and the heavily doped region; the second contact structure is a shared contact hole structure, and a shared contact hole contact resistance is formed between the shared contact hole structure and the heavily doped region; by applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current, the test and monitoring of the shared contact hole contact resistance is realized based on the resistance of the heavily doped region and the first contact resistance.
[0008] In some embodiments, the active region is a heavily doped region of a first doping type, and both the first contact structure and the second contact structure are shared contact hole structures. A shared contact hole contact resistance is formed between the shared contact hole structure and the heavily doped region. By applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current, the contact resistance of the shared contact hole is tested and monitored based on the resistance of the heavily doped region.
[0009] To address the aforementioned problems, one embodiment of the present invention also provides a resistance testing method, comprising: providing a plurality of mutually isolated active regions of a semiconductor device; forming two spaced-apart first contact structures and second contact structures of a first test module on each of the active regions, wherein the first contact structure of one first test module and the second contact structure of another first test module are adjacent and electrically connected, thereby forming a first series structure of the plurality of first test modules, and electrically connecting a first test pad to each end of the first series structure; applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current to test and monitor the corresponding contact resistance of the first test module.
[0010] This invention designs a series structure for the contact structure, incorporating the active region as part of the series structure. By applying a test voltage across the series structure and measuring the output current, the corresponding contact resistance of the contact structure can be accurately tested, and the contact condition can be monitored based on the test results. Furthermore, by electrically connecting a series structure including other test modules to this series structure and testing them step-by-step, the function of testing and monitoring the resistance of the corresponding structure can be realized. Attached Figure Description
[0011] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0012] Figure 1 Schematic diagram showing contact issues arising from shared contact holes;
[0013] Figure 2 This is a schematic diagram of a resistance testing structure provided in an embodiment of the present invention;
[0014] Figure 3 For along Figure 2 A cross-sectional view of the membrane along line A-A' in the middle;
[0015] Figure 4 A cross-sectional view of the film layer of a resistance testing structure provided in another embodiment of the present invention;
[0016] Figure 5 This is a schematic diagram of a resistance testing structure provided in another embodiment of the present invention;
[0017] Figure 6 This is a schematic diagram of the steps of a resistance testing method provided in an embodiment of the present invention.
[0018] Explanation of the labels in the diagram:
[0019] 101. P-type substrate; 102. N-well; 103. Oxide layer
[0020] 104, STI; 105, Active region; 106, Metal silicide
[0021] 107, SiC; 108, SiN; 109, Gate
[0022] 110, Ti / TiN 111, W
[0023] 401, P-type substrate; 402, N-well; 403, oxide layer
[0024] 404, STI 201, Active Region 406, Metal silicide
[0025] 407, SiC, 408, SiN, 409, Gate
[0026] 410, Ti / TiN 411, W Detailed Implementation
[0027] The technical solutions in the embodiments of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0028] To clearly illustrate this invention, the following provides definitions of some of the technical terms used in this invention.
[0029] Contact hole (CT): is an opening in the insulating layer between the first metal layer and the active region (AA) or polysilicon, used to form a contact between the first metal layer and the active region or polysilicon.
[0030] Shared contact hole (Share CT): This is a type of contact hole that is used by two or more components (e.g., gate and source or gate and drain).
[0031] Through-hole (VIA): A hole in the insulating layer between metal layers, used to connect the corresponding metal layers.
[0032] P-type substrate: An intrinsic semiconductor is formed by doping it with elements from Group III of the periodic table, resulting in a greater number of free-flowing positively charged particles (holes) than negatively charged particles (electrons). The P-type semiconductor is called a substrate.
[0033] Shallow trench isolation (STI): Typically used in processes below 0.25µm, it involves depositing, patterning, and etching a silicon substrate using a silicon nitride mask to form trenches, which are then filled with deposited oxide to create an isolation structure for insulating and isolating active regions. Its key feature is the ability to achieve high-density isolation.
[0034] One embodiment of the present invention provides a resistance testing structure that can be used to accurately test the contact resistance of semiconductor devices such as SRAM and DRAM, and then monitor the contact condition based on the test results.
[0035] Please refer to the following: Figures 2-3 ,in, Figure 2 This is a schematic diagram of a resistance testing structure provided in an embodiment of the present invention. Figure 3 For along Figure 2 A cross-sectional view of the membrane along line A-A'.
[0036] like Figure 2As shown, the resistance test structure 20 described in this embodiment includes a plurality of first test modules 21. Each first test module 21 includes two spaced-apart contact structures formed on the active region 201 of the same semiconductor device, namely a first contact structure 211 and a second contact structure 212. The first contact structure 211 of one first test module and the second contact structure 212 of the other first test module are adjacent and electrically connected (i.e., the corresponding contact structures of two adjacent first test modules 21 are electrically connected), thereby forming a first series structure with the plurality of first test modules 21; the two ends of the first series structure are respectively electrically connected to a first test pad (PAD) 202. By applying a test voltage to the first test pad 202 at both ends of the first series structure and measuring the output current, the test and monitoring of the corresponding contact resistance of the first test module 21 is realized.
[0037] Specifically, such as Figure 2 As shown, each first test module 21 has two different contact structures; the corresponding contact structures of two adjacent first test modules 21 are electrically connected: the first contact structure 211 of the later test module and the second contact structure 212 of the earlier test module are adjacent and electrically connected, thereby forming a first series structure of multiple first test modules 21. In other embodiments, the electrical connection between the corresponding contact structures of two adjacent first test modules 21 can also be: the second contact structure 212 of the later test module and the first contact structure 211 of the earlier test module are adjacent and electrically connected, thereby forming a first series structure of multiple first test modules 21.
[0038] This embodiment designs a first series structure for the contact structure and incorporates the active region as part of the first series structure. By applying a test voltage across the first series structure and measuring the output current, the corresponding contact resistance of the contact structure can be accurately tested, and the contact condition can be monitored based on the test results.
[0039] like Figure 3 As shown, in this embodiment, the active region 201 is a heavily doped region of the first doping type; the first contact structure 211 is a contact hole (CT) structure, and a first contact resistance R is formed between the contact hole structure and the heavily doped region. c_AA The second contact structure 212 is a shared contact hole (Share CT) structure, and the shared contact hole structure forms a shared contact hole contact resistance R with the heavily doped region. c_SCT The heavily doped region itself has a resistance R s_AAAs an example, the first doping type can be either P-type or N-type. Two adjacent contact structures of different types from each other are electrically connected, thereby forming a first series structure with multiple first test modules. By applying a test voltage to the first test pads (PADs) at both ends of the first series structure and measuring the output current, the contact resistance of the shared contact hole is tested and monitored based on the resistance of the heavily doped region and the first contact resistance. For the test structure, all values except the value to be tested are assumed to be known; the test principle and process are detailed below.
[0040] In some embodiments, the first contact structure 211 of one first test module and the second contact structure 212 of the other first test module are adjacent to each other and are separated by a first metal structure 203 (reference) away from the active region 201. Figure 3 (As shown in the cross-sectional view) Electrically connected, the two ends of the first series structure are respectively electrically connected to the corresponding first test pads 202 through a second metal structure 204 away from the active region 201. Optionally, the first metal structure and the second metal structure are formed by patterning the same metal layer away from the active region.
[0041] Specifically, the fabrication method of the resistance testing structure 20 described in this embodiment can be as follows: 1) Provide a silicon (Si) substrate with a P-type substrate and an N-well; specifically, doping boron atoms on the silicon substrate to form a P-type substrate and doping phosphorus atoms to form an N-well. 2) Form a heavily doped P+ region as the active region (AA) 201, and the active regions 201 are isolated from each other by a shallow channel isolation structure (STI); an oxide layer is formed on the surface of the shallow channel isolation structure that contacts the N-well and the active region 201. 3) Form two first grooves in each active region 201, and fill the first grooves with metal silicide. 4) A gate structure of a transistor is formed on each of the active regions 201, the gate structure being adjacent to one of the grooves; the gate structure includes an oxide layer, a gate, and a spacer layer stacked sequentially; specifically, the gate material can be polysilicon, and the spacer layer material can be silicon nitride (SiN). 5) A second groove is formed near the first groove on the side of the gate structure away from the active region, and the second groove is filled with metal silicide. 6) An insulating layer is formed covering the active region 201, the shallow trench isolation structure, the metal silicide, and the gate structure; the insulating layer may include a silicon carbide (SiC) layer and a silicon nitride (SiN) layer stacked sequentially. 7) Etching is performed in the corresponding region of the metal silicide to form contact holes and shared contact holes, wherein the shared contact holes contact the active region and the gate structure respectively. 8) A buffer layer is formed and filled with metal material in the contact hole and the shared contact hole to form the first contact structure 211 and the second contact structure 212 of the first test module 21. The buffer layer selectively includes a titanium (Ti) layer and / or titanium nitride (TiN); Ti can be grown using the IMP method. Ti has good adhesion and can be used as an adhesive layer (Glue layer) between the active region and the metal material filled in the contact hole. TiN acts as a barrier layer to prevent cross-diffusion between the upper and lower layers. The filling metal material can specifically be tungsten (W). 9) The support layer and the first contact structure 211 and the second contact structure 212 are planarized. A metal layer is formed and patterned on the side of the first contact structure 211 and the second contact structure 212 away from the active region to form a metal structure that electrically connects two adjacent and different contact structures of the two first test modules 21. The cross-sectional view of the formed resistance test structure 20 is shown below. Figure 3 As shown.
[0042] Please see Figure 4 This is a cross-sectional view of the film layer of a resistance testing structure provided in another embodiment of the present invention. Figure 4As shown, with Figure 3 The difference in the illustrated embodiment is that the first contact structure 211 and the second contact structure 212 of the first test module 21 of the resistance test structure 20 described in this embodiment are identical contact structures. Adjacent contact structures in two adjacent first test modules 21 are electrically connected (i.e., corresponding contact structures in two adjacent first test modules 21 are electrically connected), thereby forming a first series structure with multiple first test modules 21. A first test pad 202 is electrically connected to each end of the first series structure. By applying a test voltage to the first test pads 202 at both ends of the first series structure and measuring the output current, the test and monitoring of the corresponding contact resistance of the first test module 21 are achieved.
[0043] In this embodiment, the active region 201 is a heavily doped region of the first doping type; both the first contact structure 211 and the second contact structure 212 are shared contact via (Share CT) structures, and a shared contact resistance R is formed between the shared contact via structure and the heavily doped region. c_SCT The heavily doped region itself has a resistance R s_AA As an example, the first doping type can be either P-type or N-type. Adjacent contact structures of two adjacent first test modules are electrically connected, thereby forming a first series structure. By applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current, the contact resistance of the shared contact hole is tested and monitored based on the resistance of the heavily doped region. For the test structure, all values except the value to be tested are assumed to be known; the test principle and process are detailed below.
[0044] The entire contact structure of the resistance test setup utilizes shared contact layers (CTs). While this differs somewhat from a true SRAM structure (due to the lack of CTs), it can mitigate the impact of other factors on the test results to some extent. Specifically, the use of shared CTs in the contact structure increases the contact resistance R of the shared contact holes. c_SCT The proportion of this reduces the influence of other factors (especially CT), which can make the measurement of the contact resistance of the shared contact hole more accurate.
[0045] Please see Figure 5 This is a schematic diagram of a resistance testing structure provided in another embodiment of the present invention. Figure 5As shown, the resistance test structure 20 further includes at least one second series structure, which comprises multiple second test modules 22 connected in series. One end of the second series structure is electrically connected to the first series structure, and the other end is electrically connected to a second test pad 209. By applying a test voltage to the first test pad 202 and the second test pad 209 at one end of the first series structure and measuring the output current, the resistance of the corresponding second test module 22 can be tested and monitored. The second test module 22 can be a polycrystalline silicon structure, an active region structure with different doping, etc. By electrically connecting one end of the second test module 22 to a PAD and the other end to the first series structure, the resistance of the corresponding structure can be tested and monitored.
[0046] Specifically, the two probes are electrically connected to the first test pads 202 at both ends of the first series structure, a test voltage is applied and the output current is measured to test and monitor the corresponding contact resistance of the first test module 21; then one of the probes is electrically connected to the second test pad 209, a test voltage is applied and the output current is measured, and the corresponding resistance of the second test module 22 is tested and monitored based on the test of the corresponding contact resistance of the first test module 21.
[0047] The second series structure can be electrically connected to the corresponding contact structure of the first test module 21 at the end of the first series structure, or it can be electrically connected to the corresponding contact structure of any of the first test modules 21 of the first series structure. In other embodiments of the present invention, multiple second series structures can exist simultaneously and be electrically connected to the first series structure respectively. Each second series structure includes a different second test module, and the testing and monitoring functions of the resistance of the corresponding structure are realized by time-division testing.
[0048] Based on the same inventive concept, this invention also provides a resistance testing method, which can be used to accurately test the contact resistance of semiconductor devices such as SRAM and DRAM, and then monitor the contact condition based on the test results. The resistance testing method can employ the resistance testing structure described in the above embodiments of this invention.
[0049] Please see Figure 6 This is a schematic diagram illustrating the steps of a resistance testing method provided in an embodiment of the present invention. Figure 6As shown, in this embodiment, the method includes the following steps: S1, providing a plurality of mutually isolated active regions of semiconductor devices; S2, forming two spaced first contact structures and second contact structures of a first test module on each of the active regions, wherein the first contact structure of one first test module and the second contact structure of the other first test module are adjacent and electrically connected, thereby forming a first series structure of the plurality of first test modules, and the two ends of the first series structure are respectively electrically connected to a first test pad; and S3, applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current to test and monitor the corresponding contact resistance of the first test module.
[0050] In some embodiments, the active region 201 is a heavily doped region of a first doping type; the first contact structure 211 is a contact hole (CT) structure, and a first contact resistance R is formed between the contact hole structure and the heavily doped region. c_AA The second contact structure 212 is a shared contact hole (Share CT) structure, and the shared contact hole structure forms a shared contact hole contact resistance R with the heavily doped region. c_SCT The heavily doped region itself has a resistance R s_AA As an example, the first doping type can be either P-type or N-type. In two adjacent first test modules 21, the first contact structure 211 of one first test module and the second contact structure 212 of the other first test module are adjacent and connected by a first metal structure 203 (reference) away from the active region 201. Figure 3 (As shown in the cross-sectional view) Electrical connections are made, with the two ends of the first series structure respectively electrically connected to the corresponding first test pads 202 via a second metal structure 204 away from the active region 201. Optionally, the first metal structure and the second metal structure are formed by patterning the same metal layer away from the active region, such as... Figure 3 As shown.
[0051] Two adjacent and different contact structures of adjacent first test modules are electrically connected, thereby forming a first series structure with multiple first test modules. Accordingly, step S3, which involves applying a test voltage and measuring the output current on the first test pads at both ends of the first series structure to test and monitor the corresponding contact resistance of the first test modules, further includes: 1) obtaining a resistance measurement value of the shared contact hole contact resistance based on the test voltage, the output current, the resistance of the heavily doped region, the first contact resistance, and the number of first test modules in the first series structure; 2) comparing the resistance measurement value with a preset threshold to monitor the contact condition of the shared contact hole structure.
[0052] Following the above embodiments, the resistance measurement value of the shared contact hole is obtained using the following formula:
[0053] R c_SCT =(V / I) n -N·R s_AA -N·R c_AA ) / N;
[0054] Among them, R c_SCT V is the contact resistance of the shared contact hole, V is the test voltage, and I is a known quantity. n Let R be the output current, where is a known quantity. s_AA Let R be the resistance of the heavily doped region, and let R be a known quantity. c_AA Let be the first contact resistance, be a known quantity, N be the number of the first test modules in the first series structure, and be a known quantity; the influence of the metal resistance of the first metal structure and the second metal structure of the electrical connection contact structure is negligible.
[0055] In some embodiments, the active region 201 is a heavily doped region of a first doping type; both the first contact structure 211 and the second contact structure 212 are shared contact via (Share CT) structures, and a shared contact via contact resistance R is formed between the shared contact via structure and the heavily doped region. c_SCT The heavily doped region itself has a resistance R s_AA As an example, the first doping type can be either P-type or N-type. Adjacent contact structures in two adjacent first test modules 21 are connected by a first metal structure 203 (reference) away from the active region 201. Figure 4 (As shown in the cross-sectional view) Electrical connections are made, with the two ends of the first series structure respectively electrically connected to the corresponding first test pads 202 via a second metal structure 204 away from the active region 201. Optionally, the first metal structure and the second metal structure are formed by patterning the same metal layer away from the active region, such as... Figure 4 As shown.
[0056] The adjacent contact structures of two adjacent first test modules are electrically connected, thereby forming a first series structure with multiple first test modules. Accordingly, step S3, which describes applying a test voltage and measuring the output current on the first test pads at both ends of the first series structure to test and monitor the corresponding contact resistance of the first test modules, further includes: 1) obtaining a resistance measurement value of the shared contact hole resistance based on the test voltage, the output current, the resistance of the heavily doped region, and the number of shared contact hole structures in the first series structure; 2) comparing the resistance measurement value with a preset threshold to monitor the contact condition of the shared contact hole structure.
[0057] Following the above embodiments, the resistance measurement value of the shared contact hole is obtained using the following formula:
[0058] R c_SCT =(V / I) n -N·R s_AA ) / (2N);
[0059] Among them, R c_SCT V is the contact resistance of the shared contact hole, V is the test voltage, and I is a known quantity. n Let R be the output current, where is a known quantity. s_AA Let be the resistance of the heavily doped region, be a known quantity, N be the number of the first test modules in the first series structure, and be a known quantity; the influence of the metal resistance of the first metal structure and the second metal structure of the electrical connection contact structure is negligible.
[0060] The entire contact structure of the resistance test setup utilizes shared contact layers (CTs). While this differs somewhat from a true SRAM structure (due to the lack of CTs), it can mitigate the impact of other factors on the test results to some extent. Specifically, the use of shared CTs in the contact structure increases the contact resistance R of the shared contact holes. c_SCT The proportion of this reduces the influence of other factors (especially CT), which can make the measurement of the contact resistance of the shared contact hole more accurate.
[0061] In some embodiments, the method further includes: forming at least one second series structure, the second series structure including a plurality of second test modules connected in series, one end of the second series structure being electrically connected to the first series structure, and the other end being electrically connected to a second test pad; applying a test voltage to a first test pad and the second test pad at one end of the first series structure and measuring the output current to test and monitor the corresponding resistance of the second test module. The second test module can be a polycrystalline silicon structure, an active region structure with different doping, etc.; by electrically connecting one end of the second series structure to a PAD and the other end to the first series structure, the function of testing and monitoring the resistance of the corresponding structure can be realized.
[0062] Specifically, the resistance test structure, including the second series structure, can be found in [reference]. Figure 5 As shown. The specific testing method can be as follows: connect the two probes to the first test pads 202 at both ends of the first series structure, apply a test voltage and measure the output current to test and monitor the corresponding contact resistance of the first test module 21; then connect one of the probes to the second test pad 209, apply a test voltage and measure the output current to test and monitor the corresponding resistance of the second test module 22 based on the test of the corresponding contact resistance of the first test module 21.
[0063] The second series structure can be electrically connected to the corresponding contact structure of the first test module 21 at the end of the first series structure, or it can be electrically connected to the corresponding contact structure of any of the first test modules 21 of the first series structure. In other embodiments of the present invention, multiple second series structures can exist simultaneously and be electrically connected to the first series structure respectively. Each second series structure includes a different second test module, and the testing and monitoring functions of the resistance of the corresponding structure are realized by time-division testing.
[0064] As can be seen from the above, the resistance testing structure and method provided in this embodiment, by designing a series structure of the contact structure and incorporating the active region as part of the series structure, can accurately test the corresponding contact resistance of the contact structure by applying a test voltage across the series structure and measuring the output current, and then monitor the contact condition based on the test results. Furthermore, by electrically connecting a series structure including other test modules to this series structure and testing them step by step, the function of testing and monitoring the resistance of the corresponding structure can be realized.
[0065] It should be noted that the terms "comprising" and "having," and their variations, used in this invention document are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context; it should be understood that such use of data can be interchanged where appropriate. The term "one or more" depends at least in part on the context and can be used to describe features, structures, or characteristics in a singular sense, or in a plural sense to describe combinations of features, structures, or characteristics. The term "based on" can be understood as not necessarily intended to express an exclusive set of factors, but can instead, also at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described. Furthermore, embodiments and features in embodiments of this invention can be combined with each other without conflict. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this invention. In the various embodiments described above, each embodiment focuses on its differences from other embodiments; similar / identical parts between embodiments can be referred to mutually.
[0066] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A resistance testing structure, characterized in that, include: Multiple first test modules; Each of the first test modules includes: two spaced-apart first contact structures and second contact structures formed on the active region of the same semiconductor device, wherein the active region is a heavily doped region of a first doping type; In two adjacent first test modules, the first contact structure of one first test module and the second contact structure of the other first test module are adjacent and electrically connected, thereby forming a first series structure of multiple first test modules. The two ends of the first series structure are respectively electrically connected to a first test pad. Wherein, the first contact structure is a contact hole structure, and a first contact resistance is formed between the contact hole structure and the heavily doped region; the second contact structure is a shared contact hole structure, and a shared contact hole contact resistance is formed between the shared contact hole structure and the heavily doped region. By applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current, the shared contact hole contact resistance is tested and monitored based on the resistance of the heavily doped region and the first contact resistance; or, both the first contact structure and the second contact structure are shared contact hole structures, and a shared contact hole contact resistance is formed between the shared contact hole structure and the heavily doped region. By applying a test voltage to the first test pads at both ends of the first series structure and measuring the output current, the shared contact hole contact resistance is tested and monitored based on the resistance of the heavily doped region.
2. The resistance testing structure as described in claim 1, characterized in that, In two adjacent first test modules, the first contact structure of one first test module and the second contact structure of the other first test module are adjacent to each other and electrically connected through a first metal structure away from the active region. The two ends of the first series structure are respectively electrically connected to the corresponding first test pads through a second metal structure away from the active region.
3. The resistance testing structure as described in claim 2, characterized in that, The first metal structure and the second metal structure are formed by patterning the same metal layer away from the active region.
4. The resistance testing structure as described in claim 1, characterized in that, It also includes at least one second series structure, which includes multiple second test modules connected in series; one end of the second series structure is electrically connected to the first series structure, and the other end is electrically connected to a second test pad; wherein, by applying a test voltage to the first test pad and the second test pad at one end of the first series structure and measuring the output current, the corresponding resistance of the second test module is tested and monitored.
5. A resistance testing method, characterized in that, include: Provide multiple mutually isolated active regions of a semiconductor device, wherein the active regions are heavily doped regions of a first doping type; Two spaced first contact structures and second contact structures are formed on each active region of a first test module. The first contact structure of one first test module and the second contact structure of the other first test module are adjacent and electrically connected, thereby forming a first series structure of multiple first test modules. The two ends of the first series structure are respectively electrically connected to a first test pad. The first contact structure is a contact hole structure, and a first contact resistance is formed between the contact hole structure and the heavily doped region. The second contact structure is a shared contact hole structure, and a shared contact hole contact resistance is formed between the shared contact hole structure and the heavily doped region. A test voltage is applied to the first test pads at both ends of the first series structure and the output current is measured. Based on the test voltage, the output current, the resistance of the heavily doped region, the first contact resistance, and the number of the first test modules in the first series structure, the resistance measurement value of the shared contact hole is obtained. The resistance measurement value is compared with a preset threshold to monitor the contact condition of the shared contact hole structure.
6. The resistance testing method as described in claim 5, characterized in that, The resistance measurement value of the shared contact hole is obtained using the following formula: R c_SCT =(V / I n -N·R s_AA -N·R c_AA ) / N; Among them, R c_SCT V is the contact resistance of the shared contact hole, and I is the test voltage. n R is the output current. s_AA R is the resistance of the heavily doped region. c_AA Let N be the first contact resistance, and N be the number of the first test modules in the first series structure.
7. The resistance testing method as described in claim 5, characterized in that, The method further includes: At least one second series structure is formed, the second series structure includes a plurality of second test modules connected in series, one end of the second series structure is electrically connected to the first series structure, and the other end is electrically connected to a second test pad. A test voltage is applied to the first test pad and the second test pad at one end of the first series structure, and the output current is measured to test and monitor the corresponding resistance of the second test module.
8. A resistance testing method, characterized in that, include: Provide multiple mutually isolated active regions of a semiconductor device, wherein the active regions are heavily doped regions of a first doping type; Two spaced first contact structures and second contact structures of a first test module are formed on each active region. The first contact structure of one first test module and the second contact structure of the other first test module are adjacent and electrically connected, thereby forming a first series structure of multiple first test modules. The two ends of the first series structure are respectively electrically connected to a first test pad. The first contact structure and the second contact structure are both shared contact hole structures. The shared contact hole structure and the heavily doped region form a shared contact hole contact resistance. A test voltage is applied to the first test pads at both ends of the first series structure and the output current is measured. Based on the test voltage, the output current, the resistance of the heavily doped region, and the number of shared contact hole structures in the first series structure, the resistance measurement value of the shared contact hole is obtained. The resistance measurement value is compared with a preset threshold to monitor the contact condition of the shared contact hole structure.
9. The resistance testing method as described in claim 8, characterized in that, The resistance measurement value of the shared contact hole is obtained using the following formula: R c_SCT =(V / I n -N·R s_AA ) / (2N); Among them, R c_SCT V is the contact resistance of the shared contact hole, and I is the test voltage. n R is the output current. s_AA is the resistance of the heavily doped region, and N is the number of the first test modules in the first series structure.
10. The resistance testing method as described in claim 8, characterized in that, The method further includes: At least one second series structure is formed, the second series structure includes a plurality of second test modules connected in series, one end of the second series structure is electrically connected to the first series structure, and the other end is electrically connected to a second test pad. A test voltage is applied to the first test pad and the second test pad at one end of the first series structure, and the output current is measured to test and monitor the corresponding resistance of the second test module.