Method, device and storage medium for determining thermal resistance and temperature rise of switching circuit

Abstract

The present invention discloses a method, device, and storage medium for determining thermal resistance and temperature rise of a switching circuit. The thermal resistance determination method includes: obtaining a first temperature of a MOS device under test when it is operating stably; obtaining an ambient temperature, and obtaining a first resistance value of a resistive device connected to the MOS device under test at the ambient temperature; obtaining an on-resistance-temperature curve of the MOS device under test, and determining a second resistance value of the MOS device under test at the first temperature based on the on-resistance-temperature curve; determining a temperature rise coefficient of the resistive device based on the on-resistance-temperature curve using the first temperature and the ambient temperature; determining a third resistance value of the resistive device at the first temperature based on the first resistance value and the temperature rise coefficient of the resistive device; obtaining a test current of the MOS device under test, and determining a test power based on the test current, the second resistance value, and the third resistance value; and determining the thermal resistance of the MOS device under test based on the test power, the first temperature, and the ambient temperature.

Description

Technical Field

[0001] The embodiments of the present invention relate to testing technology, and in particular to a method, device and storage medium for determining thermal resistance and temperature rise of a switching circuit. Background Art

[0002] Thermal resistance testing is a routine test item for semiconductor devices (chips). The results of thermal resistance testing are of great reference value for analyzing the service life and reliability of semiconductor devices, as well as the design rationality of circuits containing semiconductor devices. Thermal resistance testing methods mainly include infrared scanning, electrical measurement, and transient thermal test interface method. Among them, the infrared scanning method requires opening the cover of the device (chip), which is destructive. The electrical measurement method usually uses the shell temperature of the package for calculation. However, due to the certain difference between the size of the package and the size of the semiconductor device, the thermal resistance of the semiconductor device calculated based on the package shell temperature has certain errors. The transient thermal test interface method has higher accuracy and reproducibility than the electrical measurement method and is the more mainstream thermal resistance test method.

[0003] Taking the JESD51-14 thermal resistance transient dual-interface test method as an example, the transient thermal test interface method usually requires the assistance of professional test instruments. For example, the T3ster instrument is used to test semiconductor devices to record the transient change process of the module junction temperature, obtain steady-state junction-to-case thermal resistance data, obtain the transient curve of the junction temperature change over time, and analyze the thermal resistance of each layer structure on the heat conduction path of the semiconductor device.

[0004] Based on JESD51-14, taking the thermal resistance test of the chip as an example, the thermal resistance of the chip can be determined by the following method: Apply a value of I H The heating current lasts for t H After the device under test is working stably, the heating current is switched to the test current; during the process of junction temperature dropping, the change in junction temperature and power consumption is determined, and the thermal resistance is determined by the change in junction temperature and power consumption.

[0005] Based on the above, thermal resistance testing methods for semiconductor devices typically only consider the device itself. Therefore, using these thermal resistances to analyze the temperature rise of devices mounted on a PCB can result in a certain degree of deviation, which can affect the determination of the rationality of the PCB (and circuit) design. Summary of the Invention

[0006] The present invention provides a method, device and storage medium for determining thermal resistance and temperature rise of a switching circuit, so as to achieve the purpose of accurately determining the thermal resistance of a MOS device arranged on a PCB.

[0007] In a first aspect, an embodiment of the present invention provides a method for determining thermal resistance of a MOS device, comprising:

[0008] Obtaining the first temperature of the MOS device under test when it is working stably;

[0009] Acquiring an ambient temperature, and acquiring a first resistance value of a resistive device connected to the MOS device under test at the ambient temperature;

[0010] Acquire an on-resistance-temperature curve of the MOS device under test, and determine a second resistance value of the MOS device under test at the first temperature according to the on-resistance-temperature curve;

[0011] Determining the temperature rise coefficient of the resistive device using the on-resistance-temperature curve using the first temperature and the ambient temperature;

[0012] determining a third resistance value of the resistive device at the first temperature according to the first resistance value and the temperature rise coefficient of the resistive device;

[0013] Obtaining a test current of the MOS device under test, and determining a test power using the test current, a second resistance value, and a third resistance value;

[0014] The thermal resistance of the MOS device under test is determined according to the test power, the first temperature and the ambient temperature.

[0015] Optionally, the formula used to determine the temperature rise coefficient of the resistive device is:

[0016]

[0017] Where KT represents the temperature rise coefficient of the resistive device, R ds1 Indicates the on-resistance of the MOS device under test at the first temperature, R ds2 The on-resistance of the MOS device under test at ambient temperature, where T1 represents the first temperature and T2 represents the second temperature.

[0018] Optionally, the third resistor is determined using the following formula:

[0019] R3=KT×R1

[0020] Wherein, R3 represents the third resistor, KT represents the temperature rise coefficient of the resistive device, and R1 represents the first resistor.

[0021] Optionally, the resistive device includes at least a welding portion and a fuse device of the MOS device under test.

[0022] Optionally, the thermal resistance is used to determine the steady-state temperature of the MOS device under test at a specified current after the device has operated for a specified period of time.

[0023] In a second aspect, an embodiment of the present invention further provides a method for determining a temperature rise of a BMS switch circuit, wherein the BMS switch circuit includes a plurality of MOS devices. The method for determining a temperature rise of the BMS switch circuit includes:

[0024] The thermal resistance of a single MOS device in the BMS switch circuit is determined using the MOS device thermal resistance determination method described in an embodiment of the present invention.

[0025] Optionally, a current calculation model is obtained, and a test current of a single MOS device is determined based on the power calculation.

[0026] Optionally, the current calculation model is determined according to a combination mode of the MOS devices, and the combination mode at least includes a series connection mode and a parallel connection mode of the MOS devices.

[0027] In a third aspect, an embodiment of the present invention further provides an electronic device, comprising at least one processor, and a memory communicatively connected to the at least one processor;

[0028] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for determining the thermal resistance of a MOS device described in an embodiment of the present invention, or the method for determining the temperature rise of a BMS switch circuit described in an embodiment of the present invention.

[0029] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the method for determining the thermal resistance of a MOS device recorded in an embodiment of the present invention, or the method for determining the temperature rise of a BMS switch circuit recorded in an embodiment of the present invention when executed.

[0030] Compared with the prior art, the present invention has the following advantages: the present invention proposes a method for determining the thermal resistance of a MOS device, in which a test power is determined by jointly determining the on-resistance of the MOS device under test and the resistance of a resistive device connected thereto, and the thermal resistance of the MOS device under test is then determined based on the test power. This method takes into account various factors that may affect the MOS device on a PCB board, so that the calculated thermal resistance will be closer to the actual test value. In this solution, a test current is selected, and the steady-state temperature of the MOS device under test in stable operation under the test current is determined. Subsequent calculations are performed based on the test current and the steady-state temperature. Specifically, the on-resistance of the MOS device under test at the steady-state temperature is determined by an on-resistance-temperature curve, the temperature rise coefficient of the resistive device is determined by the on-resistance-temperature curve, and then the resistance value of the resistive device at the steady-state temperature is determined. The test power is determined using the on-resistance at the steady-state temperature and the resistance value (of the resistive device). This can reduce the problem of inaccurate test power calculation caused by different temperatures when using two parts of resistance value to determine the test power, thereby ensuring the calculation accuracy of the thermal resistance. At the same time, when determining the thermal resistance using the test power calculated from the on-resistance at the steady-state temperature and the resistance value, the thermal resistance can be directly applied to the temperature rise of the (tested) MOS device under other test currents, and then the temperature rise curves of the MOS device under different currents can be obtained, which facilitates the rationality analysis of the circuit design based on the MOS device. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a flow chart of a method for determining thermal resistance of a MOS device in an embodiment;

[0032] Figure 2 is a flow chart of another method for determining the thermal resistance of a MOS device in an embodiment;

[0033] Figure 3 is a flow chart of a method for determining a temperature rise of a BMS switch circuit in an embodiment;

[0034] Figure 4 Schematic diagram of the BMS switch circuit in the embodiment;

[0035] Figure 5 Schematic diagram of the electronic device structure in the embodiment. DETAILED DESCRIPTION

[0036] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0037] Example 1

[0038] Figure 1 This is a flow chart of the method for determining the thermal resistance of a MOS device in an embodiment, refer to Figure 1 , the method for determining the thermal resistance of MOS devices includes:

[0039] S101. Obtain a first temperature of the MOS device under test when it is operating stably.

[0040] Illustratively, in this embodiment, the first temperature may be obtained through measurement, and the first temperature may be the junction temperature or surface temperature of the MOS device under test when it is in a stable working state under a specified test current.

[0041] For example, in this embodiment, the test current is based on the drain-source nominal current (I D ), for example, if the drain-source nominal current of a MOS device under test is 100-300A, the test current can be selected as 200A.

[0042] S102. Acquire the ambient temperature, and acquire a first resistance value of a resistive device connected to the MOS device under test at the ambient temperature.

[0043] For example, in this embodiment, the ambient temperature is used to represent the normal temperature of the MOS device under test when it is in a non-operating state, which is a set value. For example, the ambient temperature may be 25°C.

[0044] Illustratively, in this embodiment, the first resistance value may be determined according to a parameter manual of the resistive component, or determined through a calibration test.

[0045] Illustratively, in this embodiment, the resistive device at least includes a pad (or a welding portion) for welding the MOS device under test.

[0046] S103 . Obtain an on-resistance-temperature curve of the MOS device under test, and determine a second resistance value of the MOS device under test at the first temperature based on the on-resistance-temperature curve.

[0047] Illustratively, in this embodiment, the on-resistance-temperature curve of the MOS device under test is determined according to a parameter manual of the MOS device under test.

[0048] Illustratively, in this embodiment, the horizontal and vertical coordinates of the on-resistance-temperature curve are temperature and on-resistance, respectively. When the first temperature is determined, the corresponding on-resistance can be determined through the on-resistance-temperature curve.

[0049] S104. Using the first temperature and the ambient temperature, determine the temperature rise coefficient of the resistive device through an on-resistance-temperature curve.

[0050] Illustratively, in this embodiment, the slope of the on-resistance-temperature curve in the temperature range from ambient temperature to the first temperature is determined, and the slope is used as the temperature rise coefficient of the resistive device.

[0051] That is, in this embodiment, the formula used to determine the temperature rise coefficient of the resistive device is:

[0052]

[0053] Where KT represents the temperature rise coefficient of the resistive device, R ds1 Indicates the on-resistance of the MOS device under test at the first temperature, R ds2 The on-resistance of the MOS device under test at ambient temperature, where T1 represents the first temperature and T2 represents the second temperature.

[0054] S105. Determine a third resistance value of the resistive component at the first temperature based on the first resistance value and the temperature rise coefficient of the resistive component.

[0055] Illustratively, in this embodiment, the first resistance value and the temperature rise coefficient of the resistive device may be used to determine the third resistance value through a fitting function model or a neural network model.

[0056] Optionally, as an implementation scheme, the third resistor can be determined by the following formula:

[0057] R3=KT×R1

[0058] Wherein, R3 represents the third resistor, KT represents the temperature rise coefficient of the resistive device, and R1 represents the first resistor.

[0059] S106. Obtain a test current of the MOS device under test, and determine a test power using the test current, the second resistance value, and the third resistance value.

[0060] For example, in this embodiment, the MOS device includes a single MOS transistor, and the formula used to determine the test power is:

[0061]

[0062] Where, P represents the test power, I c Represents the test current, R2 represents the second resistor, and R3 represents the third resistor.

[0063] Exemplarily, in this step, the value of the test current may be the same as or different from the value of the test current used in step S101. For example, in this step, the value of the test current may be 200A.

[0064] S107 . Determine the thermal resistance of the MOS device under test according to the test power, the first temperature, and the ambient temperature.

[0065] For example, in this embodiment, the formula used to determine the thermal resistance is:

[0066]

[0067] Where R th represents thermal resistance, P represents test power, T1 represents the first temperature, T c Indicates the ambient temperature.

[0068] For example, in this embodiment, the thermal resistance determined in steps S101 to S107 can be used to determine the steady-state temperature of a MOS device (of the same model as the MOS device being tested) after operating for a specified period of time at any operating current. The formula used to determine the steady-state temperature is:

[0069] T=I 2 ×R×R th

[0070] Where T represents the steady-state temperature, I represents the operating current, R represents the on-resistance of the MOS device under test (minimum drain-source nominal current, on-resistance at ambient temperature), and R th Indicates thermal resistance.

[0071] Illustratively, in the above application manner, the specified duration may be determined based on experience. For example, the specified duration may be greater than 1 second.

[0072] For example, if the operating time of the MOS device is less than a specified time (eg, 1 second), the steady-state temperature may be determined by the thermal resistance given in the parameter manual of the MOS device.

[0073] This embodiment provides a method for determining the thermal resistance of a MOS device. In this method, a test power is determined by combining the on-resistance of the MOS device under test and the resistance of a resistive device connected to the device. The thermal resistance of the MOS device under test is then determined based on the test power. This method takes into account various factors that may affect the placement of the MOS device on a PCB, so the calculated thermal resistance is closer to the actual test value.

[0074] Specifically, in this solution, a test current is selected, and the steady-state temperature of the MOS device under test in stable operation under the test current is determined. Subsequent calculations are performed based on the test current and the steady-state temperature, including: determining the on-resistance of the MOS device under test at the steady-state temperature through an on-resistance-temperature curve, determining the temperature rise coefficient of the resistive device through the on-resistance-temperature curve, and then determining the resistance value of the resistive device at the steady-state temperature; determining the test power using the on-resistance at the steady-state temperature and the resistance value of the resistive device, thereby reducing the problem of inaccurate test power calculation due to temperature differences when using two resistance values ​​to determine the test power, thereby ensuring the calculation accuracy of the thermal resistance; at the same time, when determining the thermal resistance using the test power calculated from the on-resistance at the steady-state temperature and the resistance value, the thermal resistance can be directly applied to the temperature rise of the MOS device under other test currents, thereby obtaining the temperature rise curves of the MOS device under different currents, thereby facilitating the rationality analysis of circuit design based on MOS devices;

[0075] In addition, when the present invention is used to determine the thermal resistance of a MOS device, the test current can be a selected value, that is, the measured quantity can only include the first temperature of the MOS device under test when it is working stably, without the need for complex measurement data collection work, and is easy to realize automatically.

[0076] Based on the content recorded in step S102, as a feasible implementation scheme, the resistive device includes a soldering portion (pad) of the MOS device under test and a fuse device (fuse).

[0077] For example, in this solution, the first resistor R1 includes two parts, namely the welding part resistor R s and fuse resistance R f (R1=R s +R f ), where R can be determined according to the corresponding parameter manual s and R f The resistance value at ambient temperature is used to determine the third resistor R3 (the temperature rise coefficients of the resistive components of the welding portion and the fuse component are the same).

[0078] Figure 2 This is another flow chart of a method for determining the thermal resistance of a MOS device in an embodiment, refer to Figure 2 As an implementable solution, the method for determining the thermal resistance of a MOS device can also be:

[0079] S201. Obtain a first temperature of the MOS device under test when it is operating stably.

[0080] S202. Acquire the ambient temperature, and acquire a first resistance value of a resistive device connected to the MOS device under test at the ambient temperature.

[0081] S203 . Obtain an on-resistance-temperature curve of the MOS device under test, and determine a second resistance value of the MOS device under test at the first temperature based on the on-resistance-temperature curve.

[0082] Illustratively, in this solution, the implementation of steps S201 to S203 is the same as the corresponding contents recorded in steps S101 to S103.

[0083] S204. Obtain a test current of the MOS device under test, and determine a test power using the test current, the first resistance value, and the second resistance value.

[0084] Exemplarily, in this solution, the test power is determined by the following formula:

[0085]

[0086] Where, P represents the test power, I c Represents the test current, R1 represents the first resistor, and R2 represents the second resistor.

[0087] S205 . Determine the thermal resistance of the MOS device under test according to the test power, the first temperature, and the ambient temperature.

[0088] For example, in this solution, the thermal resistance is determined by the following formula:

[0089]

[0090] Where R th represents thermal resistance, P represents test power, T1 represents the first temperature, T c Indicates the ambient temperature.

[0091] Compared to Figure 1 In the scheme shown, the first resistor, the second resistor, the first temperature and the ambient temperature are used to determine the thermal resistance of the MOS device under test. The third resistor is replaced by the first resistor, and the determination process of the third resistor is omitted, thereby simplifying the determination process of the thermal resistance. However, the accuracy of the thermal resistance is correspondingly reduced.

[0092] Example 2

[0093] This embodiment provides a method for determining the temperature rise of a BMS switch circuit. The method includes determining the thermal resistance of a single MOS device in the BMS switch circuit, and determining the steady-state temperature of the MOS device at a specified current after operating for a specified time based on the thermal resistance of the single MOS device.

[0094] The temperature rise of the BMS switch circuit is determined based on the difference between the temperature of the MOS device when it is not conducting and the steady-state temperature.

[0095] In this embodiment, any one of the methods for determining the thermal resistance of a MOS device described in the first embodiment may be used to determine the thermal resistance of a single MOS device.

[0096] Figure 3 This is a flow chart of the method for determining the temperature rise of the BMS switch circuit in the embodiment, refer to Figure 3 ,by Figure 1 Taking the method for determining the thermal resistance of a MOS device shown in the figure as an example, the method for determining the temperature rise of a BMS switch circuit includes:

[0097] S301. Obtain a first temperature of a single MOS device when it is operating stably.

[0098] S302. Acquire the ambient temperature, and acquire a first resistance value of a resistive device connected to a single MOS device at the ambient temperature.

[0099] S303. Obtain an on-resistance-temperature curve of a single MOS device, and determine a second resistance value of the single MOS device at the first temperature through the on-resistance-temperature curve.

[0100] S304. Using the first temperature and the ambient temperature, determine the temperature rise coefficient of the resistive device through the on-resistance-temperature curve

[0101] S305. Determine a third resistance value of the resistive component at the first temperature based on the first resistance value and the temperature rise coefficient of the resistive component.

[0102] For example, in this embodiment, steps S301 to S305 are Figure 1 The corresponding contents in the shown schemes are the same.

[0103] S306. Obtain an operating current and a current calculation model, and determine a test current of a single MOS device using the current calculation model according to the operating current.

[0104] S307. Determine the test power using the test current, the second resistance value, and the third resistance value.

[0105] Exemplarily, in combination with step S306 and step S307, in this solution, the operating current is the operating current of the BMS switch circuit.

[0106] Illustratively, in this embodiment, the current calculation model may be determined empirically or according to a calibration test based on the design of the BMS switch circuit.

[0107] For example, in this embodiment, the test current may be determined by the following current calculation model:

[0108] I c =f(I)

[0109] Where, I cIndicates the test current and I indicates the working current.

[0110] For example, in one possible implementation, the current calculation model may be determined according to a combination of MOS devices in a BMS switch circuit, wherein the combination of MOS devices includes at least series and parallel connection of MOS devices.

[0111] Figure 4 This is a schematic diagram of the BMS switch circuit in the embodiment, refer to Figure 4 , Figure 4 The BMS switch circuit shown includes two groups of MOS devices, where the five MOS devices in each group are connected in parallel. In this case, if the operating current is selected as the current passing through one group of MOS devices, the test current can be calculated using the following formula:

[0112]

[0113] Accordingly, the test power can be determined by the following formula:

[0114]

[0115] I c represents the test current, R2 represents the second resistor, R3 represents the third resistor, and N represents the number of parallel MOS tubes used, that is, N is 5.

[0116] S308 . Determine the thermal resistance of a single MOS device by testing the power, the first temperature, and the ambient temperature.

[0117] Illustratively, in this embodiment, the implementation of step S308 is the same as that of step S107.

[0118] S309 . Determine the temperature rise of the BMS switch circuit based on the thermal resistance of the single MOS device.

[0119] For example, in this embodiment, the steady-state temperature of a single MOS device after operating for a specified time at a specified current is determined by the following formula:

[0120]

[0121] Where T represents the steady-state temperature, I1 represents the specified current, R represents the on-resistance of the MOS device under test (minimum drain-source nominal current, on-resistance at ambient temperature), and R th Indicates thermal resistance.

[0122] Exemplarily, in this step, the designated current I1 is related to the operating current of the selected BMS switch circuit. After the operating current of the BMS switch circuit is determined, the designated current I1 can be determined by a current calculation model.

[0123] Exemplarily, in this embodiment, the temperature rise of the BMS switch circuit is determined by the following formula:

[0124] ΔT=T-T0

[0125] In the above formula, ΔT is the temperature rise, T is the steady-state temperature, and T0 is the temperature when the BMS switch circuit is not powered.

[0126] The beneficial effects of the method for determining the temperature rise of the BMS switch circuit proposed in this embodiment are the same as the beneficial effects of the method for determining the thermal resistance of the MOS device described in Example 1, and will not be repeated here.

[0127] Example 3

[0128] For example, the method for determining the thermal resistance of a MOS device described in the first embodiment may be performed by a device for determining the thermal resistance of a MOS device. The device may be implemented in software and may include a thermal resistance determining unit configured to:

[0129] Obtaining the first temperature of the MOS device under test when it is working stably;

[0130] Acquiring an ambient temperature, and acquiring a first resistance value of a resistive device connected to the MOS device under test at the ambient temperature;

[0131] Obtaining an on-resistance-temperature curve of the MOS device under test, and determining a second resistance value of the MOS device under test at the first temperature according to the on-resistance-temperature curve;

[0132] Determining the temperature rise coefficient of the resistive device by using an on-resistance-temperature curve using the first temperature and the ambient temperature;

[0133] determining a third resistance value of the resistive device at the first temperature according to the first resistance value and the temperature rise coefficient of the resistive device;

[0134] Obtaining a test current of the MOS device under test, and determining a test power using the test current, the second resistance value, and the third resistance value;

[0135] The thermal resistance of the MOS device under test is determined according to the test power, the first temperature and the ambient temperature.

[0136] Illustratively, in this embodiment, the thermal resistance determining unit may be specifically configured to implement any one of the methods for determining the thermal resistance of a MOS device described in the first embodiment, and the specific details thereof will not be repeated herein.

[0137] For example, the BMS switch circuit temperature rise determination method described in the second embodiment may be performed by a BMS switch circuit temperature rise determination device. The device may be implemented in software and may include a switch circuit temperature rise determination unit. The switch circuit temperature rise determination unit is configured to:

[0138] Obtain the first temperature of a single MOS device when it is operating stably.

[0139] Acquire the ambient temperature and acquire a first resistance value of a resistive device connected to the single MOS device at the ambient temperature.

[0140] Obtain the on-resistance-temperature curve of a single MOS device, and determine the second resistance value of the single MOS device at the first temperature through the on-resistance-temperature curve

[0141] Using the first temperature and the ambient temperature, the temperature rise coefficient of the resistive device is determined by the on-resistance-temperature curve.

[0142] A third resistance value of the resistive component at the first temperature is determined according to the first resistance value and the temperature rise coefficient of the resistive component.

[0143] Obtain an operating current and a current calculation model, and determine a test current of a single MOS device using the current calculation model according to the operating current.

[0144] The test power is determined using the test current, the second resistance value, and the third resistance value.

[0145] The thermal resistance of a single MOS device is determined according to the test power, the first temperature and the ambient temperature.

[0146] The temperature rise of the BMS switch circuit is determined based on the thermal resistance of a single MOS device.

[0147] Illustratively, in this embodiment, the switch circuit temperature rise determining unit may be specifically configured to implement any one of the BMS switch circuit temperature rise determining methods described in the second embodiment, and the specific details thereof will not be repeated herein.

[0148] In this embodiment, the MOS device thermal resistance determination device and the BMS switch circuit temperature rise determination device can be configured in an electronic device.

[0149] Figure 5 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0150] like Figure 3As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., which is communicatively connected to the at least one processor 11. The memory stores a computer program that can be executed by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. Various programs and data required for the operation of the electronic device 10 can also be stored in the RAM 13. The processor 11, ROM 12, and RAM 13 are connected to each other via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0151] Multiple components in the electronic device 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0152] The processor 11 can be any general-purpose and / or specialized processing component with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the method for determining the thermal resistance of a MOS device or the method for determining the temperature rise of a BMS switch circuit.

[0153] In some embodiments, the MOS device thermal resistance determination method or the BMS switch circuit temperature rise determination method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the MOS device thermal resistance determination method or the BMS switch circuit temperature rise determination method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to execute the MOS device thermal resistance determination method or the BMS switch circuit temperature rise determination method in any other appropriate manner (e.g., by means of firmware).

[0154] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0155] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the processor, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer program may be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0156] In the context of the present invention, computer-readable storage media can be tangible media that can contain or store a computer program for use with an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. Computer-readable storage media can include but are not limited to electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, computer-readable storage media can be machine-readable signal media. More specific examples of machine-readable storage media can include electrical connections based on one or more lines, portable computer disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0157] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0158] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0159] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A method for determining the thermal resistance of a MOS device, characterized in that: include: Obtaining a first temperature of the MOS device under test when it is in stable operation, where the first temperature is a junction temperature or a surface temperature of the MOS device under test when it is in a stable operating state under a specified test current; Acquiring an ambient temperature, and acquiring a first resistance value of a resistive device connected to the MOS device under test at the ambient temperature; Acquire an on-resistance-temperature curve of the MOS device under test, and determine a second resistance value of the MOS device under test at the first temperature according to the on-resistance-temperature curve; Determining the temperature rise coefficient of the resistive device by using the on-resistance-temperature curve using the first temperature and the ambient temperature; determining a third resistance value of the resistive device at the first temperature according to the first resistance value and the temperature rise coefficient of the resistive device; Obtaining a test current of the MOS device under test, and determining a test power using the test current, a second resistance value, and a third resistance value; Determine the thermal resistance of the MOS device under test by using the test power, the first temperature and the ambient temperature; The formula used to determine the temperature rise coefficient of the resistive device is: Where KT represents the temperature rise coefficient of the resistive device, R ds1 Indicates the on-resistance of the MOS device under test at the first temperature, R ds2 The on-resistance of the MOS device under test at ambient temperature, where T1 represents the first temperature and T2 represents the second temperature.

2. The method for determining the thermal resistance of a MOS device according to claim 1, wherein: The formula used to determine the third resistor is: R3=KT×R1 Wherein, R3 represents the third resistor, KT represents the temperature rise coefficient of the resistive device, and R1 represents the first resistor.

3. The method for determining the thermal resistance of a MOS device according to claim 1, wherein: The resistive device at least includes a welding portion of the MOS device under test and a fuse device.

4. The method for determining the thermal resistance of a MOS device according to any one of claims 1 to 3, wherein: The thermal resistance is used to determine the steady-state temperature of the MOS device under test at a specified current after the device has been operating for a specified period of time.

5. A method for determining the temperature rise of a BMS switch circuit, characterized in that: The BMS switch circuit includes several MOS devices. The method for determining the temperature rise of the BMS switch circuit includes: The thermal resistance of a single MOS device in the BMS switch circuit is determined by using the MOS device thermal resistance determination method according to any one of claims 1 to 4. The temperature rise of the single MOS device is determined according to the thermal resistance, and the temperature rise of the BMS switch circuit is determined according to the temperature rise of the single MOS device.

6. The method for determining the temperature rise of a BMS switch circuit according to claim 5, wherein: A current calculation model is obtained, and a test current of a single MOS device is determined according to the current calculation model.

7. The method for determining the temperature rise of a BMS switch circuit according to claim 6, wherein: The current calculation model is determined according to a combination mode of the MOS devices, where the combination mode at least includes a series connection mode and a parallel connection mode of the MOS devices.

8. An electronic device, characterized in that: comprising at least one processor, and a memory communicatively connected to the at least one processor; The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for determining the thermal resistance of a MOS device according to any one of claims 1 to 4, or the method for determining the temperature rise of a BMS switch circuit according to any one of claims 5 to 7.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, which are used to enable a processor to implement the method for determining the thermal resistance of a MOS device according to any one of claims 1 to 4, or the method for determining the temperature rise of a BMS switch circuit according to any one of claims 5 to 7 when executed.

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