Display device

Abstract

According to an embodiment, a display device has a display region including a pixel, a peripheral region of a periphery of the display region, a pixel electrode disposed in the pixel, a switching element connected to the pixel electrode, a scan line that supplies a scan signal to the switching element, a signal line that supplies an image signal to the switching element, a metal layer that overlaps at least one of the signal line and the scan line, an anti-reflection layer that covers the metal layer, a common electrode that covers the anti-reflection layer, and a power supply line disposed in the peripheral region that is supplied with a common voltage. The common electrode and the metal layer are connected to the power supply line in the peripheral region.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority based on Japanese Patent Application No. 2021-143091 (filing date: September 2, 2021), the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of the present invention relate to a display device. Background Art

[0004] In display devices such as liquid crystal displays, a metal layer with the same potential as a common electrode made of a transparent conductive material such as ITO (Indium Tin Oxide) is sometimes provided at the pixel boundary. The metal layer can reflect external light, so some countermeasures are required. Summary of the Invention

[0005] Generally speaking, according to one embodiment, a display device includes: a display area including pixels; a peripheral area surrounding the display area; pixel electrodes disposed on the pixels; a switching element connected to the pixel electrodes; a scanning line supplying a scanning signal to the switching element; a signal line supplying an image signal to the switching element; a metal layer overlapping at least one of the signal line and the scanning line; an antireflection layer covering the metal layer; a common electrode covering the antireflection layer; and a power supply line disposed in the peripheral area and supplied with a common voltage. The common electrode and the metal layer are connected to the power supply line in the peripheral area.

[0006] According to other embodiments, the display device includes: a display area including pixels; a pixel electrode arranged in the pixel; a switching element connected to the pixel electrode; a scanning line supplying a scanning signal to the switching element; a signal line supplying an image signal to the switching element; a metal layer overlapping with at least one of the signal line and the scanning line; an anti-reflection layer covering the metal layer; a common electrode covering the anti-reflection layer; and a relay conductive layer arranged in the display area and in contact with the metal layer and the common electrode.

[0007] According to another other embodiment, a display device includes a display region including a pixel, a pixel electrode disposed in the pixel, a switching element connected to the pixel electrode, a scan line supplying a scan signal to the switching element, a signal line supplying an image signal to the switching element, a metal layer overlapping at least one of the signal line and the scan line, an anti-reflection layer covering the metal layer, and a common electrode covering the anti-reflection layer. The metal layer has an exposed region not covered by the anti-reflection layer, and the common electrode is in contact with the exposed region.

[0008] According to the above structure, a display device capable of suppressing reflection of external light can be provided. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 FIG. 1 is an exploded perspective view of a display device according to a first embodiment.

[0010] Figure 2 FIG. 2 is a plan view of a display panel according to the first embodiment.

[0011] Figure 3 FIG. 3 is a plan view showing one example of a layout of a sub-pixel according to the first embodiment.

[0012] Figure 4 FIG. 4 is a cross-sectional view of the display panel according to the first embodiment.

[0013] Figure 5 FIG. 5 is a cross-sectional view of a metal layer and an anti-reflection layer according to the first embodiment.

[0014] Figure 6 FIG. 6 is a plan view showing a part of elements disposed in a display region of a first substrate according to the first embodiment.

[0015] Figure 7 FIG. 7 is a plan view showing a part of a peripheral region of the first substrate according to the first embodiment.

[0016] Figure 8 FIG. 8 is a cross-sectional view of the first substrate along line VIII-VIII in FIG. 6. Figure 7

[0017] FIG. 9 is a cross-sectional view of a first substrate according to a second embodiment. Figure 9

[0018] FIG. 10 is a cross-sectional view of the first substrate according to a third embodiment. Figure 10

[0019] Figure 11 ​is a schematic plan view of a portion of the first substrate configuration according to the fourth embodiment.

[0020] Figure 12 is a schematic cross-sectional view of the first substrate along the line XII-XII in Figure 11

[0021] Figure 13 is a schematic cross-sectional view of the first substrate according to the fifth embodiment.

[0022] Figure 14 is a schematic plan view of the metal layer, the scan line and the signal line according to the sixth embodiment.

[0023] Figure 15 is a schematic cross-sectional view of the display panel along the line XV-XV in Figure 14

[0024] Figure 16 is a schematic cross-sectional view of the display panel according to the seventh embodiment.

[0025] Figure 17 is a schematic cross-sectional view of the first substrate according to the eighth embodiment.

[0026] Figure 18 is a schematic cross-sectional view of the first substrate according to the ninth embodiment. DETAILED DESCRIPTION

[0027] Based on several embodiments, the description is made with reference to the drawings.

[0028] Further, the present application is only one example, and of course, includes within the scope of the present application a mode which can be easily conceived by those skilled in the art with appropriate modification regarding the gist of the present application. In addition, the drawings are sometimes schematically shown in comparison with the actual mode for making the description more clear, but are only one example, and do not limit the explanation of the present application. In each drawing, sometimes the reference numerals are omitted regarding the same or similar elements which are continuously arranged. In addition, in the present specification and each drawing, regarding the constitutional element which plays the same or similar function to the constitutional element which has been described in the appeared drawing, the same reference numeral is annotated, and sometimes the repeated detailed explanation is omitted.

[0029] ​​In each embodiment, as one example, a liquid crystal display device having a liquid crystal display element is disclosed. However, each embodiment does not hinder the application of each technical idea disclosed in each embodiment to a display device having other kinds of display elements such as an organic electroluminescence display element, a micro LED, or a mini LED. In addition, the technical ideas disclosed in each embodiment can also be applied to an array substrate having a sensor element such as an electrostatic capacity type sensor or an optical type sensor, or an electronic device.

[0030] [1st Embodiment]

[0031] Figure 1 is an exploded perspective view of a liquid crystal display device 1 (hereinafter, referred to as a display device 1) according to the 1st embodiment. As illustrated, an X direction, a Y direction, and a Z direction are defined. These X, Y, and Z directions are orthogonal to each other in the present embodiment, but can intersect at an angle other than perpendicular. Observation of the display device 1 and its constituent elements in parallel with the Z direction is referred to as planar observation. In addition, the direction indicated by the arrow of the Z direction is sometimes referred to as the upper side, and the opposite direction thereof is sometimes referred to as the lower side.

[0032] The display device 1 has a display panel 2 and a backlight 3. In the example of Figure 1 , the backlight 3 is a side edge type having a light guide LG opposed to the display panel 2 and a plurality of light emitting elements LS opposed to the side surface of the light guide LG. However, the structure of the backlight 3 is not limited to Figure 1 , as long as it is a structure for supplying light required for image display.

[0033] In the example of Figure 1 , the display panel 2 and the light guide LG are each formed in a rectangular shape having a short side in the X direction and a long side in the Y direction. The display panel 2 and the light guide LG are not limited to the rectangular shape, and can be other shapes.

[0034] The display panel 2 is a transmissive liquid crystal panel having a 1st substrate SUB1 (array substrate), a 2nd substrate SUB2 (counter substrate) opposed to the 1st substrate SUB1, and a liquid crystal layer LC enclosed between these substrates SUB1 and SUB2. The display panel 2 has a display region DA of, for example, a rectangular shape.

[0035] Further, the display device 1 has an optical sheet group 4, a 1st polarizing plate 5, and a 2nd polarizing plate 6. The optical sheet group 4 is disposed between the light guide LG and the display panel 2. For example, the optical sheet group 4 includes a diffusion sheet DF that diffuses light emitted from the light guide LG, and a 1st prism sheet PR1 and a 2nd prism sheet PR2 in which a plurality of prisms are formed.

[0036] A first polarizing plate 5 is disposed between the optical sheet group 4 and a first substrate SUB1. A second polarizing plate 6 is disposed above a second substrate SUB2. The polarization axis of the first polarizing plate 5 and the polarization axis of the second polarizing plate 6 are in an orthogonal Nicol relationship orthogonal to each other.

[0037] The display device 1 can be used, for example, for various devices such as a car navigation system, a smartphone, a tablet terminal, a portable telephone terminal, a personal computer, a television receiving device, a game device, and a head-mounted display that displays an image for VR (Virtual Reality).

[0038] Figure 2 is a schematic plan view of the display panel 2. The display panel 2 has a display region DA and a peripheral region SA around the display region DA. In Figure 2 In the example of

[0039] The display region DA has a plurality of pixels PX arranged in a matrix. The pixel PX includes a plurality of sub-pixels. In the present embodiment, as one example, the pixel PX includes a red sub-pixel SPR, a green sub-pixel SPG, and a blue sub-pixel SPB. However, the pixel PX can include a sub-pixel of another color such as white.

[0040] The display panel 2 has a plurality of scan lines G, a plurality of signal lines S (image lines), a first scan driver GD1, a second scan driver GD2, and a selector circuit ST. The plurality of scan lines G extend in the X direction and are arranged in the Y direction. The plurality of signal lines S extend in the Y direction and are arranged in the X direction. Each scan line G is connected to at least one of the first scan driver GD1 and the second scan driver GD2. Each signal line S is connected to the selector circuit ST.

[0041] In the example of Figure 2 In the example of

[0042] The flexible circuit substrate F inputs various signals transmitted from a substrate or the like of an electronic device in which the display device 1 is mounted to the controller CT. The controller CT supplies an image signal to the selector circuit ST and controls the first scan driver GD1, the second scan driver GD2, and the selector circuit ST on the basis of the input signals. The scan drivers GD1, GD2 supply a scan signal to each scan line G in turn. The selector circuit ST supplies the input image signal to the signal line S in turn.

[0043] The pixel PX includes a pixel electrode PE, a switching element SW (thin film transistor), and a common electrode CE to which a common voltage is supplied. The switching element SW is connected to the pixel electrode PE, the scan line G, and the signal line S, and supplies the image signal of the signal line S to the pixel electrode PE if a scan signal is supplied to the scan line G. The common electrode CE is formed so as to extend over a plurality of sub-pixels. If an image signal is supplied to the pixel electrode PE, a potential difference is formed between the pixel electrode PE and the common electrode CE, and an electric field generated thereby acts on the liquid crystal layer LC.

[0044] In the present embodiment, the scan line G, the signal line S, the first scan driver GD1, the second scan driver GD2, the selector circuit ST, the switching element SW, the pixel electrode PE, and the common electrode CE are all formed on the first substrate SUB1.

[0045] Figure 3 is a schematic plan view showing one example of the layout of the sub-pixels SPR, SPG, and SPB. A red color filter CFR is arranged at the sub-pixel SPR, a green color filter CFG is arranged at the sub-pixel SPG, and a blue color filter CFB is arranged at the sub-pixel SPB. In the present embodiment, the display device 1 has a COA (Color Filter on Array) configuration in which the color filters CFR, CFG, and CFB are all arranged on the first substrate SUB1.

[0046] In the example of Figure 3 In the example of

[0047] Further, the layout of the sub-pixels SPR, SPG, SPB and the color filters CFR, CFG, CFB is not limited to that illustrated here. For example, it is also possible that the sub-pixels SPR are arranged in columns in the Y direction, the sub-pixels SPG are arranged in columns in the Y direction, the sub-pixels SPB are arranged in columns in the Y direction, and the columns of sub-pixels SPR, the columns of sub-pixels SPG, and the columns of sub-pixels SPB are arranged in the X direction in that order.

[0048] Figure 4 is a schematic cross-sectional view of the display panel 2. The first substrate SUB1 has the signal line S, the switching element SW, the pixel electrode PE, the common electrode CE, and the color filters CFR, CFG, CFB described above. In Figure 4 is not shown in the cross section, but the first substrate SUB1 also has the scan line G described above.

[0049] Further, the first substrate SUB1 has the first insulating base material 10, the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, the fourth insulating layer 14, the organic insulating layer 15, the first alignment film 16, the metal layer ML, and the anti-reflection layer AR.

[0050] The first insulating base material 10 is formed of glass, for example, but can also be formed of a resin material such as polyimide. The insulating layers 11 to 14 are formed of an inorganic material such as silicon nitride or silicon oxide. The organic insulating layer 15 is formed of an organic material such as acrylic resin. The pixel electrode PE and the common electrode CE are formed of a transparent conductive material such as ITO. The scan line G, the signal line S, and the metal layer ML are formed of a metal material. The scan line G, the signal line S, and the metal layer ML can have a single-layer structure formed of a single metal material, or can have a multi-layer structure formed by laminating different kinds of metal materials.

[0051] The first insulating layer 11 covers the upper surface of the first insulating base material 10 (the surface on the second substrate SUB2 side). A semiconductor layer SC such as polysilicon, which the switching element SW has, is disposed on the first insulating layer 11. The second insulating layer 12 covers the semiconductor layer SC and the first insulating layer 11.

[0052] Although not shown in the cross section of Figure 4 is not shown in the cross section, but the scan line G is disposed on the second insulating layer 12. The scan line G and the semiconductor layer SC cross at least once. The third insulating layer 13 covers the scan line G and the second insulating layer 12. The signal line S is disposed on the third insulating layer 13. The signal line S contacts the semiconductor layer SC through a contact hole that penetrates the second insulating layer 12 and the third insulating layer 13.

[0053] A color filter CFR, CFG, CFB is disposed on the signal line S and the third insulating layer 13. An organic insulating layer 15 covers the color filters CFR, CFG, CFB. The color filters CFR, CFG, CFB and the organic insulating layer 15 are formed thicker than the other insulating layers 11 to 14. The organic insulating layer 15 flattens the unevenness generated by the switching element SW, the color filters CFR, CFG, CFB.

[0054] A pixel electrode PE is disposed on the organic insulating layer 15. The pixel electrode PE contacts the semiconductor layer SC through a contact hole (contact hole CH1 shown) that penetrates the organic insulating layer 15. Another conductive layer can be interposed between the pixel electrode PE and the semiconductor layer SC. The pixel electrode PE of each sub-pixel opposes the color filters CFR, CFG, CFB. Figure 6

[0055] The fourth insulating layer 14 covers the pixel electrode PE and the organic insulating layer 15. A metal layer ML and a common electrode CE are disposed on the fourth insulating layer 14. The common electrode CE has a slit SL that overlaps the color filters CFR, CFG, CFB in the Z direction and opposes the pixel electrode PE.

[0056] The upper surface of the metal layer ML is covered with an antireflection layer AR. The metal layer ML and the antireflection layer AR are covered with the common electrode CE. The common electrode CE is covered with the first alignment film 16.

[0057] The second substrate SUB2 has a second insulating substrate 20 formed of the same material as the first insulating substrate 10 and a second alignment film 21 that covers the lower surface (the surface on the first substrate SUB1 side) of the second insulating substrate 20. The first substrate SUB1 and the second substrate SUB2 are bonded in the peripheral area SA by a ring-shaped sealing material. A liquid crystal layer LC is enclosed between the first substrate SUB1 and the second substrate SUB2.

[0058] If an image signal is supplied to the pixel electrode PE, an electric field is formed between the pixel electrode PE and the common electrode CE. This electric field acts on the liquid crystal layer LC through the slit SL, thereby controlling the alignment of the liquid crystal molecules included in the liquid crystal layer LC.

[0059] Figure 5 is a schematic cross-sectional view of the metal layer ML and the antireflection layer AR. In the example shown, the metal layer ML has a layered structure including a first layer L1, a second layer L2, and a third layer L3. The first layer L1 is formed thicker than the second layer L2 and the third layer L3, for example, by aluminum. The second layer L2 and the third layer L3 are formed of molybdenum, for example.

[0060] ​The anti-reflection layer AR covers the third layer L3. The anti-reflection layer AR suppresses reflection of light LT such as external light. The anti-reflection layer AR is formed of, for example, a metal oxide, a black resin, or the like, and has a lower reflectance than the upper surface of the metal layer ML (the surface of the third layer L3). As another example, the anti-reflection layer AR can have a plurality of layers having different refractive indexes, and reduce reflected light by interference of light reflected by the layers.

[0061] Figure 6 is a schematic plan view indicating a part of an element disposed in the display region DA in the first substrate SUB1. In this drawing, one sub-pixel is focused on, and two scan lines G extending in the X direction and a signal line S extending in the Y direction are shown.

[0062] The metal layer ML is in a lattice shape having a plurality of first portions MLx extending in the X direction and a plurality of second portions MLy extending in the Y direction. The first portions MLx overlap the scan lines G. The second portions MLy overlap the signal line S.

[0063] As described above, in the present embodiment, the metal layer ML is disposed at both the boundary between sub-pixels adjacent in the X direction and the boundary between sub-pixels adjacent in the Y direction. The anti-reflection layer AR is disposed with respect to the entirety of the metal layer ML including the first portions MLx and the second portions MLy.

[0064] In the example of Figure 6 , the width of the first portion MLx is smaller than the width of the scan line G. However, the width of the first portion MLx can also be equal to or greater than the width of the scan line G. In this case, the entirety of the scan line G can overlap the first portion MLx.

[0065] In addition, in the example of Figure 6 , the width of the second portion MLy is greater than the width of the signal line S, and the entirety of the signal line S overlaps the second portion MLy. However, the width of the second portion MLy can also be equal to or smaller than the width of the signal line S.

[0066] An opening APX surrounded by two first portions MLx adjacent to each other and two second portions MLy adjacent to each other is formed with respect to each sub-pixel. The pixel electrode PE overlaps a majority of the opening APX.

[0067] In a position overlapping the first portion MLx, a contact hole CH1 for connecting the pixel electrode PE and the semiconductor layer SC (see Figure 4 ) is formed. The contact hole CH1 penetrates the aforementioned organic insulating layer 15.

[0068] In the example of Figure 6In the example, one slit SL is provided in the region overlapping with the opening APX. The slit SL includes, for example, a plurality of portions inclined with respect to the X direction and the Y direction. Alternatively, a plurality of slits SL may be provided for the opening APX.

[0069] Figure 7 It is a schematic plan view showing a portion of the first substrate SUB1 in the peripheral area SA. Figure 8 It is along Figure 7 A schematic cross-sectional view of the first substrate SUB1 along line VIII-VIII in FIG. Figure 7 and Figure 8 As shown, the first substrate SUB1 includes a power supply line PL and a relay conductive layer RC1 (first relay conductive layer) in the peripheral area SA. The power supply line PL and the relay conductive layer RC1 are located below the common electrode CE and the metal layer ML.

[0070] For example, the power supply lines PL are formed to surround the display area DA along three sides of the first substrate SUB1, excluding the mounting area MA. A common voltage is supplied to the power supply lines PL. The relay conductive layer RC1 overlaps the power supply lines PL. Similar to the power supply lines PL, the relay conductive layer RC1 is formed to surround the display area DA along three sides of the first substrate SUB1, excluding the mounting area MA.

[0071] exist Figure 7 In the example of FIG, the first scanning driver GD1 is arranged between the power supply line PL and the display area DA. Figure 7 Although not shown, the second scanning driver GD2 is also arranged between the power supply line PL and the display area DA.

[0072] The common electrode CE is formed not only in the display area DA but also in the peripheral area SA. The common electrode CE overlaps the entire first scanning driver GD1 and also overlaps a portion of the power supply line PL and the relay conductive layer RC1.

[0073] The metal layer ML has a third portion MLs in the peripheral area SA. The third portion MLs overlaps the entire first scanning driver GD1 and also overlaps a portion of the power supply line PL and the relay conductive layer RC1.

[0074] That is, the end E1 (first end) of the common electrode CE and the end E2 (second end) of the third portion MLs are both located in the peripheral area SA. Figure 7 In the example of FIG. 5 , the end portion E2 is located between the end portion E1 and the display area DA.

[0075] The end portion E1 and the end portion E2 both overlap the power supply line PL and the relay conductive layer RC1. The end portion E1 is located between the end portion E2 and an end portion E3 of the power supply line PL. Further, the end portions E1, E2, E3 correspond to the common electrode CE, the metal layer ML, and the outer edge of the power supply line PL, respectively. The end portion of the relay conductive layer RC1 is substantially identical to the end portion E3. Figure 7 The relationship of the end portions E1, E2, E3 shown can also be applied to the vicinity of the other edges of the first substrate SUB1 other than the mounting area MA.

[0076] As shown in FIG. 6, the power supply line PL is disposed on the third insulating layer 13. In the peripheral area SA, the thickness of the organic insulating layer 15 gradually decreases toward the power supply line PL. The power supply line PL can be formed of the same metal material as the signal line S by the same process as the signal line S, for example. Figure 8

[0077] The relay conductive layer RC1 covers the upper surface of the power supply line PL. The relay conductive layer RC1 can be formed of the same transparent conductive material as the pixel electrode PE by the same process as the pixel electrode PE, for example. The fourth insulating layer 14 is also formed in the peripheral area SA, but does not cover the upper surface of the relay conductive layer RC1.

[0078] The third portion MLs is disposed on the fourth insulating layer 14, a part of which is located on the relay conductive layer RC1. The upper surface of the third portion MLs is covered by the anti-reflection layer AR as a whole. The common electrode CE covers the anti-reflection layer AR on the third portion MLs in the peripheral area SA. Further, the common electrode CE is located on the relay conductive layer RC1 between the end portion E2 of the third portion MLs and the end portion E3 of the power supply line PL.

[0079] That is, the common electrode CE is in contact with the upper surface of the relay conductive layer RC1 in the first area Al between the end portions E1, E2. Thus, the common electrode CE and the power supply line PL are connected via the relay conductive layer RC1, and the common voltage of the power supply line PL is supplied to the common electrode CE via the relay conductive layer RC1.

[0080] Further, the third portion MLs is in contact with the upper surface of the relay conductive layer RC1 in a second area A2 located between the first area Al and the display area DA. Thus, the metal layer ML and the power supply line PL are connected via the relay conductive layer RC1, and the common voltage of the power supply line PL is supplied to the metal layer ML via the relay conductive layer RC1.

[0081] ​In the above embodiment, the metal layer ML overlapping the scan line G and the signal line S is provided on the first substrate SUB1, and the upper surface of the metal layer ML is covered with the anti-reflection layer AR. Thus, reflection of external light caused by the scan line G, the signal line S, and the metal layer ML is suppressed, and therefore a display device 1 having excellent visual recognition of an image displayed in the display region DA can be obtained.

[0082] In addition, in the peripheral region SA, elements including a metal material such as the first scan driver GD1 also overlap the metal layer ML (the third portion MLs) and the anti-reflection layer AR. Thus, reflection of external light in the peripheral region SA can also be suppressed.

[0083] In the case where a color filter is formed on the array substrate, i.e., the first substrate SUB1, as in the present embodiment, if a light-blocking layer (black matrix) corresponding to the anti-reflection layer AR is provided on the second substrate SUB2, misalignment of the metal layer ML, the color filter, and the light-blocking layer can occur. If the structure of the present embodiment is employed, misalignment as described above can be suppressed.

[0084] In the present embodiment, the metal layer ML covered with the anti-reflection layer AR is also covered with the common electrode CE. In this structure, it can be difficult to ensure sufficient conduction of the common electrode CE and the metal layer ML in the display region DA. In addition, in the case where the metal layer ML covered with the anti-reflection layer AR is formed under the common electrode CE in the peripheral region SA, it is difficult to supply the common voltage of the power supply line PL to the common electrode CE.

[0085] In this regard, in the present embodiment, the end portion E2 of the metal layer ML is located between the end portion El of the common electrode CE and the display region DA, and thus both the metal layer ML and the common electrode CE are connected to the power supply line PL via the relay conductive layer RC1. If the structure as described above is employed, the common voltage of the power supply line PL can be supplied to both the common electrode CE and the metal layer ML.

[0086] [Second Embodiment]

[0087] The second embodiment will be described. The structure of the display device 1 not specifically mentioned is the same as that of the first embodiment.

[0088] Figure 9 is a schematic cross-sectional view of the first substrate SUB1 according to the second embodiment. Figure 9 The example of Figure 8 The example of differs from that of in that the width of the power supply line PL is smaller than the width of the relay conductive layer RC1.

[0089] Even if the width of the power supply line PL is small as described above, by providing the relay conductive layer RC1, the first region Al and the second region A2 can be ensured to be wide. Thereby, the common voltage can be favorably supplied from the power supply line PL to the common electrode CE and the metal layer ML.

[0090] [3rd Embodiment]

[0091] The 3rd embodiment will be described. The structure of the display device 1 not specifically mentioned is the same as that of the 1st embodiment.

[0092] Figure 10 is a schematic cross-sectional view of the 1st substrate SUB1 related to the 3rd embodiment. Figure 10 The example of Figure 8 differs from the example of in that the relay conductive layer RC1 is not disposed in the peripheral region SA. The common electrode CE contacts the upper surface of the power supply line PL in the first region Al. The 3rd portion MLs of the metal layer ML contacts the upper surface of the power supply line PL in the second region A2.

[0093] As described above, even if the relay conductive layer RC1 is not disposed, the common voltage can be supplied from the power supply line PL to the common electrode CE and the metal layer ML.

[0094] [4th Embodiment]

[0095] The 4th embodiment will be described. In this embodiment, a configuration for making the common electrode CE and the metal layer ML conductive in the display region DA is disclosed. The structure of the display device 1 not specifically mentioned is the same as that of the 1st embodiment.

[0096] Figure 11 is a schematic plan view showing a part of the elements disposed in the 1st substrate SUB1 related to the 4th embodiment. Figure 12 is a schematic cross-sectional view of the 1st substrate SUB1 along the XII-XII line in Figure 11 . Figure 11 The example of Figure 12 differs from the example of Figure 6 in that the relay conductive layer RC2 (2nd relay conductive layer) is further disposed.

[0097] The relay conductive layer RC2 is disposed, for example, in the vicinity of a portion where the scan line G and the signal line S cross. In the example of Figure 11 , the relay conductive layer RC2 is in a trapezoidal shape and overlaps the 2nd portion MLy of the metal layer ML.

[0098] As described above, Figure 12As shown, the relay conductive layer RC2 is provided on the organic insulating layer 15 (in the same layer as the pixel electrode PE) so as to be separated from the pixel electrode PE. The relay conductive layer RC2 can be formed of a transparent conductive material such as ITO. In one example, the relay conductive layer RC2 and the pixel electrode PE are formed by the same process.

[0099] The fourth insulating layer 14 has an opening AP at a position overlapping the relay conductive layer RC2. The metal layer ML (the second portion MLy) and the common electrode CE contact the relay conductive layer RC2 through the opening AP. In the structure described above, the common electrode CE and the metal layer ML are well conducted via the relay conductive layer RC2.

[0100] Further, in the above-described Figure 6 In the above-described Figure 11 In the example of the present embodiment, the pixel electrode PE has an inclined side IS1 inclined with respect to the X direction and the Y direction at a corner portion. Also, the relay conductive layer RC2 has an inclined side IS2 facing the inclined side IS1. The inclined side IS2 is separated from the inclined side IS1 and is parallel to the inclined side IS1.

[0101] If the structure described above is employed, the area of the relay conductive layer RC2 can be ensured to be large, and the distance between the relay conductive layer RC2 and the slit SL can be kept large, for example, as compared with the case where the relay conductive layer RC2 is rectangular without the inclined side IS2. Thus, display failure caused by the relay conductive layer RC2 can be suppressed.

[0102] Further, the relay conductive layer RC2 can be provided one for each of all the sub-pixels included in the display region DA, or can be provided in proportion to the number of sub-pixels per relay conductive layer RC2. Alternatively, a plurality of relay conductive layers RC2 can be provided for one sub-pixel.

[0103] If the structure of the present embodiment is employed, the common electrode CE and the metal layer ML are well conducted in the display region DA. Thus, the resistance of the common electrode CE formed of a transparent conductive material can be reduced. Further, in the case where the relay conductive layer RC2 is formed by the same process as the pixel electrode PE, there is no need to add a process for forming the relay conductive layer RC2.

[0104] [5th Embodiment]

[0105] The 5th embodiment will be described. The structure of the display device 1 not specifically mentioned is the same as that of the 4th embodiment.

[0106] Figure 13 is a schematic cross-sectional view of the 1st substrate SUB1 according to the present embodiment. InFigure 13 In the example of FIG4 , the relay conductive layer RC2 is disposed on the fourth insulating layer 14, and the metal layer ML (second portion MLy) is disposed on the relay conductive layer RC2. The relay conductive layer RC2 has a region not covered by the metal layer ML, and the common electrode CE contacts this region. As in the fourth embodiment, the relay conductive layer RC2 can be formed of a transparent conductive material.

[0107] Even in the structure of this embodiment, in the display area DA, the common electrode CE and the metal layer ML are well connected via the relay conductive layer RC2. Moreover, since the pixel electrode PE and the relay conductive layer RC2 are located in different layers, a short circuit between the two can be suppressed. Figure 13 As shown, a structure in which a portion of the pixel electrode PE faces the relay conductive layer RC2 may also be adopted.

[0108] [Sixth embodiment]

[0109] A sixth embodiment will be described. This embodiment discloses another structure for electrically connecting the common electrode CE and the metal layer ML in the display area DA. The same structure as in the above embodiments can be applied to the structure of the display device 1 unless otherwise mentioned.

[0110] Figure 14 It is a schematic plan view of the metal layer ML according to the present embodiment, the scanning line G, and the signal line S. In the present embodiment, the anti-reflection layer AR has a plurality of contact holes CH2.

[0111] exist Figure 14 In the example shown in FIG. 1 , each contact hole CH2 is formed at the intersection of the scan line G and the signal line S (where the first portion MLx and the second portion MLy of the metal layer ML are connected). Two adjacent contact holes CH2 in the X direction are separated by a distance equivalent to three sub-pixels. Two adjacent contact holes CH2 in the Y direction are also separated by a distance equivalent to three sub-pixels. However, the arrangement of the contact holes CH2 is not limited to this example.

[0112] Figure 15 It is along Figure 14 A schematic cross-sectional view of the display panel 2 taken along line XV-XV in FIG. Contact hole CH2 forms an exposed area EA on the upper surface of the metal layer ML, not covered by the antireflection layer AR. The common electrode CE contacts the exposed area EA. In other words, the common electrode CE is electrically connected to the metal layer ML through the contact hole CH2.

[0113] Furthermore, in this embodiment, a columnar spacer PS is provided opposite to the exposed area EA. The spacer PS is formed of a light-shielding material such as black resin and is located between the first substrate SUB1 and the second substrate SUB2.Figure 14 As shown, the spacers PS are provided for each contact hole CH2.

[0114] As one example, the spacers PS are formed on the first substrate SUB1, and the leading ends contact the second substrate SUB2. As another example, the spacers PS can be formed on the second substrate SUB2, and the leading ends contact the first substrate SUB1.

[0115] If the structure is as described above, the common electrode CE and the metal layer ML are in good conduction through the contact hole CH2. Also, the light-shielding spacers PS are positioned above the contact hole CH2, so the reflection of external light from the surface of the metal layer ML exposed from the contact hole CH2 is suppressed.

[0116] [7th Embodiment]

[0117] The 7th embodiment will be described. The structure of the display device 1 not specifically mentioned is the same as that of the 6th embodiment.

[0118] Figure 16 is a schematic cross-sectional view of the display panel 2 according to the present embodiment. In Figure 16 In the example of

[0119] The planar shape of the light-shielding layer LS is, for example, the same as that of the spacers PS shown in Figure 14 That is, the light-shielding layer LS is not disposed entirely above the metal layer ML, but is disposed in an island shape at a position overlapping the contact hole CH2.

[0120] Even with the structure of the present embodiment, the common electrode CE and the metal layer ML are in good conduction through the contact hole CH2, and the reflection of external light caused by the exposed area EA can be suppressed.

[0121] [8th Embodiment]

[0122] The 8th embodiment will be described. The same structure as that of each of the above embodiments can be applied to the structure of the display device 1 not specifically mentioned.

[0123] Figure 17 is a schematic cross-sectional view of the first substrate SUB1 according to the present embodiment. In Figure 17 In the example of

[0124] If the structure is as described above, the common electrode CE can be connected to the metal layer ML without being hindered by the anti-reflection layer AR which is covered with the metal layer ML.

[0125] [9th Embodiment]

[0126] The 9th embodiment will be described. The same structure as that of each of the above embodiments can be applied to the structure of the display device 1 which is not particularly mentioned.

[0127] Figure 18 is a schematic cross-sectional view of the 1st substrate SUB1 according to the present embodiment. In Figure 18 In the example of, the common electrode CE is disposed on the organic insulating layer 15, and is covered with the 4th insulating layer 14. Also, the pixel electrode PE is disposed on the 4th insulating layer 14, and is covered with the 1st alignment film 16.

[0128] The metal layer ML is disposed on the organic insulating layer 15, and is covered with the anti-reflection layer AR. The anti-reflection layer AR is covered with the common electrode CE.

[0129] Thus, even in the case where the pixel electrode PE is located above the common electrode CE, the structure according to each of the above embodiments can be applied.

[0130] Further, in each of the embodiments, the case where the metal layer ML has the 1st portion MLx which overlaps with the scan line G and the 2nd portion MLy which overlaps with the signal line S is exemplified. As another example, the metal layer ML can have only one of the 1st portion MLx and the 2nd portion MLy.

[0131] In addition, in each of the embodiments, the case where the 1st substrate SUB1 is provided with the color filters CFR, CFG, CFB is exemplified. As another example, the color filters CFR, CFG, CFB can be provided to the 2nd substrate SUB2.

[0132] The above, based on the display device according to the embodiments of the present application, all the display devices which can be implemented by the person skilled in the art with appropriate design changes, as long as they include the gist of the present application, also belong to the scope of the present application.

[0133] In the scope of the idea of the present application, various modifications can be conceived by the person skilled in the art, and these modifications are also interpreted as belonging to the scope of the present application. For example, a mode obtained by the person skilled in the art with appropriate addition, deletion, or design change of the constituent elements or with addition, omission, or condition change of the steps with respect to the above embodiments, as long as it has the gist of the present application, is also included in the scope of the present application.

[0134] In addition, other effects brought about by the modes described in the above-described embodiments, modes that become clear according to the description of this specification, or modes that can be appropriately thought of by those skilled in the art are, of course, brought about by the present application.

[0135] An example of a display device that can be obtained according to the above-described embodiments will be described below. [1]

[0137] A display device, wherein:

[0138] a display region including a pixel;

[0139] a peripheral region of a periphery of the display region;

[0140] a pixel electrode disposed in the pixel;

[0141] a switching element connected to the pixel electrode;

[0142] a scan line that supplies a scan signal to the switching element;

[0143] a signal line that supplies an image signal to the switching element;

[0144] a metal layer that overlaps at least one of the signal line and the scan line;

[0145] an antireflection layer that covers the metal layer;

[0146] a common electrode that covers the antireflection layer; and

[0147] a power supply line disposed in the peripheral region that is supplied with a common voltage,

[0148] the common electrode and the metal layer are connected to the power supply line in the peripheral region. [2]

[0150] The display device described in the above [1], wherein:

[0151] the common electrode has a first end portion located in the peripheral region,

[0152] the metal layer has a second end portion located in the peripheral region,

[0153] the second end portion is located between the first end portion and the display region. [3]

[0155] The display device described in the above [1] or [2], wherein:

[0156] Further has a first relay conductive layer, the first relay conductive layer is arranged in the peripheral region, and contacts the power supply line,

[0157] The power supply line and the first relay conductive layer are located below the metal layer and the common electrode,

[0158] The metal layer and the common electrode contact the upper surface of the first relay conductive layer. [4]

[0160] The display device described in the above [3], wherein,

[0161] The peripheral region has:

[0162] A first region, the common electrode contacts the first relay conductive layer; and

[0163] A second region, the metal layer contacts the first relay conductive layer,

[0164] The second region is located between the first region and the display region. [5]

[0166] The display device described in any one of the above [1] to [4], wherein,

[0167] Further has a second relay conductive layer, the second relay conductive layer is arranged in the display region, and contacts the metal layer and the common electrode. [6]

[0169] The display device described in the above [5], wherein,

[0170] Further has an insulating layer, the insulating layer is located between the pixel electrode and the common electrode,

[0171] The second relay conductive layer and the pixel electrode are arranged in the same layer,

[0172] The insulating layer has an opening overlapping the second relay conductive layer,

[0173] The common electrode and the metal layer contact the second relay conductive layer through the opening. [7]

[0175] The display device described in the above [5], wherein,

[0176] Further has an insulating layer, the insulating layer is located between the pixel electrode and the common electrode,

[0177] The common electrode and the second relay conductive layer are arranged on the insulating layer,

[0178] The metal layer is disposed on the second relay conductive layer. [8]

[0180] The display device described in any one of [1] to [7], in which

[0181] The metal layer has an exposed region not covered by the anti-reflection layer,

[0182] The common electrode is in contact with the exposed region. [9]

[0184] The display device described in [8], in which

[0185] The exposed region is disposed at a position where the scan line and the signal line cross.

[10]

[0187] The display device described in [8] or [9], in which

[0188] A first substrate including the pixel electrode, the switching element, the scan line, the signal line, the metal layer, the anti-reflection layer, the common electrode, and the power supply line;

[0189] A second substrate facing the first substrate; and

[0190] A light-shielding spacer between the first substrate and the second substrate, facing the exposed region.

[11]

[0192] The display device described in [8] or [9], in which

[0193] A first substrate including the pixel electrode, the switching element, the scan line, the signal line, the metal layer, the anti-reflection layer, the common electrode, and the power supply line;

[0194] A second substrate facing the first substrate; and

[0195] A light-shielding layer disposed on the second substrate, facing the exposed region.

[12]

[0197] The display device described in

[10] or

[11] , in which

[0198] The first substrate further has a color filter facing the pixel electrode.

[13]

[0200] A display device, in which

[0201] a display region including a pixel;

[0202] a pixel electrode disposed in the pixel;

[0203] a switching element connected to the pixel electrode;

[0204] a scan line supplying a scan signal to the switching element;

[0205] a signal line supplying an image signal to the switching element;

[0206] a metal layer overlapping at least one of the signal line and the scan line;

[0207] an anti-reflection layer covering the metal layer;

[0208] a common electrode covering the anti-reflection layer; and

[0209] a relay conductive layer disposed in the display region and in contact with the metal layer and the common electrode.

[14]

[0211] the display device described in

[13] , wherein

[0212] further comprising an insulating layer between the pixel electrode and the common electrode,

[0213] the relay conductive layer and the pixel electrode are disposed in the same layer,

[0214] the insulating layer has an opening overlapping the relay conductive layer,

[0215] the common electrode and the metal layer are in contact with the relay conductive layer through the opening.

[15]

[0217] the display device described in

[13] , wherein

[0218] further comprising an insulating layer between the pixel electrode and the common electrode,

[0219] the common electrode and the relay conductive layer are disposed on the insulating layer,

[0220] the metal layer is disposed on the relay conductive layer.

[16]

[0222] a display device, comprising:

[0223] a display region including a pixel;

[0224] a pixel electrode disposed in the pixel;

[0225] a switching element connected to the pixel electrode;

[0226] a scan line supplying a scan signal to the switching element;

[0227] a signal line supplying an image signal to the switching element;

[0228] a metal layer overlapping at least one of the signal line and the scan line;

[0229] an anti-reflection layer covering the metal layer; and

[0230] a common electrode covering the anti-reflection layer,

[0231] the metal layer has an exposed region not covered by the anti-reflection layer,

[0232] the common electrode is in contact with the exposed region.

[17]

[0234] the display device described in

[16] , wherein

[0235] the exposed region is provided at a position where the scan line and the signal line cross.

[18]

[0237] the display device described in

[16] or

[17] , wherein

[0238] a first substrate including the pixel electrode, the switching element, the scan line, the signal line, the metal layer, the anti-reflection layer, and the common electrode;

[0239] a second substrate facing the first substrate; and

[0240] a light-shielding spacer between the first substrate and the second substrate, facing the exposed region.

[19]

[0242] the display device described in

[16] or

[17] , wherein

[0243] a first substrate including the pixel electrode, the switching element, the scan line, the signal line, the metal layer, the anti-reflection layer, and the common electrode;

[0244] a second substrate facing the first substrate; and

[0245] a light-shielding layer provided to the second substrate, facing the exposed region.

[20]

[0247] The display device described in

[18] or

[19] above, wherein

[0248] The first substrate further has a color filter opposite to the pixel electrode.

Claims

1. A display device, wherein: have: 1st substrate; a second substrate facing the first substrate; and a light shielding layer provided on the second substrate, The first substrate has: Display area, containing pixels; a peripheral area around the display area; a pixel electrode, disposed on the pixel; a switching element connected to the pixel electrode; a scanning line for supplying a scanning signal to the switching element; a signal line for supplying an image signal to the switching element; a metal layer overlapping at least one of the signal line and the scan line; an anti-reflection layer, covering the metal layer; a common electrode, covering the anti-reflection layer; as well as The power supply line is arranged in the peripheral area and is supplied with a common voltage. The common electrode and the metal layer are connected to the power supply line in the peripheral area. The metal layer has an exposed area not covered by the anti-reflection layer, The common electrode is in contact with the exposed area, The light shielding layer is opposite to the exposed area.

2. The display device according to claim 1, wherein The common electrode has a first end portion located in the peripheral region, The metal layer has a second end portion located in the peripheral region, The second end portion is located between the first end portion and the display area.

3. The display device according to claim 1, wherein It also includes a first relay conductive layer, which is arranged in the peripheral area and contacts the power supply line. The power supply line and the first relay conductive layer are located below the metal layer and the common electrode. The metal layer and the common electrode are in contact with the upper surface of the first relay conductive layer.

4. The display device according to claim 3, wherein: The surrounding area has: a first region where the common electrode contacts the first relay conductive layer; and In the second region, the metal layer is in contact with the first relay conductive layer. The second area is located between the first area and the display area.

5. The display device according to claim 1, wherein A second relay conductive layer is further provided. The second relay conductive layer is arranged in the display region and is in contact with the metal layer and the common electrode.

6. The display device according to claim 5, wherein: It also has an insulating layer, which is located between the pixel electrode and the common electrode. The second relay conductive layer and the pixel electrode are arranged on the same layer. The insulating layer has an opening overlapping with the second relay conductive layer. The common electrode and the metal layer are in contact with the second relay conductive layer through the opening.

7. The display device according to claim 5, wherein: It also has an insulating layer, which is located between the pixel electrode and the common electrode. The common electrode and the second relay conductive layer are arranged on the insulating layer. The metal layer is disposed on the second relay conductive layer.

8. The display device according to claim 1, wherein The exposed area is provided at a position where the scanning line and the signal line intersect.

9. The display device according to claim 1, wherein: A spacer having a light-shielding property is located between the first substrate and the second substrate and faces the exposed region.

10. The display device according to claim 9, wherein The first substrate further includes a color filter facing the pixel electrode.

11. A display device, wherein: have: 1st substrate; a second substrate facing the first substrate; and a light shielding layer provided on the second substrate, The first substrate has: Display area, containing pixels; a pixel electrode, disposed on the pixel; a switching element connected to the pixel electrode; a scanning line for supplying a scanning signal to the switching element; a signal line for supplying an image signal to the switching element; a metal layer overlapping at least one of the signal line and the scan line; an anti-reflection layer, covering the metal layer; as well as A common electrode covers the anti-reflection layer, The metal layer has an exposed area not covered by the anti-reflection layer, The common electrode is in contact with the exposed area, The light shielding layer is opposite to the exposed area.

12. The display device according to claim 11, wherein The exposed area is provided at a position where the scanning line and the signal line intersect.

13. The display device according to claim 11, wherein: A spacer having a light-shielding property is located between the first substrate and the second substrate and faces the exposed region.

14. The display device according to claim 13, wherein: The first substrate further includes a color filter facing the pixel electrode.

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