A method for generating chip layout images based on boundary tracking scan line algorithm

By optimizing chip layout processing through a boundary tracking scan line algorithm, binary images can be generated quickly, solving the problems of generation accuracy and efficiency in existing technologies, and achieving efficient chip layout segmentation and image generation.

CN120259463BActive Publication Date: 2025-11-14GUANGZHOU INSTITUTE OF TECHNOLOY XIDIAN UNIVERSITY +1
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Patent Information

Application Number
CN202510325427.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-03-19
Publication Date
2025-11-14
Estimated Expiration
2045-03-19

AI Technical Summary

Technical Problem

In current chip layout processing, the high precision requirements, high polygon complexity, and large data volume of binary image generation lead to long solution times and a lack of practical solutions for fast segmentation and generation of binary images.

Method used

By adopting a boundary tracking scanline algorithm, a subgraph-polygon data structure is designed by constructing key-value pairs of subgraph index and polygon index, improving the scanline algorithm, quickly dividing subgraphs of a specified size and generating binary images, reducing intersection calculation time, and optimizing the boundary tracking method.

Benefits of technology

It enables the rapid segmentation of molecular maps from massive polygonal data and the generation of binary images, reducing computational complexity and improving generation efficiency, and is suitable for processing complex chip layout data.

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Abstract

This invention discloses a chip layout image generation method based on a boundary tracking scan line algorithm. By designing a sub-image-polygon data structure and establishing a maximum matrix of adjacent polygons in the sub-image, this method improves the boundary scan line algorithm to quickly segment the complete chip layout into sub-images and generate corresponding binary images. The algorithm designs a sub-image bounding box-polygon bounding box data structure to quickly locate which polygons are most likely to intersect with the sub-image. Saving this data constructs the maximum bounding box of all polygons contained in the current sub-image, eliminating the need for the algorithm to calculate the intersection points of polygons with the sub-image, thus reducing the time consumption for intersection point calculation. Furthermore, a boundary tracking method is designed to improve the scan line algorithm. By saving each point in the boundary, when scanning a row, it is not necessary to calculate the intersection points of the scan line and the polygon boundary, further reducing the algorithm complexity.
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Description

Technical Field

[0001] This invention belongs to the field of chip layout image processing technology, and particularly relates to a chip layout image generation method based on a boundary tracking scan line algorithm. Background Technology

[0002] With the continuous advancement of semiconductor manufacturing technology, the complexity of modern circuit design and process steps is constantly increasing, posing significant challenges to mask optimization technology. Traditional mask optimization methods rely on empirical formulas and rules, which can solve some problems to a certain extent, but their limitations become increasingly apparent when faced with increasingly complex circuit designs and process requirements. Traditional mask optimization methods mainly include the following: geometry-based optimization, rule-based optimization, and simulation-based optimization. These methods often require significant manual intervention and are time-consuming, making it difficult to meet the demands of efficient and high-precision design. Furthermore, as feature sizes continue to shrink, traditional optimization methods often fall short of expectations when handling nanoscale circuits.

[0003] With advancements in computing hardware and the rapid development of deep learning technology, researchers have begun exploring the possibility of combining Inverse Lithography (ILT) with GPU acceleration and deep learning models. Existing methods rely on input data in pixel-level format, meaning they require processing large amounts of raw image data. In image recognition and deep learning, pixel-level input is the most fundamental data form, directly feeding raw images or video frames as state inputs into neural networks. While this method of directly using pixel values ​​is data-intensive, it provides the richest information, allowing models to capture subtle features and patterns in images. However, this also presents challenges. In actual chip layout data, a 0.5mm x 0.5mm chip data block typically contains over a million polygons, and a 5mm x 5mm chip layer contains approximately 100 million polygons. How to quickly obtain the corresponding pixel-level image input from chip layout data has become a crucial step in using deep learning to solve mask optimization problems. Currently, research on rapidly segmenting actual chip layouts and generating binary images in the field of chip layout processing is relatively scarce. Existing research papers are based on open-source data that is either already in good condition or pre-segmented polygon vertex data. There is a lack of practical solutions that start from the actual map, segment and generate binary images from a large amount of polygon data.

[0004] Therefore, we propose a method for fast chip layout segmentation and binary image generation based on the boundary tracking scan line algorithm. By constructing a data structure and improving the scan line algorithm, we can quickly divide the huge chip design layout into sub-images of a specified size and generate the corresponding binary images. Summary of the Invention

[0005] To address the problems existing in the prior art, this invention provides a chip layout image generation method based on the boundary tracking scan line algorithm, which solves the problems of high accuracy requirements, high polygon complexity, large data volume, and long solution time in the current artificial intelligence image algorithm processing of chip layout mask optimization.

[0006] The technical solution of this invention is implemented as follows:

[0007] A method for generating chip layout images based on a boundary tracking scan line algorithm includes the following steps:

[0008] S1. Read the chip layout data and preprocess it to generate key-value pairs of sub-graph index and polygon index;

[0009] S2. Based on the key-value pairs of the subgraph index and the polygon index, construct the largest matrix M of the polygons contained in and adjacent to the subgraph;

[0010] S3. Using the tracing scan line algorithm, obtain the coordinates of the vertices and edges of the polygons adjacent to the subgraph, traverse the vertices of the polygons, insert the edge data into the vertical edge dictionary and the horizontal edge list to fill them, and assign values ​​to the largest matrix M in S2 to obtain the assigned matrix.

[0011] S4. Based on the relative positions of the subgraphs, read and save the subgraph matrix;

[0012] S5. Loop through each sub-image, execute steps S2-24 for each sub-image, obtain the matrix of all sub-images in the chip layout and save it to get the final image.

[0013] Furthermore, S1 specifically includes:

[0014] Read the chip layout data. The chip layout includes multiple polygons. Construct a Cartesian coordinate system, storing the coordinates of the polygon vertices as coordinates. Obtain the outer bounding box coordinates of the entire chip layout, which is (x...). min y min x max y max ),

[0015] Where, x min This represents the minimum x-coordinate value of all polygons in the current chip layout, y min This represents the minimum y-coordinate value of all polygons in the current chip layout. max This represents the maximum x-coordinate value of all polygons in the current chip layout, y min This represents the maximum y-coordinate value of all polygons in the current chip layout;

[0016] Set the sub-figure size to H to divide the chip layout into multiple identical sub-figures.

[0017] Furthermore, the chip layout is divided into multiple identical sub-layouts, specifically as follows:

[0018] Expand the left and right sides of the chip layout outwards so that the chip layout is divisible by the size of the sub-graph, i.e.:

[0019] clip len =x max -x min ;

[0020]

[0021] j right =j x -j left ;

[0022] Among them, clip len j represents the length of the horizontal axis of the chip layout. x j represents the length required to extend the chip layout to the left and right sides, which is divisible by the size of the subgraph. left j represents the length by which the chip layout extends to the left. right Indicates the length by which the chip layout extends to the right;

[0023] Based on the calculation method for extending the chip layout to the left and right, the top and bottom ends of the chip layout are extended outwards so that the chip layout is divisible by the size of the sub-graph, thus obtaining the upward extension length j of the chip layout. up The length j of the chip layout extending downwards down This divides the chip layout into multiple identical sub-maps.

[0024] Furthermore, based on the expanded chip layout and the divided sub-graphs, the coordinates of the outer bounding box (tile) of each sub-graph are obtained. xmin , tile xmin , tile xmin , tile xmin );

[0025] Among them, tile xmin This indicates the minimum x-coordinate value of the outer frame of the subplot; tile xmin This indicates the minimum y-coordinate value of the outer bounding box of the subplot; tile xmin This indicates the maximum x-coordinate value of the outer frame of the subplot; tile xmin This indicates the maximum ordinate value of the outer bounding box of the subplot;

[0026] Get the vertex coordinates P of all polygons all =[(P 11 P12 ...P 1q ), (P 21 P 22 ...P 2q ), ... (P p1 P p2 ...P pq )], P all Represents the set of sequences of vertex coordinates of all polygons, (P p1 P p2 ...P pq Let P represent the set of sequence coordinates of the vertices of the P-th polygon. pq This represents the coordinates of one of the vertices of the P-th polygon. Starting from the coordinates of any vertex of any polygon, we can traverse all the vertices of the polygon in a clockwise or counterclockwise direction to obtain a sequence of vertex coordinates of one of the polygons.

[0027] Iterate through the vertex coordinates of each polygon to obtain a sequence set of vertex coordinates for all polygons. Then, further obtain the bounding box rectangle coordinates of all polygon vertices (polygen). xmin , polygen ymin , polygen xmax , polygen ymax );

[0028] Among them, polygen xmin This represents the minimum x-coordinate of the bounding rectangle of the polygon's vertices;

[0029] polygen ymin The minimum y-coordinate value of the bounding rectangle of the polygon's vertices; polygen xmax This represents the maximum x-coordinate of the bounding rectangle of the polygon's vertices; polygen ymax This represents the maximum ordinate value of the bounding rectangle of the polygon's vertices;

[0030] Based on the bounding box coordinates of the subgraphs and the bounding box rectangle coordinates of the polygon vertices, initialize an array Tilepolygondict with the bounding box coordinates of all subgraphs as keys and empty values.

[0031] Furthermore, based on the coordinates of the outer bounding rectangle of the polygon's vertices, the subgraphs contained within the polygon are calculated using the following formula:

[0032]

[0033] Among them, row min *H, row min *H,col min *H,colmax *H represents the index position of the bounding rectangle coordinates of the polygon vertices within the subgraph, and H is the size of the subgraph. min row max ,col min ,col max As an intermediate reference value, through row min row max ,col min ,col max The value determines the subgraph index position;

[0034] By filling the array Tilepolygondict with data, the index positions of the outer bounding rectangle coordinates of the polygon vertices under the subgraph are obtained as follows:

[0035]

[0036] Where i represents from row min Start retrieving values, up to row max k indicates from col min Start retrieving values, up to col max idx polygen Represents the index of a polygon vertex, append(idx) polygen This indicates that the polygon index value is added to the subgraph index key; thus generating a key-value pair between the subgraph index and the polygon index.

[0037] Furthermore, the subgraph index is the bounding box coordinates of all subgraphs, and the polygon index is the vertex coordinates P of the polygon among all polygons. all The position in the middle.

[0038] Furthermore, S2 specifically includes:

[0039] S2.1. Obtain the subgraph index and read the polygons contained in the subgraph in the array Tilepolygondict;

[0040] S2.2 Calculate the minimum bounding box of the polygon-subgraph. The minimum bounding box of the polygon-subgraph is the minimum bounding box coordinates of all bounding box rectangles that simultaneously contain the vertices of the polygon, and the bounding box coordinates of the subgraph. That is:

[0041] out xmin =min(polygens_x,tile_x);

[0042] out ymin =min(polygens_y,tile_y);

[0043] out xmax= max(polygens_x, tile_x);

[0044] out ymax =max(polygens_y,tile_y);

[0045] Among them, out xmin This represents the minimum x-coordinate of the smallest outer bounding box of the polygon-subgraph; out ymin This represents the minimum y-coordinate value of the minimum bounding box of the polygon-subgraph; out xmax This represents the maximum x-coordinate value of the minimum bounding box of the polygon-subgraph; out ymax This represents the maximum ordinate value of the minimum outer bounding box of the polygon-subgraph;

[0046] polygens_x represents the x-coordinate of the current polygon; polygens_y represents the y-coordinate of the current polygon; tile_x represents the x-coordinate of the subplot; tile_y represents the y-coordinate of the subplot.

[0047] Build row length OUT ymax -out ymin The column length is out xmax -out xmin The zero matrix M is used for the tracking scan line algorithm to fill the interior of the polygon with a value of 1.

[0048] Furthermore, S3 specifically includes:

[0049] Define the sides of the polygon as [(x u ,y w ),(x v ,y z ], indicating from point (x u ,y w ) to point (x v ,y z The edge of x u x v The x-coordinate of any edge is represented by y. w y z It represents the position of the y-coordinate corresponding to any edge;

[0050] Starting with a sequence of coordinates of all polygon vertices, insert the data for each edge into a dictionary of vertical edges (dict). y list with horizontal border x Specifically, it includes:

[0051] The insertion method for vertical edges is to iterate through all points of the vertical edge except the top endpoint and store them in the vertical edge dictionary (dict).y ;

[0052] vertical dictionary (dict) y The structure is as follows: a list of x-axis coordinates sorted in ascending order, with the y-axis coordinate as the key. sortx For the value, construct a key-value pair;

[0053] For the vertical side [(x n ,y1),(x n When y2 is greater than y1, for each key from y1 to y2-1, insert the corresponding x-axis coordinate at the corresponding position according to the x-axis coordinate arrangement order. n Values, i.e., dict y [y1] = [...x n-1 x n x n+1 ...], dict y [y1+1]=[……x n-1 x n x n+1 ...]...dict y [y2-1]=[……x n-1 x n x n+1 ...], ignore y2;

[0054] Where x n y1 and y2 represent the values ​​of the x-coordinates of the vertical side, respectively;

[0055] At the same time, record the set of horizontal edges to obtain a list of horizontal edges. x , that is {[(x1,y1),(x2,y1)], [(x3,y2),(x4,y2)]......[(x n ,y t ),(x m ,y t )]};where t represents the number of horizontal sides, x1, x2, ... x n x m The x-coordinates of the horizontal lines are represented as y1, y2, ... y. t This represents the value of the ordinate in the horizontal line;

[0056] After traversing the vertex coordinates of all polygons, store the coordinates of the points on the boundaries of all vertical edges, and record the coordinate set of the points on each horizontal edge separately.

[0057] Furthermore, in S3, the data structure is traversed, that is, the vertical dictionary dict is traversed. y list with horizontal border x For the vertical dictionary dict yThe values ​​in each row are extracted without repetition, that is, the values ​​of two adjacent indices are obtained, and the points between the two values ​​are assigned a value of 1 in matrix M in sequence.

[0058] A r,y =1(o <r<q,o=S xi ,q=S xi+1 );

[0059] Among them, S xi Let S represent the xi-th element in S, where xi starts from 0 and has a step size of 2, meaning the next xi will have a value of 2. S represents the set of x-coordinates for any key y; A r,y This represents an element in matrix M with x-coordinate r and y-coordinate y;

[0060] Retrieve the list of horizontal edges x Each element, i.e., the set of coordinates of the points on each horizontal edge, is assigned a value of 1 to the points between each horizontal edge.

[0061] Furthermore, in step S4, after assigning values ​​to the matrix in S3, the corresponding subgraph matrix is ​​cropped according to the position of the subgraph, and the subgraph matrix is ​​saved as an image file.

[0062] Compared with the prior art, the present invention achieves the following beneficial effects:

[0063] This invention designs a subgraph-polygon data structure to establish the maximum matrix of adjacent polygons in the subgraph. It then uses this method to improve the boundary scan line algorithm, enabling rapid segmentation of a complete chip layout into subgraphs and generating the corresponding binary image. Existing technologies struggle with the large number of polygons in real-world chip layouts. This invention's algorithm designs a subgraph bounding box-polygon bounding box data structure to quickly locate which polygons are most likely to intersect with the subgraph. By storing this data, it constructs the maximum bounding box of all polygons contained in the current subgraph, eliminating the need for the algorithm to calculate intersection points and reducing the time spent on intersection point calculation.

[0064] Furthermore, this invention also designs a boundary tracking method, improving the scan line algorithm. By storing each point in the boundary, it eliminates the need to access the intersection of the scan line and the polygon boundary when scanning a row. The complexity is equal to the perimeter of the polygon's edges, thus obtaining the points that need to be filled in a row. Through innovative design of each key step, this invention provides a fast and feasible technical solution for obtaining sub-images from massive polygon data. Attached Figure Description

[0065] Figure 1 This is a flowchart of a chip layout image generation method based on a boundary tracking scan line algorithm provided in an embodiment of the present invention;

[0066] Figure 2 This is a schematic diagram of traversing the vertices of a polygon in an embodiment of the present invention;

[0067] Figure 3 This is a schematic diagram illustrating the process of taking and assigning values ​​to the vertical dictionary without repetition in an embodiment of the present invention;

[0068] Figure 4 This is a sub-image saved in a chip layout image generation method based on a boundary tracking scan line algorithm provided in an embodiment of the present invention. Detailed Implementation

[0069] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0070] Example

[0071] like Figures 1 to 4 A method for generating chip layout images based on a boundary tracking scan line algorithm includes the following steps:

[0072] S1. Read the chip layout data and preprocess it to generate key-value pairs of sub-graph index and polygon index; specifically including:

[0073] S1.1 Read the chip layout data. The chip layout includes multiple polygons. Construct a Cartesian coordinate system, storing the coordinates of the vertices of the polygons. Obtain the outer bounding box coordinates of the entire chip layout, which is (x...). min y min x max y max ),

[0074] Where, x min This represents the minimum x-coordinate value of all polygons in the current chip layout, y min This represents the minimum y-coordinate value of all polygons in the current chip layout. max This represents the maximum x-coordinate value of all polygons in the current chip layout, y min This represents the maximum y-coordinate value of all polygons in the current chip layout;

[0075] It is usually stored in OAS format, which is stored as the coordinates of the vertices of a polygon. The origin is at the bottom left corner, and the values ​​increase as you move to the right and upwards. (x) min ymin The polygon coordinates used for adjustment are unified to (x... min y min The smallest unit for normalizing polygon coordinates is the nanometer unit, with the origin as the origin.

[0076] Set the sub-map size to H, which is 2048 nanometers; divide the chip layout into multiple identical sub-maps. To ensure the overall chip layout is divisible by the sub-map size, expand the chip layout outwards.

[0077] Expand the left and right sides of the chip layout outwards so that the chip layout is divisible by the size of the sub-graph, i.e.:

[0078] clip len =x max -x min ;

[0079]

[0080] j right =j x -j left ;

[0081] Among them, clip len j represents the length of the horizontal axis of the chip layout. x j represents the length required to extend the chip layout to the left and right sides, which is divisible by the size of the subgraph. left j represents the length by which the chip layout extends to the left. right Indicates the length by which the chip layout extends to the right;

[0082] Similarly, for the y-coordinate, the same method is used to expand the layout area. That is, based on the calculation method for expanding the chip layout to the left and right, the top and bottom ends of the chip layout are expanded outwards so that the chip layout is divisible by the size of the sub-graph, thus obtaining the upward expansion length j of the chip layout. up The length j of the chip layout extending downwards down This divides the chip layout into multiple identical sub-maps.

[0083] Based on the expanded chip layout and the divided sub-graphs, obtain the bounding box coordinates of the sub-graphs (tiles). xmin , tile xmin , tile xmin , tile xmin );

[0084] Among them, tile xmin This indicates the minimum x-coordinate value of the outer frame of the subplot; tile xmin This indicates the minimum y-coordinate value of the outer bounding box of the subplot; tile xminThis indicates the maximum x-coordinate value of the outer frame of the subplot; tile xmin This indicates the maximum ordinate value of the outer bounding box of the subplot;

[0085] After expanding the layout size, the position coordinates of the corresponding tiles can be constructed, such as (0, 0, 2047, 2047); (tilexmin, tilexmin, tilexmin, tilexmin) represents the outer bounding coordinates of any tile.

[0086] Get the vertex coordinates P of all polygons all =[(P 11 P 12 ...P 1q ), (P 21 P 22 ...P 2q ), ... (P p1 P p2 ...P pq )], P all Represents the set of sequences of vertex coordinates of all polygons, (P p1 P p2 ...P pq Let P represent the set of sequence coordinates of the vertices of the P-th polygon. pq This represents the coordinates of one of the vertices of the P-th polygon. Starting from the coordinates of any vertex of any polygon, we can traverse all the vertices of the polygon in a clockwise or counterclockwise direction to obtain a sequence set of vertex coordinates of one of the polygons.

[0087] Iterate through the vertex coordinates of each polygon to obtain a sequence set of vertex coordinates for all polygons. Then, further obtain the bounding box rectangle coordinates of all polygon vertices (polygen). xmin , polygen ymin , polygen xmax , polygen ymax );

[0088] Among them, polygen xmin This represents the minimum x-coordinate of the bounding rectangle of the polygon's vertices;

[0089] polygen ymin The minimum y-coordinate value of the bounding rectangle of the polygon's vertices; polygen xmax This represents the maximum x-coordinate of the bounding rectangle of the polygon's vertices; polygen ymax This represents the maximum ordinate value of the bounding rectangle of the polygon's vertices;

[0090] To accelerate chip layout segmentation and binary image generation, key-value pairs for sub-graph index and polygon index are designed;

[0091] Based on the bounding box coordinates of the subgraphs and the bounding box rectangle coordinates of the polygon vertices, initialize an array Tilepolygondict with the bounding box coordinates of all subgraphs as keys and empty values.

[0092] S1.2. Based on the coordinates of the outer bounding rectangle of the polygon's vertices, calculate the subgraphs contained within the polygon using the following formula:

[0093]

[0094] Among them, row min *H, row min *H,col min *H,col max *H represents the index position of the bounding rectangle coordinates of the polygon vertices within the subgraph, and H is the size of the subgraph. min row max ,col min ,col max As an intermediate reference value, through row min row max ,col min ,col max The value determines the subgraph index position;

[0095] Suppose the outer bounding box of a polygon is polygen xmin It's 4000, polygen ymin It is 0, polygen xmax It's 5000, polygen ymax If it's 1000, then H is 20248. Therefore, row... min The value is 4000 / 2048, then rounded down to 1. max The value is 5000 / 2048, and rounding down to 2 indicates that the x-axis spans two subplots. min and col max A value of only 0 indicates that there is no horizontal crossing on the y-axis. These values ​​of 1, 2, and 0 can be directly converted into the subgraph index position (tile). xmin ,tile ymin ,tile xmax ,tile ymaxThe first subgraph is located at (1*2048, 0*2048, 1*2048+2048-1, 0*2048+2048-1), and the second subgraph is located at (2*2048, 0*2048, 2*2048+2048-1, 0*2048+2048-1). This polygon is contained within these two subgraphs.

[0096] By filling the array Tilepolygondict with data, the index positions of the outer bounding rectangle coordinates of the polygon vertices under the subgraph are obtained as follows:

[0097]

[0098] Where i represents from row min Start retrieving values, up to row max k indicates from col min Start retrieving values, up to col max idx polygen Represents the index of a polygon vertex, append(idx) polygen This indicates that the polygon index value is added to the subgraph index key; thus generating a key-value pair between the subgraph index and the polygon index.

[0099] The subgraph index is the bounding box coordinates of all subgraphs, and the polygon index is the vertex coordinates P of the polygon among all polygons. all The position in the middle.

[0100] S2. Based on the key-value pairs of the subgraph index and the polygon index, construct the largest matrix M of the polygons contained in and adjacent to the subgraph;

[0101] S2.1. Obtain the subgraph index and read the polygons contained in the subgraph in the array Tilepolygondict;

[0102] For example (x) min y min x max y max ); Read (x) min y min x max y max The subgraph of a polygon contained in a Tilepolygondict;

[0103] S2.2 Calculate the minimum bounding box of the polygon-subgraph. The minimum bounding box of the polygon-subgraph is the minimum bounding box coordinates of all bounding box rectangles that simultaneously contain the vertices of the polygon, and the bounding box coordinates of the subgraph. That is:

[0104] out xmin=min(polygens_x,tile_x);

[0105] out ymin =min(polygens_y,tile_y);

[0106] out xmax = max(polygens_x, tile_x);

[0107] out ymax =max(polygens_y,tile_y);

[0108] Among them, out xmin This represents the minimum x-coordinate of the smallest outer bounding box of the polygon-subgraph; out ymin This represents the minimum y-coordinate value of the minimum bounding box of the polygon-subgraph; out xmax This represents the maximum x-coordinate value of the minimum bounding box of the polygon-subgraph; out ymax This represents the maximum ordinate value of the minimum outer bounding box of the polygon-subgraph;

[0109] polygens_x represents the x-coordinate of the current polygon; polygens_y represents the y-coordinate of the current polygon; tile_x represents the x-coordinate of the subplot; tile_y represents the y-coordinate of the subplot.

[0110] Build row length OUT ymax -out ymin The column length is out xmax -out xmin The zero matrix M is used for the tracking scan line algorithm to fill the interior of the polygon with a value of 1.

[0111] S3. Using the tracing scan line algorithm, obtain the coordinates of the vertices and edges of the polygons adjacent to the subgraph, traverse the vertices of the polygons, insert the edge data into the vertical edge dictionary and the horizontal edge list to fill them, and assign values ​​to the largest matrix M in S2 to obtain the assigned matrix.

[0112] Specifically, traditional scan-line algorithms require calculating the intersection points of polygons in each row with that row, and the algorithm's time heavily depends on the time spent calculating these intersection points. This invention proposes a boundary tracking optimization method to improve this intersection point calculation.

[0113] Define the sides of the polygon as [(x u ,y w ),(x v ,y z ], indicating from point (x u ,y w ) to point (xv ,y z The edge of x u x v The x-coordinate of any edge is represented by y. w y z It represents the position of the y-coordinate corresponding to any edge;

[0114] Starting with a sequence of coordinates of all polygon vertices, insert the data for each edge into a dictionary of vertical edges (dict). y list with horizontal border x Specifically, it includes:

[0115] The insertion method for vertical edges is to iterate through all points of the vertical edge except the top endpoint and store them in the vertical edge dictionary (dict). y ;

[0116] vertical dictionary (dict) y The structure is as follows: a list of x-axis coordinates sorted in ascending order, with the y-axis coordinate as the key. sortx For the value, construct a key-value pair;

[0117] For the vertical side [(x n ,y1),(x n When y2 is greater than y1, for each key from y1 to y2-1, insert the corresponding x-axis coordinate at the corresponding position according to the x-axis coordinate arrangement order. n Values, i.e., dict y [y1] = [...x n-1 x n x n+1 ...], dict y [y1+1]=[……x n-1 x n x n+1 ...]...dict y [y2-1]=[……x n-1 x n x n+1 ...], ignore y2;

[0118] Where x n y1 and y2 represent the values ​​of the x-coordinates of the vertical side, respectively;

[0119] At the same time, record the set of horizontal edges to obtain a list of horizontal edges. x , that is {[(x1,y1),(x2,y1)], [(x3,y2),(x4,y2)]......[(x n ,y t ),(x m ,yt )]};where t represents the number of horizontal sides, x1, x2, ... x n x m The x-coordinates of the horizontal lines are represented as y1, y2, ... y. t This represents the value of the ordinate in the horizontal line;

[0120] After traversing the vertex coordinates of all polygons, store the coordinates of the points on the boundaries of all vertical edges, and record the coordinate set of the points on each horizontal edge separately.

[0121] For example, if the vertex sequence of a polygon is [(0,0),(0,20),(20,20),(20,0)], and we trace each edge of the polygon, when we reach (0,0) to (0,20), we store the corresponding positions of [(0,0),…,(0,i),…,(0,19)] in M ​​into a dictionary. y The corresponding positions are 0, ..., i, ..., 19, where i belongs to 1 to 18. Simultaneously, the current horizontal edge is recorded as {[(0,20),(20,20)],[(20,0),(0,0)]}. After traversing all edges of the current polygon, all points on the boundaries of all vertical edges are stored, and the coordinate set of each horizontal edge is recorded separately.

[0122] like Figure 2 The example shown is a 6x6 image resolution. It iterates through the vertex coordinate sequence of the polygon. Hollow nodes are stored in the vertical side dictionary dicty, and white solid nodes are stored in the horizontal side list list_x.

[0123] Traversing the data structure, specifically traversing the vertical dictionary (dict). y list with horizontal border x For the vertical dictionary dict y The values ​​in each row are extracted without repetition, that is, the values ​​of two adjacent indices are obtained, and the points between the two values ​​are assigned a value of 1 in matrix M in sequence.

[0124] A r,y =1(o <r<q,o=S xi ,q=S xi+1 );

[0125] Among them, S xi Let S represent the xi-th element in S, where xi starts from 0 and has a step size of 2, meaning the next xi will have a value of 2. S represents the set of x-coordinates for any key y; A r,y This represents an element in matrix M with x-coordinate r and y-coordinate y;

[0126] like Figure 3 For the vertical dictionary dict yFor each given vertical coordinate key, the value is retrieved without repetition, obtaining the values ​​of two adjacent indices. The points between these two values ​​are then assigned the value 1, as shown in the gray area of ​​the diagram, indicating they are filled with 1s. Other points can be filled in the same way.

[0127] Retrieve the list of horizontal edges x Each element, i.e., the set of coordinates of the points on each horizontal edge, is assigned a value of 1 to the points between each horizontal edge.

[0128] S4. Based on the relative positions of the subgraphs, read and save the subgraph matrix;

[0129] After assigning values ​​to the S3 matrix, the corresponding subgraph matrix is ​​cropped according to the relative position of the subgraphs, and then saved as an image file, i.e., a PNG file. For example... Figure 4 .

[0130] S5. Loop through each sub-graph, perform steps S2-24 for each sub-graph, and save it as a PNG image, until all sub-graph matrices in the chip layout are obtained and saved, thus obtaining the final image.

[0131] This invention provides a chip layout image generation method based on a boundary tracking scanline algorithm. It designs a method for quickly filtering sub-image bounding boxes and polygon outer bounding boxes to generate the local maximum bounding matrix of the sub-image polygons. This matrix is ​​then used for direct matrix segmentation without calculating the intersection points of the sub-image and the polygons. Furthermore, it proposes a novel boundary tracking scanline algorithm that, by designing different operations for vertical and horizontal edges, quickly records the pairs of data that need to be filled in each row. In subsequent filling, the corresponding position pairs are directly obtained for rapid filling. By constructing a data structure and improving the scanline algorithm, this invention can quickly divide a large chip design layout into sub-images of a specified size and generate corresponding binary images. Moreover, the technical solution provided by this invention can handle cases where polygons contain holes. Current algorithms do not consider the case of diagonal edges.

[0132] Based on the disclosure and teachings of the foregoing specification, those skilled in the art can make changes and modifications to the above embodiments. Therefore, the present invention is not limited to the specific embodiments disclosed and described above, and some modifications and changes to the present invention should also fall within the protection scope of the claims of the present invention. Furthermore, although some specific terms are used in this specification, these terms are only for convenience of explanation and do not constitute any limitation on the present invention.

Claims

1. A method for generating chip layout images based on a boundary tracking scan line algorithm, characterized in that, Includes the following steps: S1. Read the chip layout data and preprocess it to generate key-value pairs of sub-graph index and polygon index; S2. Based on the key-value pairs of the subgraph index and the polygon index, construct the largest matrix M of the polygons contained in and adjacent to the subgraph; Specifically, S2 includes: S2.

1. Obtain the subgraph index and read the polygons contained in the subgraph in the array Tilepolygondict; S2.2 Calculate the minimum bounding box of the polygon-subgraph. The minimum bounding box of the polygon-subgraph is the minimum bounding box coordinates of all bounding box rectangles that simultaneously contain the vertices of the polygon, and the bounding box coordinates of the subgraph. That is: ; ; ; ; Among them, out xmin This represents the minimum x-coordinate of the smallest outer bounding box of the polygon-subgraph; out ymin This represents the minimum y-coordinate value of the minimum bounding box of the polygon-subgraph; out xmax This represents the maximum x-coordinate value of the minimum bounding box of the polygon-subgraph; out ymax This represents the maximum ordinate value of the minimum outer bounding box of the polygon-subgraph; polygens_x represents the x-coordinate of the current polygon; polygens_y represents the y-coordinate of the current polygon; tile_x represents the x-coordinate of the subplot; tile_y represents the y-coordinate of the subplot. Build row length OUT ymax -out ymin The column length is out xmax -out xmin The zero matrix M is used for the tracking scan line algorithm to fill the interior of the polygon with a value of 1. S3. Using the tracing scan line algorithm, obtain the coordinates of the vertices and edges of the polygons adjacent to the subgraph, traverse the vertices of the polygons, insert the edge data into the vertical edge dictionary and the horizontal edge list to fill them, and assign values ​​to the largest matrix M in S2 to obtain the assigned matrix. Specifically, S3 includes: Define the sides of the polygon as [(x u ,y w ),(x v ,y z ], indicating from point (x u ,y w ) to point (x v ,y z The edge of x u x v The x-coordinate of any edge is represented by y. w y z It represents the position of the y-coordinate corresponding to any edge; Starting with a sequence of coordinates of all polygon vertices, insert the data for each edge into a dictionary of vertical edges (dict). y list with horizontal border x Specifically, it includes: The insertion method for vertical edges is to iterate through all points of the vertical edge except the top endpoint and store them in the vertical edge dictionary (dict). y ; vertical dictionary (dict) y The structure is as follows: a list of x-axis coordinates sorted in ascending order, with the y-axis coordinate as the key. sortx For the value, construct a key-value pair; For the vertical side [(x n ,y1),(x n When y2 is greater than y1, for each key from y1 to y2-1, insert the corresponding x-axis coordinate at the corresponding position according to the x-axis coordinate arrangement order. n Values, i.e., dict y [y1]=[……x n-1 x n x n+1 ...], dict y [y1+1]=[……x n-1 x n x n+1 ...]...dict y [y2-1]= [……x n-1 x n x n+1 ...], ignore y2; Where x n y1 and y2 represent the values ​​of the x-coordinates of the vertical side, respectively; At the same time, record the set of horizontal edges to obtain a list of horizontal edges. x , that is {[(x1,y1),(x2,y1)], [(x3,y2),(x4,y2)]...... [(x n ,y t ),(x m ,y t )]}; where t represents the number of horizontal sides, x1, x2, ... x n x m The x-coordinates of the horizontal lines are represented as y1, y2, ... y. t This represents the value of the ordinate in the horizontal line; After traversing the vertex coordinates of all polygons, store the coordinates of the points on the boundaries of all vertical edges, and record the coordinate set of the points on each horizontal edge separately. S4. Based on the relative positions of the subgraphs, read and save the subgraph matrix; S5. Loop through each sub-image, execute steps S2-24 for each sub-image, obtain the matrix of all sub-images in the chip layout and save it to get the final image.

2. The chip layout image generation method based on boundary tracking scan line algorithm according to claim 1, characterized in that, Specifically, S1 includes: Read the chip layout data. The chip layout includes multiple polygons. Construct a Cartesian coordinate system, storing the coordinates of the polygon vertices as coordinates. Obtain the outer bounding box coordinates of the entire chip layout, which is (x...). min y min x max y max ), Where, x min This represents the minimum x-coordinate value of all polygons in the current chip layout, y min This represents the minimum y-coordinate value of all polygons in the current chip layout. max This represents the maximum x-coordinate value of all polygons in the current chip layout, y min This represents the maximum y-coordinate value of all polygons in the current chip layout; Set the sub-figure size to H to divide the chip layout into multiple identical sub-figures.

3. The chip layout image generation method based on boundary tracking scan line algorithm according to claim 2, characterized in that, The chip layout is divided into multiple identical sub-layouts, specifically as follows: Expand the left and right sides of the chip layout outwards so that the chip layout is divisible by the size of the sub-graph, i.e.: ; ; ; ; Among them, clip len j represents the length of the horizontal axis of the chip layout. x j represents the length required to extend the chip layout to the left and right sides, which is divisible by the size of the subgraph. left j represents the length by which the chip layout extends to the left. right Indicates the length by which the chip layout extends to the right; Based on the calculation method for extending the chip layout to the left and right, the top and bottom ends of the chip layout are extended outwards so that the chip layout is divisible by the size of the sub-graph, thus obtaining the upward extension length j of the chip layout. up The length j of the chip layout extending downwards down This divides the chip layout into multiple identical sub-maps.

4. The chip layout image generation method based on boundary tracking scan line algorithm according to claim 2, characterized in that, Based on the expanded chip layout and the divided sub-graphs, obtain the bounding box coordinates of the sub-graphs (tiles). xmin , tile ymin , tile xmax , tile ymax ); Among them, tile xmin This indicates the minimum x-coordinate value of the outer frame of the subplot; tile ymin This indicates the minimum y-coordinate value of the outer bounding box of the subplot; tile xmax This indicates the maximum x-coordinate value of the outer frame of the subplot; tile ymax This indicates the maximum ordinate value of the outer bounding box of the subplot; Get the vertex coordinates P of all polygons all =[(P 11 P 12 ...P 1q (P) 21 P 22 ...P 2q ), ... (P p1 P p2 ...P pq )],P all Represents the set of sequences of vertex coordinates of all polygons, (P p1 P p2 ...P pq Let P represent the set of sequence coordinates of the vertices of the P-th polygon. pq This represents the coordinates of one of the vertices of the P-th polygon. Starting from the coordinates of any vertex of any polygon, we can traverse all the vertices of the polygon in a clockwise or counterclockwise direction to obtain a sequence of vertex coordinates of one of the polygons. Iterate through the vertex coordinates of each polygon to obtain a sequence set of vertex coordinates for all polygons. Then, further obtain the bounding box rectangle coordinates of all polygon vertices (polygen). xmin , polygen ymin , polygen xmax , polygen ymax ); Among them, polygen xmin The minimum x-coordinate of the bounding rectangle of the polygon's vertices; polygen ymin The minimum y-coordinate value of the bounding rectangle of the polygon's vertices; polygen xmax This represents the maximum x-coordinate of the bounding rectangle of the polygon's vertices; polygen ymax This represents the maximum ordinate value of the bounding rectangle of the polygon's vertices; Based on the bounding box coordinates of the subgraphs and the bounding box rectangle coordinates of the polygon vertices, initialize an array Tilepolygondict with the bounding box coordinates of all subgraphs as keys and empty values.

5. The chip layout image generation method based on boundary tracking scan line algorithm according to claim 4, characterized in that, The subgraphs contained within the polygon are calculated based on the coordinates of the bounding rectangle of the polygon's vertices, using the following formula: ; ; ; ; Where H is the subgraph size, row min row max ,col min ,col max As an intermediate reference value, through row min row max ,col min ,col max The value determines the subgraph index position; By filling the array Tilepolygondict with data, the index positions of the outer bounding rectangle coordinates of the polygon vertices under the subgraph are obtained as follows: ; Where i represents from row min Start retrieving values, up to row max k indicates from col min Start retrieving values, up to col max idx polygen Represents the index of a polygon vertex, append(idx) polygen This indicates that the polygon index value is added to the subgraph index key; thus generating a key-value pair between the subgraph index and the polygon index.

6. The chip layout image generation method based on boundary tracking scan line algorithm according to claim 5, characterized in that, The subgraph index is the bounding box coordinates of all subgraphs, and the polygon index is the vertex coordinates P of the polygon among all polygons. all The position in the middle.

7. The chip layout image generation method based on boundary tracking scan line algorithm according to claim 6, characterized in that, In S3, the data structure is traversed, that is, the vertical dictionary (dict) is traversed. y list with horizontal border x For the vertical dictionary dict y The values ​​in each row are extracted without repetition, that is, the values ​​of two adjacent indices are obtained, and the points between the two values ​​are assigned a value of 1 in matrix M in sequence. ; Among them, S xi Let S represent the xi-th element in S, where xi starts from 0 and has a step size of 2, meaning the next xi will have a value of 2. S represents the set of x-coordinates for any key y; A r,y This represents an element in matrix M with x-coordinate r and y-coordinate y; Retrieve the list of horizontal edges x Each element, i.e., the set of coordinates of the points on each horizontal edge, is assigned a value of 1 to the points between each horizontal edge.

8. The chip layout image generation method based on boundary tracking scan line algorithm according to claim 1, characterized in that, In step S4, after assigning values ​​to the matrix in S3, the corresponding subgraph matrix is ​​cropped according to the position of the subgraph, and the subgraph matrix is ​​saved as an image file.

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