Serial communication circuit and serial communication system

Abstract

The present application discloses a serial communication circuit and a serial communication system. The serial communication circuit includes a first switch branch, a second switch branch, a third switch branch, a fourth switch branch, a first controller, and a second controller. The first controller outputs a first square wave signal. The first switch branch turns on or off in response to the first square wave signal to output a second square wave signal. The third switch branch receives the second square wave signal, turns on or off in response to the second square wave signal, and outputs a third square wave signal to the second controller. The second controller outputs a fourth square wave signal. The fourth switch branch turns on or off in response to the fourth square wave signal and outputs a fifth square wave signal. The first controller outputs a first level signal. Upon receiving the first level signal, the second switch branch turns on or off in response to the fifth square wave signal and transmits the fifth square wave signal to the first controller. Through the above method, serial communication can be achieved using a single communication line, saving costs.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a serial communication circuit and a serial communication system. Background Art

[0002] Communication refers to the exchange of data between independent devices via wires. Communication methods are generally categorized into two types: parallel communication and serial communication. Serial communication is widely used because it requires fewer wires and is more resistant to interference.

[0003] However, currently, serial communication between two devices requires at least one communication line to transmit the signal output by the first device to the second device, and another communication line to transmit the signal output by the second device to the first device. This means that at least two communication lines are required for signal transmission, which is costly. Summary of the Invention

[0004] The present application aims to provide a serial communication circuit and a serial communication system, which can realize serial communication using a single communication line, thereby saving costs.

[0005] To achieve the above objectives, in a first aspect, the present application provides a serial communication circuit, comprising:

[0006] A first switch branch, a second switch branch, a third switch branch, a fourth switch branch, a first controller, and a second controller;

[0007] The first end of the first switch branch is connected to the first end of the first controller, the first end of the second switch branch is connected to the third end of the first controller, the second end of the second switch branch is connected to the second end of the first controller, the first end of the third switch branch is connected to the second end of the second controller, and the first end of the fourth switch branch is connected to the first end of the second controller. The second end of the first switch branch, the second end of the third switch branch, and the second end of the fourth switch branch are all used to input a second DC voltage. The third end of the first switch branch, the third end of the second switch branch, the third end of the third switch branch, and the third end of the fourth switch branch are all connected to the same communication line.

[0008] The first controller is configured to output a first square wave signal at a first terminal of the first controller;

[0009] The first switch branch is configured to be turned on or off in response to the first square wave signal to output a second square wave signal to the communication line based on the first DC voltage on the first power line;

[0010] The third switch branch is configured to receive the second square wave signal through the communication line, and be turned on or off in response to the second square wave signal to output a third square wave signal based on the second DC voltage, and transmit the third square wave signal to the second terminal of the second controller;

[0011] The second controller is configured to output a fourth square wave signal at the first terminal of the second controller;

[0012] The fourth switch branch is configured to be turned on or off in response to the fourth square wave signal to output a fifth square wave signal to the communication line based on the second DC voltage;

[0013] The first controller is further configured to output a first level signal at a third terminal of the first controller;

[0014] The second switch branch is configured to be turned on or off in response to the fifth square wave signal when receiving the first level signal, so as to transmit the fifth square wave signal to the second end of the first controller.

[0015] In an optional manner, the first controller is further configured to output a second level signal at the third terminal of the first controller when outputting the first square wave signal, and the duration of the second level signal is greater than or equal to the duration of the first square wave signal;

[0016] The second switch branch is further configured to be turned off when receiving the second level signal.

[0017] In an optional manner, the serial communication circuit further includes an anti-backflow branch and a resistance branch;

[0018] The anti-backflow branch is connected between the communication line and the first ground terminal, and the anti-backflow branch is configured to prevent the signal on the communication line from flowing back to the first controller through the first ground terminal, wherein the first controller is connected to the first ground terminal;

[0019] The resistance branch is connected between the communication line and the second ground terminal, and the resistance branch is configured as a load between the communication line and the second ground terminal.

[0020] In an optional manner, the first switch branch includes a first resistor, a second resistor, a first switch tube and a first diode;

[0021] The first end of the first resistor is connected to the first end of the first controller, the second end of the first resistor is respectively connected to the first end of the second resistor and the first end of the first switch tube, the second end of the second resistor and the second end of the first switch tube are both connected to the first power line to input the first DC voltage, the third end of the first switch tube is connected to the anode of the first diode, and the cathode of the first diode is connected to the communication line.

[0022] In an optional manner, the second switch branch includes a first switch unit and a second switch unit;

[0023] The first end of the first switch unit is connected to the third end of the first controller, the second end of the first switch unit is connected to the first end of the second switch unit, the second end of the second switch unit is connected to the communication line, and the third end of the second switch unit is connected to the second end of the first controller;

[0024] The first switch unit is configured to be turned on when receiving the first level signal, so as to transmit the third level signal to the first end of the second switch unit;

[0025] The second switch unit is configured to be turned on or off in response to the fifth square wave signal when receiving the third level signal, so as to transmit the fifth square wave signal to the second end of the first controller.

[0026] In an optional manner, the first switch unit includes a third resistor, a fourth resistor and a second switch tube;

[0027] The first end of the third resistor is connected to the third end of the first controller, the second end of the third resistor is respectively connected to the first end of the fourth resistor and the first end of the second switch tube, the third end of the second switch tube is connected to the first end of the second switch unit, and the second end of the second switch tube and the second end of the fourth resistor are both connected to the first ground end.

[0028] In an optional manner, the second switch unit includes a fifth resistor, a sixth resistor, a seventh resistor and a third switch tube;

[0029] The first end of the fifth resistor is connected to the second end of the first switch unit, the second end of the fifth resistor is respectively connected to the first end of the sixth resistor and the first end of the third switch tube, the second end of the third switch tube and the second end of the sixth resistor are both connected to the communication line, the third end of the third switch tube is respectively connected to the first end of the seventh resistor and the second end of the first controller, and the second end of the seventh resistor is connected to the first ground end.

[0030] In an optional manner, the third switch branch includes an eighth resistor, a ninth resistor and a first optical coupler;

[0031] The first end of the eighth resistor is connected to the communication line, the second end of the eighth resistor is connected to the first end of the light emitter of the first optocoupler, the second end of the light emitter of the first optocoupler is connected to the second ground end, the first end of the light receiver of the first optocoupler is respectively connected to the second end of the second controller and the first end of the ninth resistor, the second end of the ninth resistor is used to input the second DC voltage, the second end of the light receiver of the first optocoupler is connected to the third ground end, wherein the second controller is connected to the third ground end.

[0032] In an optional manner, the fourth switch branch includes a third switch unit, a fourth switch unit and a fifth switch unit;

[0033] The first end of the third switch unit is connected to the first end of the second controller, the second end of the third switch unit and the second end of the fifth switch unit are both used to input the second DC voltage, the third end of the third switch unit is connected to the first end of the fourth switch unit, the second end of the fourth switch unit is connected to the first end of the fifth switch unit, and the third end of the fifth switch unit is connected to the communication line;

[0034] The third switch unit is configured to be turned on or off in response to the fourth square wave signal to establish or disconnect the connection between the first power line and the fourth switch unit;

[0035] The fourth switch unit is configured to be turned on when connected to the first power line, and turned off when disconnected from the first power line;

[0036] The fifth switching unit is configured to be turned on when the fourth switching unit is turned on, and to be turned off when the fourth switching unit is turned off, so as to output the fifth square wave signal based on the second DC voltage.

[0037] In an optional manner, the third switch unit includes a tenth resistor, an eleventh resistor and a second optical coupler;

[0038] The first end of the tenth resistor and the first end of the eleventh resistor are both used to input the second DC voltage, the second end of the tenth resistor is connected to the first end of the light emitting device of the second optocoupler, the second end of the light emitting device of the second optocoupler is connected to the first end of the second controller, the second end of the eleventh resistor is connected to the first end of the light receiver of the second optocoupler, and the second end of the light receiver of the second optocoupler is connected to the first end of the fourth switch unit.

[0039] In an optional manner, the fourth switch unit includes a twelfth resistor and a fourth switch tube;

[0040] The first end of the twelfth resistor is respectively connected to the first end of the fourth switch tube and the third end of the third switch unit, the second end of the twelfth resistor and the second end of the fourth switch tube are both connected to the second ground end, and the third end of the fourth switch tube is connected to the first end of the fifth switch unit.

[0041] In an optional manner, the fifth switch unit includes a thirteenth resistor, a fourteenth resistor, a fifth switch tube and a second diode;

[0042] The first end of the thirteenth resistor is connected to the second end of the fourth switch unit, the second end of the thirteenth resistor is respectively connected to the first end of the fourteenth resistor and the first end of the fifth switch tube, the second end of the fifth switch tube and the second end of the fourteenth resistor are both used to input the second DC voltage, the third end of the fifth switch tube is connected to the anode of the second diode, and the cathode of the second diode is connected to the communication line.

[0043] In an optional manner, the serial communication circuit further includes a first non-isolated power supply branch and a first isolated power supply branch;

[0044] The first end of the first non-isolated power branch and the first end of the first isolated power branch are both connected to the first power line, and the second end of the first non-isolated power branch and the second end of the first isolated power branch are both connected to the second power line;

[0045] The first non-isolated power branch is configured to convert the AC voltages on the first power line and the second power line to generate the first DC voltage on the first power line;

[0046] The first isolated power branch is configured to convert the AC voltage on the first power line and the second power line to generate the second DC voltage.

[0047] In an optional manner, the first non-isolated power supply branch includes a fourth diode, a fifth diode, a first inductor and a first power supply chip, and the first isolated power supply branch includes an isolated switching power supply;

[0048] The anode of the fourth diode is connected to the second power line, the cathode of the fourth diode is connected to the anode of the fifth diode, the cathode of the fifth diode is connected to the switch pin of the first power chip, the first end of the first inductor is connected to the first power line and the voltage output pin of the first power chip respectively, and the second end of the first inductor is connected to the clock pin of the first power chip;

[0049] The first input terminal of the isolated switching power supply is connected to the first power line, the second input terminal of the isolated switching power supply is connected to the second power line, the output terminal of the isolated switching power supply is used to output the second DC voltage, and the output ground terminal of the isolated switching power supply is connected to the third ground terminal.

[0050] In a second aspect, the present application provides a serial communication system, which includes the serial communication circuit as described above.

[0051] The present application provides a beneficial effect as follows: a serial communication circuit includes a first switch branch, a second switch branch, a third switch branch, a fourth switch branch, a first controller, and a second controller. The first controller is connected to the first and second switch branches, and the second controller is connected to the third and fourth switch branches. The first switch branch is connected to a first power line, and the third and fourth switch branches are both connected to the first power line. The first, second, third, and fourth switch branches are all configured to input a second DC voltage. When the first controller is configured to output a signal and the second controller is configured to receive a signal, the first controller outputs a first square wave signal. Subsequently, the first switch branch turns on or off in response to the first square wave signal, thereby outputting a second square wave signal to the communication line based on the first DC voltage on the first power line. Subsequently, the third switch branch receives the second square wave signal via the communication line and turns on or off in response to the second square wave signal, thereby outputting a third square wave signal to the second terminal of the second controller based on the second DC voltage. Thus, the second controller receives the third square wave signal corresponding to the first square wave signal. When the second controller is used to output a signal and the first controller is used to receive a signal, the second controller outputs a fourth square wave signal to the fourth switch branch, and the first controller outputs a first level signal to the second switch branch. Subsequently, the fourth switch branch is turned on or off in response to the fourth square wave signal to output a fifth square wave signal to the communication line based on the second DC voltage. When the second switch branch receives the first level signal, it is turned on or off in response to the fifth square wave signal to transmit the fifth square wave signal to the second end of the first controller. At this point, the first controller receives the fifth square wave signal corresponding to the fourth square wave signal. Therefore, through the above method, the process of serial communication between the first controller and the second controller is realized, and it is realized only through one communication line. Compared with the solution of using two communication lines in the related art, the cost is lower, that is, the purpose of cost saving is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] One or more embodiments are exemplarily illustrated by pictures in the corresponding drawings. These exemplifications do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0053] Figure 1 A schematic diagram of the structure of a serial communication circuit provided in an embodiment of the present application;

[0054] Figure 2 A schematic diagram of a first square wave signal, a first level signal, and a second level signal provided in an embodiment of the present application;

[0055] Figure 3 A schematic diagram of the circuit structure of a serial communication circuit provided in an embodiment of the present application;

[0056] Figure 4 A schematic diagram of the circuit structure of a first non-isolated power supply branch and a first isolated power supply branch provided in an embodiment of the present application;

[0057] Figure 5 A schematic diagram of the structure of a serial communication system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0058] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0059] Please refer to Figure 1 , Figure 1 Schematic diagram of the structure of the serial communication circuit 100 provided in the embodiment of the present application. Figure 1 As shown, the serial communication circuit 100 includes a first switch branch 10 , a second switch branch 20 , a third switch branch 30 , a fourth switch branch 40 , a first controller 50 and a second controller 60 .

[0060] Among them, the first end of the first switch branch 10 is connected to the first end of the first controller 50, the first end of the second switch branch 20 is connected to the third end of the first controller 50, the second end of the second switch branch 20 is connected to the second end of the first controller 50, the first end of the third switch branch 30 is connected to the second end of the second controller 60, the first end of the fourth switch branch 40 is connected to the first end of the second controller 60, the second end of the first switch branch 10 is connected to the first power line La2, the second end of the third switch branch 30 and the second end of the fourth switch branch 40 are both used to input the second DC voltage V2, and the third end of the first switch branch 10, the third end of the second switch branch 20, the third end of the third switch branch 30 and the third end of the fourth switch branch 40 are all connected to the same communication line La1.

[0061] The first controller 50 and the second controller 60 may both be digital signal processing (DSP) controllers or microcontroller units (MCU).

[0062] Specifically, the first controller 50 is configured to output a first square wave signal at a first terminal of the first controller 50. The first switch branch 10 is configured to turn on or off in response to the first square wave signal to output a second square wave signal to the communication line La1 based on the first DC voltage on the first power line La2. The third switch branch 30 is configured to receive the second square wave signal via the communication line La1 and turn on or off in response to the second square wave signal to output a third square wave signal based on the second DC voltage, and transmit the third square wave signal to the second terminal of the second controller 60. The second controller 60 is configured to output a fourth square wave signal at a first terminal of the second controller 60. The fourth switch branch 40 is configured to turn on or off in response to the fourth square wave signal to output a fifth square wave signal to the communication line La1 based on the second DC voltage. The first controller 50 is also configured to output a first level signal at a third terminal of the first controller 50. The second switch branch 20 is configured to turn on or off in response to the fifth square wave signal upon receiving the first level signal to transmit the fifth square wave signal to the second terminal of the first controller 50.

[0063] In actual application, when the first controller 50 is outputting signals and the second controller 60 is receiving signals, the first controller 50 outputs a first square wave signal. Subsequently, the first switch branch 10 turns on or off in response to the first square wave signal, outputting a second square wave signal to the communication line La1 based on the first DC voltage on the first power line La2. Next, the third switch branch 30 receives the second square wave signal via the communication line La1 and turns on or off in response to the second square wave signal, outputting a third square wave signal to the second terminal of the second controller 60. At this point, the second controller 60 receives the third square wave signal corresponding to the first square wave signal.

[0064] In some embodiments, the first square wave signal, the second square wave signal, and the third square wave signal are the same signal. The first controller 50 and the second controller 60 may pre-agreed on a data parsing rule. Then, upon receiving the third square wave signal, the second controller 60 may determine the first square wave signal output by the first controller 50 by parsing the third square wave signal.

[0065] In other embodiments, the first square wave signal and the second square wave signal are opposite signals. That is, when the first square wave signal is at a high level, the second square wave signal is at a low level; when the first square wave signal is at a low level, the second square wave signal is at a high level. Furthermore, the second square wave signal and the third square wave signal are opposite signals. The first controller 50 and the second controller 60 can pre-agreed on data parsing rules, so that the first square wave signal and the third square wave signal are identical signals. Similarly, after receiving the third square wave signal, the second controller 60 can determine the first square wave signal output by the first controller 50 by parsing the third square wave signal.

[0066] Of course, in other embodiments, the first square wave signal, the second square wave signal and the third square wave signal may also be the same signal. As long as the first controller 50 and the second controller 60 agree on the data parsing rules, the second controller 60 can determine the first square wave signal based on the third square wave signal.

[0067] When the second controller 60 is outputting signals and the first controller 50 is receiving signals, the second controller 60 outputs a fourth square wave signal to the fourth switch branch 40, and the first controller 50 outputs a first level signal to the second switch branch 20. Subsequently, the fourth switch branch 40 is turned on or off in response to the fourth square wave signal to output a fifth square wave signal to the communication line La1. Upon receiving the first level signal, the second switch branch 20 is turned on or off in response to the fifth square wave signal to transmit the fifth square wave signal to the second terminal of the first controller 50. At this point, the first controller 50 has received the fifth square wave signal corresponding to the fourth square wave signal.

[0068] Similarly, the fourth square wave signal and the fifth square wave signal may be the same or different. Specific details may refer to the description of the first square wave signal, the second square wave signal, and the third square wave signal, which will not be repeated here.

[0069] Through the above process, the first controller 50 sends signals to the second controller 60, and vice versa. In other words, serial communication is achieved between the first controller 50 and the second controller 60. Furthermore, this process is achieved using only one communication line (i.e., communication line La1). Compared to the solution using two communication lines in the related art, this solution is less expensive, thereby achieving cost savings.

[0070] Furthermore, in this embodiment, when the first controller 50 is the signal receiver, it will only receive the signal (i.e., the fifth square wave signal) on the communication line La1 if it outputs a first level signal. Therefore, the first controller 50 can determine whether to receive the signal on the communication line La. This allows for a closed-loop signal transmission and reception process. Specifically, the first controller 50 first outputs the first square wave signal, and then the second controller 60 receives the third square wave signal. Subsequently, the second controller 60 outputs a signal corresponding to the third square wave signal. In other words, the fourth square wave signal output by the second controller 60 corresponds to the third square wave signal. Next, while suspending the output of the first square wave signal, the first controller 50 outputs a first level signal to acquire a signal from the communication line La1. If the first controller 50 receives the fifth square wave signal, it can determine that the second controller 60 has received the third square wave signal and has responded. The first controller 50 can determine the content of the second controller 60's response from the fifth square wave signal. Through the above process, the first controller 50 sends a signal and receives a signal feedback from the second controller 60, thereby realizing a closed-loop process of sending and receiving signals, which can make the signal transmission between the first controller 50 and the second controller 60 more reliable, and is conducive to improving the reliability and practicality of serial communication.

[0071] In one embodiment, the first controller 50 is further configured to output a second level signal at the third terminal of the first controller 50 when outputting the first square wave signal, and the duration of the second level signal is greater than or equal to the duration of the first square wave signal. The second switch branch 20 is further configured to turn off when receiving the second level signal.

[0072] In this embodiment, when the first controller 50 outputs the first square wave signal, a second square wave signal is present on the communication line La1. At this point, the first controller 50 outputs a second level signal to control the second switch branch 20 to turn off. This prevents the first controller 50 from receiving the second square wave signal on the communication line La1, thereby improving the accuracy of data transmitted during communication between the first controller 50 and the second controller 60.

[0073] Please refer to Figure 2 , Figure 2 FIG. 1 is a schematic diagram showing a first square wave signal, a first level signal, and a second level signal provided by an embodiment. Figure 2 As shown, the horizontal axis represents time; curve S1 is a schematic diagram of the first square wave signal; curve S2 is a schematic diagram of the combination of the first level signal (the first level signal is a high level in the figure) and the second level signal (the second level signal is a low level in the figure).

[0074] like Figure 2 As shown, before time T1, the first controller 50 has already begun outputting the second level signal. At time T1, the first controller 50 begins outputting the first square wave signal. At time T2, the first controller 50 ceases outputting the first square wave signal. Clearly, between times T1 and T2, the first controller 50 continues outputting the first square wave signal and the second level signal. In this case, only the second controller 60 can receive the signal. Subsequently, after time T2, the first controller 50 ceases outputting the second level signal and the first square wave signal and instead outputs the first level signal, thereby acquiring the fifth square wave signal from communication line La1.

[0075] It should be noted that in this embodiment, the duration of the second level signal being longer than the duration of the first square wave signal is taken as an example. In other embodiments, the duration of the second level signal may also be equal to the duration of the first square wave signal.

[0076] Please refer to Figure 3 , Figure 3 A schematic diagram of the circuit structure of a serial communication circuit provided in an embodiment of the present application.

[0077] In one embodiment, the first switch branch 10 includes a first resistor R1 , a second resistor R2 , a first switch Q1 , and a first diode D1 .

[0078] The first end of the first resistor R1 is connected to the first end of the first controller 50 (pin 1 of the first controller 50), the second end of the first resistor R1 is connected to the first end of the second resistor R2 and the first end of the first switch Q1, respectively. The second end of the second resistor R2 and the second end of the first switch Q1 are both connected to a first power line (not shown) to input a first DC voltage V1. The third end of the first switch Q1 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the communication line La1. The first end of the first resistor R1 is the first end of the first switch branch 10, the second end of the first switch Q1 is the second end of the first switch branch 10, and the cathode of the first diode D1 is the third end of the first switch branch 10. The first DC voltage V1 is also the power supply voltage of the first controller 50. Secondly, in this embodiment, when the first switch Q1 is turned on, the first switch branch 10 is turned on; when the first switch Q1 is turned off, the first switch branch 10 is turned off.

[0079] Specifically, the first resistor R1 is used for current limiting. When the first terminal of the first controller 50 does not output the first square wave signal, the first DC voltage V1 provides a high voltage level to the first terminal of the first switch Q1 via the second resistor R2, ensuring that the first switch Q1 can be stably turned off. The first diode D1 prevents the signal on the communication line La1 from acting on the first switch Q1, thereby improving the stability of the first switch Q1.

[0080] In this embodiment, when the first square wave signal output by the first controller 50 is at a high level, the first switch Q1 is turned off, and the signal at the cathode of the first diode D1 is at a low level, i.e., the signal input to the communication line La1 is at a low level, i.e., the second square wave signal is at a low level; when the first square wave signal output by the first controller 50 is at a low level, the first switch Q1 is turned on, and the first DC voltage V1 is input to the communication line La1 through the first switch Q1 and the first diode D1, i.e., the signal input to the communication line La1 is at a high level, i.e., the second square wave signal is at a high level. It can be seen that when the first square wave signal is at a high level, the second square wave signal is at a low level; when the first square wave signal is at a low level, the second square wave signal is at a high level. The second square wave signal is a signal opposite to the first square wave signal.

[0081] In this embodiment, the first switch transistor Q1 is a PMOS transistor, for example, wherein the gate of the PMOS transistor is the first end of the first switch transistor Q1, the source of the PMOS transistor is the second end of the first switch transistor Q1, and the drain of the PMOS transistor is the third end of the first switch transistor Q1.

[0082] In addition, the first switch Q1 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, etc. In addition, Figure 3 The first switching tube Q1 shown in FIG. 1 can be implemented as a plurality of switches connected in parallel.

[0083] In one embodiment, the second switch branch 20 includes a first switch unit 21 and a second switch unit 22 .

[0084] The first end of the first switch unit 21 is connected to the third end of the first controller 50 (pin 3 of the first controller 50), the second end of the first switch unit 21 is connected to the first end of the second switch unit 22, the second end of the second switch unit 22 is connected to the communication line La1, and the third end of the second switch unit 22 is connected to the second end of the first controller 50 (pin 2 of the first controller 50). The first end of the first switch unit 21 is the first end of the second switch branch 20, the third end of the second switch unit 22 is the second end of the second switch branch 20, and the second end of the second switch unit 2 is the third end of the second switch branch 20.

[0085] Specifically, the first switch unit 21 is configured to turn on when receiving a first level signal to transmit the third level signal to the first terminal of the second switch unit 22. The second switch unit 22 is configured to turn on or off in response to the fifth square wave signal when receiving the third level signal to transmit the fifth square wave signal to the second terminal of the first controller 50. Furthermore, when the second switch unit 22 is turned on, the second switch branch 20 is turned on; when the second switch unit 22 is turned off, the second switch branch 20 is turned off.

[0086] In this embodiment, by providing the first switch unit 21 and the second switch unit 22, it is helpful to enhance the ability to drive the second switch unit 22, so that the second switch unit 22 can be stably turned on or off, thereby improving the stability of receiving the fifth square wave signal.

[0087] In one embodiment, the first switch unit 21 includes a third resistor R3 , a fourth resistor R4 , and a second switch tube Q2 .

[0088] The first end of the third resistor R3 is connected to the third end of the first controller 50. The second end of the third resistor R3 is connected to the first end of the fourth resistor R4 and the first end of the second switch Q2. The third end of the second switch Q2 is connected to the first end of the second switch unit 22. The second end of the second switch Q2 and the second end of the fourth resistor R4 are both connected to the first ground terminal EGND. The first end of the third resistor R3 is connected to the first end of the first switch unit 21, and the third end of the second switch Q2 is connected to the second end of the first switch unit 21. The first ground terminal EGND is also the ground terminal of the first controller 50. Furthermore, when the second switch Q2 is turned on, the first switch unit 21 is turned on; when the second switch Q2 is turned off, the first switch unit 21 is turned off.

[0089] Specifically, the third resistor R3 and the fourth resistor R4 are used to divide the voltage output from the third terminal of the first controller 50, and the divided voltage across the fourth resistor R4 serves as the voltage between the first and second terminals of the second switch transistor Q2. When the third terminal of the first controller 50 outputs a first-level signal (a high level in this embodiment), the divided voltage across the fourth resistor R4 is greater than the conduction voltage drop of the second switch transistor Q2, causing the second switch transistor Q2 to conduct, thereby connecting the first terminal of the second switch unit 22 to the first ground terminal EGND, thereby inputting the third-level signal (i.e., a low level) to the first terminal of the second switch unit 22. When the third terminal of the first controller 50 outputs a second-level signal (a low level in this embodiment), the divided voltage across the fourth resistor R4 is less than the conduction voltage drop of the second switch transistor Q2, causing the second switch transistor Q2 to turn off, disconnecting the first terminal of the second switch unit 22 from the first ground terminal EGND, and no longer inputting the third-level signal (i.e., a low level) to the first terminal of the second switch unit 22.

[0090] In this embodiment, the second switch tube Q2 is an NPN transistor. The base of the NPN transistor is the first terminal of the second switch tube Q2, the emitter of the NPN transistor is the second terminal of the second switch tube Q2, and the collector of the NPN transistor is the third terminal of the second switch tube Q2.

[0091] In addition, the second switch Q2 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, etc. In addition, Figure 3 The second switch tube Q2 shown in FIG. 1 can be implemented as a plurality of switches connected in parallel.

[0092] In one embodiment, the second switch unit 22 includes a fifth resistor R5 , a sixth resistor R6 , a seventh resistor R7 and a third switch tube Q3 .

[0093] The first end of the fifth resistor R5 is connected to the second end of the first switch unit 21. The second end of the fifth resistor R5 is connected to the first end of the sixth resistor R6 and the first end of the third switch Q3. The second end of the third switch Q3 and the second end of the sixth resistor R6 are both connected to the communication line La1. The third end of the third switch Q3 is connected to the first end of the seventh resistor R7 and the second end of the first controller 50. The second end of the seventh resistor R7 is connected to the first ground terminal EGND. The first end of the fifth resistor R5 is connected to the first end of the second switch unit 22. The second end of the third switch Q3 is connected to the second end of the second switch unit 22. The third end of the third switch Q3 is connected to the third end of the second switch unit 22. Furthermore, when the third switch Q3 is turned on, the second switch unit 22 is turned on; when the third switch Q3 is turned off, the second switch unit 22 is turned off.

[0094] Specifically, when the second switch Q2 is on, the fifth resistor R5 and the sixth resistor R6 divide the voltage on the communication line La1, and the divided voltage across the sixth resistor R6 serves as the voltage between the first and second terminals of the third switch Q3. When the fourth square wave signal on the communication line La1 is at a high level, the divided voltage across the sixth resistor R6 is greater than the conduction voltage drop of the third switch Q3, turning the third switch Q3 on. The high voltage is then input to the first controller 50 through the third switch Q3, resulting in a high fifth square wave signal. When the fourth square wave signal on the communication line La1 is at a low level, the third switch Q3 is turned off, and the second terminal of the first controller 50 is connected to the first ground terminal EGND via the seventh resistor R7, forcing the first controller 50 to pull low. This forces a low voltage input to the second terminal of the first controller 50, resulting in a low fifth square wave signal. Therefore, when the fourth square wave signal is high, the fifth square wave signal is also high; when the fourth square wave signal is low, the fifth square wave signal is also low. The fourth and fifth square wave signals are identical. In addition, the seventh resistor R7 is a pull-down resistor.

[0095] In this embodiment, the third switch tube Q3 is a PNP transistor. The base of the PNP transistor is the first terminal of the third switch tube Q3, the emitter of the PNP transistor is the second terminal of the third switch tube Q3, and the collector of the PNP transistor is the third terminal of the third switch tube Q3.

[0096] In addition, the third switch Q3 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, etc. In addition, Figure 3The third switch tube Q3 shown in FIG can be implemented as a plurality of switches connected in parallel.

[0097] In one embodiment, the third switch branch 30 includes an eighth resistor R8 , a ninth resistor R9 , and a first optocoupler U1 .

[0098] The first end of the eighth resistor R8 is connected to the communication line La1, the second end of the eighth resistor R8 is connected to the first end of the light emitter of the first optocoupler U1, the second end of the light emitter of the first optocoupler U1 is connected to the second ground terminal PGND, the first end of the light receiver of the first optocoupler U1 is respectively connected to the second end of the second controller 60 (i.e., pin 2 of the second controller 60) and the first end of the ninth resistor R9, the second end of the ninth resistor R9 is used to input the second DC voltage V2, and the second end of the light receiver of the first optocoupler U1 is connected to the third ground terminal GND. The first end of the light receiver of the first optocoupler U1 is the first end of the third switch branch 30, the second end of the ninth resistor R9 is the second end of the third switch branch 30, and the first end of the eighth resistor R8 is the third end of the third switch branch 30. The second controller 60 is connected to the third ground terminal GND. Furthermore, when the light receiver of the first optocoupler U1 is turned on, the third switch branch 30 is turned on; when the light receiver of the first optocoupler U1 is turned off, the third switch branch 30 is turned off.

[0099] Specifically, the eighth resistor R8 is a current limiting resistor, and the ninth resistor R9 is a pull-up resistor.

[0100] When the second square wave signal on communication line La1 is at a high level, the light emitter of the first optocoupler U1 is forward-conducting, and the light receiver of the first optocoupler U1 is also turned on. The second terminal of the second controller 60 is connected to the third ground terminal GND through the light receiver of the first optocoupler U1. The second terminal of the second controller 60 is forced low, that is, the second terminal input of the second controller 60 is now at a low level, which means that the third square wave signal is at a low level.

[0101] When the second square wave signal on communication line La1 is at a low level, the light emitter of first optocoupler U1 is reversely cut off, and the light receiver of first optocoupler U1 is also turned off. A second DC voltage V2 is input to the second terminal of second controller U2, forcing the second terminal of second controller 60 to be pulled high. The second terminal of second controller 60 is now input at a high level, i.e., the third square wave signal is at a high level.

[0102] In summary, when the second square wave signal is at a low level, the third square wave signal is at a high level; when the second square wave signal is at a high level, the third square wave signal is at a low level. Therefore, the second square wave signal and the third square wave signal are opposite signals. Furthermore, as can be seen from the above embodiment, the first square wave signal and the second square wave signal are also opposite signals. Therefore, the first square wave signal and the third square wave signal are the same signal. After obtaining the third square wave signal, the second controller 60 can determine the corresponding first square wave signal output by the first controller 50, thereby completing the process of the first controller 50 sending a signal to the second controller 60.

[0103] In this embodiment, the first optocoupler U1 also provides isolation. This is applicable to scenarios where the first controller 50 is located in a high-voltage device and the second controller 60 is located in a low-voltage device. The isolation provided by the first optocoupler U1 prevents the voltage on the high-voltage device from affecting the low-voltage device, facilitating stable operation of the second controller 60 and the low-voltage device in which it resides.

[0104] In one embodiment, the fourth switch branch 40 includes a third switch unit 41 , a fourth switch unit 42 and a fifth switch unit 43 .

[0105] The first end of the third switch unit 41 is connected to the first end of the second controller 60 (i.e., pin 1 of the second controller 60). The second end of the third switch unit 41 and the second end of the fifth switch unit 43 are both used to input the second DC voltage V2. The third end of the third switch unit 41 is connected to the first end of the fourth switch unit 42, the second end of the fourth switch unit 42 is connected to the first end of the fifth switch unit 43, and the third end of the fifth switch unit 43 is connected to the communication line La1. The first end of the third switch unit 41 serves as the first end of the fourth switch branch 40, the second end of the third switch unit 41 serves as the second end of the fourth switch branch 40, and the third end of the fifth switch unit 43 serves as the third end of the fourth switch branch 40. Furthermore, when the fifth switch unit 43 is turned on, the fourth switch branch 40 is turned on; when the fifth switch unit 43 is turned off, the fourth switch branch 40 is turned off.

[0106] Specifically, the third switch unit 41 is configured to be turned on or off in response to the fourth square wave signal to establish or disconnect the connection between the first power line La2 and the fourth switch unit 42. The fourth switch unit 42 is configured to be turned on when connected to the first power line La2 and to be turned off when the connection with the first power line La2 is disconnected. The fifth switch unit 43 is configured to be turned on when the fourth switch unit 42 is turned on and to be turned off when the fourth switch unit 42 is turned off, thereby outputting a fifth square wave signal based on the second DC voltage V2.

[0107] In this embodiment, when the fourth square wave signal is at a low level, the third switch unit 41 is turned on, and the second DC voltage V2 is input to the fourth switch unit 42. When the fourth switch unit 42 is turned on, the fifth switch unit 43 is also turned on. The second DC voltage V2 is input to the communication line La1 through the fifth switch unit 43. Therefore, at this time, the communication line La1 receives a high level, meaning that the fourth square wave signal is at a high level.

[0108] When the fourth square wave signal is at a high level, the third switch unit 41 is turned off, disconnecting the first power line La2 from the fourth switch unit 42. When the fourth switch unit 42 is turned off, the fifth switch unit 43 is also turned off. At this point, the communication line La1 receives a low level, meaning the fourth square wave signal is at a low level.

[0109] In summary, when the fourth square wave signal is low, the fifth square wave signal is high; and when the fourth square wave signal is high, the fifth square wave signal is low. Therefore, the fourth and fifth square wave signals are opposite signals. Subsequently, after receiving the fifth square wave signal, the first controller 50 inverts it to determine the fourth square wave signal output by the second controller 60.

[0110] In addition, in this embodiment, the third switch unit 41, the fourth switch unit 42 and the fifth switch unit 43 can also enhance the driving capability to maintain the stable on and off of the fifth switch unit 43, which is conducive to the stable output of the fifth square wave signal.

[0111] In one embodiment, the third switch unit 41 includes a tenth resistor R10 , an eleventh resistor R11 , and a second optocoupler U2 .

[0112] The first end of the tenth resistor R10 and the first end of the eleventh resistor R11 are both used to input the second DC voltage V2. The second end of the tenth resistor R10 is connected to the first end of the light emitter of the second optocoupler U2, which is connected to the first end of the second controller 60. The second end of the eleventh resistor R11 is connected to the first end of the light receiver of the second optocoupler U2, which is connected to the first end of the fourth switch unit 42. The second end of the light emitter of the second optocoupler U2 is connected to the first end of the third switch unit 41, the first end of the tenth resistor R10 is connected to the second end of the third switch unit 41, and the second end of the light receiver of the second optocoupler U2 is connected to the third end of the third switch unit 41. Furthermore, when the light receiver of the second optocoupler U2 is turned on, the third switch unit 41 is turned on; when the light receiver of the second optocoupler U2 is turned off, the third switch unit 41 is turned off.

[0113] Specifically, the eleventh resistor R11 is a current limiting resistor, and the tenth resistor R10 is a pull-up resistor.

[0114] When the fourth square wave signal output by the second controller 60 is at a low level, the light emitter of the second optocoupler U2 is forward-conducted, and the light receiver of the second optocoupler U2 is also turned on. The second DC voltage V2 is input to the first terminal of the fourth switch unit 43 through the light receiver of the second optocoupler U2.

[0115] When the fourth square wave signal is at a high level, the light emitter of the second optical coupler U2 is reversely cut off, the light receiver of the second optical coupler U2 is also turned off, and the second DC voltage V2 is no longer input to the first terminal of the fourth switch unit 43 .

[0116] Similarly, in this embodiment, the second optical coupler U2 can also play an isolation role. The actual application of the second optical coupler U2 is similar to that of the first optical coupler U1 and will not be repeated here.

[0117] In one embodiment, the fourth switch unit 42 includes a twelfth resistor R12 and a fourth switch tube Q4 .

[0118] The first end of the twelfth resistor R12 is connected to the first end of the fourth switch transistor Q4 and the third end of the third switch unit 41, respectively. The second end of the twelfth resistor R12 and the second end of the fourth switch transistor Q4 are both connected to the second ground terminal PGND. The third end of the fourth switch transistor Q4 is connected to the first end of the fifth switch unit 43. The first end of the fourth switch transistor Q4 is the first end of the fourth switch unit 42, and the third end of the fourth switch transistor Q4 is the second end of the fourth switch unit 42. Furthermore, when the fourth switch transistor Q4 is turned on, the fourth switch unit 42 is turned on; when the fourth switch transistor Q4 is turned off, the fourth switch unit 42 is turned off.

[0119] Specifically, when the light receiver of the second optocoupler U2 is turned on, so that the second DC voltage V2 is input to the first end of the fourth switch tube Q4, the voltage drop of the second DC voltage V2 on the twelfth resistor R12 is greater than the conduction voltage drop of the fourth switch tube Q4, and the fourth switch tube Q4 is turned on; when the light receiver of the second optocoupler U2 is disconnected, the second DC voltage V2 is not input to the first end of the fourth switch tube Q4, and the fourth switch tube Q4 is turned off.

[0120] In this embodiment, the fourth switch tube Q4 is an NPN transistor. The base of the NPN transistor is the first terminal of the fourth switch tube Q4, the emitter of the NPN transistor is the second terminal of the fourth switch tube Q4, and the collector of the NPN transistor is the third terminal of the fourth switch tube Q4.

[0121] In addition, the fourth switch Q4 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, etc. In addition, Figure 3 The fourth switch tube Q4 shown in FIG. 1 can be implemented as a plurality of switches connected in parallel.

[0122] In one embodiment, the fifth switch unit 43 includes a thirteenth resistor R13 , a fourteenth resistor R14 , a fifth switch tube Q5 , and a second diode D2 .

[0123] The first end of the thirteenth resistor R13 is connected to the second end of the fourth switch unit 42. The second end of the thirteenth resistor R13 is connected to the first end of the fourteenth resistor R14 and the first end of the fifth switch tube Q5. The second end of the fifth switch tube Q5 and the second end of the fourteenth resistor R14 are both used to input the second DC voltage V2. The third end of the fifth switch tube Q5 is connected to the anode of the second diode D2, and the cathode of the second diode D2 is connected to the communication line La1. The first end of the thirteenth resistor R13 is connected to the first end of the fifth switch unit 43, the second end of the fifth switch tube Q5 is connected to the second end of the fifth switch unit 43, and the cathode of the second diode D2 is connected to the third end of the fifth switch unit 43. Furthermore, when the fifth switch tube Q5 is turned on, the fifth switch unit 43 is turned on; when the fifth switch tube Q5 is turned off, the fifth switch unit 43 is turned off.

[0124] Specifically, the second diode D2 is used to prevent the signal on the communication line La1 from acting on the fifth switch tube Q5, which is beneficial to improving the stability of the fifth switch tube Q5.

[0125] When the fourth switch tube Q4 is turned on, the second DC voltage V2, the fourteenth resistor R14, and the thirteenth resistor R13 form a loop, and the voltage drop across the fourteenth resistor R14 is greater than the conduction voltage drop of the fifth switch tube Q5. The fifth switch tube Q5 is turned on, and the second DC voltage V2 is input to the communication line La1 through the fifth switch tube Q5 and the second diode D2. At this time, the fifth square wave signal is at a high level; when the fourth switch tube Q4 is turned off, the loop of the second DC voltage V2, the fourteenth resistor R14, and the thirteenth resistor R13 is disconnected, the fifth switch tube Q5 is turned off, the second DC voltage V2 is no longer input to the communication line La1, and the fifth square wave signal is at a low level.

[0126] In this embodiment, the fourth switch tube Q4 is a PNP transistor. The base of the PNP transistor is the first terminal of the fourth switch tube Q4, the emitter of the PNP transistor is the second terminal of the fourth switch tube Q4, and the collector of the PNP transistor is the third terminal of the fourth switch tube Q4.

[0127] In addition, the fourth switch Q4 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, etc. In addition, Figure 3 The fourth switch tube Q4 shown in FIG. 1 can be implemented as a plurality of switches connected in parallel.

[0128] In one embodiment, the serial communication circuit 100 further includes a backflow prevention branch 70 and a resistor branch 80. The backflow prevention branch 70 is connected between the communication line La1 and the first ground terminal EGND, and the resistor branch 80 is connected between the communication line La1 and the second ground terminal PGND.

[0129] Specifically, the anti-backflow branch 70 is configured to prevent the signal on the communication line La1 from flowing back through the first ground terminal EGND to the first controller 50. The first controller 50 is connected to the first ground terminal EGND. The resistor branch 80 is configured as a load between the communication line La1 and the second ground terminal PGND.

[0130] In the related art, for the first controller 50 and the second controller 60 that do not share a common ground, if the first controller 50 and the second controller 60 are to communicate serially, it is necessary to set up additional grounding wires in the first controller 50 and the second controller 60. However, in the embodiments of the present application, by providing the anti-backflow branch 70 and the resistance branch 80, the first ground terminal EGND and the second ground terminal PGND can be established, so that when the first controller 50 and the second controller 60 communicate serially, there is no need to set up additional grounding wires. In other words, compared with the solutions in the related art, the present application can reduce the number of connecting wires and reduce the cost of wire materials.

[0131] In one embodiment, the backflow prevention branch 70 includes a third diode D3 , wherein an anode of the third diode D3 is connected to the first ground terminal EGND, and a cathode of the third diode D3 is connected to the communication line La1 .

[0132] In one embodiment, the resistor branch 80 includes a fifteenth resistor R15 , wherein a first end of the fifteenth resistor R15 is connected to the second ground terminal PGND, and a second end of the fifteenth resistor R15 is connected to the communication line La1 .

[0133] In one embodiment, if Figure 4 As shown, the serial communication circuit 100 further includes a first non-isolated power branch 90a and a first isolated power branch 90b.

[0134] The first end of the first non-isolated power branch 90a and the first end of the first isolated power branch 90b are both connected to the first power line La2, and the second end of the first non-isolated power branch 90a and the second end of the first isolated power branch 90b are both connected to the second power line La3. In some embodiments, the first power line La2 and the second power line La3 are the live line and the neutral line, respectively.

[0135] Specifically, the first non-isolated power branch 90a is configured to convert the AC voltage on the first power line La2 and the second power line La3 to generate a first DC voltage V1 on the first power line La2. The first isolated power branch 90b is configured to convert the AC voltage on the first power line La2 and the second power line La3 to generate a second DC voltage V2.

[0136] Through the above-described method, the first DC voltage V1 and the first power line La2 are co-linearly connected, and the second DC voltage V2 is obtained through the first power line La2 and the second power line La3. Therefore, when the first controller 50 and the second controller 60 communicate serially, no additional connecting wire for providing the DC voltage is required, thereby saving wire material.

[0137] In one embodiment, the first non-isolated power branch 90 a includes a fourth diode D4 , a fifth diode D5 , a first inductor L1 , and a first power chip U3 .

[0138] Among them, the anode of the fourth diode D4 is connected to the second power line La3, the cathode of the fourth diode D4 is connected to the anode of the fifth diode D5, the cathode of the fifth diode D5 is connected to the switch pin of the first power chip U3 (that is, the 4th pin of the first power chip U3), the first end of the first inductor L1 is respectively connected to the first power line La2 and the voltage output pin of the first power chip U3 (that is, the 1st pin of the first power chip U3), and the second end of the first inductor L1 is connected to the clock pin of the first power chip U3 (that is, the 5th pin of the first power chip U3).

[0139] In another embodiment, the first non-power branch 90 a further includes a first capacitor C1 , a second capacitor C2 , a third capacitor C3 , a fourth capacitor C4 , and a third inductor L3 .

[0140] The first end of the first capacitor C1 is connected to the cathode of the fifth diode D5 and the first end of the third inductor L3, respectively. The second end of the first capacitor C1 is connected to the first power line La2, the second end of the second capacitor C2, the first end of the third capacitor C3, and the first end of the first inductor L1, respectively, at a first connection point P1. The second end of the third inductor L3 is connected to the first end of the second capacitor C2 and the switch pin of the first power chip U3, respectively. The first end of the fourth capacitor C4 is connected to the clock pin of the first power chip U3, and the second end of the fourth capacitor C4 is connected to the power pin of the first power chip U3. The second end of the third capacitor C3 and the ground pin of the first power chip U3 are both connected to the first ground terminal EGND.

[0141] In this embodiment, the fourth capacitor C4 and the fifth capacitor C5 are used for rectification. The first capacitor C1, the third inductor L3 and the second capacitor C2 form a π-type filter. The third capacitor C3 and the fourth capacitor C4 are both used for filtering. After the voltage on the first power line La1 is converted by the first power chip U3, the voltage output pin of the first power chip U3 outputs the first DC voltage V1 to the first connection point P1. This achieves the colinearity of the first DC voltage V1 and the first power line La1. Among them, the first power chip U3 in the above control scheme is well known, so the specific operation is not described here. The first power chip U3 can be a BUCK power chip of the model MP2451.

[0142] In one embodiment, the first isolated power branch 90b includes an isolated switching power supply U4.

[0143] Among them, the first input end of the isolated switching power supply U4 is connected to the first power line La2, the second input end of the isolated switching power supply U4 is connected to the second power line La3, the output end of the isolated switching power supply U4 is used to output the second DC voltage V2, and the output ground end of the isolated switching power supply U4 is connected to the third ground end GND.

[0144] In this embodiment, the specific implementation process of the isolated switching power supply U4 is within the scope that can be easily understood by those skilled in the art and will not be described in detail here.

[0145] An embodiment of the present application further provides a serial communication system, which includes the serial communication circuit 100 in any embodiment of the present application.

[0146] Please refer to Figure 5 , Figure 5 Schematic diagram of a serial communication system.

[0147] In one embodiment, if Figure 5 As shown, the serial communication system 1000 includes a first device 1001 and a second device 1002 for performing serial communication.

[0148] The first device 1001 includes the first controller 50, the first switch branch 10, the second switch branch 20, the backflow prevention branch 70, and the first non-isolated power branch 90a of the serial communication system 100 of the above embodiment. The second device 1002 includes the second controller 60, the third switch branch 30, the fourth switch branch 40, the resistor branch 80, and the first isolated power branch 90b of the above embodiment.

[0149] Specifically, the first device 1001 and the second device 1002 achieve serial communication via three connecting lines: a communication line La1, a first power line La2, and a third power line La3. The first switch branch 10, the second switch branch 20, the third switch branch 30, the fourth switch branch 50, the backflow prevention branch 70, and the resistor branch 80 are all connected to the communication line La1. The first non-isolated power branch 90a and the first isolated power branch 90b are both connected to the first power line La2 and the second power line La3. The specific process of implementing serial communication has been described in detail in the above embodiment and will not be repeated here.

[0150] In the related art, to achieve serial communication between two devices, usually at least two power lines (such as the first power line La2 and the third power line La3 in the embodiment of the present application), a DC voltage line, a ground line and two communication lines are required, a total of 6 lines.

[0151] In the embodiment of the present application, a first switch branch 10, a second switch branch 20, a third switch branch 30, and a fourth switch branch 50 are provided to enable serial communication between the first device 1001 and the second device 1002 via a single communication line La1, thereby reducing the number of communication lines. A backflow prevention branch 70 and a resistor branch 80 are provided to establish a connection between the ground of the first device 1001 and the ground of the second device 1002, thereby reducing the number of grounding lines. A first non-isolated power supply branch 90a and a first isolated power supply branch 90b are provided to collinearly align the first power supply line La2 with the first DC voltage V1, and to obtain the second DC voltage V2 via the first power supply line La2 and the second power supply line La3, thereby reducing the number of DC voltage lines. Therefore, the embodiment of the present application only requires three wires, which saves half the wire material compared to the technical solutions in the related art, thus helping to reduce costs.

[0152] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Based on the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the present application as described above. For the sake of simplicity, they are not provided in detail. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A serial communication circuit, characterized in that: include: A first switch branch, a second switch branch, a third switch branch, a fourth switch branch, a first controller, and a second controller; The first end of the first switch branch is connected to the first end of the first controller, the first end of the second switch branch is connected to the third end of the first controller, the second end of the second switch branch is connected to the second end of the first controller, the first end of the third switch branch is connected to the second end of the second controller, the first end of the fourth switch branch is connected to the first end of the second controller, the second end of the first switch branch is connected to the first end of the second controller, the second end of the third switch branch and the second end of the fourth switch branch are both used to input a second DC voltage, and the third end of the first switch branch, the third end of the second switch branch, the third end of the third switch branch, and the third end of the fourth switch branch are all connected to the same communication line; The first controller is configured to output a first square wave signal at a first terminal of the first controller; The first switch branch is configured to be turned on or off in response to the first square wave signal to output a second square wave signal to the communication line based on the first DC voltage on the first power line; The third switch branch is configured to receive the second square wave signal through the communication line, and be turned on or off in response to the second square wave signal to output a third square wave signal based on the second DC voltage, and transmit the third square wave signal to the second terminal of the second controller; The second controller is configured to output a fourth square wave signal at the first terminal of the second controller; The fourth switch branch is configured to be turned on or off in response to the fourth square wave signal to output a fifth square wave signal to the communication line based on the second DC voltage; The first controller is further configured to output a first level signal at a third terminal of the first controller; The second switch branch is configured to be turned on or off in response to the fifth square wave signal when receiving the first level signal, so as to transmit the fifth square wave signal to the second end of the first controller.

2. The serial communication circuit according to claim 1, wherein: The first controller is further configured to output a second level signal at the third terminal of the first controller when outputting the first square wave signal, and the duration of the second level signal is greater than or equal to the duration of the first square wave signal; The second switch branch is further configured to be turned off when receiving the second level signal.

3. The serial communication circuit according to claim 1, wherein: The serial communication circuit also includes an anti-backflow branch and a resistance branch; The anti-backflow branch is connected between the communication line and the first ground terminal, and the anti-backflow branch is configured to prevent the signal on the communication line from flowing back to the first controller through the first ground terminal, wherein the first controller is connected to the first ground terminal; The resistance branch is connected between the communication line and the second ground terminal, and the resistance branch is configured as a load between the communication line and the second ground terminal.

4. The serial communication circuit according to claim 1, wherein: The first switch branch includes a first resistor, a second resistor, a first switch tube and a first diode; The first end of the first resistor is connected to the first end of the first controller, the second end of the first resistor is respectively connected to the first end of the second resistor and the first end of the first switch tube, the second end of the second resistor and the second end of the first switch tube are both connected to the first power line to input the first DC voltage, the third end of the first switch tube is connected to the anode of the first diode, and the cathode of the first diode is connected to the communication line.

5. The serial communication circuit according to claim 1, wherein: The second switch branch includes a first switch unit and a second switch unit; The first end of the first switch unit is connected to the third end of the first controller, the second end of the first switch unit is connected to the first end of the second switch unit, the second end of the second switch unit is connected to the communication line, and the third end of the second switch unit is connected to the second end of the first controller; The first switch unit is configured to be turned on when receiving the first level signal, so as to transmit the third level signal to the first end of the second switch unit; The second switch unit is configured to be turned on or off in response to the fifth square wave signal when receiving the third level signal, so as to transmit the fifth square wave signal to the second end of the first controller.

6. The serial communication circuit according to claim 5, characterized in that: The first switch unit includes a third resistor, a fourth resistor and a second switch tube; The first end of the third resistor is connected to the third end of the first controller, the second end of the third resistor is respectively connected to the first end of the fourth resistor and the first end of the second switch tube, the third end of the second switch tube is connected to the first end of the second switch unit, and the second end of the second switch tube and the second end of the fourth resistor are both connected to the first ground end.

7. The serial communication circuit according to claim 5, characterized in that: The second switch unit includes a fifth resistor, a sixth resistor, a seventh resistor and a third switch tube; The first end of the fifth resistor is connected to the second end of the first switch unit, the second end of the fifth resistor is respectively connected to the first end of the sixth resistor and the first end of the third switch tube, the second end of the third switch tube and the second end of the sixth resistor are both connected to the communication line, the third end of the third switch tube is respectively connected to the first end of the seventh resistor and the second end of the first controller, and the second end of the seventh resistor is connected to the first ground end.

8. The serial communication circuit according to claim 1, wherein: The third switch branch includes an eighth resistor, a ninth resistor and a first optical coupler; The first end of the eighth resistor is connected to the communication line, the second end of the eighth resistor is connected to the first end of the light emitter of the first optocoupler, the second end of the light emitter of the first optocoupler is connected to the second ground end, the first end of the light receiver of the first optocoupler is respectively connected to the second end of the second controller and the first end of the ninth resistor, the second end of the ninth resistor is used to input the second DC voltage, the second end of the light receiver of the first optocoupler is connected to the third ground end, wherein the second controller is connected to the third ground end.

9. The serial communication circuit according to claim 1, wherein: The fourth switch branch includes a third switch unit, a fourth switch unit and a fifth switch unit; The first end of the third switch unit is connected to the first end of the second controller, the second end of the third switch unit and the second end of the fifth switch unit are both used to input the second DC voltage, the third end of the third switch unit is connected to the first end of the fourth switch unit, the second end of the fourth switch unit is connected to the first end of the fifth switch unit, and the third end of the fifth switch unit is connected to the communication line; The third switch unit is configured to be turned on or off in response to the fourth square wave signal to establish or disconnect the connection between the first power line and the fourth switch unit; The fourth switch unit is configured to be turned on when connected to the first power line, and turned off when disconnected from the first power line; The fifth switching unit is configured to be turned on when the fourth switching unit is turned on, and to be turned off when the fourth switching unit is turned off, so as to output the fifth square wave signal based on the second DC voltage.

10. The serial communication circuit according to claim 9, characterized in that: The third switch unit includes a tenth resistor, an eleventh resistor and a second optical coupler; The first end of the tenth resistor and the first end of the eleventh resistor are both used to input the second DC voltage, the second end of the tenth resistor is connected to the first end of the light emitting device of the second optocoupler, the second end of the light emitting device of the second optocoupler is connected to the first end of the second controller, the second end of the eleventh resistor is connected to the first end of the light receiver of the second optocoupler, and the second end of the light receiver of the second optocoupler is connected to the first end of the fourth switch unit.

11. The serial communication circuit according to claim 9, wherein: The fourth switch unit includes a twelfth resistor and a fourth switch tube; The first end of the twelfth resistor is respectively connected to the first end of the fourth switch tube and the third end of the third switch unit, the second end of the twelfth resistor and the second end of the fourth switch tube are both connected to the second ground end, and the third end of the fourth switch tube is connected to the first end of the fifth switch unit.

12. The serial communication circuit according to claim 9, wherein: The fifth switch unit includes a thirteenth resistor, a fourteenth resistor, a fifth switch tube and a second diode; The first end of the thirteenth resistor is connected to the second end of the fourth switch unit, the second end of the thirteenth resistor is respectively connected to the first end of the fourteenth resistor and the first end of the fifth switch tube, the second end of the fifth switch tube and the second end of the fourteenth resistor are both used to input the second DC voltage, the third end of the fifth switch tube is connected to the anode of the second diode, and the cathode of the second diode is connected to the communication line.

13. The serial communication circuit according to any one of claims 1 to 12, characterized in that: The serial communication circuit further includes a first non-isolated power supply branch and a first isolated power supply branch; The first end of the first non-isolated power branch and the first end of the first isolated power branch are both connected to the first power line, and the second end of the first non-isolated power branch and the second end of the first isolated power branch are both connected to the second power line; The first non-isolated power branch is configured to convert the AC voltages on the first power line and the second power line to generate the first DC voltage on the first power line; The first isolated power branch is configured to convert the AC voltage on the first power line and the second power line to generate the second DC voltage.

14. The serial communication circuit according to claim 13, wherein: The first non-isolated power supply branch includes a fourth diode, a fifth diode, a first inductor and a first power supply chip, and the first isolated power supply branch includes an isolated switching power supply; The anode of the fourth diode is connected to the second power line, the cathode of the fourth diode is connected to the anode of the fifth diode, the cathode of the fifth diode is connected to the switch pin of the first power chip, the first end of the first inductor is connected to the first power line and the voltage output pin of the first power chip respectively, and the second end of the first inductor is connected to the clock pin of the first power chip; The first input terminal of the isolated switching power supply is connected to the first power line, the second input terminal of the isolated switching power supply is connected to the second power line, the output terminal of the isolated switching power supply is used to output the second DC voltage, and the output ground terminal of the isolated switching power supply is connected to the third ground terminal.

15. A serial communication system, characterized in that: The method comprises the serial communication circuit according to any one of claims 1 to 14.

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