Pixel circuit and display panel

By using pixel circuits in the display panel, the pulse wave width adjustment mechanism is used to accurately control the brightness of micro -luminous components to solve the problem of insufficient brightness control accuracy in the high -resolution display panel, and improves the lighting benefits and the quality of the picture.

CN115762395BActive Publication Date: 2025-01-28PLAYNITRIDE DISPLAY CO LTD
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Patent Information

Application Number
CN202211557775.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-06
Publication Date
2025-01-28
Estimated Expiration
2042-12-06

AI Technical Summary

Technical Problem

In high-resolution micro display panels, it is necessary to accurately control the brightness of the micro-luminous elements, especially in display images with a large number of gray scales. The prior art is difficult to achieve sufficient control accuracy, resulting in a reduced luminous efficiency.

Method used

The pixel circuit, including current generator, switch, and time controller, and control the drive current and luminous time through pulse wave width (PWM) mechanism, accurately adjust the brightness of the luminous component.

Benefits of technology

By accurately control the brightness of the luminous element, the lighting benefits of the display panel and the saturation of the screen are improved, and the requirements for the control accuracy of the component are reduced.

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Abstract

The present invention provides a pixel circuit and a display panel. The pixel circuit includes a current generator, a switch and a time controller. The pixel circuit is configured in the display panel. The current generator provides a driving current, wherein the current generator controls the driving current according to a pulse amplitude modulation mechanism. The switch is coupled in series with the current generator and the light-emitting element. The switch is turned on or off according to a control signal, wherein the control signal is a pulse width modulation signal. The time controller generates a control signal. The time controller receives a set voltage and adjusts the pulse width of the control signal according to the voltage value of the set voltage.
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Description

Technical Field

[0001] The present invention relates to a pixel circuit, and more particularly to a pixel circuit and a display panel capable of reducing the requirements on the control accuracy of components. Background Art

[0002] In the known technical field, when the number of grayscales of the display image to be presented by the pixel circuit in the display panel is too large, precise control is required. In micro display panels with higher resolution requirements, it is more stringent to more finely control the luminous brightness provided by the micro light-emitting elements. Taking the display data with 16 bits as an example, it is difficult to accurately cut the brightness of the display element, whether it is through the luminous time or the driving current. In addition, in the driving circuit, the electronic components will be affected by factors such as resistance, parasitic capacitance, electrical characteristics of the light-emitting element, and environmental parameters, which will reduce the control accuracy that can be achieved and reduce the luminous efficiency of the display panel. Summary of the invention

[0003] The present invention is directed to a pixel circuit and a display panel, which can improve the accuracy of display brightness.

[0004] According to an embodiment of the present invention, a pixel circuit includes a current generator, a switch and a time controller. The pixel circuit is configured in a display panel. The current generator provides a driving current, wherein the current generator controls the driving current according to a pulse amplitude modulation (PAM) mechanism. The switch is coupled in series with the current generator and the light-emitting element. The switch is turned on or off according to a control signal, wherein the control signal is a pulse width modulation (PWM) signal. The time controller generates a control signal. The time controller receives a control voltage and adjusts the pulse width of the control signal according to a voltage value of a set voltage.

[0005] According to an embodiment of the present invention, a display panel includes a plurality of sub-pixels. The plurality of sub-pixels are configured in a matrix. The sub-pixels include a pixel circuit. The pixel circuit includes a current generator, a switch, and a time controller. The current generator provides a driving current, wherein the current generator controls the driving current according to a pulse amplitude modulation mechanism. The switch is coupled in series with the current generator and the light-emitting element. The switch is turned on or off according to a control signal, wherein the control signal is a pulse width modulation signal. The time controller generates a control signal. The time controller receives a control voltage and adjusts the pulse width of the control signal according to a voltage value of a set voltage.

[0006] According to the above, the pixel circuit of the embodiment of the present invention can adjust the brightness via a control signal, wherein the control signal is a pulse width modulation signal. Specifically, the width of the control signal reflects the lighting ratio of the pixel circuit within a unit time period. In this way, the pixel circuit can divide the grayscale value through the control signal generated by the time controller, thereby reducing the control accuracy requirements of the components. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and together with the description serve to explain the principles of the present invention.

[0008] Figure 1 A schematic diagram showing a pixel circuit according to an embodiment of the present invention;

[0009] Figure 2A A schematic diagram showing a pixel circuit according to an embodiment of the present invention;

[0010] Figure 2B Showing the present invention Figure 2A Operation waveform diagram of the pixel circuit of the embodiment;

[0011] Figure 3A A schematic diagram showing a pixel circuit according to an embodiment of the present invention;

[0012] Figure 3B Showing the present invention Figure 3A Operation waveform diagram of the pixel circuit of the embodiment;

[0013] Figure 4 A schematic diagram showing a pixel circuit according to an embodiment of the present invention is shown.

[0014] Description of Reference Numerals

[0015] 100, 200, 300, 400: pixel circuit;

[0016] 110, 210, 310, 410: current generator;

[0017] 120, 220, 320, 420: switch;

[0018] 130, 230, 330, 430: light emitting elements;

[0019] 140, 240, 340, 440: time controller;

[0020] 241: triangle wave generating circuit;

[0021] 242: comparison circuit;

[0022] 343: Logic operation circuit;

[0023] 3431: Delayed string;

[0024] 3432: logic gate;

[0025] 344: delay adjustment circuit;

[0026] 450: Setting voltage generator;

[0027] Amp: operational amplifier;

[0028] Buf_1~Buf_N4: buffer;

[0029] C1, C2: capacitors;

[0030] Cdrive: drive current;

[0031] CON: control signal;

[0032] DATA: Display data;

[0033] DP: display panel;

[0034] GND: ground terminal;

[0035] L: delay amount;

[0036] M1: transistor;

[0037] Pul_L: delayed clock signal;

[0038] PULSE: clock signal;

[0039] R1: resistor;

[0040] Tri: triangle wave signal;

[0041] Vref: reference voltage;

[0042] Vset: set voltage. DETAILED DESCRIPTION

[0043] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0044] Please refer to Figure 1 , Figure 1A schematic diagram of a pixel circuit according to an embodiment of the present invention is shown. The pixel circuit 100 includes a current generator 110, a switch 120, a light-emitting element 130, and a time controller 140. The pixel circuit 100 is located in the display panel DP. The cathode of the light-emitting element 130 is coupled to the ground terminal GND. The current generator 110 provides a driving current Cdrive. In this embodiment, the current generator 110 can control the generated driving current Cdrive by using a pulse amplitude modulation (PAM) method. Specifically, the driving current Cdrive is used to determine the set brightness of the pixel circuit 100.

[0045] In the present embodiment, the switch 120, the current generator 110 and the light emitting element 130 may be coupled in series with each other. The switch 120 may be turned on or off according to the control signal CON. In the present embodiment, the control signal CON may be a pulse width modulation (PWM) signal. The time controller 140 is used to generate the control signal CON. The time controller 140 may receive a set voltage Vset and adjust the pulse width of the control signal CON according to the voltage value of the set voltage Vset. Specifically, the time controller 140 may adjust the duty ratio of the pulse width of the control signal CON by setting the voltage Vset, and thereby adjust the percentage of time that the light emitting element 130 is lit in a unit time. In other words, the time controller 140 may adjust the pulse width of the control signal CON according to the voltage value of the set voltage Vset.

[0046] In detail, when the control signal CON has a positive pulse width, the switch 120 can be turned on and can provide a driving current Cdrive to the light emitting element 130, and drive the light emitting element 130 to emit light. Therefore, the pixel circuit 100 can adjust the brightness generated by the light emitting element 130 based on the driving current Cdrive generated by the current generator 110 and by adjusting the duty cycle of the control signal CON.

[0047] In this embodiment, the current generator 110 sets the set brightness that can be generated by the light-emitting element 130 by providing the driving current Cdrive. The time controller 140 can divide the above-mentioned set brightness through the generated control signal CON to adjust the light-emitting brightness generated by the light-emitting element 130. In this way, by adjusting the pulse width of the driving current Cdrive and the control signal CON, the accuracy of the light-emitting brightness generated by the light-emitting element 130 can be more finely controlled and effectively improved. In other words, under high-bit display data (for example, 16 bits), the time controller 140 can accurately cut the brightness of the light-emitting element 130 to improve the saturation and quality of the picture.

[0048] In the present embodiment, the light-emitting element 130 may be a micro light-emitting diode (Micro LED) or any form of light-emitting diode. The switch 120 may be a transistor switch. For example, in the present embodiment, the switch 120 may be constructed by an N-type metal oxide semi-conductor field-effect transistor (NMOSFET). In other embodiments of the present invention, the switch 120 may be constructed by a P-type metal oxide semi-conductor field-effect transistor (PMOSFET), without any specific limitation.

[0049] In this embodiment, a plurality of sub-pixels (not shown) may be provided in the display panel DP. Each sub-pixel may include a pixel circuit 100. The plurality of sub-pixels may be arranged in a matrix in the display panel DP.

[0050] In this embodiment, a plurality of pixel circuits 100 may be disposed in a display area (not shown) of the display panel DP.

[0051] Please refer to Figure 2A , Figure 2A1 is a schematic diagram of a pixel circuit according to an embodiment of the present invention. In this embodiment, the current generator 110 sets the set brightness that the light-emitting element 130 can generate by providing a driving current Cdrive. The time controller 140 can generate a control signal Cdrive by generating a control signal Cdrive. In this embodiment, the pixel circuit 200 includes a current generator 210, a switch 220, a light-emitting element 230 and a time controller 240. The cathode of the light-emitting element 230 is coupled to the ground terminal GND. The time controller 240 includes a triangular wave generating circuit 241 and a comparison circuit 242. The triangular wave generating circuit 241 includes an operational amplifier Amp, a capacitor C1 and a resistor R1. The first input terminal of the operational amplifier Amp can receive a clock signal PULSE, the second input terminal of the operational amplifier Amp can receive a reference voltage Vref, and the output terminal of the operational amplifier Amp can generate a triangular wave signal Tri. The capacitor C1 is coupled between the output terminal of the operational amplifier Amp and the first input terminal of the operational amplifier Amp. The resistor R1 is connected in series between the paths where the first input terminal of the operational amplifier Amp receives the clock signal PULSE. The triangle wave generating circuit 241 generates a triangle wave signal Tri according to the clock signal PULSE. In this embodiment, the first input terminal of the operational amplifier Amp is a negative input terminal, and the second input terminal of the operational amplifier Amp can be a positive input terminal. In this embodiment, the reference voltage Vref can be a reference ground voltage (0 volts).

[0052] In addition, the comparison circuit 242 is coupled to the output terminal of the triangle wave generating circuit 241. The comparison circuit 242 receives the triangle wave signal Tri and the setting voltage Vset, and compares the triangle wave signal Tri with the setting voltage Vset to generate the control signal CON, wherein in this embodiment, the setting voltage Vset may be negatively correlated with the pulse width of the control signal CON.

[0053] For example, the comparison circuit 242 can be constructed by an operational amplifier. The comparison circuit 242 can have a positive input terminal and a negative input terminal. The positive input terminal of the comparison circuit 242 can receive the triangular wave signal Tri, and the negative input terminal of the comparison circuit 242 can receive the set voltage Vset. Figure 2A as well as Figure 2B ,in Figure 2B Showing the present invention Figure 2A Operation waveform diagram of the pixel circuit of the embodiment. When the triangular wave signal Tri is greater than the set voltage Vset, the comparison circuit 242 can output a control signal CON of logic value 1; conversely, when the triangular wave signal Tri is less than the set voltage Vset, the comparison circuit 242 can output a control signal CON of logic value 0. In this embodiment, the smaller the set voltage Vset, the wider the pulse width of the pulse signal CON.

[0054] To further illustrate, in this embodiment, when the voltage value of the set voltage Vset is lower, the pulse signal CON generated by the time controller 240 may have a relatively large duty cycle. That is, the pulse signal CON may have a relatively long positive pulse width. The switch 220 may be turned on corresponding to the positive pulse width of the pulse signal CON, and increase the time for providing the drive current Cdrive to the light-emitting element 230 to increase the brightness provided by the light-emitting element 230. Conversely, when the voltage value of the set voltage Vset is higher, the pulse signal CON generated by the time controller 240 may have a relatively small duty cycle. That is, the pulse signal CON may have a relatively short positive pulse width. The switch 220 may be turned on corresponding to the positive pulse width of the pulse signal CON, and reduce the time for providing the drive current Cdrive to the light-emitting element 230 to reduce the brightness provided by the light-emitting element 230.

[0055] In this embodiment, the current generator 210 can be implemented by using any form of pulse amplitude modulation current generating circuit known to those skilled in the art without any specific limitation.

[0056] Please refer to Figure 3A , Figure 3A A schematic diagram of a pixel circuit according to an embodiment of the present invention is shown. In this embodiment, the pixel circuit 300 includes a current generator 310, a switch 320, a light-emitting element 330, and a time controller 340. The time controller 340 includes a logic operation circuit 343 and a delay adjustment circuit 344. The logic operation circuit 343 includes buffers Buf_1 to Buf_N and a logic gate 3432. The buffers Buf_1 to Buf_N are coupled in series to form a delay string 3431. The delay string 3431 is used to delay the clock signal PULSE to generate a delayed clock signal Pul_L. The logic gate 3432 performs a logic operation on the clock signal PULSE and the delayed clock signal Pul_L to generate a control signal CON. In this embodiment, the logic gate 3432 can be an AND gate. In this embodiment, the number of buffers Buf_1 to Buf_N can be designed according to the needs, and the present invention is not limited. The buffers Buf_1 to Buf_N can be buffers with non-inverting outputs, or they can be inverters. When the buffers Buf_1 ˜Buf_N are inverters, the number of the buffers Buf_1 ˜Buf_N may be an even number.

[0057] The delay adjustment circuit 344 is coupled to the logic operation circuit 343. The delay adjustment circuit 344 provides a delay L according to the set voltage Vset. The delay adjustment circuit 344 includes a transistor M1 and a capacitor C2. The first end of the transistor M1 is coupled to the output end of the buffer Buf_1; the second end of the transistor M1 is coupled to the first end of the capacitor C2; the second end of the capacitor C2 is coupled to the reference ground GND; and the control end of the transistor M1 receives the set voltage Vset. In this embodiment, the cathode of the light emitting element 330 can be grounded with the second end of the capacitor C2.

[0058] The logic operation circuit 343 receives the clock signal PULSE and delays the clock signal PULSE according to the delay amount L to generate a delayed clock signal Pul_L. In addition, the logic operation circuit 343 performs a logic operation on the clock signal PULSE and the delayed clock signal Pul_L to generate a control signal CON, wherein the setting voltage Vset is positively correlated with the pulse width of the control signal CON.

[0059] Specifically, the clock signal PULSE and the delayed clock signal Pul_L can both be square waves, and the logic gate 3432 is an AND gate. The delayed clock signal Pul_L and the clock signal PULSE can have a phase difference. Figure 3A , Figure 3B ,in Figure 3B Showing the present invention Figure 3A Operation waveform diagram of the pixel circuit of the embodiment. When the clock signal PULSE and the delayed clock signal Pul_L are both at logic value 1, the output of the logic gate 3432 is the control signal CON of logic value 1; conversely, when at least one of the clock signal PULSE and the delayed clock signal Pul_L is at logic value 0, the logic gate 3432 can output the control signal CON of logic value 0. Therefore, if the set voltage Vset is larger, the phase difference between the clock signal PULSE and the delayed clock signal Pul_L can be smaller, and the positive pulse width of the control signal CON can be wider.

[0060] Therefore, when the brightness of the light emitting element 330 is to be increased, the positive pulse width of the control signal CON can be increased by increasing the voltage value of the setting voltage Vset and reducing the phase difference between the clock signal PULSE and the delayed clock signal Pul_L. Conversely, when the brightness of the light emitting element 330 is to be decreased, the positive pulse width of the control signal CON can be decreased by reducing the voltage value of the setting voltage Vset and increasing the phase difference between the clock signal PULSE and the delayed clock signal Pul_L.

[0061] The positive pulse of the control signal CON can turn on the switch 320 and transmit the driving current Cdrive to the light emitting element 330 to drive the light emitting element 330 to emit light. Therefore, by adjusting the positive pulse width of the control signal CON, the light emitting brightness of the light emitting element 330 can be effectively adjusted.

[0062] Please refer to Figure 4 , Figure 4 Schematic diagram of a pixel circuit according to an embodiment of the present invention is shown. In this embodiment, the pixel circuit 400 includes a current generator 410, a switch 420, a light-emitting element 430, a time controller 440 and a set voltage generator 450. The voltage generator 450 receives display data DATA and generates a set voltage Vset according to the grayscale value of the display data DATA. Specifically, the time controller 440 adjusts the pulse width of the control signal CON according to the set voltage Vset. Since the pulse width of the control signal CON determines the lighting ratio of the pixel circuit 400, the voltage generator 450 can generate the set voltage Vset that meets the actual needs through the grayscale value of the display data DATA. The time controller 440 then generates the control signal CON according to the set voltage Vset control signal. In this way, after the current generator 410 provides the driving current Cdrive, that is, determines the maximum brightness of the pixel circuit 100, the control signal CON turns on the switch 420 and switches the brightness of the light-emitting element 430.

[0063] The implementation details of the current generator 410 , the switch 420 , the light emitting element 430 and the time controller 440 have been described in detail in the aforementioned embodiments and will not be elaborated herein.

[0064] According to the above, the pixel circuit of the present invention can adjust the brightness through the control signal, wherein the control signal is a pulse width modulation signal. Specifically, the width of the control signal reflects the lighting ratio of the pixel circuit in a unit time period. In this way, the pixel circuit can divide the grayscale value through the control signal generated by the time controller, thereby reducing the control accuracy requirements of the components. In addition, the voltage generator can generate a set voltage through the grayscale value of the display data to meet actual needs.

[0065] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A pixel circuit, configured in a display panel, comprising: A current generator for providing a driving current, wherein the current generator controls the driving current according to a pulse amplitude modulation mechanism; A switch, coupled in series with the current generator and the light-emitting element, and turned on or off according to a control signal, wherein the control signal is a pulse width modulation signal; as well as A time controller is used to generate the control signal, the time controller receives a set voltage, and adjusts the pulse width of the control signal according to the voltage value of the set voltage, The time controller comprises: a logic operation circuit that receives a clock signal, delays the clock signal according to a delay amount to generate a delayed clock signal, and performs a logic operation on the clock signal and the delayed clock signal to generate the control signal; and A delay adjustment circuit is coupled to the logic operation circuit and is used to provide the delay according to the setting voltage. The logic operation circuit comprises: A plurality of buffers are coupled in series in sequence to form a delay string, wherein the delay string is used to delay the clock signal to generate the delayed clock signal; and a logic gate, performing a logic operation on the clock signal and the delayed clock signal to generate the control signal, The delay adjustment circuit comprises: A transistor has a first end coupled to a coupling end point of a first buffer and a second buffer, a second end of the transistor coupled to a reference ground end, and a control end of the transistor receiving the set voltage, wherein the plurality of buffers include the first buffer and the second buffer connected in series in sequence.

2. The pixel circuit according to claim 1, wherein the timing controller comprises: A triangular wave generating circuit, for generating a triangular wave signal according to the clock signal; as well as The comparison circuit is coupled to the triangle wave generating circuit and compares the triangle wave signal with the setting voltage to generate the control signal.

3. The pixel circuit according to claim 2, wherein the triangle wave generating circuit comprises: An operational amplifier having a first input terminal for receiving the clock signal, a second terminal of the operational amplifier for receiving a reference voltage, and an output terminal of the operational amplifier for generating the triangular wave signal; as well as The capacitor is coupled between the output terminal of the operational amplifier and the first input terminal of the operational amplifier. 4 . The pixel circuit according to claim 3 , wherein the first input terminal of the operational amplifier is a negative input terminal, and the second input terminal of the operational amplifier is a positive input terminal.

5. The pixel circuit according to claim 3, wherein the triangle wave generating circuit further comprises: The resistor is connected in series between the paths of the first input terminal of the operational amplifier receiving the clock signal. 6 . The pixel circuit according to claim 2 , wherein the set voltage is negatively correlated with a pulse width of the control signal.

7. The pixel circuit according to claim 1, wherein the delay amount adjustment circuit further comprises: The capacitor is coupled between the second terminal of the transistor and the reference ground terminal. The pixel circuit according to claim 1 , wherein the logic gate is an AND gate. 9 . The pixel circuit according to claim 1 , wherein the set voltage is positively correlated with the control signal pulse width.

10. The pixel circuit according to claim 1, further comprising: The setting voltage generator receives display data and generates the setting voltage according to the grayscale value of the display data. 11 . The pixel circuit according to claim 1 , wherein the light emitting element is a micro light emitting diode, and the switch is a transistor switch.

12. A display panel, comprising: A plurality of sub-pixels, the plurality of sub-pixels being arranged in a matrix, each of the plurality of sub-pixels comprising a pixel circuit, wherein the pixel circuit comprises: A current generator for providing a driving current, wherein the current generator controls the driving current according to a pulse amplitude modulation mechanism; a switch, coupled in series with the current generator and the light-emitting element, and turned on or off according to a control signal, wherein the control signal is a pulse width modulation signal; and A time controller is used to generate the control signal, the time controller receives a set voltage, and adjusts the pulse width of the control signal according to the voltage value of the set voltage, The time controller comprises: a logic operation circuit that receives a clock signal, delays the clock signal according to a delay amount to generate a delayed clock signal, and performs a logic operation on the clock signal and the delayed clock signal to generate the control signal; and A delay adjustment circuit is coupled to the logic operation circuit and is used to provide the delay according to the setting voltage. The logic operation circuit comprises: A plurality of buffers are coupled in series in sequence to form a delay string, wherein the delay string is used to delay the clock signal to generate the delayed clock signal; and a logic gate, performing a logic operation on the clock signal and the delayed clock signal to generate the control signal, The delay adjustment circuit comprises: A transistor has a first end coupled to a coupling end point of a first buffer and a second buffer, a second end of the transistor coupled to a reference ground end, and a control end of the transistor receiving the set voltage, wherein the plurality of buffers include the first buffer and the second buffer connected in series in sequence. 13 . The display panel according to claim 12 , wherein the pixel circuit is configured in a display area of ​​the display panel.

Citation Information

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