A load transient response enhancement circuit and method for a dc-dc converter

Abstract

The application discloses a load transient response enhancement circuit and method for a DC-DC converter, comprising a transient enhancement circuit and a voltage-controlled oscillator circuit, wherein the transient enhancement circuit comprises two transconductance amplifiers, a current selection circuit and a current subtractor; the load transient response enhancement circuit can adaptively adjust the amplitude of compensation according to the amplitude of load change, and compared with other schemes of changing the oscillator frequency, the effect of hysteresis is added, the influence of EMI interference can be coped with in the steady state, and the load transient response enhancement circuit has the characteristics of continuous monitoring, good accuracy, no interference with the work of other transient enhancement circuits and wide applicability.

Description

Technical Field

[0001] This invention belongs to the field of analog power management technology, and relates to a load transient response enhancement circuit and method for DC-DC converters. Background Technology

[0002] Portable electronic products are diverse in type, feature-rich, and used in various environments, with some even being "all-in-one" devices that integrate multiple functions. They can rapidly transition from standby to operating mode, and the load during operation can change dramatically. This necessitates that the output voltage of their voltage regulators possess high stability and be able to quickly recover to a stable value when the load changes. Traditional current-mode PWM modulated DC-DC converters are no longer sufficient to meet these requirements.

[0003] Traditional methods for enhancing transient response mostly focus on increasing off-chip load capacitance and increasing loop bandwidth. The former has the advantage of effectively suppressing overshoot and undershoot voltages at the output with a large off-chip capacitor. The latter, based on automatic control theory, shows that if a DC-DC control loop is equivalent to a linear control system, the transient response of the load is usually positively correlated with bandwidth; increasing the system bandwidth significantly alters the load's transient response. However, the large off-chip capacitors in these solutions have significant drawbacks. They are typically in the microfarad range, consuming a large amount of board space. Furthermore, improving transient response through bandwidth requires complex modeling and compensation.

[0004] In summary, for traditional PWM-modulated DC-DC converters, additional enhancement circuits are needed to cope with load changes in order to improve their load transient response. Summary of the Invention

[0005] The purpose of this invention is to address the disadvantage of insufficient load transient response in traditional PWM-modulated DC-DC converters by proposing a load transient response enhancement circuit for Buck-Boost type DC-DC converters.

[0006] This invention is achieved through the following technical solution:

[0007] A load transient response enhancement circuit for a DC-DC converter includes a transient enhancement circuit and a voltage-controlled oscillator circuit. The transient enhancement circuit includes two transconductance amplifiers, a current selection circuit, and a current subtractor.

[0008] The input terminals of the two transconductance amplifiers are connected to a DC-DC converter, and the output terminals of the two transconductance amplifiers are respectively connected to the input terminals of two current selection circuits. The output terminals of the current selection circuits are connected to a current subtractor, and the current subtractor is connected to a voltage-controlled oscillator circuit.

[0009] When the input current of the transconductance amplifier fluctuates, the current selection circuit compares the output current of the selected transconductance amplifier with the fixed current and outputs the result to the current subtractor; the current subtractor calculates the charging current I based on the input current and the reference current. OSC The voltage-controlled oscillator circuit is based on the charging current I OSC Controls the clock frequency of the DC-DC converter.

[0010] Preferably, the positive and negative terminals of the two transconductance amplifiers are reversed and connected to the arithmetic unit of the DC-DC converter.

[0011] Preferably, the current selection circuit includes a first cascode current mirror, a second cascode current mirror, a first classical current mirror, a second classical current mirror, and a third classical current mirror;

[0012] The output of the transconductance amplifier is connected to the input of the first cascode current mirror and the second cascode current mirror, and the input of the first classical current mirror is connected to the reference source I. M Input, reference source I M The output of the first cascode current mirror is connected to the output of the second classical current mirror. The output of the second classical current mirror is connected to the output of the second cascode current mirror and the input of the third classical current mirror. The output of the third classical current mirror is connected to the current subtractor.

[0013] Preferably, the current subtractor includes a fourth classical current mirror, a fifth classical current mirror, and an enable switch M. S1 and M S2 and reference current source I REF ;

[0014] The output of the third classic current mirror in the first current selection circuit is connected to the enable switch M. S2 The output of the third classical current mirror of the second current selection circuit is connected to the enable switch M through the fourth classical current mirror. S1 Enable switch M S2 and enable switch M S1 The output node is connected to the reference current source I. REF The output of the fifth classical current mirror is connected to the voltage-controlled oscillator circuit.

[0015] Preferably, the voltage-controlled oscillator circuit includes a charging capacitor and a voltage comparator;

[0016] The upper plate of the charging capacitor is connected to the positive input of the voltage comparator and the output of the current subtraction circuit. The reference voltage source is connected to the negative input of the voltage comparator. The output of the voltage comparator is connected to the charging capacitor bypass switch through an inverter. The oscillation signal of the inverter is input to the DC-DC converter.

[0017] A method for enhancing the load transient response circuit of a DC-DC converter is provided. When a load transient occurs, two transconductance amplifiers detect the switching of the load from heavy load to light load and the switching of the load from light load to heavy load, respectively, and output corresponding currents. A current subtractor calculates the input current of the current selection circuit and the reference current and outputs a charging current. A voltage-controlled oscillator circuit outputs a clock frequency according to the charging current, and controls the switching frequency of the DC-DC converter according to the clock frequency to restore the recovery output voltage of the DC-DC converter.

[0018] Preferably, when the load does not experience transients, the charging current of the voltage-controlled oscillator circuit is the fixed charging current of the reference current source.

[0019] Preferably, when the system switches from heavy load to light load, the switching frequency is:

[0020]

[0021] When the system switches from light load to heavy load, the switching frequency is:

[0022]

[0023] Among them, I REF As a reference current source, V REF As a reference voltage source, V FB For the system feedback voltage, C O I1 is the capacitor voltage, I2 is the output current of the first current selection circuit, and I2 is the output current of the second current selection circuit.

[0024] Compared with the prior art, the present invention has the following beneficial technical effects:

[0025] This invention provides a load transient response enhancement circuit for DC-DC converters. For DC-DC converters experiencing sudden changes in load current, the output voltage response adjustment requires a certain amount of time. The internally integrated compensation module detects the overshoot and undershoot of the output voltage. Two transconductance amplifiers (gm) output different currents. A common-source cascode current mirror circuit amplifies the output current of the transconductance amplifiers. A bias current mirror, composed of a fixed bias and a bias current mirror, outputs a current larger or smaller than the steady-state current. This current is the charging current of the voltage-controlled oscillator's charging capacitor, ultimately changing the oscillator's output clock frequency. This alters the turn-on time of the main switch during light-load / heavy-load switching, achieving a fast charging and slow discharging effect for the inductor current, thus addressing sudden changes in output voltage. The fast transient circuit proposed in this invention can adaptively adjust the compensation amplitude according to the magnitude of load changes. Compared to other schemes that change the oscillator frequency, it incorporates a hysteresis effect, which can address EMI interference in steady-state conditions. This invention also features continuous monitoring, high accuracy, no interference with other transient enhancement circuits, and wide applicability. Attached Figure Description

[0026] Figure 1 This invention provides a basic framework for a transient enhancement circuit applied to DC-DC converters.

[0027] Figure 2 This invention relates to an adaptive switching frequency adjustment circuit that follows load transients.

[0028] Figure 3 This is a schematic diagram of a transient enhancement circuit applied to a DC-DC converter according to the present invention. Detailed Implementation

[0029] The present invention will now be described in further detail with reference to the accompanying drawings. These descriptions are intended to explain the invention and not to limit it.

[0030] See Figure 1 A load transient response enhancement circuit for a DC-DC converter includes a transient enhancement circuit and a voltage-controlled oscillator circuit. The transient enhancement circuit includes two transconductance amplifiers, a current selection circuit, and a current subtractor.

[0031] The positive and negative terminals of the two transconductance amplifiers are reversed and connected to the output terminal of the DC-DC converter. The output terminals of the two transconductance amplifiers are respectively connected to the input terminals of two current selection circuits. The output terminal of the current selection circuit is connected to a current subtractor. The current subtractor is connected to a voltage-controlled oscillator circuit. The voltage-controlled oscillator circuit is connected to the input terminal of the DC-DC converter.

[0032] When the input current of the transconductance amplifier fluctuates, the current selection circuit is used to compare the output current of the selected transconductance amplifier with the fixed current and output it to the current subtractor. In this embodiment, the transconductance amplifier is a 5-transistor OTA, and its input-to-transistor width-to-length ratio is asymmetrically processed to cope with the influence of the fluctuation of the positive and negative input terminals near the reference voltage on the output current when the system is in steady state, thus playing a hysteresis role.

[0033] The current subtractor is used to calculate the charging current I based on the input current and the reference current. OSC The voltage-controlled oscillator circuit is based on the charging current I OSC Controls the clock frequency of the DC-DC converter.

[0034] The two transconductance amplifiers in the transient enhancement circuit employ input pair asymmetry to reduce V0. FB In V REF The impact of nearby fluctuations on the amplifier output current; the current selection circuit ensures that when the transconductance amplifier output current is greater than the fixed current, it outputs the fixed current, and when the transconductance amplifier output current is less than the fixed current, it outputs the transconductance amplifier current. This is to prevent excessive transient voltage changes from causing the two transconductance amplifiers to output excessive current, ultimately leading to excessively large or zero charging current for the oscillator's charging and discharging capacitors, causing oscillator malfunction; the current subtractor consists of a reference current source and the output of the current selection circuit. Based on the transient state detected by the transconductance amplifier, it outputs a current smaller than the reference current I. REF Large or small charging current.

[0035] The voltage-controlled oscillator (VCO) circuit uses the current output from the current subtractor as the charging current for the capacitor, generating a DC-DC clock signal. When the DC-DC system powers on, the soft-start enable pin EN controls the transient enhancement circuit. Once the soft-start is complete, EN changes from high to low, and the circuit operates normally. In steady-state operation, the transconductance amplifier is inactive, the current subtractor outputs a reference current, and the oscillator outputs a fixed-frequency clock signal. Correspondingly, when a load transient occurs, the entire module activates, generating a corresponding charging current to alter the oscillator clock signal, controlling the inductor's charging and discharging times to achieve a fast-charging, slow-discharging effect and improve transient response.

[0036] The load transient response enhancement circuit of the DC-DC converter of the present invention optimizes the oscillator section compared with the traditional PWM modulated DC-DC converter. The output clock signal of the oscillator of the traditional PWM modulated DC-DC converter is a fixed frequency signal. As a result, when a load transient occurs, the inductor current cannot respond to the change of load current in time. The load transient response enhancement circuit can adjust the frequency of the oscillator output clock signal in time when a load transient occurs, so that the inductor responds faster.

[0037] See Figure 2 This is the specific circuit diagram of the transient enhancement circuit, where gm1 and gm2 are two transconductance amplifiers, and M... 1～ M 12 and M 13 ~M 25 For current selection circuit, M S1 With M S2 To enable the signal switching transistor, GM1 collects information about the load transitioning from heavy load to light load, and GM2 collects information about the load transitioning from light load to heavy load. The outputs of the two current selection circuits, together with the reference current source, form a current subtractor. The two current selection circuits are respectively composed of M1 to M6, M... 13 ~M 17 Four sets of common-source cascode current mirrors and M7~M 12 M 20 ~M 25 The circuit consists of six sets of classic current mirrors. The first common-source cascode current mirror is composed of M1, M2, M3, and M4; the second common-source cascode current mirror is composed of M1, M3, M5, and M6; the first classic current mirror is composed of M7 and M8; the second classic current mirror is composed of M9 and M10; and the third classic current mirror is composed of M11 and M12. These current mirrors form the first current selection circuit. The second current selection circuit and the first current selection circuit have a symmetrical structure.

[0038] The current selection circuit selects the minimum value between the transconductance amplifier's output current and the fixed DC current, which is then input to the current subtractor for calculation. To prevent excessive transient voltage changes from causing the final current subtractor's output current to be too large or zero, thus preventing abnormal oscillator operation, the current selection circuit includes a transconductance amplifier, a first cascode current mirror, a second cascode current mirror, a first classical current mirror, a second classical current mirror, and a third classical current mirror.

[0039] The input of the transconductance amplifier is connected to the operational amplifier of the DC-DC converter, and the output of the transconductance amplifier is connected to the input of the first cascode current mirror and the second cascode current mirror. The input of the first classical current mirror is connected to the reference source I. M Input, reference source I M The output of the first cascode current mirror is connected to the output of the first cascode current mirror and the input of the second classical current mirror. The output of the second classical current mirror is connected to the output of the second cascode current mirror and the input of the third classical current mirror.

[0040] The current subtractor includes a fourth classical current mirror, a fifth classical current mirror, and an enable switch M. S1 and M S2 and reference current source I REF .

[0041] The output of the third classic current mirror in the first current selection circuit is connected to the enable switch M.S2 The output of the third classical current mirror of the second current selection circuit is connected to the enable switch M through the fourth classical current mirror. S1 Enable switch M S2 and enable switch M S1 The output node is connected to the reference current source I. REF The fifth classical current mirror is connected to a voltage-controlled oscillator circuit, and its output is used to perform addition and subtraction operations using the nodal current method to obtain the charging current I. OSC The current is copied to the oscillator module via the fifth classic current mirrors M28 and M29 as the current input to the oscillator charging capacitor.

[0042] The function of the current selection circuit is to select the voltage when the transient voltage change is too large, causing V to... FB When the change is too large, the output currents of gm1 and gm2 will become too large. From the above formula, we can obtain I. OSC It can become too large or zero, which can cause the oscillator to malfunction. The current selection circuit will select the minimum value between the transconductance amplifier output current and the fixed current for output.

[0043] The specific working principle is as follows: when V FB Too large leads to I gm1 When it is too large I gm1 Greater than I M The current flowing through M8 is I M M9 and M 10 The current is I gm1 -I M Therefore, M 11 and M 12 The final current I1 flowing through is:

[0044] I1=I gm1 -(I gm1 -I M ) = I M

[0045] Where I1 is the output current of the first current selection circuit, I gm1 For the output current of transconductance amplifier gm1, I M As a reference current source

[0046] When V FB When I was young, gm1 Less than I M The current flowing through M8 is I gm1 M9 and M 10 In the off state, the final current flowing through I1 is:

[0047] I1=I gm1

[0048] From the above formula, the output currents I1 and I2 of the current selection circuit are respectively I gm1 and I M The minimum value and I gm2 and I M The minimum value.

[0049] Under steady-state conditions, by I REF The charging current provided by gm2 is such that when a sudden change occurs from light load to heavy load, the current generated by gm2 is:

[0050] I gm2 =(V FB -V REF )·Gm2

[0051] Among them, I gm2 V is the output current of the transconductance amplifier gm2. FB V is the system feedback voltage. REF Gm2 is the reference voltage source, and Gm2 is the transconductance of the transconductance amplifier gm2.

[0052] At this time, gm1 does not generate current, so I OSC for:

[0053] I OSC =I REF +I2

[0054] Where I OSC The charging current for the oscillator, I REF I1 is the reference current source, and I2 is the output current of the second current selection circuit.

[0055] When a sudden change occurs in the load from heavy load to light load, the current generated by gm1 is:

[0056] I gm1 =(V REF -V FB )·Gm1

[0057] Wherein, Gm1 is the transconductance of transconductance amplifier gm1.

[0058] At this time, gm2 does not generate current, so I OSC for:

[0059] I OSC =I REF -I1

[0060] From the above formula, we can obtain I under different load switching conditions. OSC Different current values ​​can be obtained to achieve the purpose of frequency conversion clock output.

[0061] The soft-start enable terminal EN controls the transient enhancement circuit. When the system soft-start is complete, EN changes from high level to low level, and the circuit works normally.

[0062] See Figure 3 The voltage-controlled oscillator (VCO) consists of a charging capacitor and a voltage comparator. The entire oscillator loop forms a positive feedback system. M30 and M31 are classic current mirrors that copy the current IOSC output from the transient enhancement module to the oscillator charging capacitor CO. M34 to M40 are comparator modules. The upper plate of capacitor CO is connected to the input pair of transistors M34 of the voltage comparator, and the input pair of transistors M35 is connected to the reference voltage source V. REF The output of the voltage comparator is fed back to C through three inverters. O The bypass switch VC, in which the second inverter INV2 outputs the oscillation signal CLK, I REF Together with I1 and I2, they form the oscillator capacitor C. O Charging current I OSC .

[0063] From the above analysis, it can be concluded that the oscillator operates normally in steady state, and the oscillator charging current is I. REF Voltage V CO With capacitance C O It rises as it charges, until it exceeds V. REF Afterwards, inverter INV3 outputs V C High level makes C O The bypass switch MOSFET is turned on, at which point C O Discharge occurs when CLK is low. When V... CO Below V REF Afterwards, INV3 outputs VC low level, C O When the bypass switch MOSFET is turned off, CLK is at a high level, thus forming the oscillation signal CLK.

[0064] Therefore, the switching frequency is:

[0065]

[0066] When the system switches from heavy load to light load, the switching frequency is:

[0067]

[0068] When the output voltage is overcharged, the oscillator frequency decreases.

[0069] When the system switches from light load to heavy load, the switching frequency is:

[0070]

[0071] When the output voltage undershoots, the oscillator frequency increases.

[0072] It can be seen that when the load switches from light load to heavy load, according to the above formula, I OSC The increase in frequency leads to a faster switching frequency, causing the inductor to charge quickly to the required current to power the load capacitor.

[0073] It can be seen that when the load switches from heavy load to light load, according to the above, I OSC The reduction in frequency leads to a decrease in the switching frequency, and the inductor discharges slowly so that the voltage on the load capacitor does not rise rapidly.

[0074] When applying this invention to enhance the transient response of a circuit, adjustments can be made according to the specific circuit requirements: fixed current I M It can be modified according to the specific circuit, the reference current I REF The size can also be adjusted according to the actual situation.

[0075] The load transient response enhancement method for a DC-DC converter of the present invention can realize functions such as load transient detection and transient enhancement, including a transient enhancement circuit and a voltage-controlled oscillator circuit. The transient enhancement circuit consists of two transconductance amplifiers, a current selection circuit, and a current subtractor: the transconductance amplifiers employ asymmetrical input transistor processing to reduce Vo. FB In V REF The impact of nearby fluctuations on the amplifier's output current is considered. The current selection circuit consists of two current subtraction circuits, ensuring that when the transconductance amplifier's output current is greater than a fixed current, it outputs a fixed current; when the transconductance amplifier's output current is less than a fixed current, it outputs the transconductance amplifier's current. This is to prevent excessive transient voltage changes from causing the two transconductance amplifiers to output excessive current, ultimately resulting in an excessively large or zero charging current for the oscillator's charging and discharging capacitors, leading to oscillator malfunction. The current subtractor consists of a reference current source and the output of the current selection circuit. It can output a charging current greater or less than the reference current based on the transient state detected by the transconductance amplifier. The current output from the voltage-controlled oscillator's input current subtractor serves as the charging current for the charging and discharging capacitors, generating the DC-DC clock signal. When the DC-DC system powers on, the soft-start enable terminal EN controls the transient enhancement circuit. When the system soft-start is complete, EN changes from high to low, and the circuit operates normally. In steady state, the transconductance amplifier is not operating, the current subtractor outputs the reference current, and the oscillator outputs a fixed-frequency clock signal. Correspondingly, when a load transient occurs, the entire module starts working, generating a corresponding charging current to change the oscillator clock signal to control the charging and discharging time of the inductor, thereby achieving the effect of fast charging and slow discharging of the inductor current to improve transient response.

[0076] This invention can compensate for the charging current of the oscillator module of a PWM-modulated DC-DC converter under different transient overshoots and undershoots, so as to achieve a clock frequency output that is greater than or less than the steady-state clock frequency, ultimately achieving the goal of fast transient response. Furthermore, this invention also features strong EMI interference resistance, high detection accuracy, and good versatility.

[0077] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. A load transient response enhancement circuit for a DC-DC converter, characterized in that, It includes a transient enhancement circuit and a voltage-controlled oscillator circuit. The transient enhancement circuit includes two transconductance amplifiers, a current selection circuit and a current subtractor. The input terminals of the two transconductance amplifiers are connected to a DC-DC converter, and the output terminals of the two transconductance amplifiers are respectively connected to the input terminals of two current selection circuits. The output terminals of the current selection circuits are connected to a current subtractor, and the current subtractor is connected to a voltage-controlled oscillator circuit. When the input current of the transconductance amplifier fluctuates, the current selection circuit is used to compare the output current of the selected transconductance amplifier with the fixed current and output it to the current subtractor. The current subtractor is used to calculate the charging current I based on the input current and the reference current. OSC The voltage-controlled oscillator circuit is based on the charging current I OSC Control the clock frequency of the DC-DC converter; The current selection circuit includes a first common-source cascode current mirror, a second common-source cascode current mirror, a first classical current mirror, a second classical current mirror, and a third classical current mirror; The output of the transconductance amplifier is connected to the input of the first cascode current mirror and the second cascode current mirror, and the input of the first classical current mirror is connected to the reference source I. M Input, reference source I M The output of the first cascode current mirror is connected to the output of the second classical current mirror, the output of the second classical current mirror is connected to the output of the second cascode current mirror and the input of the third classical current mirror, and the output of the third classical current mirror is connected to the current subtractor. The current subtractor includes a fourth classical current mirror, a fifth classical current mirror, and an enable switch transistor M. S1 and M S2 and reference current source I REF ; The output of the third classic current mirror in the first current selection circuit is connected to the enable switch M. S2 The output of the third classical current mirror of the second current selection circuit is connected to the enable switch M through the fourth classical current mirror. S1 Enable switch M S2 and enable switch M S1 The output node is connected to the reference current source I. REF The output of the fifth classical current mirror is connected to the voltage-controlled oscillator circuit. The voltage-controlled oscillator circuit includes a charging capacitor and a voltage comparator; The upper plate of the charging capacitor is connected to the positive input of the voltage comparator and the output of the current subtraction circuit. The reference voltage source is connected to the negative input of the voltage comparator. The output of the voltage comparator is connected to the charging capacitor bypass switch through an inverter. The oscillation signal of the inverter is input to the DC-DC converter.

2. The load transient response enhancement circuit for a DC-DC converter according to claim 1, characterized in that, The positive and negative terminals of the two transconductance amplifiers are reversed and connected to the arithmetic unit of the DC-DC converter.

3. A method for enhancing the load transient response of a DC-DC converter according to claim 1 or 2, characterized in that, When a load transient occurs, the two transconductance amplifiers detect the switching of the load from heavy load to light load and the switching of the load from light load to heavy load, respectively, and output the corresponding current. The current subtractor calculates the input current and the reference current of the current selection circuit and outputs the charging current. The voltage-controlled oscillator circuit outputs the clock frequency according to the charging current, and controls the switching frequency of the DC-DC converter according to the clock frequency to restore the recovery output voltage of the DC-DC converter.

4. The method for enhancing the load transient response of a DC-DC converter according to claim 3, characterized in that, When the load does not experience transients, the charging current of the voltage-controlled oscillator circuit is the fixed charging current of the reference current source.

5. The method for enhancing the load transient response of a DC-DC converter according to claim 3, characterized in that, When the system switches from heavy load to light load, the switching frequency is: When the system switches from light load to heavy load, the switching frequency is: in, I REF As a reference current source, V REF As a reference voltage source, V FB For system feedback voltage, The voltage across the capacitor. I 1 represents the output current of the first current selection circuit. I 2 represents the output current of the second current selection circuit.

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