A broadband low phase noise hybrid frequency synthesizer

Abstract

The application discloses a kind of broadband low phase noise mixed frequency synthesis device, adjustable high stable ultra-low phase noise reference clock (1), based on SRD comb spectrum generator (2), power divider (3) is sequentially connected, and power divider has two output ends, one of which is sequentially connected clock generator (4), direct digital frequency synthesizer (5), interpolation broadband phase-locked loop (6), and the other output end is connected interpolation downmix local oscillator generator (7), the output end of interpolation downmix local oscillator generator is connected the mixer in interpolation broadband phase-locked loop, and the output end of interpolation broadband phase-locked loop is the output end of the broadband low phase noise mixed frequency synthesis device of this application.It is realized that the frequency synthesizer of broadband low phase noise has the advantages such as low cost, low power consumption, wide frequency band, adjustable output frequency range, high resolution, low phase noise and the like, and the frequency synthesis method can be used in microwave field test instrument, 5G / 6G communication system.

Description

Technical Field

[0001] This invention relates to the field of microwave / millimeter-wave wireless communication technology, and in particular to microwave and millimeter-wave communication test instruments, and 5G and 6G communication systems. Background Technology

[0002] Microwave and millimeter-wave test instruments are used to test key indicators of major communication equipment. Common instruments include vector signal generators, spectrum analyzers, vector network analyzers, and channel simulators. With the commercialization of 5G and the research and development of 6G technology, the performance of these test instruments is crucial for the testing of communication products. Among these communication measurement instruments, the performance of the frequency synthesizer has a significant impact on the test instrument. Therefore, it is particularly important to study frequency synthesis methods that are wideband, low phase noise, high resolution, small size, low cost, and low spurious emissions.

[0003] Frequency synthesis refers to the process of generating and outputting multiple operating frequency points within a certain frequency band by using one or more reference frequencies as a reference. Frequency synthesizers can be divided into direct synthesis and indirect synthesis. Direct synthesis technology is further divided into direct analog frequency synthesis technology and direct digital frequency synthesis technology. Direct analog frequency synthesizers produce signals with high long-term and short-term frequency stability and fast frequency conversion speed, but they are difficult to debug and suppress spurious signals. Direct digital frequency synthesis technology uses digital sampling and storage technology, which has the advantages of accurate phase and frequency resolution and fast conversion time, but the upper limit of the output frequency is not high. Phase-locked loop (PLL) frequency synthesis technology is an indirect synthesizer. It uses one or more reference frequency sources and a PLL to lock the frequency of a voltage-controlled oscillator (VCO) within a certain frequency output range, and the VCO indirectly generates the desired frequency output. The advantage of this method is that because the PLL is equivalent to a narrowband tracking filter, it can effectively select the signal of the desired frequency, suppress spurious components, avoid the use of a large number of segmented filters, and is conducive to integration and miniaturization. Summary of the Invention

[0004] Technical Problem: This invention proposes a broadband low phase noise hybrid frequency synthesis device. Its purpose is to propose a hybrid frequency synthesis method that combines the advantages of direct frequency synthesis and indirect frequency synthesis. The device is designed to have the characteristics of wide bandwidth, low phase noise, low power consumption, small size, and high frequency resolution, which can meet the needs of microwave and millimeter wave test instruments and 5G and 6G communication systems.

[0005] Technical Solution: The broadband low phase noise hybrid frequency synthesis device of the present invention includes an adjustable high-stability ultra-low phase noise reference clock, an SRD comb spectrum generator, a power divider, a clock generator, a direct digital frequency synthesizer, a DDS interpolated broadband phase-locked loop, and an interpolated down-mixing local oscillator generator; wherein, the adjustable high-stability ultra-low phase noise reference clock, the SRD comb spectrum generator, and the power divider are connected in sequence, and the power divider has two output terminals. One output terminal is connected in series with the clock generator, the direct digital frequency synthesizer, and the DDS interpolated broadband phase-locked loop, and the other output terminal is connected to the interpolated down-mixing local oscillator generator. The output terminal of the interpolated down-mixing local oscillator generator is connected to the mixer in the DDS interpolated broadband phase-locked loop. The output terminal of the DDS interpolated broadband phase-locked loop is the output terminal of the broadband low phase noise hybrid frequency synthesis device.

[0006] The adjustable high-stability ultra-low phase noise reference clock includes a low phase noise temperature-compensated crystal oscillator, a phase detector, a low-pass loop filter, a surface acoustic wave (SAW) voltage-controlled oscillator, and a programmable frequency divider connected in series. The input of the frequency divider is connected to the output of the SAW voltage-controlled oscillator, and the output of the frequency divider is connected to the input of the phase detector, providing an adjustable low phase noise clock reference signal for the hybrid frequency synthesis device.

[0007] The clock generator is composed of three cascaded components: a first filter, an amplifier, and a second filter. It filters out a certain harmonic from the comb spectrum output according to the clock requirements of the direct digital frequency synthesizer, and further amplifies and filters it to generate a clock signal that satisfies the excitation requirements of the direct digital frequency synthesizer.

[0008] An interpolated wideband phase-locked loop (PLL) is used, in which a phase detector, a low-pass loop filter, and a wideband segmented voltage-controlled oscillator (VCO) are connected sequentially. The input of the mixer is connected to the output of the wideband segmented VCO, and the output of the mixer is connected to the input of the phase detector. The wideband of the wideband segmented VCO is achieved by synthesizing multiple segments of VCO, thus giving the VCO both wideband characteristics and low voltage sensitivity k. v Its features facilitate the design of excellent phase-locked loops, further reducing phase noise.

[0009] The interpolated downmixer local oscillator consists of a first filter amplification group, a second filter amplification group, and a third filter amplification group cascaded in parallel to form a multi-channel filter. It is connected to a frequency divider through a first multi-channel switch and to a mixer through a second multi-channel switch. Each filter filters and amplifies a certain harmonic of the comb spectrum output, and the selection is switched according to the system requirements.

[0010] The in-band phase noise of this broadband low-phase-noise hybrid frequency synthesizer is mainly determined by the phase noise characteristics of the surface acoustic wave voltage-controlled oscillator in the adjustable high-stability ultra-low phase noise reference clock and the phase noise characteristics of the direct digital frequency synthesizer. The out-of-band phase noise is determined by the phase noise of the broadband segmented voltage-controlled oscillator. When an ultra-low phase noise surface acoustic wave voltage-controlled oscillator, a broadband low-phase-noise direct digital frequency synthesizer, and a broadband voltage-controlled oscillator with high Q value and low k voltage control sensitivity coefficient are selected, a broadband low-phase-noise hybrid frequency synthesizer can be realized.

[0011] The aforementioned SRD-based comb spectrum generator amplifies the adjustable, high-stability, ultra-low phase noise reference clock signal through a power amplifier to excite the step recovery diode (SRD), generating a clock signal for a direct digital frequency synthesizer and a local oscillator signal for interpolation and downmixing required for mixed frequency synthesis. To reduce simulation design and actual testing errors of the comb spectrum generator, the core component, the step recovery diode, is accurately modeled and simulated, and the nonlinear simulation model of the step recovery diode SRD is further improved.

[0012] The direct digital frequency synthesizer outputs a frequency with low phase noise and high resolution, achieving low-resolution frequency synthesis. The mixer is excited by an interpolated downmixing local oscillator generator based on an SRD comb spectrum generator, realizing the function of a traditional phase-locked loop frequency divider. This further reduces the impact of phase noise degradation caused by the low noise and high resolution of the frequency divider, thereby ensuring the low phase noise characteristics of the broadband frequency synthesizer.

[0013] The output frequency generated by the programmable frequency divider excites the comb spectrum generator, and the frequency of the excitation signal is adjusted according to the design requirements by adjusting the frequency division ratio.

[0014] The device includes an adjustable, high-stability, ultra-low phase noise reference clock that provides a frequency-adjustable clock signal to excite a comb spectrum generator. A power divider then provides corresponding reference clocks to the direct digital frequency synthesizer (DDS) and the interpolated broadband phase-locked loop (PLL). The DDS outputs a low-resolution, low-phase-noise clock signal as the reference signal for the PLL. The interpolated down-mixing local oscillator (LOO) generates the down-mixing LO signal, thereby achieving the output of a broadband, low-phase-noise frequency signal.

[0015] This invention combines the advantages of direct analog frequency synthesis, direct digital frequency synthesis, and indirect frequency synthesis to design a hybrid frequency synthesis method that replaces the YIG oscillator in traditional instruments. This method offers advantages such as wide bandwidth, low phase noise, high resolution, low power consumption, low cost, low spurious emissions, and ease of integration.

[0016] Beneficial effects: In the existing technology, broadband frequency synthesis is usually implemented using YIG, but it has high power consumption, large size and complex design. The hybrid frequency synthesis method proposed in this invention combines the advantages of direct analog frequency synthesis technology, direct digital frequency synthesis technology and indirect frequency synthesis technology to design a broadband low phase noise hybrid frequency synthesizer with high performance, low cost and low power consumption. It can be used in communication measurement instruments and 5G and 6G communication systems. Attached Figure Description

[0017] Figure 1 A block diagram illustrating the implementation of a broadband hybrid frequency synthesis method;

[0018] The diagram includes: an adjustable high-stability ultra-low phase noise reference clock 1, a temperature-compensated crystal oscillator 101, a phase detector 102, a low-pass loop filter 103, a surface acoustic wave voltage-controlled oscillator 104, a frequency divider 105, a programmable frequency divider 106, an SRD-based comb spectrum generator 2, a power divider 3, a clock generator 4, a first filter 401, an amplifier 402, a second filter 403, a direct digital frequency synthesizer 5, an interpolated broadband phase-locked loop 6, a phase detector 601, a low-pass loop filter 602, a broadband segmented voltage-controlled oscillator 603, a mixer 604, an interpolated down-mixing local oscillator generator 7, a first multi-way switch 701, a first filter amplifier group 702, a second filter amplifier group 703, a third filter amplifier group 704, and a second multi-way switch 705. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Example 1

[0021] The broadband hybrid frequency synthesis experimental device mainly consists of: 1. an adjustable high-stability ultra-low phase noise reference clock; 2. an SRD-based comb spectrum generator; 3. a power divider; 4. a clock generator; 5. a direct digital frequency synthesizer; 6. an interpolated broadband phase-locked loop; and 7. an interpolated down-mixing local oscillator generator.

[0022] The adjustable high-stability ultra-low phase noise reference clock 1 provides a frequency-adjustable low phase noise clock reference signal for the hybrid frequency synthesizer. It consists of a temperature-compensated crystal oscillator 101, a phase detector 102, a low-pass loop filter 103, a surface acoustic wave voltage-controlled oscillator 104, a frequency divider 105, and a programmable frequency divider 106.

[0023] The reference clock is driven by the SRD comb spectrum generator 2 to excite the direct digital frequency synthesizer 5 and the interpolation downmixing local oscillator generator 7 respectively. The SRD comb spectrum generator 2 is based on the adjustable high-stability ultra-low phase noise reference clock 1 signal, which is amplified by the power amplifier to excite the step recovery diode SRD, generating the clock signal of the direct digital frequency synthesizer and the local oscillator signal for interpolation downmixing that meet the requirements of the mixing frequency synthesis. In order to reduce the simulation design and actual test error of the comb spectrum generator, the core device step recovery diode is accurately modeled and simulated, and the SRD nonlinear simulation model is further improved.

[0024] The comb spectrum signal generated by the SRD comb spectrum generator 2 is used by the power divider 3 to excite the direct digital frequency synthesizer 5 and the interpolated downmixing local oscillator generator 7, respectively.

[0025] One output of the SRD comb spectrum generator 2 provides a clock signal to the direct digital frequency synthesizer 5. This clock signal is generated by the clock generator 4, which mainly consists of a cascaded system of three stages: a first filter 401, an amplifier 402, and a second filter 403. The filters remove a certain harmonic from the comb spectrum output according to the clock requirements of the direct digital frequency synthesizer 5, and further amplify and filter to generate a clock signal that satisfies the excitation requirements of the direct digital frequency synthesizer 5. This clock signal excites the direct digital frequency synthesizer 5 to generate a reference clock required for interpolation broadband phase-locked switching. This reference clock features high frequency resolution and excellent phase noise characteristics.

[0026] The other output of the comb spectrum is excited by an interpolated downmixer local oscillator generator 7, characterized in that the interpolated downmixer local oscillator generator is composed of two cascaded multiplexers, namely a first cascaded multiplexer 701 and a second cascaded multiplexer 705, and multiple filter amplification groups, namely a first filter amplification group 702, a second filter amplification group 703, and a third filter amplification group 704. Each filter amplifies a specific harmonic of the comb spectrum output, and the selection is switched according to the system requirements. The number of filter amplification groups is selected based on the final requirements of the system.

[0027] The purpose of the interpolated downmixer local oscillator generator 7 is to provide a local oscillator signal for the interpolated broadband phase-locked loop 6. The mixer 604 in the interpolated broadband phase-locked loop replaces the frequency divider of the traditional phase-locked loop, which can greatly improve the phase noise performance caused by the deterioration of the division ratio and the frequency divider noise floor. The phase noise of the entire interpolated broadband switch is determined by the phase noise of the direct digital frequency synthesizer 5 within the band and by the phase noise of the broadband segmented voltage-controlled oscillator 603 outside the band.

[0028] The interpolated wideband phase-locked loop (PLL) consists of a phase detector 601, a low-pass loop filter 602, a wideband segmented voltage-controlled oscillator (VCO) 603, and a mixer 604. The wideband capability of the segmented VCO 603 is achieved by synthesizing multiple VCO segments, thus giving the VCO both wideband characteristics and low voltage sensitivity k. v Its features facilitate the design of excellent phase-locked loops, further reducing phase noise.

[0029] In summary, this invention features a wide-bandwidth, low-phase-noise, high-resolution, and low-power wide-bandwidth frequency synthesizer, supporting microwave and millimeter-wave communication measurement instruments, as well as 5G and 6G communication systems.

[0030] Any aspects of this invention not described in detail are well-known to those skilled in the art.

[0031] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A broadband low-phase-noise hybrid frequency synthesis device, characterized in that, The device includes an adjustable high-stability ultra-low phase noise reference clock (1), an SRD comb spectrum generator (2), a power divider (3), a clock generator (4), a direct digital frequency synthesizer (5), a DDS interpolated broadband phase-locked loop (6), and an interpolated down-mixing local oscillator generator (7); wherein, the adjustable high-stability ultra-low phase noise reference clock (1), the SRD comb spectrum generator (2), and the power divider (3) are connected in sequence, the power divider (3) has two output terminals, one of which is connected in series with the clock generator (4), the direct digital frequency synthesizer (5), and the DDS interpolated broadband phase-locked loop (6), and the other output terminal is connected to the interpolated down-mixing local oscillator generator (7), the output terminal of the interpolated down-mixing local oscillator generator (7) is connected to the mixer (604) in the DDS interpolated broadband phase-locked loop (6), and the output terminal of the DDS interpolated broadband phase-locked loop (6) is the output terminal of the broadband low phase noise mixing frequency synthesis device; The adjustable high-stability ultra-low phase noise reference clock (1) includes a low phase noise temperature-compensated crystal oscillator (101), a phase detector (102), a low-pass loop filter (103), a surface acoustic wave voltage-controlled oscillator (104), and a programmable frequency divider (106) connected in series. The input terminal of the frequency divider (105) is connected to the output terminal of the surface acoustic wave voltage-controlled oscillator (104), and the output terminal of the frequency divider (105) is connected to the input terminal of the phase detector (102), providing a frequency-adjustable low phase noise clock reference signal for the hybrid frequency synthesis device. The in-band phase noise of this broadband low phase noise hybrid frequency synthesizer is mainly determined by the phase noise characteristics of the surface acoustic wave voltage-controlled oscillator (104) in the adjustable high-stability ultra-low phase noise reference clock (1) and the phase noise characteristics of the direct digital frequency synthesizer (5). The out-of-band phase noise is determined by the phase noise of the broadband segmented voltage-controlled oscillator (603). When the ultra-low phase noise surface acoustic wave voltage-controlled oscillator (104), the broadband low phase noise direct digital frequency synthesizer (5) and the broadband voltage-controlled oscillator with high Q value and low k voltage control sensitivity coefficient are selected, the broadband low phase noise hybrid frequency synthesizer can be realized. The SRD-based comb spectrum generator (2) amplifies the signal from the adjustable high-stability ultra-low phase noise reference clock (1) through a power amplifier to excite the step recovery diode SRD, generating a clock signal for the direct digital frequency synthesizer (5) and a local oscillator signal for interpolation and downmixing required for the mixed frequency synthesis. In order to reduce the simulation design and actual test error of the comb spectrum generator (2), the core device step recovery diode is accurately modeled and simulated, and the nonlinear simulation model of the step recovery diode SRD is further improved.

2. The broadband low-phase-noise hybrid frequency synthesis apparatus according to claim 1, characterized in that... The clock generator (4) is composed of three cascaded components: a first filter (401), an amplifier (402), and a second filter (403). It filters out a certain harmonic of the comb spectrum output according to the clock requirements of the direct digital frequency synthesizer (5), and further amplifies and filters it to generate a clock signal that satisfies the requirements of the direct digital frequency synthesizer (5).

3. The broadband low-phase-noise hybrid frequency synthesis apparatus according to claim 1, characterized in that... An interpolated wideband phase-locked loop (6) is used, in which a phase detector (601), a low-pass loop filter (602), and a wideband segmented voltage-controlled oscillator (603) are connected in sequence. The input terminal of the mixer (604) is connected to the output terminal of the wideband segmented voltage-controlled oscillator (603), and the output terminal of the mixer (604) is connected to the input terminal of the phase detector (601). The wideband of the wideband segmented voltage-controlled oscillator (603) is achieved by synthesizing multiple segments of voltage-controlled oscillators. This gives the voltage-controlled oscillator wideband characteristics while also having low voltage control sensitivity (kV), which facilitates the design of a good phase-locked loop and further reduces phase noise.

4. The broadband low-phase-noise hybrid frequency synthesis apparatus according to claim 1, characterized in that... The interpolated downmixing local oscillator generator (7) consists of a first filter amplification group (702), a second filter amplification group (703), and a third filter amplification group (704) cascaded in parallel to form a multi-channel filter. It is connected to a frequency divider (105) through a first multi-channel switch (701) and to a mixer (604) through a second multi-channel switch (705). Each filter filters and amplifies a certain harmonic of the comb spectrum output, and is switched and selected according to the needs of the system.

5. The broadband low-phase-noise hybrid frequency synthesis apparatus according to claim 1, characterized in that, The direct digital frequency synthesizer (5) outputs a frequency with low phase noise and high resolution, achieving the characteristic of low resolution frequency synthesis. The mixer is excited by the interpolated downmixing local oscillator generator (7) based on the SRD comb spectrum generator (2), realizing the function of the traditional phase-locked loop frequency divider, further reducing the impact of phase noise degradation caused by the low noise and high resolution of the frequency divider, thereby ensuring the low phase noise characteristic of the broadband frequency synthesizer.

6. The broadband low-phase-noise hybrid frequency synthesis apparatus according to claim 1, characterized in that, The output frequency generated by the programmable frequency divider (106) excites the comb spectrum generator (2), and the frequency of the excitation signal is adjusted according to the design requirements.

7. The broadband low-phase-noise hybrid frequency synthesis apparatus according to claim 1, characterized in that, The device includes an adjustable high-stability ultra-low phase noise reference clock (1) that provides a frequency-adjustable clock signal to excite a comb spectrum generator (2), and a power divider (3) that provides corresponding reference clocks to a direct digital frequency synthesizer (5) and an interpolated broadband phase-locked loop (6). The direct digital frequency synthesizer (DDS) outputs a low-resolution, low-phase-noise clock signal as a reference signal for the interpolated broadband phase-locked loop. The interpolated downmixing local oscillator generator (7) generates a downmixing local oscillator signal, thereby realizing the output of a broadband low-phase-noise frequency signal.

Images