A Low-Complexity LDPC Encoding Method, Medium and Device Applicable to the NR Standard

Abstract

The present invention provides a low-complexity LDPC encoding method, medium and device applicable to the NR standard. The method includes: calculating the non-redundant element indices in the check bit set p1 and the check bit set p2 respectively; calculating the non-redundant elements in the check bit set p1 and the check bit set p2 according to the non-redundant element indices; and performing LDPC encoding by using the non-redundant elements in the check bit set p1 and the check bit set p2. By jointly considering the bit selection process of rate matching and omitting the encoding calculation process for the redundant bit part, the present invention can effectively reduce the computational complexity of LDPC encoding.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a low-complexity LDPC coding method, medium and device applicable to the NR standard. Background Art

[0002] In the physical layer of the current 5GNR system, data channels (PDSCH and PUSCH) mainly use LDPC codes. LDPC codes are a type of linear block code, which has a sparse check matrix H that satisfies Hc=0, where c is the codeword output by the LDPC code. The key to the design of LDPC codes lies in the design of the check matrix H.

[0003] The LDPC code used in the 5GNR system is designed with QC-LDPC code as the core. The most critical BG design also adopts the design of RL-LDPC code. The corresponding check matrix can be written in the form of the following block matrix:

[0004]

[0005] in:

[0006] K represents the length of the LDPC coding input sequence, that is, the original information bit length. The K corresponding to the two BGs (BG1 and BG2) supported by the NR standard are 22Z respectively. c and 10Z c ;

[0007] N' and N represent the original length and the length after puncturing of the LDPC coding output, respectively. The N' corresponding to the two BGs (BG1 and BG2) supported by the NR standard are 68Z c and 52Z c , N=N'-2Z c , Z c Calculated based on K (reference protocol TS38.212);

[0008] M represents the number of check matrix rows corresponding to the high-rate portion of the coded output (corresponding to H in the design of RL-LDPC code). core The number of lines in the part), the two BGs (BG1 and BG2) supported by the NR standard correspond to M of 4Z c ;

[0009] A, B, C, D are all composed of Z c *Z c Matrix B of dimension ij Composition, matrix B ij The identity matrix I can be cyclically shifted to the right by P ij Get, P ij It can be obtained by looking up the table based on the protocol (TS38.212).

[0010] Based on the design of the above parity check matrix H, the current LDPC coding scheme mostly adopted is as follows. Here, d denotes the LDPC coding input sequence that has been segmented and filled with filler bits, with a length of K:

[0011] S1: Obtain the partial coded output parity bit set p based on the following formula 1 :

[0012] p 1 = mod(B -1 ·(A·d), 2)

[0013] S2: Obtain the partial coded output parity bit set p based on the following formula 2 :

[0014] p 2 = mod(C·d + D·p 1 , 2)

[0015] S3: Combine the coding input d and the concatenated parity bit set p 1 and p 2 to obtain the LDPC coding output c, as shown in the following formula:

[0016]

[0017] d' = d[2Z c + 1:K]

[0018] where the first 2Z c elements of d need to be discarded by puncturing.

[0019] Considering that the LDPC coding output of the 5G NR physical layer needs to adapt to the actual air interface's bearing capacity, the protocol designs a rate matching process to perform corresponding clipping or repetition on the LDPC coding output sequence to obtain the bit sequence to be transmitted that matches the actual air interface's bearing capacity. The entire process is as follows:

[0020] S1: Initialize j = 0, k = 0;

[0021] S2: If k < E, jump to S3; otherwise, jump to step S5;

[0022] S3: If K - 2Z c > mod(k0 + j, N cb ) > K - 2Z c - F, then execute the following formula and jump to step S4; otherwise, directly jump to step S4;

[0023]

[0024] S4: j=j+1, and jump to step S2;

[0025] S5: Reinitialize j=0, k=0;

[0026] S6: If j <E / Q m , jump to step S7; otherwise, the entire rate matching process ends, and the final output is the sequence f;

[0027] S7: If k m , jump to step S8; otherwise jump to step S9;

[0028] S8: Execute the following assignment operation, and then jump to step S7;

[0029]

[0030] S9: j=j+1, and jump to step S6;

[0031] in:

[0032] The entire rate matching can be divided into two processes: bit selection (steps S1 to S4) and bit interleaving (steps S5 to S9). The output sequences of the two processes are denoted as e and f respectively.

[0033] E represents the length of the rate matching output sequence f, which can be calculated based on the actual air interface carrying capacity (refer to protocol TS38.212);

[0034] F represents the length of NULL bits in the encoded output sequence;

[0035] Q m Indicates the modulation order, Q corresponding to BPSK, QPSK, 16QAM, 64QAM and 256QAM m The values ​​are 1, 2, 4, 6, and 8 respectively;

[0036] N cb Indicates the buffer size for bit clipping or duplication during rate matching, N cb =min(N,N ref ), N ref The size of the cache is limited by hardware (refer to protocol TS38.212);

[0037] k0 represents the starting bit number (numbering starts from 1) of the bit selection process during the rate matching process.

[0038] To unify the description and facilitate understanding, all indexes start from 1 by default.

[0039] It can be seen that in E <N cb ​Under the condition of -F (which is satisfied in most communication scenarios, especially in high - rate data transmission scenarios), the LDPC - encoded output sequence c with length N needs to be truncated to a sequence e with length E through a rate - matching process. This means that some bits in the actually output sequence c during LDPC encoding may be directly discarded during the rate - matching process, that is, these bits are completely redundant. According to the current 5G NR standard, the proportion of redundant bits can be as high as about 64%, that is, nearly 2 / 3 of the LDCP - encoded output are redundant bits and do not need to be calculated, and the corresponding computing resources spent are also wasted. Therefore, it is completely unnecessary to allocate computing resources to calculate this part of redundant bits. Summary of the Invention

[0040] The present invention aims to provide a low - complexity LDPC encoding method, medium and device applicable to the NR standard to solve the problem of redundant bits in the LDPC encoding output in the physical layer of the 5G NR system.

[0041] A low - complexity LDPC encoding method applicable to the NR standard provided by the present invention includes:

[0042] Calculate the non - redundant element indices in the parity - check bit sets p 1 and the parity - check bit set p 2 respectively;

[0043] Calculate the non - redundant elements in the parity - check bit sets p 1 and the parity - check bit set p 2 according to the non - redundant element indices;

[0044] Perform LDPC encoding using the non - redundant elements in the parity - check bit sets p 1 and the parity - check bit set p 2 respectively.

[0045] Further, the method for calculating the non - redundant element indices in the parity - check bit set p 1 is as follows:

[0046]

[0047] where S1 is the starting index of the non - redundant elements in the parity - check bit set p 1 ; L1 is the length of the non - redundant elements in the parity - check bit set p 1 ; k0 represents the starting bit sequence number of the bit - selection process during the rate - matching process; E represents the length of the rate - matching output sequence f; F represents the length of the NULL bit in the encoded output sequence; M represents the number of rows of the parity - check matrix corresponding to the high - code - rate part of the encoding output; K represents the length of the LDPC - encoded input sequence; Z c is calculated based on K.

[0048] Further, the method for calculating the indices of non-redundant elements in the check bit set p 2 is as follows:

[0049]

[0050]

[0051] k0' = k0 + E - N cb

[0052] where S2 is the starting index of the first segment of non-redundant elements in the check bit set p 2 and L2 is the length of the first segment of non-redundant elements in the check bit set p 2 ; S2' is the starting index of the second segment of non-redundant elements in the check bit set p 2 and L2' is the length of the second segment of non-redundant elements in the check bit set p 2 ; N cb represents the buffer size for bit clipping or repetition during the rate matching process, and N cb = min(N, N ref ), where N ref is the size limit of the buffer due to hardware constraints, and N respectively represents the length after puncturing of the LDPC coding output.

[0053] Further, the method for calculating the non-redundant elements in the check bit set p according to the indices of non-redundant elements includes: 1 First, calculate the elements from the S1-th row to the L1-th row of the coefficient matrix S

[0054] required in the check bit set p 1 and denote it as 1

[0055]

[0056] where both matrix A and matrix B are composed of a matrix B c with dimensions Z c * Z; matrix B ij can be obtained by circularly shifting the identity matrix I to the right by P ij times, and P ij is obtained by looking up a table based on the protocol; B ij represents the inverse matrix of matrix B, and (B -1 ) -1 represents the matrix composed of the elements from the S1-th row to the L1-th row of B (S1,L1) ; -1

[0057] Then, initialize the check bit set p 1 1is a all-zero vector, and then calculate the parity bit set p 1 The elements from the S1-th row to the L1-th row of

[0058] p 1 = 0 M×1

[0059]

[0060] where d represents the LDPC-encoded input sequence that has been segmented and filled with padding bits.

[0061] Furthermore, the method for calculating the non-redundant elements in the parity bit set p 2 includes:

[0062] First, calculate the coefficient matrix S 2 required for the parity bit set p 2 The elements from the S2-th row to the L2-th row are denoted as and the elements from the S2'-th row to the L2'-th row are denoted as

[0063]

[0064] Then, initialize the parity bit set p 2 as a all-zero vector, and then calculate the elements from the S2-th row to the L2-th row of the parity bit set p 2 and the elements from the S2'-th row to the L2'-th row:

[0065]

[0066]

[0067] where both matrix C and matrix D are composed of the matrix B c *Z c with dimension; C ij represents the matrix composed of the elements from the S2-th row to the L2-th row of matrix C; C (S2,L2) represents the matrix composed of the elements from the S2'-th row to the L2'-th row of matrix C; D (S2',L2') represents the matrix composed of the elements from the S2-th row to the L2-th row of matrix D; D (S2,L2) represents the matrix composed of the elements from the S2'-th row to the L2'-th row of matrix D. (S2',L2')

[0068] The present invention also provides a computer terminal storage medium storing computer terminal executable instructions, characterized in that the computer terminal executable instructions are used to execute the above-mentioned low-complexity LDPC encoding method applicable to the NR standard.

[0069] ​The present invention also provides a computing device, comprising:

[0070] at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the above-mentioned low-complexity LDPC encoding method applicable to the NR standard.

[0071] In summary, due to the adoption of the above technical solutions, the beneficial effects of the present invention are as follows:

[0072] By jointly considering the bit selection process of rate matching and omitting the encoding calculation process for the redundant bit part, the present invention can effectively reduce the computational complexity of LDPC encoding. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0074] Figure 1 It is a flowchart of a low-complexity LDPC encoding method applicable to the NR standard in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0075] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. The components of the embodiments of the present invention described and illustrated herein can be arranged and designed in various different configurations.

[0076] Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0077] Embodiment

[0078] As Figure 1 shown, this embodiment proposes a low-complexity LDPC encoding method applicable to the NR standard, specifically including:

[0079] S1, calculating the check bit set p1 Index of non-redundant elements in

[0080]

[0081] where S1 is the set of parity bits p 1 starting index of non-redundant elements in, L1 is the set of parity bits p 1 starting index of non-redundant elements in; k0 represents the starting bit number of bit selection processing in the rate matching process; E represents the length of the rate matching output sequence f; F represents the length of the padding bits in the coded output sequence; M represents the number of rows of the parity-check matrix corresponding to the high code rate part of the coded output; K represents the length of the LDPC coded input sequence; Z c calculated based on K (refer to protocol TS38.212).

[0082] S2, calculate the set of parity bits p 2 Index of non-redundant elements in

[0083]

[0084]

[0085] k0' = k0 + E - N cb

[0086] where S2 is the set of parity bits p 2 starting index of the first segment of non-redundant elements in, L2 is the set of parity bits p 2 length of the first segment of non-redundant elements in; S2' is the starting index of the second segment of non-redundant elements in the set of parity bits p 2 starting index of the second segment of non-redundant elements in, L2' is the set of parity bits p 2 length of the second segment of non-redundant elements in; N cb represents the cache size for bit clipping or repetition processing in the rate matching process, N cb = min(N, N ref ), N ref is the size limit of this cache due to hardware limitations, N respectively represents the length after puncturing of the LDPC coded output.

[0087] S3, calculate the required coefficient matrix S in the set of parity bits p 1 in 1 elements from the S1-th row to the L1-th row of, denoted as

[0088]

[0089] where both matrix A and matrix B are composed of Z c *Z cMatrix B of dimension ij is composed. Matrix B ij can be obtained by cyclically shifting the identity matrix I to the right by P ij times. P ij is obtained by looking up a table based on the protocol; B -1 represents the inverse matrix of matrix B. (B -1 ) (S1,L1) represents the matrix composed of the elements from the S1-th row to the L1-th row of B -1 .

[0090] S4. Initialize the check bit set p 1 as an all-zero vector, and then calculate the elements from the S1-th row to the L1-th row of the check bit set p 1 :

[0091] p 1 = 0 M×1

[0092]

[0093] where d represents the LDPC-encoded input sequence that has been segmented and filled with padding bits.

[0094] Through steps S3 - S4, (M - L1)*(M + K) "AND" operations and 2(M - L1)*(M - 1) "XOR" operations can be saved.

[0095] S5. The method for calculating the non-redundant elements in the check bit set p 2 includes:[[]]

[0096] First, calculate the elements from the S2-th row to the L2-th row of the coefficient matrix S 2 required for the check bit set p 2 , denoted as and the elements from the S2'-th row to the L2'-th row, denoted as

[0097]

[0098] S6. Initialize the check bit set p 2 as an all-zero vector, and then calculate the elements from the S2-th row to the L2-th row of the check bit set p 2 , and the elements from the S2'-th row to the L2'-th row:[[]]

[0099]

[0100]

[0101] where both matrix C and matrix D are composed of Z c *Z cMatrix B of dimension ij constitutes; C (S2,L2) represents the matrix formed by the elements from the S2-th row to the L2-th row of matrix C; C (S2',L2') represents the matrix formed by the elements from the S2'-th row to the L2'-th row of matrix C; D (S2,L2) represents the matrix formed by the elements from the S2-th row to the L2-th row of matrix D; D (S2',L2') represents the matrix formed by the elements from the S2'-th row to the L2'-th row of matrix D.

[0102] Through steps S5 to S6, (N'-M-K-L2-L2')*(M+K) "AND" operations and (N'-M-K-L2-L2')*M "XOR" operations can be saved.

[0103] After the above process, the check bit set p 1 and the check bit set p 2 are discarded for the redundant elements. Then, the non-redundant elements in the check bit set p 1 and the check bit set p 2 are used for LDPC encoding. It can be seen that through the joint consideration of the bit selection process of rate matching in the present invention, the encoding calculation process for the redundant bit part is omitted, and the computational complexity of LDPC encoding can be effectively reduced.

[0104] In addition, in some embodiments, a computer terminal storage medium is proposed, storing computer terminal executable instructions for executing the low-complexity LDPC encoding method applicable to the NR standard as described in the previous embodiments. Examples of computer storage media include magnetic storage media (e.g., floppy disks, hard disks, etc.), optical recording media (e.g., CD-ROM, DVD, etc.) or memories such as memory cards, ROM, or RAM. The computer storage media can also be distributed on computer systems connected by a network, such as an application store.

[0105] In addition, in some embodiments, a computing device is proposed, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the low-complexity LDPC encoding method applicable to the NR standard as described in the previous embodiments. Examples of computing devices include a PC, a tablet computer, a smart phone, or a PDA, etc.

[0106] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A low-complexity LDPC encoding method applicable to the NR standard, characterized in that, Including: Calculate the indices of the non-redundant elements in the check bit sets p 1 and the check bit sets p 2 respectively; Calculate the check bit set p according to the non-redundant element index 1 and the non-redundant elements in the check bit set p 2 ; Perform LDPC encoding using the non-redundant elements in the parity bit set p 1 and the parity bit set p 2 ; Method for calculating indices of non-redundant elements in check bit set p 1 is as follows: Among them, S1 is the starting index of the non-redundant elements in the check bit set p 1 and L1 is the length of the non-redundant elements in the check bit set p 1 ; k0 represents the starting bit number of the bit selection process in the rate matching process; E represents the length of the rate matching output sequence f; F represents the length of the NULL bit in the coded output sequence; M represents the number of rows of the parity check matrix corresponding to the high code rate part of the coded output; K represents the length of the LDPC coded input sequence; Z c is calculated based on K; Method for calculating indexes of non-redundant elements in check bit set p 2 is as follows: Among them, S2 is the start index of the first non-redundant element in the check bit set p 2 and L2 is the length of the first non-redundant element in the check bit set p 2 ; S2' is the start index of the second non-redundant element in the check bit set p 2 and L2' is the length of the second non-redundant element in the check bit set p 2 ; N cb represents the buffer size for bit clipping or repetition processing during the rate matching process, and N cb = min(N, N ref ), where N ref is the size limit of the buffer due to hardware constraints, and N represents the length after puncturing of the LDPC coding output.

2. The low-complexity LDPC encoding method applicable to the NR standard according to claim 1, characterized in that Calculating the set of check bits p according to the non-redundant element index 1 The method for non-redundant elements in First, calculate the check bit set p 1 The required coefficient matrix S 1 The elements from the S1-th row to the L1-th row, denoted as Among them, both matrix A and matrix B are composed of Z c *Z c -dimensional matrix B ij constitutes. Matrix B ij can be obtained by cyclically shifting the identity matrix I to the right by P ij times. P ij is obtained by looking up a table based on the protocol; B -1 represents the inverse matrix of matrix B. (B -1 ) (S1,L1) represents the matrix composed of the elements from the S1-th row to the L1-th row of B -1 ; Then initialize the check bit set p 1 as an all-zero vector, and then calculate the elements of the check bit set p 1 from the S1-th row to the L1-th row: p 1 ＝0 M×1 Among them, d represents the LDPC - coded input sequence that has been segmented and filled with padding bits.

3. The low-complexity LDPC encoding method applicable to the NR standard according to claim 2, characterized in that, Calculating the set of check bits p according to the non-redundant element index 2 The method for non-redundant elements in First, calculate the set of check bits p 2 The required coefficient matrix S 2 The elements from the S2-th row to the L2-th row, denoted as And the elements from the S2'-th row to the L2'-th row, denoted as Then initialize the check bit set p 2 as an all-zero vector, and then calculate the elements of the S2nd to L2nd rows and the S2'th to L2'th rows of the check bit set p 2 : Among them, both matrix C and matrix D are composed of matrix B with dimensions of Z c *Z c ; C ij represents the matrix formed by the elements from the S2-th row to the L2-th row of matrix C; C (S2,L2) represents the matrix formed by the elements from the S2'-th row to the L2'-th row of matrix C; D (S2',L2') represents the matrix formed by the elements from the S2-th row to the L2-th row of matrix D; D (S2,L2) represents the matrix formed by the elements from the S2'-th row to the L2'-th row of matrix D. (S2',L2') ​ 4. A computer terminal storage medium stores computer terminal executable instructions, characterized in that, The executable instructions of the computer terminal are used to execute the low - complexity LDPC coding method applicable to the NR standard as described in any one of claims 1 - 3.

5. A computing device, characterized in that, Including: At least one processor; And a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the low - complexity LDPC coding method applicable to the NR standard as described in any one of claims 1 - 3.

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