Bias voltage supply circuit, bias voltage supply method and non-volatile memory chip

Abstract

This application relates to the field of circuit control technology, and discloses a bias voltage providing circuit, a bias voltage providing method, and a non-volatile memory chip. The bias voltage providing circuit includes: a reference voltage providing module for providing a reference voltage based on a reference ground voltage; an adjustment module connected to the reference voltage providing module to generate a corresponding reference current based on the reference voltage; and a bias voltage generating module connected to the adjustment module and selectively connected to either a reference ground voltage or a compensation voltage to generate a first type of bias voltage based on the selected reference ground voltage and reference current, or a second type of bias voltage based on the selected compensation voltage and reference current. Through this method, by changing the reference point of the bias voltage generating module, the reference ground voltage or compensation voltage can be dynamically selected to generate either the first type of bias voltage or the second type of bias voltage. This allows for noise compensation using the second type of bias voltage, or the provision of a first type of bias voltage to modules that do not require compensation.

Description

Technical Field

[0001] This application relates to the field of circuit control technology, and in particular to bias voltage supply circuits, bias voltage supply methods, and non-volatile memory chips. Background Technology

[0002] When reading from a non-volatile memory chip, voltages are typically applied to its word line (WL) and bit line (BL). The sensing module then identifies the stored data by detecting the current in the memory cell. Therefore, during the read process, current flows through the memory cell. This current flows from the sensing module, through the BL, through the memory cell, and then through the source line of the memory's common source terminal to the ground of the non-volatile memory chip.

[0003] The source lines of non-volatile memory chips are typically metal interconnects that connect the entire memory array within the chip. They possess a certain internal resistance. Furthermore, a switching transistor is usually present in the source line path to control the source line voltage, further increasing the equivalent resistance of the source line. As a result, during read operations, a voltage drop V occurs when the current flowing through the source line across all the read memory cells. SL This situation is more pronounced when the read bit width is wide. Because the current in the memory cells varies when storing different data, the source line voltage drop V0... SL The current value of a storage cell varies with the data stored within it and can be considered as noise that affects the current value of the storage cell. Summary of the Invention

[0004] The main technical problem solved by this application is to provide a bias voltage providing circuit, a bias voltage providing method, and a non-volatile memory chip, which can dynamically select a reference ground voltage or a compensation voltage to generate a first type bias voltage or a second type bias voltage by changing the reference point of the bias voltage generating module. When selecting the compensation voltage, the second type bias voltage can compensate for noise. When selecting the reference ground voltage, the first type bias voltage is provided to modules that do not require compensation.

[0005] To address the aforementioned issues, this application provides a bias voltage supply circuit, comprising: a reference voltage supply module for supplying a reference voltage based on a reference ground voltage; an adjustment module connected to the reference voltage supply module to generate a corresponding reference current based on the reference voltage; and a bias voltage generation module connected to the adjustment module and selectively connected to a reference ground voltage or a compensation voltage to generate a first type of bias voltage based on the selected reference ground voltage and reference current, or a second type of bias voltage based on the selected compensation voltage and reference current.

[0006] The bias voltage generation module includes: a current mirror unit connected to the adjustment module to generate a mirror current matching the reference current; and a selection unit connected to the current mirror unit to allow the current mirror unit to selectively connect to a reference ground voltage or a compensation voltage. When the current mirror unit selects to connect to the reference ground voltage via the selection unit, it outputs a first type of bias voltage based on the reference ground voltage according to the mirror current; or, when the current mirror unit selects to connect to the compensation voltage via the selection unit, it outputs a second type of bias voltage based on the compensation voltage according to the mirror current.

[0007] The adjustment module includes: an operational amplifier whose inverting input is connected to a reference voltage supply module to receive a reference voltage; a first transistor whose control terminal is connected to the output terminal of the operational amplifier; and a first resistor, wherein the first transistor and the first resistor are connected in series between the operating voltage and the reference ground voltage, and a first node between the first transistor and the first resistor is connected to the non-inverting input of the operational amplifier to form positive feedback, thereby generating a reference current flowing through the first transistor and the first resistor based on the reference voltage.

[0008] The current mirror unit includes: a second transistor, the control terminal of which is connected to the output terminal of the operational amplifier; and a second resistor, wherein the second transistor and the second resistor are connected in series between the operating voltage and the selection unit; wherein the second transistor and the first transistor are transistors of the same type, and the second transistor constitutes a mirror circuit of the first transistor to generate a mirror current flowing through the second transistor, the mirror current being proportional to the reference current, and the scaling factor between the mirror current and the reference current being equal to the scaling factor between the second transistor and the first transistor.

[0009] The second resistor is a variable resistor.

[0010] The selection unit includes: a first switch connected between the current mirror unit and the reference ground voltage, wherein when the first switch is turned on, the current mirror unit is connected to the reference ground voltage to output a first type bias voltage based on the reference ground voltage according to the mirror current; and a second switch connected between the current mirror unit and the compensation voltage, wherein when the second switch is turned on, the current mirror unit is connected to the compensation voltage to output a second type bias voltage based on the compensation voltage according to the mirror current.

[0011] Wherein, the reference ground voltage is the reference ground voltage of the non-volatile memory chip, the compensation voltage is the noise voltage on the source line of the non-volatile memory chip, and the bias voltage providing circuit is used to provide a first type of bias voltage for the first type of working module based on the reference ground voltage in the non-volatile memory chip, and to provide a second type of bias voltage for the second type of working module affected by the compensation voltage.

[0012] To address the aforementioned issues, another technical solution adopted in this application is to provide a bias voltage provision method, comprising: providing a reference voltage based on a reference ground voltage; generating a corresponding reference current based on the reference voltage; selecting a reference ground voltage or a compensation voltage as a reference, and generating a first type of bias voltage based on the selected reference ground voltage and the reference current, or generating a second type of bias voltage based on the selected compensation voltage and the reference current.

[0013] The step of selecting a reference ground voltage or a compensation voltage as a reference and generating a first type of bias voltage based on the selected reference ground voltage and a reference current, or generating a second type of bias voltage based on the selected compensation voltage and a reference current, includes: generating a matching mirror current based on the reference current; selecting a reference ground voltage or a compensation voltage as a reference; using the selected reference ground voltage as a reference and outputting a first type of bias voltage based on the reference ground voltage according to the mirror current, or using the selected compensation voltage as a reference and outputting a second type of bias voltage based on the compensation voltage according to the mirror current.

[0014] To address the aforementioned issues, another technical solution adopted in this application is to provide a non-volatile memory chip, including a bias voltage supply circuit as described above.

[0015] The beneficial effects of this application are as follows: Unlike existing technologies, the bias voltage providing circuit provided in this application utilizes a reference voltage providing module to provide a reference voltage based on a reference ground voltage; an adjustment module generates a corresponding reference current based on the reference voltage; and then a bias voltage generating module is connected to the adjustment module to selectively connect either the reference ground voltage or a compensation voltage. This allows for the generation of a first-type bias voltage based on the selected reference ground voltage and reference current, or a second-type bias voltage based on the selected compensation voltage and reference current. By changing the reference point of the bias voltage generating module, the first-type bias voltage or the second-type bias voltage can be dynamically selected by changing the reference ground voltage or the compensation voltage. When selecting a compensation voltage, the second-type bias voltage can compensate for noise; when selecting a reference ground voltage, the first-type bias voltage is provided to modules that do not require compensation. Compared to existing technologies, the bias voltage providing circuit provided in this application has better process compatibility and can generate both types of bias voltages without an additional reference source, reducing cost and power consumption. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0017] Figure 1This is a schematic diagram of an embodiment of the bias voltage providing circuit provided in this application;

[0018] Figure 2 This is a schematic diagram of the application scenario of the bias voltage providing circuit provided in this application;

[0019] Figure 3 This is a schematic diagram of another embodiment of the bias voltage providing circuit provided in this application;

[0020] Figure 4 This is a schematic flowchart of an embodiment of the bias voltage provision method provided in this application;

[0021] Figure 5 This is a schematic diagram of another embodiment of the bias voltage providing method provided in this application;

[0022] Figure 6 This is a schematic diagram of the structure of an embodiment of the non-volatile memory chip provided in this application;

[0023] Figures 7-9 This is a schematic diagram of the application scenario of the bias voltage providing circuit provided in this application. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It is understood that the specific embodiments described herein are only for explaining this application and not for limiting it. Furthermore, it should be noted that, for ease of description, only the parts related to this application are shown in the accompanying drawings, not all structures. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0025] The terms "first," "second," etc., used in this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0026] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0027] See Figure 1 , Figure 1 This is a schematic diagram of an embodiment of the bias voltage providing circuit provided in this application. The bias voltage providing circuit 100 includes a reference voltage providing module 10, an adjustment module 20, and a bias voltage generating module 30.

[0028] The reference voltage providing module 10 provides a reference voltage based on the reference ground voltage 40. The adjustment module 20 is connected to the reference voltage providing module 10 to generate a corresponding reference current according to the reference voltage.

[0029] The bias voltage generation module 30 is connected to the adjustment module 20 and selectively connected to the reference ground voltage 40 or the compensation voltage 50 to generate a first type of bias voltage based on the selected reference ground voltage 40 and the reference current or to generate a second type of bias voltage based on the selected compensation voltage 50 and the reference current.

[0030] The reference voltage providing module 10 can be a bandgap reference source circuit that outputs a reference voltage, the reference potential of which is the reference ground voltage 40.

[0031] In one application scenario, combined Figure 2 Explanation:

[0032] When reading data from a non-volatile memory chip, voltage is typically applied to its word line (WL) and bit line (BL), and then... Figure 2 The sensing modules 1, 2, and n distinguish the stored data by judging the current of the corresponding connected storage cells 1, 2, and n. Here, n is an integer greater than 2. Therefore, during data reading, a current I flows through storage cells 1 and / or 2 and / or n. The current I flows from the corresponding sensing modules 1 and / or 2 and / or n, through BL, storage cells 1 and / or 2 and / or n, and then through the source line of the common source terminal of the non-volatile memory chip to the ground of the non-volatile memory chip.

[0033] The source lines of non-volatile memory chips are typically metal wires used for interconnection. They need to connect the entire memory array within the non-volatile memory chip and have a certain internal resistance, such as... Figure 2 In addition to RS1, there is usually a switching transistor on the source line path to control the source line voltage. During non-readout operations, it may be biased to other voltages, further increasing the equivalent resistance of the source line. As a result of these factors, during readout, a voltage drop V is generated when the current flowing through the source line from all read memory cells 1 and / or 2 and / or n. SLThis situation is particularly severe when the read bit width is wide. Because the current in the storage cells varies when storing different data, the source line voltage drop V0 SL It varies with the data stored in the memory cell and can be considered as noise affecting the current value of the memory cell, due to the source line voltage drop V. SL Such noise, therefore, the voltage difference between the word line voltage and the source line voltage applied to the memory cell, or the voltage difference between the bit line voltage and the source line voltage applied to the sensing module, will be affected by the source line voltage drop V. SL This noise is reduced, which in turn leads to a decrease in the current of the storage cell. Since the sensing module distinguishes the stored data by the magnitude of the storage cell current, a decrease in the current of the storage cell may result in the inability to read the data in the storage cell correctly.

[0034] At this point, the bias voltage supply circuit 100 described above can be used to process the source line voltage drop V. SL As compensation voltage 50, when the non-volatile memory chip is reading data, the bias voltage generation module 30 in the bias voltage supply circuit 100 is connected to the adjustment module 20 and selectively connected to compensation voltage 50, that is, connected to the source line, to generate a second type of bias voltage based on compensation voltage 50 and reference current.

[0035] At this point, the second type of bias voltage can be used as a reference voltage and input to the bit line voltage generator and word line voltage generator to generate the corresponding bit line voltage V. BLC Or word line voltage V WL This causes the bit line voltage V output by the bit line voltage generator to be so high. BLC and the word line voltage V output by the word line voltage generator WL Based on a compensation voltage of 50 (source line voltage drop V) SL The corresponding increase is equivalent to partially offsetting the voltage drop V at the source line. SL This causes the current read from the sensing module to be affected by the voltage drop V. SL If the impact is reduced, then the data can be read.

[0036] Furthermore, many modules in a non-volatile memory chip, such as various functional modules that generate erase and write voltages (e.g., charge pumps) and LDOs (low dropout regulators) that generate power supply voltages for internal control logic circuits, require bias voltages. However, these bias voltages do not need to use the compensation voltage 50 as a reference voltage; instead, they use the reference ground voltage 40. Therefore, when these modules require bias voltages, the bias voltage generation module 30 in the bias voltage supply circuit 100 can be connected to the adjustment module 20 and the reference ground voltage 40 to generate a first-type bias voltage based on the selected reference ground voltage 40 and the reference current. This first-type bias voltage can then be used as the bias voltage for the remaining modules.

[0037] In this embodiment, the bias voltage providing circuit 100 utilizes the reference voltage providing module 10 to provide a reference voltage based on the reference ground voltage; the adjustment module 20 generates a corresponding reference current based on the reference voltage; and then the bias voltage generating module 30 is connected to the adjustment module 20 to selectively connect the reference ground voltage 40 or the compensation voltage 50, generating a first type of bias voltage based on the selected reference ground voltage 40 and the reference current, or a second type of bias voltage based on the selected compensation voltage 50 and the reference current. By changing the reference point of the bias voltage generating module 30, the reference ground voltage 40 or the compensation voltage 50 can be dynamically selected to generate the first type of bias voltage or the second type of bias voltage. When the compensation voltage 50 is selected, the second type of bias voltage can compensate for noise; when the reference ground voltage 40 is selected, the first type of bias voltage is provided to modules that do not require compensation. Compared to the prior art, the bias voltage providing circuit 100 provided in this embodiment has better process compatibility and can generate two types of bias voltages without an additional reference source, reducing cost and power consumption.

[0038] In some embodiments, see Figure 3 The bias voltage providing circuit 100 includes a reference voltage providing module 10, an adjustment module 20, and a bias voltage generating module 30. The bias voltage generating module 30 includes a current mirror unit 31 and a selection unit 32. The adjustment module 20 includes an operational amplifier 21, a first transistor 22, and a first resistor 23. The current mirror unit 31 includes a second transistor 311 and a second resistor 312. The selection unit 32 includes a first switch 321 and a second switch 322.

[0039] The inverting input of operational amplifier 21 is connected to reference voltage supply module 10 to receive a reference voltage. The control terminal of the first transistor 22 is connected to the output of operational amplifier 21.

[0040] The first transistor 22 and the first resistor 23 are connected in series between the operating voltage VCC and the reference ground voltage 40. The first node A between the first transistor 22 and the first resistor 23 is connected to the non-inverting input of the operational amplifier 21 to form positive feedback, thereby generating a reference current flowing through the first transistor 22 and the first resistor 23 based on the reference voltage. Through the positive feedback of the operational amplifier 21, the reference current can be continuously maintained based on the reference voltage, and the first transistor 22 remains in the amplification operating range and continues to operate.

[0041] The control terminal of the second transistor 311 is connected to the output terminal of the operational amplifier 21; the second transistor 311 and the second resistor 312 are connected in series between the operating voltage VCC and the selection unit 32.

[0042] Since the control terminal of the second transistor 311 is connected to the output terminal of the operational amplifier 21, the second transistor 311 and the first transistor 22 are controlled simultaneously.

[0043] In some embodiments, the second transistor 311 and the first transistor 22 are transistors of the same type, and the second transistor 311 constitutes a mirror circuit of the first transistor 22 to generate a mirror current flowing through the second transistor 311.

[0044] The mirror current is proportional to the reference current, and the scaling factor between the mirror current and the reference current is equal to the scaling factor between the second transistor 311 and the first transistor 22.

[0045] For example, if the scaling factor between the second transistor 311 and the first transistor 22 is K1, then Among them, I REF I represents the reference current. REF' Represents the mirror current, where, V REF R1 represents the reference voltage, and R1 represents the resistance value of the first resistor 23. This is understandable. Operational amplifier 21, after ensuring loop stability, provides feedback point voltage V. FB =V REF Therefore, the reference current flowing through the first transistor 22 and the first resistor 23 can be used The proportionality coefficient K1 between the second transistor 311 and the first transistor 22 can be set according to actual needs.

[0046] In some embodiments, the second resistor 312 is a variable resistor. The resistance value R2 of the second resistor 312 can be set according to actual needs.

[0047] The first switch 321 is connected between the current mirror unit 31 and the reference ground voltage 40. When the first switch 321 is turned on, the current mirror unit 31 is connected to the reference ground voltage 40 to output a first type of bias voltage based on the reference ground voltage 40 according to the mirrored current.

[0048] Use V to set the output bias voltage. out This indicates that if the reference ground voltage 40 is 0, then the first type bias voltage...

[0049] The second switch 322 is connected between the current mirror unit 31 and the compensation voltage 50. When the second switch 322 is turned on, the current mirror unit 31 is connected to the compensation voltage 50 to output a second type of bias voltage based on the compensation voltage 50 according to the mirror current.

[0050] Use V to set the output bias voltage. out This indicates that the second type of bias voltage Among them, V SL This indicates the voltage value of the compensation voltage 50.

[0051] It is understandable that when the first switch 321 is on, the second switch 322 is off, or when the first switch 321 is off, the second switch 322 is on.

[0052] In one application scenario, the bias voltage providing circuit 100 is applied to a non-volatile memory chip. In this case, the reference ground voltage 40 mentioned in the above embodiment is the reference ground voltage of the non-volatile memory chip, and the compensation voltage 50 is the noise voltage on the source line of the non-volatile memory chip.

[0053] The bias voltage providing circuit 100 is used to provide a first type bias voltage for a first type of working module in a non-volatile memory chip based on a reference ground voltage 40, and to provide a second type bias voltage for a second type of working module affected by a compensation voltage 50.

[0054] The first type of working module can be various functional modules that generate erase and write voltages, such as charge pumps and LDOs (low dropout regulators) that generate power supply voltages for internal control logic circuits.

[0055] The second type of work module can be as described above. Figure 2 The sensor module, bit line voltage generator, and word line voltage generator are shown in combination for data reading or writing.

[0056] Among them, the reference voltage providing module 10 can be a bandgap reference source circuit, which outputs a reference voltage V. REF The reference potential for this reference voltage is GND.

[0057] Operational amplifier 21, first transistor 22, and first resistor 23 constitute adjustment module 20. The high gain of operational amplifier 21 ensures that the feedback point voltage V remains constant after the loop stabilizes. FB =V REF Therefore, the current flowing through the first transistor 22 and the first resistor 23 is... Where R1 represents the resistance value of the first resistor 23.

[0058] The second transistor 311 forms a mirror circuit of the first transistor 22, with a scaling factor of K1, and the current flowing through the second transistor 311 is... The current simultaneously flows through the second resistor 312, generating a voltage drop across the second resistor 312. The voltage can be changed by adjusting the resistance value of the second resistor 312; where R2 represents the resistance value of the second resistor 312.

[0059] When the first switch 321 is turned on, the negative terminal of the second resistor 312 is connected to GND, and the output first type bias voltage is generated. This first type of bias voltage can be used to provide bias voltage to the remaining functional modules.

[0060] When the second switch 322 is turned on, the negative terminal of the second resistor 312 is connected to the source line, and a second type of bias voltage is output. That is, the required voltage plus the noise voltage of the source line completes the compensation for the noise voltage of the source line, ensuring that the actual voltage applied to the gate-source or drain-source of the memory cell is not affected by the noise voltage of the source line.

[0061] See Figure 4 , Figure 4 This is a schematic flowchart of an embodiment of the bias voltage provision method provided in this application. The method includes:

[0062] Step 41: Provide a reference voltage based on the reference ground voltage.

[0063] In this embodiment, the description can be based on the bias voltage providing circuit 100 in any of the above embodiments. When a bias voltage is required, the reference voltage providing module 10 in the bias voltage providing circuit 100 provides a reference voltage based on the reference ground voltage.

[0064] Step 42: Generate the corresponding reference current based on the reference voltage.

[0065] The adjustment module 20 in the bias voltage supply circuit 100 is connected to the reference voltage supply module 10 to generate a corresponding reference current based on the reference voltage output by the reference voltage supply module 10.

[0066] Step 43: Select a reference ground voltage or a compensation voltage as a reference, and generate a first type of bias voltage based on the selected reference ground voltage and reference current, or generate a second type of bias voltage based on the selected compensation voltage and reference current.

[0067] In some embodiments, when a bias voltage is required, either a reference ground voltage or a compensation voltage has been determined as the base. Therefore, if a reference ground voltage is selected as the base, a first type of bias voltage is generated based on the selected reference ground voltage and the reference current. Similarly, if a compensation voltage is selected as the base, a second type of bias voltage is generated based on the selected compensation voltage and the reference current.

[0068] In this embodiment, by selecting a reference ground voltage or a compensation voltage as a reference, a first type of bias voltage or a second type of bias voltage is dynamically generated based on the reference ground voltage or the compensation voltage. When selecting a compensation voltage, the second type of bias voltage is used to compensate for noise. When selecting a reference ground voltage, the first type of bias voltage is provided to modules that do not require compensation.

[0069] See Figure 5 , Figure 5 This is a schematic flowchart of another embodiment of the bias voltage providing method provided in this application. The method includes:

[0070] Step 51: Provide a reference voltage based on the reference ground voltage.

[0071] Step 52: Generate the corresponding reference current based on the reference voltage.

[0072] Steps 51 and 52 have the same or similar technical solutions as the above embodiments, and will not be described in detail here.

[0073] Step 53: Generate a matching mirror current based on the reference current.

[0074] Step 54: Select the reference ground voltage or compensation voltage as the benchmark.

[0075] Step 55: Using the selected reference ground voltage as a reference, output a first type bias voltage based on the reference ground voltage according to the mirror current, or using the selected compensation voltage as a reference, output a second type bias voltage based on the compensation voltage according to the mirror current.

[0076] In this embodiment, the description can be based on the bias voltage supply circuit 100 in any of the above embodiments.

[0077] When a bias voltage is required, either a reference ground voltage or a compensation voltage has been selected as the base. If the first switch 321 is turned on, the reference ground voltage is selected, and a first-type bias voltage based on the reference ground voltage is output according to the mirror current. The specific calculation method can be found in the description of any of the above embodiments, and will not be repeated here.

[0078] If the second switch 322 is turned on, the compensation voltage is selected as the reference, and a second type of bias voltage based on the compensation voltage is output according to the mirror current. The specific calculation method can be found in the description of any of the above embodiments, and will not be repeated here.

[0079] See Figure 6 , Figure 6 This is a schematic diagram of an embodiment of the non-volatile memory chip provided in this application. The non-volatile memory chip 700 includes a bias voltage supply circuit 100.

[0080] The bias voltage supply circuit 100 can be as described in any of the above embodiments, and will not be elaborated here.

[0081] It is understandable that the non-volatile memory chip 700 also includes, for example, Figure 2 The storage unit, sensing module, bit line voltage generator, word line voltage generator, etc. are shown.

[0082] Based on any of the above technical solutions, the inventors used simulation software to simulate the impact of source line noise on the current of the non-volatile memory chip 700 when 2k byte memory cells are read out simultaneously and the current of each memory cell is about 1uA.

[0083] In an ideal case where the source line resistance is not considered, such as Figure 7 As shown, Vref_en is the bias voltage enable. After the enable signal is valid, since there is no source line resistance, the source line voltage V... SL =0, word line bias voltage V WL =2.9V, used to provide the bias voltage for the gate of the non-volatile memory chip 700, bit line bias voltage V BLC =1.8V, used to provide bias voltage to the drain terminal of non-volatile memory chip 700. The memory cell current of non-volatile memory chip 700 is I = 974nA. Since there is no source line resistance, this current is entirely determined by the characteristics of non-volatile memory chip 700 and the bias voltage V. WL V BLC The decision is made based on this current, which can be seen as a simulation of an ideal situation. The sensing module uses this current to determine the data value stored in the non-volatile memory chip 700.

[0084] Considering a source line resistance of 5 ohms and without compensation, if Figure 8As shown, after the Vref_en enable signal is valid, the presence of the source line resistance causes a voltage drop across the source line resistance, resulting in the source line voltage V. SL =73mV, this voltage raises the reference level of the memory cell due to the word line bias voltage V WL With bit line bias voltage V BLC With the voltage value remaining unchanged, the actual voltage applied between the word line, bit line, and reference potential of the memory cell decreases, resulting in a decrease in the memory cell current I of the non-volatile memory chip 700 from 974nA to 891nA, which is an 8.5% decrease compared to the ideal situation. This affects the sensing module's ability to distinguish the data stored in the non-volatile memory chip 700.

[0085] Considering a source line resistance of 5 ohms and using the technical solution described above in this application, if Figure 9 As shown, after the Vref_en enable signal is valid, the source line voltage V SL =79mV, this compensation method is a positive feedback method, V WL V BLC The increase in voltage will further increase V. SL The value of V is such that, compared to the uncompensated case, V SL It will be slightly higher because it incorporates a compensation voltage, which increases V. WL V BLC Reference potential, word line bias voltage V WL The bit line bias voltage V was increased from 2.9V to 2.97V. BLC The increase in bias voltage from 1.8V to 1.88V largely compensated for the V... SL Voltage, so that the actual voltage applied between the word line, bit line and reference potential of the memory cell is not affected by V. SL Due to the influence of the non-volatile memory chip 700, the memory cell current I is increased from 891nA without compensation to 955nA, and the difference from the ideal current is reduced from 8.5% to 2%, effectively reducing the impact of the source line voltage on the data in the non-volatile memory chip 700.

[0086] In summary, the bias voltage providing circuit provided in this application utilizes a reference voltage providing module to provide a reference voltage based on a reference ground voltage; an adjustment module generates a corresponding reference current based on the reference voltage; and a bias voltage generating module is connected to the adjustment module to selectively connect the reference ground voltage or a compensation voltage. This allows for the generation of a first-type bias voltage based on the selected reference ground voltage and reference current, or a second-type bias voltage based on the selected compensation voltage and reference current. By changing the reference point of the bias voltage generating module, the first-type bias voltage or the second-type bias voltage can be dynamically selected by changing the reference ground voltage or the compensation voltage. When selecting a compensation voltage, the second-type bias voltage can compensate for noise; when selecting a reference ground voltage, the first-type bias voltage is provided to modules that do not require compensation. Compared to existing technologies, the bias voltage providing circuit provided in this application has better process compatibility and can generate both types of bias voltages without an additional reference source, reducing cost and power consumption.

[0087] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0088] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0089] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0090] If the integrated units in the other embodiments described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0091] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A bias voltage providing circuit, characterized in that, include: A reference voltage providing module is used to provide a reference voltage based on a reference ground voltage; The adjustment module is connected to the reference voltage providing module to generate a corresponding reference current based on the reference voltage; A bias voltage generation module is connected to the adjustment module and selectively connected to the reference ground voltage or the compensation voltage to generate a first type of bias voltage based on the selected reference ground voltage and the reference current, or to generate a second type of bias voltage based on the selected compensation voltage and the reference current. The bias voltage generating module includes: A current mirror unit is connected to the adjustment module to generate a mirror current that matches the reference current; The selection unit is connected to the current mirror unit so that the current mirror unit can selectively connect to the reference ground voltage or the compensation voltage; Wherein, when the current mirror unit selects to connect to the reference ground voltage through the selection unit, the current mirror unit outputs a first type of bias voltage based on the reference ground voltage according to the mirrored current; or When the current mirror unit selects to connect to the compensation voltage through the selection unit, the current mirror unit outputs a second type of bias voltage based on the compensation voltage according to the mirror current; The adjustment module includes: An operational amplifier, the inverting input of which is connected to the reference voltage supply module to receive the reference voltage; The first transistor has its control terminal connected to the output terminal of the operational amplifier; A first resistor, wherein the first transistor and the first resistor are connected in series between the operating voltage and the reference ground voltage, and a first node between the first transistor and the first resistor is connected to the non-inverting input of the operational amplifier to form positive feedback, thereby generating the reference current flowing through the first transistor and the first resistor based on the reference voltage.

2. The bias voltage providing circuit according to claim 1, characterized in that, The current mirror unit includes: The second transistor has its control terminal connected to the output terminal of the operational amplifier; The second resistor, wherein the second transistor and the second resistor are connected in series between the operating voltage and the selection unit; Wherein, the second transistor and the first transistor are transistors of the same type, and the second transistor constitutes a mirror circuit of the first transistor to generate the mirror current flowing through the second transistor. The mirror current is proportional to the reference current, and the scaling factor between the mirror current and the reference current is equal to the scaling factor between the second transistor and the first transistor.

3. The bias voltage providing circuit according to claim 2, characterized in that, The second resistor is a variable resistor.

4. The bias voltage providing circuit according to claim 1, characterized in that, The selection unit includes: A first switch is connected between the current mirror unit and the reference ground voltage, wherein when the first switch is turned on, the current mirror unit is connected to the reference ground voltage to output a first type of bias voltage based on the reference ground voltage according to the mirrored current; A second switch is connected between the current mirror unit and the compensation voltage, wherein when the second switch is turned on, the current mirror unit is connected to the compensation voltage to output a second type of bias voltage based on the compensation voltage according to the mirrored current.

5. The bias voltage providing circuit according to claim 1, characterized in that, The reference ground voltage is the reference ground voltage of the non-volatile memory chip, the compensation voltage is the noise voltage on the source line of the non-volatile memory chip, and the bias voltage providing circuit is used to provide a first type bias voltage for a first type of working module in the non-volatile memory chip based on the reference ground voltage, and to provide a second type bias voltage for a second type of working module affected by the compensation voltage.

6. A method for providing a bias voltage, characterized in that, Applied to the bias voltage supply circuit as described in any one of claims 1-5, the method comprises: Provides a reference voltage based on the reference ground voltage; A corresponding reference current is generated based on the reference voltage; Select the reference ground voltage or compensation voltage as a reference, and generate a first type of bias voltage based on the selected reference ground voltage and the reference current, or generate a second type of bias voltage based on the selected compensation voltage and the reference current.

7. The bias voltage providing method according to claim 6, characterized in that, The step of selecting the reference ground voltage or compensation voltage as a reference, and generating a first type of bias voltage based on the selected reference ground voltage and the reference current, or generating a second type of bias voltage based on the selected compensation voltage and the reference current, includes: A matching mirror current is generated based on the reference current; Select the reference ground voltage or compensation voltage as the benchmark; Based on the selected reference ground voltage, a first type bias voltage based on the reference ground voltage is output according to the mirror current; or based on the selected compensation voltage, a second type bias voltage based on the compensation voltage is output according to the mirror current.

8. A non-volatile memory chip, characterized in that, Includes the bias voltage supply circuit as described in any one of claims 1-5.

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