Light emitting diode with improved optical cross-talk and method of manufacturing the same

Abstract

The present disclosure provides a light emitting diode for improving light crosstalk and a preparation method thereof, and belongs to the technical field of optoelectronic manufacturing. The light emitting diode comprises a substrate, an epitaxial layer and a light improvement layer, the epitaxial layer is located on the substrate, and the light improvement layer is located on the sidewall of the epitaxial layer. The light improvement layer comprises a first film layer and a second film layer, the first film layer is located on the sidewall of the epitaxial layer, the second film layer is located on the surface of the first film layer away from the epitaxial layer, the difference between the refractive index of the first film layer and the refractive index of the epitaxial layer is not more than 0.5, and the second film layer is used for absorbing light rays incident to the second film layer. The embodiment of the present disclosure can effectively reduce the light emission of the side surface of the epitaxial layer and improve the light crosstalk problem of the light emitting diode.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting diode with improved optical crosstalk and a method for its fabrication. Background Technology

[0002] Micro LEDs are ultra-small light-emitting diodes with a side length of 10μm to 100μm. Due to their small size, micro LEDs can be arranged more densely to significantly improve resolution. They also have self-emissive properties and are characterized by high brightness, high contrast, high responsiveness, and energy saving.

[0003] In related technologies, a light-emitting diode typically includes a substrate, an epitaxial layer, and two electrodes. The epitaxial layer is stacked on the substrate, and the two electrodes are located on the surface of the epitaxial layer and are respectively connected to the p-type layer and n-type layer of the epitaxial layer.

[0004] However, light emitted from the epitaxial layer can easily escape from the sidewalls of the epitaxial layer, thus creating optical crosstalk with adjacent light-emitting diodes and affecting the light-emitting effect of the light-emitting diodes. Summary of the Invention

[0005] This disclosure provides a light-emitting diode (LED) with improved optical crosstalk and its fabrication method, which can effectively reduce side-emitting light from the epitaxial layer and improve the optical crosstalk problem of the LED. The technical solution is as follows:

[0006] On one hand, this disclosure provides a light-emitting diode (LED) comprising: a substrate, an epitaxial layer, and a light-improving layer, wherein the epitaxial layer is located on the substrate, and the light-improving layer is located on the sidewall of the epitaxial layer; the light-improving layer comprises: a first film layer and a second film layer, wherein the first film layer is located on the sidewall of the epitaxial layer, and the second film layer is located on the surface of the first film layer away from the epitaxial layer, wherein the difference between the refractive index of the first film layer and the refractive index of the epitaxial layer does not exceed 0.5, and the second film layer is used to absorb light incident on the second film layer.

[0007] Optionally, the first film layer includes a silicone layer and GaP particles embedded in the silicone layer.

[0008] Optionally, the refractive index of the first film layer is 2.0 to 3.0.

[0009] Optionally, the second film layer includes a silicone layer and silicon nitride particles embedded in the silicone layer.

[0010] Optionally, the surface of the second film layer away from the first film layer is serrated.

[0011] Optionally, the light-improving layer further includes a third film layer located on the surface of the second film layer away from the epitaxial layer, the third film layer including a silicone layer and carbon particles embedded in the silicone layer.

[0012] Optionally, the light-improving layer further includes a reflective layer located on the surface of the third film layer away from the epitaxial layer.

[0013] Optionally, the epitaxial layer includes a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer sequentially stacked on the substrate, wherein the sidewalls of the multi-quantum well layer are serrated.

[0014] On the other hand, this disclosure also provides a method for fabricating a light-emitting diode, the method comprising: fabricating an epitaxial wafer, the epitaxial wafer comprising a substrate and an epitaxial layer stacked sequentially; forming a light-improving layer on the sidewall of the epitaxial layer, the light-improving layer comprising: a first film layer and a second film layer, the first film layer being located on the sidewall of the epitaxial layer, the second film layer being located on the surface of the first film layer away from the epitaxial layer, the refractive index of the first film layer being higher than the refractive index of the epitaxial layer, and the second film layer being used to absorb light incident on the second film layer.

[0015] Optionally, the preparation of the epitaxial wafer includes: forming the epitaxial layer on the substrate, the epitaxial layer including a first semiconductor layer, a multiple quantum well layer and a second semiconductor layer stacked sequentially; etching the epitaxial layer to expose the substrate, wherein when etching the multiple quantum well layer, the etching power is controlled to be not less than 300W, and the etching power is controlled to periodically increase and then decrease within a power range of 200W to 350W.

[0016] The beneficial effects of the technical solutions provided in this disclosure include at least the following:

[0017] The light-emitting diode provided in this embodiment includes an epitaxial layer stacked on a substrate, and a light-improving layer on the sidewall of the epitaxial layer. The light-improving layer includes a first film layer and a second film layer stacked sequentially along the direction away from the sidewall of the epitaxial layer. The difference between the refractive index of the first film layer and the refractive index of the epitaxial layer is within 0.5. This control of the refractive index of the first film layer to be close to that of the epitaxial layer makes it easier for light to enter the first film layer from the epitaxial layer, thereby extracting more photons emitted laterally from the epitaxial layer to the light-improving layer. After the photons enter the first film layer, the light incident from the first film layer is absorbed by the second film layer, thereby preventing light from escaping from the light-improving layer, reducing lateral light emission from the epitaxial layer, and improving the optical crosstalk problem of the light-emitting diode. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure;

[0020] Figure 2 yes Figure 1 A magnified view of a portion at point A is provided.

[0021] Figure 3 This is a top view of another light-emitting diode provided in an embodiment of this disclosure;

[0022] Figure 4 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure;

[0023] Figure 5 This is a schematic diagram of the periodic change of power during etching, provided in an embodiment of this disclosure.

[0024] The markings in the diagram are explained as follows:

[0025] 10. Substrate;

[0026] 20. Epitaxial layer; 21. First semiconductor layer; 22. Multiple quantum well layer; 23. Second semiconductor layer; 24. Groove;

[0027] 30. Light-improving layer; 31. First film layer; 32. Second film layer; 33. Third film layer; 34. Reflective layer;

[0028] 41. First electrode; 42. Second electrode;

[0029] 50. Passivation layer; 51. Through-hole;

[0030] 61. First solder joint block; 62. Second solder joint block;

[0031] 70. Protective layer. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0033] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0034] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure. For example... Figure 1 As shown, the light-emitting diode includes: a substrate 10, an epitaxial layer 20 and a light-improving layer 30, the epitaxial layer 20 being located on the substrate 10 and the light-improving layer 30 being located on the sidewall of the epitaxial layer 20.

[0035] Figure 2 yes Figure 1 A magnified view of a portion at point A is provided. For example... Figure 2 As shown, the light-improving layer 30 includes a first film layer 31 and a second film layer 32. The first film layer 31 is located on the sidewall of the epitaxial layer 20, and the second film layer 32 is located on the surface of the first film layer 31 away from the epitaxial layer 20. The difference between the refractive index of the first film layer 31 and the refractive index of the epitaxial layer 20 does not exceed 0.5. The second film layer 32 is used to absorb light incident on the second film layer 32.

[0036] The light-emitting diode provided in this embodiment includes an epitaxial layer 20 stacked on a substrate 10. A light-improving layer 30 is provided on the sidewall of the epitaxial layer 20. The light-improving layer 30 includes a first film layer 31 and a second film layer 32 sequentially stacked along a direction away from the sidewall of the epitaxial layer 20. The difference between the refractive index of the first film layer 31 and the refractive index of the epitaxial layer 20 is within 0.5. This control of the refractive index of the first film layer 31 to be close to that of the epitaxial layer 20 makes it easier for light to enter the first film layer 31 from the epitaxial layer 20, thereby extracting more photons emitted laterally from the epitaxial layer 20 into the light-improving layer 30. After the photons enter the first film layer 31, the light incident from the first film layer 31 is absorbed by the second film layer 32, thereby preventing light from escaping from the light-improving layer 30, thus reducing lateral light emission from the epitaxial layer 20 and improving the light crosstalk problem of the light-emitting diode.

[0037] Optionally, the substrate 10 is a sapphire substrate 10. The sapphire substrate 10 has high light transmittance, meaning it is a transparent substrate 10. Furthermore, sapphire material is relatively hard and has stable chemical properties, giving the light-emitting diode good luminous effect and stability.

[0038] In this embodiment of the disclosure, such as Figure 1 As shown, the epitaxial layer 20 may include a first semiconductor layer 21, a multiple quantum well layer 22, and a second semiconductor layer 23 sequentially stacked on the substrate 10. One of the first semiconductor layer 21 and the second semiconductor layer 23 is a p-type layer, and the other is an n-type layer.

[0039] As an example, the first semiconductor layer 21 is a p-type layer and the second semiconductor layer 23 is an n-type layer.

[0040] Optionally, the first semiconductor layer 21 is an n-type AlGaInP layer. The thickness of the n-type AlGaInP layer can be from 0.5 μm to 3 μm.

[0041] Optionally, the multiple quantum well layer 22 includes alternating AlGaInP quantum well layers and AlGaInP quantum barrier layers, with different Al contents in the AlGaInP quantum well layers and AlGaInP quantum barrier layers. The multiple quantum well layer 22 may include 3 to 8 alternating stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0042] As an example, in an embodiment of this disclosure, the multi-quantum well layer 22 includes five alternating stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0043] Optionally, the thickness of the multiple quantum well layer 22 can be from 150 nm to 200 nm.

[0044] Optionally, the second semiconductor layer 23 is an indium-doped p-type AlInP layer. The thickness of the p-type AlInP layer can be from 0.5 μm to 3 μm.

[0045] For example, such as Figure 1 As shown, the sidewalls of the multi-quantum well layer 22 are serrated. By coarsening the sidewalls of the multi-quantum well layer 22, making them rougher and serrated, photons can easily pass through the sidewalls of the multi-quantum well layer 22 into the improvement layer, reducing the generation of photons in disordered directions and further reducing crosstalk problems.

[0046] Optionally, such as Figure 1 As shown, the light-emitting diode also includes a first electrode 41, a second electrode 42 and a passivation layer 50. The surface of the second semiconductor layer 23 has a groove 24 that exposes the first semiconductor layer 21. The first electrode 41 is located in the groove 24, and the second electrode 42 is located on the surface of the second semiconductor layer 23 away from the substrate 10. The passivation layer 50 is located at least on the surface of the second semiconductor layer 23, the bottom surface of the groove 24, the surface of the first electrode 41 and the surface of the second electrode 42.

[0047] Among them, the first electrode 41 is a p-type electrode and the second electrode 42 is an n-type electrode.

[0048] For example, such as Figure 1 As shown, the passivation layer 50 can be a distributed Bragg reflection (DBR layer), which comprises multiple periodically alternating layers of SiO2 and TiO2. The number of periods in the DBR layer can be between 20 and 50. For example, the number of periods in the DBR layer is 32.

[0049] The thickness of the SiO2 layer in the DBR layer can be from 800 angstroms to 1200 angstroms, and the thickness of the TiO2 layer can be from 500 angstroms to 900 angstroms.

[0050] In addition to its passivation function, the DBR layer also reflects light emitted from the multi-quantum well layer 22 toward the DBR layer back to the substrate 10, thereby improving the light extraction effect.

[0051] Optionally, such as Figure 1 As shown, the light-emitting diode also includes: a first solder block 61 and a second solder block 62, the first solder block 61 and the second solder block 62 are located on the passivation layer 50, the first solder block 61 is connected to the first electrode 41 through a through hole 51, and the second solder block 62 is connected to the second electrode 42 through another through hole 51.

[0052] Figure 3 This is a top view of another light-emitting diode provided in an embodiment of this disclosure. (See figure) Figure 3As shown, both the first solder joint block 61 and the second solder joint block 62 are rectangular blocks, which increases the area and facilitates conductivity. Furthermore, the first solder joint block 61 and the second solder joint block 62 are distributed at intervals on the surface of the passivation layer 50.

[0053] Optionally, such as Figure 1 As shown, a protective layer 70 is also provided on the surface of the passivation layer 50 and the improvement layer, and the protective layer 70 extends from the surface of the passivation layer 50 and the surface of the improvement layer to the substrate 10, and the protective layer 70 has through holes 51 exposing the first solder block 61 and the second solder block 62 to facilitate electrical connection.

[0054] For example, in this embodiment of the disclosure, the protective layer 70 may be a silicon oxide layer with a thickness of 2000 angstroms.

[0055] Optionally, the first film layer 31 includes a silicone layer and GaP particles embedded in the silicone layer.

[0056] By incorporating GaP particles into the silicone layer, the overall refractive index of the silicone layer can be increased, allowing the refractive index of the first film layer 31 to approach that of the epitaxial layer 20, thus minimizing the difference in refractive index between the two layers. This makes it easier for light to enter the first film layer from the epitaxial layer, increasing the light incident rate. Consequently, more photons emitted laterally from the epitaxial layer 20 are extracted into the light-improving layer 30, allowing more photons to enter the improvement layer. This reduces the generation of photons with disordered orientations and minimizes crosstalk problems.

[0057] For example, the refractive index of the first film layer 31 is 2.0 to 3.0. For instance, after GaP particles are incorporated into the silicone layer, the refractive index of the first silicone layer can be 2.5.

[0058] Optionally, the second film layer 32 includes a silicone layer and silicon nitride particles embedded in the silicone layer.

[0059] By adding photon-absorbing silicon nitride particles into the silicone layer, the second film layer 32 acquires a light-absorbing function. This allows the second film layer 32 to absorb light incident from the first film layer 31, thereby preventing light from escaping from the light-improving layer 30 and reducing lateral light emission from the epitaxial layer 20.

[0060] For example, such as Figure 2 As shown, the surface of the second film layer 32 away from the first film layer 31 is serrated.

[0061] The second membrane layer 32 can be roughened to make its surface serrated. The serrations can increase the extraction rate and allow more light to enter and be absorbed by the second membrane layer 32.

[0062] Optionally, such as Figure 2As shown, the light-improving layer 30 also includes a third film layer 33, which is located on the surface of the second film layer 32 away from the epitaxial layer 20. The third film layer 33 includes a silicone layer and carbon particles embedded in the silicone layer.

[0063] By setting a third film layer 33 on the surface of the second film layer 32 away from the epitaxial layer 20, and embedding black carbon particles in the third film layer 33, the third film layer 33 is black, thereby using the black adhesive layer to absorb the light emitted from the second film layer 32 and prevent the light from being emitted further out.

[0064] Optionally, such as Figure 2 As shown, the light-improving layer 30 also includes a reflective layer 34, which is located on the surface of the third film layer 33 away from the epitaxial layer 20.

[0065] For example, the reflective layer 34 can be a metal layer, such as a Cr layer. The metal layer ensures that residual photons are absorbed, preventing light from escaping from the side of the epitaxial layer 20, reducing lateral light emission from the epitaxial layer 20, and improving the light crosstalk problem of the light-emitting diode.

[0066] Figure 4 This is a flowchart illustrating a method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. This method is used to fabricate... Figure 1 The light-emitting diode shown. For example... Figure 4 As shown, the preparation method includes:

[0067] S11: Prepare epitaxial wafers.

[0068] The epitaxial wafer includes a substrate and an epitaxial layer stacked sequentially.

[0069] For example, the epitaxial layer may include a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer sequentially stacked on a substrate. One of the first and second semiconductor layers is a p-type layer, and the other is an n-type layer.

[0070] As an example, the first semiconductor layer is a p-type layer and the second semiconductor layer is an n-type layer.

[0071] Step S11, which involves fabricating an epitaxial wafer, may include the following steps:

[0072] The first step is to provide a GaAs chip.

[0073] The second step involves growing a second semiconductor layer, a multi-quantum well layer, and a first semiconductor layer stacked sequentially on a GaAs wafer.

[0074] For example, the second semiconductor layer may be an n-type AlGaInP layer. The thickness of the n-type AlGaInP layer may be from 0.5 μm to 3 μm.

[0075] For example, the first semiconductor layer is an indium-doped p-type AlInP layer. The thickness of the p-type AlInP layer can be from 0.5 μm to 3 μm.

[0076] Optionally, the multiple quantum well layer includes alternating AlGaInP quantum well layers and AlGaInP quantum barrier layers, with different Al contents in the AlGaInP quantum well layers and AlGaInP quantum barrier layers. The multiple quantum well layer may include 3 to 8 alternating stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0077] As an example, in an embodiment of this disclosure, the multi-quantum-well layer includes five alternating stacked AlGaInP quantum-well layers and AlGaInP quantum-barrier layers.

[0078] Optionally, the thickness of the multi-quantum well layer can be from 150 nm to 200 nm.

[0079] In the second step, an etching cutoff layer can be grown before the second semiconductor layer is grown, and an AlInP carrier confinement layer can be grown before the multi-quantum well layer is grown.

[0080] After growing the first semiconductor layer, a GaP window layer can be grown, wherein the thickness of the GaP window layer is 10,000 angstroms to 20,000 angstroms.

[0081] For example, the thickness of the GaP window layer is 11,000 angstroms.

[0082] The third step involves forming a bonding layer between the first semiconductor layer and the sapphire substrate, bonding the epitaxial layer to the sapphire substrate, and removing the GaAs wafer to obtain the epitaxial wafer.

[0083] Because sapphire substrates have high light transmittance and sapphire material is relatively hard and chemically stable, using sapphire substrates enables light-emitting diodes to have good light-emitting effects and stability.

[0084] Specifically, this may include: coating a silicon oxide liquid onto the surface of the second semiconductor layer, placing a sapphire substrate on the surface of the second semiconductor layer, and heating the epitaxial wafer to cure the silicon oxide liquid, thereby forming a bonding layer between the second semiconductor layer and the sapphire substrate.

[0085] Optionally, the heating temperature of the epitaxial wafer is 250°C to 350°C. For example, the heating temperature can be 300°C.

[0086] In step S11, after forming the epitaxial layer on the substrate, the fabrication method may further include the following steps:

[0087] The first step is to etch the surface of the second semiconductor layer to form a groove that exposes the first semiconductor layer.

[0088] The second step is to etch the epitaxial layer to expose the substrate.

[0089] Figure 5 This is a schematic diagram illustrating the periodic variation of power during etching, provided in an embodiment of this disclosure. Figure 5 As shown, when etching the multi-quantum-well layer, the etching power is controlled to be no less than 300W, and the etching power is controlled to periodically increase and then decrease within the power range of 200W to 350W.

[0090] like Figure 1 As shown, during etching, the etching power is controlled to be above 300W, and the etching power is controlled to vary between 200W and 350W, so that the region on the sidewall of the groove corresponding to the multi-quantum well layer and the region on the sidewall of the epitaxial layer corresponding to the multi-quantum well layer are serrated.

[0091] S12: A light-improving layer is formed on the sidewall of the epitaxial layer.

[0092] The light-improving layer includes a first film layer and a second film layer. The first film layer is located on the sidewall of the epitaxial layer, and the second film layer is located on the surface of the first film layer away from the epitaxial layer. The refractive index of the first film layer is higher than that of the epitaxial layer, and the second film layer is used to absorb light incident on the second film layer.

[0093] Optionally, the first film layer includes a silicone layer and GaP particles embedded within the silicone layer. By incorporating GaP particles into the silicone layer, the overall refractive index of the silicone layer can be increased, allowing more photons emitted laterally from the epitaxial layer to be extracted to the light-improving layer, reducing the generation of photons with disordered orientations, and reducing crosstalk problems. For example, the refractive index of the first film layer is 2.0 to 3.0. For instance, after incorporating GaP particles into the silicone layer, the refractive index of the first silicone layer can be 2.5.

[0094] Optionally, the second film layer includes a silicone layer and silicon nitride particles embedded within the silicone layer. By adding photon-absorbing silicon nitride particles within the silicone layer, the second film layer acquires light-absorbing properties. This allows the second film layer to absorb light incident from the first film layer, reducing lateral light emission from the epitaxial layer.

[0095] For example, such as Figure 2 As shown, the surface of the second membrane layer away from the first membrane layer is serrated. This can be achieved by roughening the second membrane layer to create a serrated surface, thereby increasing the extraction rate and allowing more light to enter and be absorbed.

[0096] Optionally, such as Figure 2As shown, the light-improving layer also includes a third film layer, which is located on the surface of the second film layer away from the epitaxial layer. The third film layer includes a silicone layer and carbon particles embedded in the silicone layer. By setting the third film layer on the surface of the second film layer away from the epitaxial layer and embedding black carbon particles in the third film layer, the third film layer is made black. This allows the black adhesive layer to absorb the light emitted from the second film layer, preventing the light from being emitted further out.

[0097] Optionally, such as Figure 2 As shown, the light-improving layer also includes a reflective layer located on the surface of the third film layer away from the epitaxial layer. Exemplarily, the reflective layer can be a metal layer, for example, a Cr layer. The metal layer ensures that residual photons are absorbed, preventing light from escaping from the side of the epitaxial layer, reducing lateral light emission from the epitaxial layer, and improving the light crosstalk problem of the light-emitting diode.

[0098] In this embodiment of the present disclosure, when preparing the first film layer, liquid silicone is first formed on the sidewall of the epitaxial layer, and then GaP particles are incorporated into the liquid silicone, and the silicone is cured to obtain the first film layer.

[0099] In preparing the second film layer, silicon nitride particles are incorporated into liquid silicone. A liquid silicone layer is formed on the surface of the first film layer by coating. After curing, the second film layer is obtained. The second film layer is then patterned to obtain a serrated second film layer.

[0100] In preparing the third film layer, carbon particles are incorporated into liquid silica gel, and a liquid silica gel layer is formed on the second film layer by coating. The third film layer is then cured.

[0101] Finally, a Cr layer is formed on the sidewall of the third film by vapor deposition at 45 degrees.

[0102] Step S12 is followed by the following steps:

[0103] The first step is to fabricate the first and second electrodes on the epitaxial wafer.

[0104] The first electrode is located in the groove, and the second electrode is located on the side of the second semiconductor layer away from the substrate.

[0105] The formation of the first electrode and the second electrode may include: processing the first electrode and the second electrode respectively by using a negative adhesive peeling method.

[0106] The first electrode is made of gold and beryllium as the main components, and the second electrode is made of gold and germanium as the base material by vapor deposition. When the gold and germanium alloy is evaporated, the evaporation power must be guaranteed and the evaporation time must be avoided from exceeding a few seconds in order to prevent the alloy composition from deviating and to perform annealing.

[0107] The second step involves forming a passivation layer on the epitaxial wafer after the two electrodes are fabricated. The passivation layer is located at least on the second semiconductor layer, the first electrode, the groove, and the second electrode.

[0108] The third step is to create two through holes on the passivation layer to expose the first electrode and the second electrode, respectively.

[0109] The fourth step is to form a through hole and then fabricate a first solder block and a second solder block on the surface of the passivation layer. The first solder block is connected to the first electrode through a through hole, and the second solder block is connected to the second electrode through another through hole.

[0110] A first solder joint block is formed on the surface of the passivation layer using photolithography, and the first solder joint block is connected to the first electrode through a through hole; then, a second solder joint block is formed on the surface of the passivation layer using photolithography, and the second solder joint block is connected to the second electrode through another through hole.

[0111] In this embodiment of the disclosure, both the first solder block and the second solder block may include a Ti layer, a first Ni layer, an Au layer, a second Ni layer and a Sn alloy layer stacked sequentially.

[0112] For example, the thickness of the Ti layer can be from 500 angstroms to 1500 angstroms, such as 1000 angstroms.

[0113] For example, the thickness of the first Ni layer can be from 500 angstroms to 1500 angstroms, for instance, the thickness of the first Ni layer can be 1000 angstroms.

[0114] For example, the thickness of the Au layer can be from 8,000 angstroms to 12,000 angstroms, such as 10,000 angstroms.

[0115] For example, the thickness of the second Ni layer can be from 2,000 angstroms to 4,000 angstroms, for instance, the thickness of the second Ni layer can be 3,000 angstroms.

[0116] For example, the thickness of the Sn alloy layer can be from 80,000 angstroms to 100,000 angstroms, such as 90,000 angstroms.

[0117] In this embodiment of the present disclosure, after the first solder block and the second solder block are fabricated, the preparation method may further include: fabricating a protective layer on the surface of the passivation layer, wherein the protective layer extends from the surface of the passivation layer to the substrate.

[0118] For example, in this embodiment of the disclosure, the protective layer may be a silicon oxide layer with a thickness of 2000 angstroms.

[0119] It should be noted that after a protective layer is grown on the surface of the passivation layer, photolithography can be used to etch through holes on the surface of the protective layer to expose the solder joints, so as to facilitate electrical connection.

[0120] Finally, the sapphire can be invisibly cut to reduce brightness loss. Then, the light-emitting diode (LED) can be obtained through testing.

[0121] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode includes a substrate (10), an epitaxial layer (20), and a light-improving layer (30). The epitaxial layer (20) is located on the substrate (10). The epitaxial layer (20) includes a first semiconductor layer (21), a multi-quantum well layer (22), and a second semiconductor layer (23) sequentially stacked on the substrate (10). The light-improving layer (30) is located on the sidewalls of the first semiconductor layer (21), the sidewalls of the multi-quantum well layer (22), and the sidewalls of the second semiconductor layer (23). The light-enhancing layer (30) includes a first film layer (31) and a second film layer (32). The first film layer (31) is located on the sidewall of the first semiconductor layer (21), the sidewall of the multi-quantum well layer (22), and the sidewall of the second semiconductor layer (23). The second film layer (32) is located on the surface of the first film layer (31) away from the epitaxial layer (20). The difference between the refractive index of the first film layer (31) and the refractive index of the epitaxial layer (20) is no more than 0.

5. The first film layer (31) includes a silicone layer and GaP particles embedded in the silicone layer. The second film layer (32) is used to absorb light incident on the second film layer (32).

2. The light-emitting diode according to claim 1, characterized in that, The refractive index of the first film layer (31) is 2.0 to 3.

0.

3. The light-emitting diode according to claim 1, characterized in that, The second film layer (32) includes a silicone layer and silicon nitride particles embedded in the silicone layer.

4. The light-emitting diode according to claim 3, characterized in that, The surface of the second film layer (32) away from the first film layer (31) is serrated.

5. The light-emitting diode according to claim 1, characterized in that, The light-enhancing layer (30) further includes a third film layer (33), which is located on the surface of the second film layer (32) away from the epitaxial layer (20). The third film layer (33) includes a silicone layer and carbon particles embedded in the silicone layer.

6. The light-emitting diode according to claim 5, characterized in that, The light-enhancing layer (30) further includes a reflective layer (34) located on the surface of the third film layer (33) away from the epitaxial layer (20).

7. The light-emitting diode according to any one of claims 1 to 6, characterized in that, The sidewalls of the multi-quantum well layer (22) are serrated.

8. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: An epitaxial wafer is prepared, the epitaxial wafer comprising a substrate and an epitaxial layer stacked sequentially, the epitaxial layer comprising a first semiconductor layer, a multiple quantum well layer and a second semiconductor layer stacked sequentially on the substrate; A light-enhancing layer is formed on the sidewall of the epitaxial layer. The light-enhancing layer is located on the sidewall of the first semiconductor layer, the sidewall of the multi-quantum-well layer, and the sidewall of the second semiconductor layer. The light-enhancing layer includes a first film layer and a second film layer. The first film layer is located on the sidewall of the first semiconductor layer, the sidewall of the multi-quantum-well layer, and the sidewall of the second semiconductor layer. The second film layer is located on the surface of the first film layer away from the epitaxial layer. The refractive index of the first film layer is higher than that of the epitaxial layer. The first film layer includes a silicone layer and GaP particles embedded in the silicone layer. The second film layer is used to absorb light incident on the second film layer.

9. The preparation method according to claim 8, characterized in that, The preparation of the epitaxial wafer includes: The epitaxial layer is formed on the substrate; The epitaxial layer is etched to expose the substrate. When etching the multi-quantum-well layer, the etching power is controlled to be no less than 300W, and the etching power is controlled to periodically increase and then decrease within a power range of 200W to 350W.

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