A growth method for reducing defects in silicon carbide homoepitaxy, silicon carbide epitaxial wafer and applications
By growing a pre-buffer layer and baking it during silicon carbide epitaxy, the substrate surface condition is optimized, the epitaxial layer defect problem is solved, and the epitaxial layer quality and device performance are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NINGBO HOSHINE NEW MATERIALS CO LTD
- Filing Date
- 2022-12-09
- Publication Date
- 2026-06-09
AI Technical Summary
In existing technologies, triangular defects, carrot defects, and falling object defects exist in the silicon carbide epitaxy process, leading to problems such as degraded device performance or even scrapping.
The surface condition of the substrate is improved by etching the silicon carbide substrate, growing a silicon carbide pre-buffer layer and baking it. Then, a silicon carbide buffer layer and an epitaxial layer are grown on the baked pre-buffer layer to optimize the transition process of the epitaxial layer.
It significantly reduces defects in the epitaxial layer, improves the quality of the epitaxial layer and the yield of devices, increases the process debugging window, and improves the transition effect from the substrate to the epitaxial layer.
Smart Images
Figure CN115787092B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor materials technology, specifically to a growth method for reducing defects in silicon carbide homoepitaxial wafers, silicon carbide epitaxial wafers, and their applications. Background Technology
[0002] As a typical representative of third-generation semiconductors, silicon carbide (SiC) materials, with their excellent physical properties such as wide bandgap, high breakdown electric field, and high thermal conductivity, have become a new favorite in the future electronic device market. With the continuous development of new energy vehicles and the high performance requirements of devices under harsh conditions, SiC has experienced rapid growth in recent years.
[0003] The fabrication of silicon carbide wafers typically involves two steps: substrate preparation and epitaxial growth. Therefore, epitaxy is essential for device fabrication, whether silicon-based or silicon carbide-based. Epitaxial growth is essentially the process of growing a new single crystal layer on a single-crystal substrate that has undergone fine crystal processing such as cutting, grinding, and polishing. If the epitaxial layer and the substrate are made of the same material, it is called homoepitaxial growth; if they are not, it is called heteroepitaxial growth. The thickness of the epitaxial layer is typically only a few micrometers. Through epitaxial growth, the influence of defects generated during substrate processing is reduced, thus reducing defects and improving device performance. Furthermore, by controlling factors such as epitaxial doping and thickness, more functional devices can be achieved according to the requirements of different devices, enriching the device product range. Silicon carbide epitaxial technology plays a decisive role in fully realizing the performance of silicon carbide devices, and is therefore a crucial link in the wide-bandgap semiconductor industry.
[0004] For devices, epitaxial defects are a significant factor affecting their performance; too many defects can directly lead to device failure. Among the many epitaxial defects, triangular defects, carrot defects, and fallen objects are three fatal defects, the location of which directly causes device failure. Summary of the Invention
[0005] The purpose of this invention is to provide a growth method, silicon carbide epitaxial wafer, and application for reducing defects in homogeneous silicon carbide epitaxy. This invention can reduce defects such as triangular defects, carrot defects, and falling object defects, thereby improving the quality of the epitaxial layer.
[0006] To achieve the above-mentioned objectives, the present invention provides the following technical solution:
[0007] This invention provides a growth method for reducing defects in silicon carbide homoepitaxial growth, comprising the following steps:
[0008] The silicon carbide substrate is etched to obtain the etched silicon carbide substrate;
[0009] A silicon carbide pre-buffer layer is grown on the etched silicon carbide substrate;
[0010] The silicon carbide pre-buffer layer is baked to obtain a baked silicon carbide pre-buffer layer.
[0011] A silicon carbide buffer layer is grown on the baked silicon carbide pre-buffer layer;
[0012] An epitaxial layer is grown on the silicon carbide buffer layer to obtain a silicon carbide epitaxial wafer.
[0013] Preferably, the etching temperature is 1550–1680°C; the etching time is 3–10 min.
[0014] Preferably, the etching is performed in a hydrogen atmosphere; the hydrogen flow rate during the etching process is 50–200 slm; and the etching pressure is 50–200 mbar.
[0015] Preferably, when growing the silicon carbide pre-buffer layer, the C / Si ratio of the carbon source and silicon source used is 0.3 to 0.5:1.
[0016] Preferably, the baking temperature is 1550–1680°C; the holding time is 3–10 minutes.
[0017] Preferably, the baking is carried out in a hydrogen atmosphere.
[0018] Preferably, when growing the silicon carbide buffer layer, the C / Si ratio of the carbon source and the silicon source is 0.3 to 0.6:1.
[0019] Preferably, when growing the epitaxial layer, the C / Si ratio of the carbon source and the silicon source is 0.7 to 1.2:1.
[0020] The present invention provides a silicon carbide epitaxial wafer obtained by the growth method described above, comprising a silicon carbide substrate and a silicon carbide pre-buffer layer, a silicon carbide buffer layer and an epitaxial layer sequentially stacked on the surface of the silicon carbide substrate.
[0021] This invention provides the application of the silicon carbide epitaxial wafer described in the above technical solution in electronic devices.
[0022] This invention provides a growth method for reducing defects in homoepitaxial silicon carbide (SiC) substrates. The method cleans the SiC substrate by etching away minor scratches, crystal surface damage, and surface particles accumulated during processing. First, a SiC pre-buffer layer is grown to improve the substrate surface etching condition. Then, baking removes poorly crystalline locations, providing a smooth substrate surface for subsequent SiC buffer layer growth. This allows for a better transition of the epitaxial layer from the SiC substrate, thereby reducing epitaxial defects and improving epitaxial layer quality. This invention significantly reduces triangular, carrot-shaped, and droplet defects. Attached Figure Description
[0023] Figure 1 This is a schematic diagram of the structure of the silicon carbide epitaxial wafer provided by the present invention;
[0024] Figure 2 This is a flowchart of the silicon carbide epitaxial process in an embodiment of the present invention. Detailed Implementation
[0025] This invention provides a growth method for reducing defects in silicon carbide homoepitaxial growth, comprising the following steps:
[0026] The silicon carbide substrate is etched to obtain the etched silicon carbide substrate;
[0027] A silicon carbide pre-buffer layer is grown on the etched silicon carbide substrate;
[0028] The silicon carbide pre-buffer layer is baked to obtain a baked silicon carbide pre-buffer layer.
[0029] A silicon carbide buffer layer is grown on the baked silicon carbide pre-buffer layer;
[0030] An epitaxial layer is grown on the silicon carbide buffer layer to obtain a silicon carbide epitaxial wafer.
[0031] This invention involves etching a silicon carbide substrate to obtain an etched silicon carbide substrate. In this invention, the silicon carbide substrate is preferably a conductive or semi-insulating silicon carbide substrate, and more preferably a conductive n-type silicon carbide substrate.
[0032] In this invention, the etching temperature is preferably 1550-1680°C, more preferably 1600°C; the etching time is preferably 3-10 min, more preferably 5 min.
[0033] In this invention, the etching is preferably carried out in a hydrogen atmosphere; the flow rate of hydrogen during the etching process is preferably 50-200 slm, more preferably 100-150 slm; the etching pressure is preferably 50-200 mbar, more preferably 100-150 mbar.
[0034] After obtaining the etched silicon carbide substrate, the present invention grows a silicon carbide pre-buffer layer on the etched silicon carbide substrate. In the growth of the silicon carbide pre-buffer layer, the C / Si ratio of the carbon source to the silicon source is preferably 0.3 to 0.5:1. In the present invention, the C / Si ratio refers to the ratio of the number of carbon atoms to silicon atoms. In the present invention, the carbon source is preferably ethylene (C₂H₄) or propane; the silicon source is preferably trichlorosilane (SiHCl₃) or silane. In the growth of the silicon carbide pre-buffer layer, the n-type doping source is preferably nitrogen (N₂). In the present invention, the doping concentration of the n-type doping source of the silicon carbide pre-buffer layer is preferably on the order of E₁₈.
[0035] In this invention, the growth rate of the silicon carbide pre-buffer layer is preferably 3–10 μm / h, more preferably 5 μm / h; the growth temperature of the silicon carbide pre-buffer layer is preferably 1550–1680℃, more preferably 1600℃; and the growth time is preferably 3–6 min. In this invention, the growth of the silicon carbide pre-buffer layer is preferably carried out in a hydrogen atmosphere; the hydrogen flow rate is preferably 50–200 slm, more preferably 100–150 slm; and the pressure is preferably 50–200 mbar, more preferably 100–150 mbar.
[0036] In this invention, the thickness of the silicon carbide pre-buffer layer is preferably 0.3–2 μm, more preferably 0.5–1 μm. Existing silicon carbide epitaxial processes have a small process adjustment window, and the state of the substrate after etching is easily affected by the etching process, leading to over-etching or incomplete etching. Insufficient etching fails to remove residual contaminants or sub-damage caused by processing on the substrate surface, resulting in numerous defects after epitaxy; while over-etching also causes severe substrate damage, leading to defects or abnormal roughness. This invention uses a pre-buffer to fill the substrate damage caused by over-etching, increasing the process adjustment window, improving crystal defects generated during the transition from the substrate to the epitaxial layer, and thus reducing epitaxial wafer defects.
[0037] After obtaining the silicon carbide pre-buffer layer, the present invention bakes the silicon carbide pre-buffer layer to obtain a baked silicon carbide pre-buffer layer. In the present invention, the baking temperature is preferably 1550-1680℃, more preferably 1630℃; the holding time is preferably 3-10 min, more preferably 5-8 min. In the present invention, the baking is preferably carried out in a hydrogen atmosphere; the hydrogen flow rate during the baking process is preferably 100-110 slm; the baking pressure is preferably 100 mbar. The present invention removes poor crystallization sites by high-temperature baking, providing a smooth substrate surface for the subsequent growth of the silicon carbide buffer layer, enabling the epitaxial layer to transition better from the silicon carbide substrate to the epitaxial layer, thereby reducing epitaxial defects.
[0038] After obtaining the baked silicon carbide pre-buffer layer, the present invention grows a silicon carbide buffer layer on the baked silicon carbide pre-buffer layer. When growing the silicon carbide buffer layer, the C / Si ratio of the carbon source to the silicon source is preferably 0.3 to 0.6:1, more preferably 0.5:1. In the present invention, the carbon source is preferably ethylene (C2H4) or propane; the silicon source is preferably trichlorosilane (SiHCl3) or silane. When growing the silicon carbide buffer layer, the n-type doping source used in the present invention is preferably nitrogen (N2). In the present invention, the doping concentration of the n-type doping source of the silicon carbide buffer layer is preferably on the order of E18.
[0039] In this invention, the growth rate of the silicon carbide buffer layer is preferably 3–10 μm / h; the growth temperature of the silicon carbide buffer layer is preferably 1550–1680℃, more preferably 1600℃; and the growth time is preferably 10–20 min. In this invention, the growth of the silicon carbide buffer layer is preferably carried out in a hydrogen atmosphere; the hydrogen flow rate is preferably 100–110 slm; and the pressure is preferably 100 mbar.
[0040] In this invention, the thickness of the silicon carbide buffer layer is preferably 0.5 to 2 μm, and more preferably 1 μm.
[0041] After obtaining the silicon carbide buffer layer, the present invention grows an epitaxial layer on the silicon carbide buffer layer to obtain a silicon carbide epitaxial wafer. In the growth of the epitaxial layer, the C / Si ratio of the carbon source to the silicon source is preferably 0.7–1.2:1, more preferably 0.95–0.97:1. In the present invention, the carbon source is preferably ethylene (C₂H₄); the silicon source is preferably trichlorosilane (SiHCl₃). In the growth of the epitaxial layer, the n-type doping source is preferably nitrogen (N₂). In the present invention, the doping concentration of the n-type doping source of the epitaxial layer is preferably on the order of E₁₅–E₁₆.
[0042] In this invention, the growth rate of the epitaxial layer is preferably 20–90 μm / h; the growth temperature of the epitaxial layer is preferably 1550–1680 °C, more preferably 1600 °C; and the growth time is preferably 10–30 min. In this invention, the growth of the epitaxial layer is preferably carried out in a hydrogen atmosphere; the hydrogen flow rate is preferably 100 slm; and the pressure is preferably 100 mbar.
[0043] In this invention, the thickness of the epitaxial layer is preferably 5 to 30 μm, and more preferably 10 μm.
[0044] In this invention, cooling is preferably performed after the epitaxial layer growth is completed to obtain a silicon carbide epitaxial wafer. In this invention, the cooling is preferably performed in a hydrogen atmosphere; the hydrogen flow rate during the cooling process is preferably 100–150 slm. This invention preferably reduces the temperature of the silicon carbide epitaxial wafer to 900°C through cooling.
[0045] This invention provides silicon carbide epitaxial wafers obtained using the growth method described above, such as... Figure 1 As shown, it includes a silicon carbide substrate and a silicon carbide pre-buffer layer, a silicon carbide buffer layer and an epitaxial layer sequentially stacked on the surface of the silicon carbide substrate.
[0046] The present invention also provides the application of the silicon carbide epitaxial wafers described in the above technical solution in electronic devices.
[0047] This invention grows a pre-buffer layer before the buffer process. This growth layer can improve the surface condition of the substrate after the etching process. Then, it is baked to remove poor crystals, providing a smooth substrate surface for subsequent buffer growth. This allows normal buffer to grow better, provides a good foundation for transitioning to epitaxial layer growth, improves epitaxial layer defects, and increases the yield of silicon carbide epitaxial wafers.
[0048] The technical solutions of this invention will be clearly and completely described below with reference to the embodiments thereof. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.
[0049] The silicon carbide substrate used in the embodiments is an n-type conductive silicon carbide substrate; hydrogen (H2), nitrogen (N2), ethylene (C2H4), trichlorosilane (SiHCl3), and argon (Ar) are all ultra-pure gases (6N purity); the epitaxial growth equipment used is a high-temperature horizontal chemical vapor deposition (CVD) equipment.
[0050] Example 1
[0051] Adopting such Figure 2 The process flow shown is as follows: (1) Place the silicon carbide substrate into the carrier tray of the CVD machine, set the program and wait for the machine to automatically transfer the carrier tray with the substrate into the reaction chamber; the temperature of the chamber is raised from 900°C to 1600°C, the pressure of the reaction chamber is controlled at 100mbar, and the H2 flow rate is increased to 100slm; under these conditions, the substrate is etched for 5 minutes.
[0052] (2) After etching, C2H4, SiHCl3 and N2 are introduced, the C / Si ratio is adjusted to 0.3, the growth rate is 5μm / h, the N2 doping concentration is on the order of E18, and the growth is carried out for 6 minutes to form a silicon carbide pre-buffer layer with a thickness of 0.5μm.
[0053] (3) Based on step (2), turn off C2H4, SiHCl3 and N2, raise the temperature to 1630℃, continue high-temperature baking with H2, the flow rate of hydrogen is 100slm, and the time is 3min;
[0054] (4) Based on step (3), the temperature is reduced back to 1600℃, and then C2H4, SiHCl3 and N2 are introduced, the C / Si ratio is adjusted to 0.5, the growth rate is 6μm / h, the N2 doping concentration is on the order of E18, and a silicon carbide buffer layer with a thickness of 1μm is grown.
[0055] (5) Based on step (4), adjust the C / Si ratio to 0.97, the growth rate to 30 μm / h, the N2 doping concentration to 6E+15, and grow an epitaxial layer with a thickness of 10 μm.
[0056] (6) Based on step (5), shut off the process gases C2H4, SiHCl3, and N2, cool down to 900°C, and remove the silicon carbide epitaxial wafer.
[0057] Example 2
[0058] Adopting such Figure 2 The process flow shown is as follows:
[0059] (1) Place the silicon carbide substrate into the carrier tray of the CVD machine, set the program and wait for the machine to automatically transfer the carrier tray with the substrate into the reaction chamber; the temperature of the chamber is increased from 900℃ to 1600℃ in standby mode, the pressure of the reaction chamber is controlled at 100mbar, and the H2 flow rate is increased to 110slm; under these conditions, the substrate is etched for 5 minutes.
[0060] (2) After etching, C2H4, SiHCl3 and N2 are introduced, the C / Si ratio is adjusted to 0.5, the growth rate is 5μm / h, the N2 doping concentration is on the order of E18, and the growth is carried out for 6 minutes to form a silicon carbide pre-buffer layer with a thickness of 0.5μm.
[0061] (3) Based on step (2), turn off C2H4, SiHCl3 and N2, raise the temperature to 1630℃, continue high-temperature baking with H2, the flow rate of hydrogen is 110slm, and the time is 5min;
[0062] (4) Based on step (3), the temperature is reduced back to 1600℃, and then C2H4, SiHCl3 and N2 are introduced, the C / Si ratio is adjusted to 0.5, the growth rate is 6μm / h, the N2 doping concentration is on the order of E18, and a silicon carbide buffer layer with a thickness of 1μm is grown.
[0063] (5) Based on step (4), adjust the C / Si ratio to 0.95, the growth rate to 30 μm / h, the N2 doping concentration to 6E+15, and grow an epitaxial layer with a thickness of 10 μm.
[0064] (6) Based on step (5), shut off the process gases C2H4, SiHCl3, and N2, cool down to 900°C, and remove the silicon carbide epitaxial wafer.
[0065] Comparative Example 1
[0066] The preparation method is basically the same as that in Example 1, except that the growth of the silicon carbide pre-buffer layer and the high-temperature baking are not performed.
[0067] Comparative Example 2
[0068] The preparation method is basically the same as that in Example 1, except that high-temperature baking is not performed.
[0069] Comparative Example 3
[0070] The preparation method is basically the same as that in Example 1, except that no etching is performed.
[0071] The silicon carbide epitaxial wafers prepared in Examples 1-2 and Comparative Examples 1-3 were tested for defects using a Candela 8520 defect tester. The results are shown in Table 1.
[0072]
[0073] As can be seen from the above embodiments and comparative examples, the present invention significantly reduces epitaxial layer defects, and the provided method is simple to implement and suitable for widespread application.
[0074] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A growth method for reducing homoepitaxial defects in silicon carbide, comprising the following steps: The silicon carbide substrate is etched to obtain the etched silicon carbide substrate; the etching temperature is 1550~1680℃; the etching time is 3~10min; A silicon carbide pre-buffer layer is grown on the etched silicon carbide substrate. During the growth of the silicon carbide pre-buffer layer, the C / Si ratio of the carbon source to the silicon source is 0.3~0.5:
1. The growth temperature of the silicon carbide pre-buffer layer is 1550~1680℃, and the growth time is 3~6 min. The growth of the silicon carbide pre-buffer layer is carried out in a hydrogen atmosphere with a hydrogen flow rate of 50~200 slm and a pressure of 50~200 mbar. The thickness of the silicon carbide pre-buffer layer is 0.3~2 μm, and the growth rate is 3~10 μm / h. The silicon carbide pre-buffer layer is baked to obtain a baked silicon carbide pre-buffer layer; the baking temperature is 1550~1680℃; the holding time is 3~10min; A silicon carbide buffer layer is grown on the baked silicon carbide pre-buffer layer; An epitaxial layer is grown on the silicon carbide buffer layer to obtain a silicon carbide epitaxial wafer.
2. The growth method according to claim 1, characterized in that, The baking is carried out in a hydrogen atmosphere.
3. The growth method according to claim 1, characterized in that, When growing the epitaxial layer, the C / Si ratio of the carbon source and silicon source is 0.7~1.2:
1.
4. A silicon carbide epitaxial wafer obtained by the growth method according to any one of claims 1 to 3, comprising a silicon carbide substrate and a silicon carbide pre-buffer layer, a silicon carbide buffer layer and an epitaxial layer sequentially stacked on the surface of the silicon carbide substrate.