Pixel structure and display device

Abstract

A pixel structure and a display device, wherein the pixel structure includes a plurality of pixels, each pixel including a primary pixel electrode and a secondary pixel electrode spaced apart along a column direction, and each pixel including a first thin film transistor, a second thin film transistor, and a third thin film transistor; the pixels include a first pixel and a second pixel adjacent to each other along a row direction, and the pixel structure further includes a charge sharing line, the charge sharing line being arranged within the first pixel, the third thin film transistor of the first pixel being connected to a scan line, a second thin film transistor, and the charge sharing line, and the third thin film transistor of the second pixel being connected to the scan line, the second thin film transistor, and the charge sharing line within the first pixel, thereby improving the viewing angle. Since the charge sharing line within the second pixel is omitted, the aperture ratio and transmittance of the second pixel can be increased, that is, the aperture ratio and transmittance of the plurality of pixels as a whole are increased.

Description

Technical Field

[0001] The present application relates to the technical field of pixel structures of liquid crystal displays, and in particular to a pixel structure and a display device. Background Art

[0002] Liquid crystal display panels use a vertical alignment (VA) display mode, which has the advantages of high contrast, wide viewing angle, and no need for friction alignment, and has gradually become the mainstream in the industry.

[0003] Current VA LCD panels generally use a 3TFT-8Domain (3 thin-film transistors - 8 domains) pixel structure. Two TFTs in the same pixel control the primary and sub-pixel electrodes, respectively, while a third TFT pulls down the sub-pixel voltage. This allows the primary and sub-pixel electrodes to be controlled at different voltages, creating a spatial 8Domain technology.

[0004] Compared with the traditional 4Domain, 8Domain technology effectively improves the viewing angle, but the aperture ratio is lost more and the penetration rate is reduced. Summary of the Invention

[0005] The purpose of this application is to provide a pixel structure and a display device to solve the problems of large aperture loss and low transmittance of the current 8Domain technology, and to improve the aperture rate and transmittance of the pixel structure.

[0006] To achieve the purpose of this application, this application provides the following technical solutions:

[0007] In a first aspect, the present application provides a pixel structure comprising a plurality of pixels arranged in multiple rows and columns; each pixel comprises a primary pixel electrode and a secondary pixel electrode spaced apart along a column direction, the primary pixel electrode and the secondary pixel electrode both being multi-domain structures; a scan line is provided between the primary pixel electrode and the secondary pixel electrode, the scan line extending along a row direction, and the pixels of two adjacent columns are spaced apart by a data line extending along a column direction; each pixel comprises a first thin film transistor, a second thin film transistor and a third thin film transistor, the first thin film transistor being correspondingly connected to the scan line, the data line and the primary pixel electrode, and the second thin film transistor being correspondingly connected to the scan line, the data line and the secondary pixel electrode; the pixel comprises a first pixel and a second pixel adjacent to each other along a row direction, the pixel structure further comprising a charge sharing line, the charge sharing line being provided within the first pixel, the third thin film transistor of the first pixel being connected to the scan line, the second thin film transistor and the charge sharing line, and the third thin film transistor of the second pixel being connected to the scan line, the second thin film transistor and the charge sharing line within the first pixel.

[0008] In one embodiment, the charge sharing line includes a first stacking segment, a first connecting segment, and a second stacking segment connected in sequence, the first stacking segment is stacked with the skeleton of the main pixel electrode, the first connecting segment is located between the main pixel electrode and the sub-pixel electrode, the second stacking segment is stacked with the skeleton of the sub-pixel electrode, and the third thin film transistors of the first pixel and the second pixel are both connected to the first connecting segment.

[0009] In one embodiment, the pixel structure further includes a bridging segment, the second pixel includes a second connecting segment, the second connecting segment is located between the main pixel electrode and the sub-pixel electrode of the second pixel, the third thin film transistor of the second pixel is connected to the second connecting segment, and the bridging segment connects the first connecting segment and the second connecting segment.

[0010] In one embodiment, the source of the first thin film transistor is connected to the data line, and the drain of the first thin film transistor is connected to the main pixel electrode; the source of the second thin film transistor is shared with the source of the first thin film transistor, and the drain of the second thin film transistor is connected to the sub-pixel electrode; the source of the third thin film transistor is connected to the drain of the second thin film transistor, the drain of the third thin film transistor of the first pixel is connected to the first connecting segment, and the drain of the third thin film transistor of the second pixel is connected to the second connecting segment.

[0011] In one embodiment, the primary pixel electrode and the drain electrode of the first thin film transistor are connected via a first via hole, and the secondary pixel electrode and the drain electrode of the second thin film transistor are connected via a second via hole.

[0012] In one embodiment, the second connecting section is provided on the same layer as the first connecting section and has the same shape and structure.

[0013] In one embodiment, the bridging section is connected to the first connecting section through a third via hole, and the bridging section is connected to the second connecting section through a fourth via hole.

[0014] In one embodiment, the bridge segment, the main pixel electrode and the sub-pixel electrode are arranged in the same layer.

[0015] In one embodiment, the skeleton width of the main pixel electrode of the second pixel is smaller than the skeleton width of the main pixel electrode of the first pixel, and / or the skeleton width of the sub-pixel electrode of the second pixel is smaller than the skeleton width of the sub-pixel electrode of the first pixel.

[0016] In one embodiment, the pixel structure further includes a third pixel adjacent to the first pixel or the second pixel along the row direction; the third pixel is provided with the same charge sharing line as the first pixel, or the drain of the third thin film transistor of the third pixel is connected to the charge sharing line in the first pixel.

[0017] In a second aspect, the present application further provides a display device comprising a pixel structure described in any one of the various embodiments of the first aspect.

[0018] By setting a charge sharing line in the first pixel, the third thin-film transistors of the first pixel and the second pixel are both connected to the charge sharing line in the first pixel, so that part of the voltage of the sub-pixel electrodes of the first pixel and the second pixel is released to the charge sharing line, which can improve the viewing angle. Since the charge sharing line in the second pixel is omitted, the aperture ratio and transmittance of the second pixel can be increased, which means that the overall aperture ratio and transmittance of multiple pixels are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the implementation methods of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the implementation methods or the description of the prior art. Obviously, the drawings described below are only some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 It is a schematic diagram of a pixel structure of a comparative proportion;

[0021] Figure 2 yes Figure 1 Equivalent circuit diagram of the pixel structure;

[0022] Figure 3 is a schematic diagram of a pixel structure of an embodiment;

[0023] Figure 4 yes Figure 3 Equivalent circuit diagram of the pixel structure;

[0024] Figure 5 FIG. 4 is an equivalent circuit diagram of a pixel structure of another embodiment.

[0025] Description of reference numerals:

[0026] 10-scan line, 20-data line, 31-primary pixel electrode, 32-sub-pixel electrode, 41-source electrode of the first thin film transistor, 42-drain electrode of the first thin film transistor, 43-drain electrode of the second thin film transistor, 44-source electrode of the third thin film transistor, 45-drain electrode of the third thin film transistor, 46-first via hole, 47-second via hole, 48-third via hole, 49-fourth via hole, 50-charge sharing line, 51-first stacked section, 52-first connecting section, 53-second stacked section, 54-second connecting section, 55-bridging section. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0028] It should be noted that when a component is referred to as being "fixed to" another component, it may be directly on the other component or there may be an intermediate component. When a component is referred to as being "connected to" another component, it may be directly connected to the other component or there may be an intermediate component.

[0029] Unless otherwise defined, all technical and scientific terms used in this application have the same meanings as those commonly understood by those skilled in the art to which this application belongs. The terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used in this application includes any and all combinations of one or more of the relevant listed items.

[0030] The following describes some embodiments of the present application in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0031] Before introducing the pixel structure of the embodiment of the present application, a comparative example of the pixel structure of the present application is first introduced.

[0032] Please refer to Figure 1 and Figure 2 In a comparative example of the pixel structure of the present application, the pixel structure includes a plurality of pixels arranged in multiple rows and columns. Figure 1 and Figure 2 The first pixel (Pixel 1), the second pixel (Pixel) 2 and the third pixel (Pixel 3) arranged in sequence along the row direction are shown.

[0033] Each pixel has the same structure, consisting of a primary pixel electrode 31 and a secondary pixel electrode 32 spaced apart along the column direction. Both primary and secondary pixel electrodes 31 and 32 have a multi-domain structure. A scan line 10 (Gate) is disposed between the primary and secondary pixel electrodes 31 and 32. The scan line 10 extends along the row direction, connecting each pixel in the row. Pixels in adjacent columns are separated by a data line 20 (Data) extending along the column direction.

[0034] Each pixel includes a first thin-film transistor (T1), a second thin-film transistor (T2), a third thin-film transistor (T3), and a charge sharing line 50 (sharebar). The first thin-film transistor is correspondingly connected to the scan line 10, the data line 20, and the primary pixel electrode 31. The second thin-film transistor is correspondingly connected to the scan line 10, the data line 20, and the secondary pixel electrode 32. The third thin-film transistor is correspondingly connected to the scan line 10, the second thin-film transistor, and the charge sharing line 50.

[0035] Specifically, the gate electrode (not shown) of the first thin film transistor is connected to the scan line 10, the source electrode 41 is connected to the data line 20, and the drain electrode 42 is connected to the primary pixel electrode 31. The gate electrode (not shown) of the second thin film transistor is connected to the scan line 10, the source electrode 41 is connected to the data line 20, and the drain electrode 43 is connected to the sub-pixel electrode 32. The gate electrode (not shown) of the third thin film transistor is connected to the scan line 10, the source electrode 44 is connected to the drain electrode 43 of the second thin film transistor, and the drain electrode 45 is connected to the charge sharing line 50.

[0036] The pixel structure also includes a main storage capacitor (Cst-m), a main liquid crystal capacitor (Clc-m), a secondary storage capacitor (Cst-s), and a secondary liquid crystal capacitor (Clc-m). The main storage capacitor is formed by the drain 42 of the first thin film transistor and the common electrode (Acom) on the opposite side of the array substrate. The drain 42 of the first thin film transistor is connected to the main pixel electrode 31 through a first via 46. The main liquid crystal capacitor is formed by the drain 42 of the first thin film transistor and the common electrode (CFcom) on the opposite side of the color filter substrate. The secondary storage capacitor is formed by the drain 43 of the second thin film transistor and the common electrode (Acom) on the opposite side of the array substrate. The drain 43 of the second thin film transistor is connected to the secondary pixel electrode 32 through a second via 47. The secondary liquid crystal capacitor is formed by the drain 43 of the second thin film transistor and the common electrode (CFcom) on the opposite side of the color filter substrate.

[0037] The pixel structure is a multi-layer structure fabricated on a substrate (not shown). Specifically, a first metal layer (M1) is fabricated on the substrate and patterned to form a scan line 10. A second metal layer (M2) is fabricated above the first metal layer and patterned to form a data line 20, a source 41 and drain 42 of a first thin-film transistor, a source 41 and drain 43 of a second thin-film transistor, a source 44 and drain 45 of a third thin-film transistor, and a charge sharing line 50. A transparent electrode layer is fabricated above the second metal layer and patterned to form a primary pixel electrode 31 and a secondary pixel electrode 32.

[0038] In this way, the scan line 10 is located in the bottom layer (first metal layer) closest to the substrate, the data line 20, the source 41 and drain 42 of the first thin film transistor, the source 41 and drain 43 of the second thin film transistor, the source 44 and drain 45 of the third thin film transistor and the charge sharing line 50 are located in the middle layer (second metal layer), and the main pixel electrode 31 and the sub-pixel electrode 32 are located in the top layer (transparent electrode layer).

[0039] The first metal layer, the second metal layer and the transparent electrode layer are all made of metal. The first metal layer and the second metal layer are opaque or have low light transmittance, while the transparent electrode layer has high light transmittance.

[0040] It should be understood that an insulating layer, dielectric layer, or other structure may be provided between the first metal layer, the second metal layer, and the transparent electrode layer, and this is not limited here. The aforementioned bottom layer, middle layer, and top layer merely describe the relative positional relationship between the three metal layers, and do not define the overall structure of the pixel structure.

[0041] The pixel electrode of each pixel has an 8-domain structure, with the primary pixel electrode 31 containing four domains and the secondary pixel electrode 32 containing four domains. Specifically, both the primary pixel electrode 31 and the secondary pixel electrode 32 are roughly in the shape of a "M", each comprising a "+"-shaped backbone and multiple branches connected to the backbone.

[0042] The charge sharing line 50 extends along the column direction to connect the pixels in the column direction. At least a portion of the charge sharing line 50 is overlapped with the frame of the primary pixel electrode 31 and at least a portion of the charge sharing line 50 is overlapped with the frame of the secondary pixel electrode 32 .

[0043] When the scan line 10 (Gate) input signal turns on the three thin-film transistors (T1, T2, T3) of the pixel, the data line 20 (Data) signal enters the primary pixel electrode 31 through the first thin-film transistor (T1) and the secondary pixel electrode 32 through the second thin-film transistor (T2). The third thin-film transistor (T3) releases part of the voltage of the secondary pixel electrode 32 to the charge sharing line 50 (sharebar), thereby lowering the voltage of the secondary pixel electrode 32. This allows the primary pixel electrode 31 and the secondary pixel electrode 32 to be controlled by different voltages, effectively improving the viewing angle.

[0044] However, since each pixel has a charge sharing line 50 , the portion of the charge sharing line 50 corresponding to the primary pixel electrode 31 and the secondary pixel electrode 32 blocks the penetrating light, resulting in a large loss in the pixel aperture ratio and low transmittance.

[0045] Based on the problems existing in the comparative example, the embodiments of the present application propose new solutions.

[0046] Please refer to Figure 3 and Figure 4 , the embodiment of the present application provides a pixel structure, Figure 1 and Figure 2 The comparative example shown is substantially the same and also includes a plurality of pixels arranged in multiple rows and columns. Figure 3 and Figure 4 Two pixels are shown, namely a first pixel (Pixel 1) and a second pixel (Pixel 2) arranged sequentially along a row direction.

[0047] Each pixel has a generally identical structure, including primary pixel electrodes 31 and sub-pixel electrodes 32 spaced apart along the column direction. Both primary and sub-pixel electrodes 31 and 32 have a multi-domain structure. A scan line 10 (Gate) is disposed between the primary and sub-pixel electrodes 31 and 32. The scan line 10 extends along the row direction, connecting each pixel in the row. Pixels in adjacent columns are separated by a data line 20 (Data) extending along the column direction.

[0048] Each pixel includes a first thin film transistor (T1), a second thin film transistor (T2), and a third thin film transistor (T3). The first thin film transistor is correspondingly connected to the scan line 10, the data line 20, and the primary pixel electrode 31. The second thin film transistor is correspondingly connected to the scan line 10, the data line 20, and the secondary pixel electrode 32.

[0049] The pixel structure of the embodiment of the present application further includes a charge sharing line 50 (sharebar), Figure 1 and Figure 2The difference from the comparative example shown is that the charge sharing line 50 of the embodiment of the present application is disposed in the first pixel, while the second pixel does not have the charge sharing line 50. In other words, the first pixel includes the charge sharing line 50, while the second pixel does not.

[0050] The third thin film transistor of the first pixel is connected to the scan line 10, the second thin film transistor and the charge sharing line 50. The third thin film transistor of the second pixel is connected to the scan line 10, the second thin film transistor and the charge sharing line 50 in the first pixel.

[0051] When the input signal from scan line 10 (Gate) turns on the three thin-film transistors (T1, T2, T3) of the first pixel (Pixel 1), the signal from data line 20 (Data) enters the primary pixel electrode 31 of the first pixel through the first thin-film transistor (T1) of the first pixel; enters the sub-pixel electrode 32 of the first pixel through the second thin-film transistor (T2) of the first pixel; and releases part of the voltage of the sub-pixel electrode 32 of the first pixel to the charge sharing line 50 (sharebar) of the first pixel through the third thin-film transistor (T3) of the first pixel.

[0052] When the input signal from scan line 10 (Gate) turns on the three thin-film transistors (T1, T2, and T3) of the second pixel (Pixel 2), the signal from data line 20 (Data) enters the second pixel's primary pixel electrode 31 through the second pixel's first thin-film transistor (T1); then enters the second pixel's sub-pixel electrode 32 through the second pixel's second thin-film transistor (T2); and finally, the third thin-film transistor (T3) of the second pixel releases a portion of the voltage of the second pixel's sub-pixel electrode 32 to the first pixel's charge sharing line 50 (sharebar). This lowers the voltage of the sub-pixel electrode 32, allowing the primary and sub-pixel electrodes 31 and 32 to be controlled by different voltages, effectively improving the viewing angle.

[0053] Compared to Figure 1 and Figure 2 The comparative example shown in the figure includes a charge-sharing line 50 in each pixel. In the embodiment of the present application, in adjacent first and second pixels, the charge-sharing line 50 is only included in the first pixel, and not in the second pixel. This eliminates the need for the charge-sharing line 50 to block light in the second pixel. This means that the aperture ratio and transmittance of the first pixel are roughly the same as those in the comparative example, while the aperture ratio and transmittance of the second pixel are both higher than those in the comparative example. Therefore, the solution of the embodiment of the present application solves the problems of high aperture ratio loss and low transmittance in the current 8Domain technology, and improves the aperture ratio and transmittance of multiple pixels as a whole.

[0054] The pixel structure of the embodiment of the present application is configured such that a charge sharing line 50 is provided in the first pixel, and the third thin film transistors of the first pixel and the second pixel are both connected to the charge sharing line 50 in the first pixel, so that part of the voltage of the sub-pixel electrodes 32 of the first pixel and the second pixel is released to the charge sharing line 50, thereby improving the viewing angle. Since the charge sharing line 50 in the second pixel is omitted, the aperture ratio and transmittance of the second pixel can be increased, which means that the aperture ratio and transmittance of the entire plurality of pixels are increased.

[0055] In one embodiment, please refer to Figure 3 and Figure 4 The charge sharing line 50 includes a first stacked segment 51, a first connecting segment 52, and a second stacked segment 53, which are connected in sequence. The first stacked segment 51 is stacked with the skeleton of the primary pixel electrode 31, and the first connecting segment 52 is located between the primary pixel electrode 31 and the sub-pixel electrode 32. The second stacked segment 53 is stacked with the skeleton of the sub-pixel electrode 32, and the third thin film transistors of the first and second pixels are both connected to the first connecting segment 52.

[0056] The primary pixel electrode 31 and the secondary pixel electrode 32 have a multi-domain structure, specifically a four-domain structure each. Similar to the comparative example, each has a "M"-shaped structure, each including a "+"-shaped skeleton and branches connected to the skeleton. The skeleton is wider than the branches.

[0057] Light can normally pass through the primary pixel electrode 31 and the secondary pixel electrode 32. The area between the primary pixel electrode 31 and the secondary pixel electrode 32 is used to centrally house light-shielding scan lines 10, thin-film transistors, and the like, to maximize aperture ratio and transmittance.

[0058] The scanning line 10 and the gates of the three thin-film transistors are made of the first metal layer (M1), the data line 20, the source and drain of the three thin-film transistors, and the charge sharing line are made of the second metal layer (M2), and the main pixel electrode 31 and the sub-pixel electrode 32 are made of the transparent electrode layer. Among them, the various structures made of the first metal layer can be made simultaneously, the various structures of the second metal layer can be made simultaneously, and the various structures of the transparent electrode layer can also be made simultaneously. In the field of semiconductor manufacturing, for the production of metal structures, the patterning process generally includes exposure, development, and etching. The specific process is roughly to use a mask to engrave a pattern on the photoresist during exposure, to visualize the pattern through development, and to copy the pattern to the metal layer through etching. The three metal layers of this embodiment can be made using three masks.

[0059] The first metal layer is made of any one of Ti (titanium), Mo (molybdenum), Ta (thallium), and Nb (niobium). It has low light transmittance and strong light-blocking properties, allowing almost no light to penetrate. The second metal layer is made of any one of Cu (copper), Al (aluminum), and Ag (silver). It has low light transmittance and strong light-blocking properties, allowing almost no light to penetrate. The transparent electrode layer is made of indium tin oxide (ITO), which has high light transmittance and weak light-blocking properties, allowing most light to penetrate.

[0060] Light primarily passes through the primary pixel electrode 31 and the sub-pixel electrode 32. Other locations, such as the area between the primary pixel electrode 31 and the sub-pixel electrode 32 where the scan line 10, thin-film transistor, and the first connecting segment 52 are located, are largely opaque. In other words, as many opaque structures as possible should be placed in the area between the primary pixel electrode 31 and the sub-pixel electrode 32, while the number of light-shielding structures between the primary pixel electrode 31 and the sub-pixel electrode 32 should be minimized.

[0061] As for the primary pixel electrode 31 and the sub-pixel electrode 32, since they are also made of metal (ITO), although they have high light transmittance, the transmittance is not 100%, which means that they also have a certain degree of light blocking. In particular, because the width of the skeleton is greater than the width of the branches, the skeleton has a greater light blocking effect than the branches. Furthermore, the skeleton has a "+"-shaped structure, including one along the row direction and one along the column direction. Since the charge sharing line 50 connects multiple pixels along the column direction, the first stacked segment 51 is stacked at the primary pixel electrode 31, and the second stacked segment 53 is stacked at the sub-pixel electrode 32. This arrangement not only allows the light blocking effects of the first stacked segment 51 and the skeleton of the primary pixel electrode 31 to overlap, but also allows the light blocking effects of the second stacked segment 53 and the skeleton of the sub-pixel electrode 32 to overlap, thus avoiding excessive effective area occupation and improving the overall aperture ratio. Furthermore, it also facilitates the fabrication of the charge sharing line 50, namely, both the first stacked segment 51 and the second stacked segment 53 extend along one of the skeleton's columns.

[0062] There is no limitation on the shape of the first connecting segment 52 , and there is no limitation on how the third thin film transistor of the second pixel is connected to the first connecting segment 52 .

[0063] In one embodiment, please refer to Figure 3 and Figure 4 The pixel structure further includes a bridge segment 55. The second pixel includes a second connecting segment 54, which is located between the primary pixel electrode 31 and the secondary pixel electrode 32 of the second pixel. The third thin film transistor of the second pixel is connected to the second connecting segment 54, and the bridge segment 55 connects the first connecting segment 52 and the second connecting segment 54.

[0064] In this embodiment, by setting a second connecting segment 54, the third thin film transistor of the second pixel is connected to the second connecting segment 54, and then the first connecting segment 52 and the second connecting segment 54 are connected through the bridge segment 55, so that the third thin film transistor of the second pixel is connected to the first connecting segment 52 of the first pixel.

[0065] The shape and structure of the second connecting segment 54 and the bridging segment 55 are not limited. Optionally, the second connecting segment 54 is also located in the region between the primary pixel electrode 31 and the sub-pixel electrode 32. The structure arranged in this region has little impact on the aperture ratio of the entire pixel. Optionally, the bridging segment 55 is also located in the region between the primary pixel electrode 31 and the sub-pixel electrode 32. The structure arranged in this region has little impact on the aperture ratio of the entire pixel.

[0066] It can be understood that the bridge section 55 needs to cross the first pixel and the second pixel along the column direction. In order to avoid a short circuit with the data line 20 between the first pixel and the second pixel, the bridge section 55 needs to be set on a different layer than the data line 20. The data line 20 and the source and drain of the three thin-film transistors, as well as the first connecting section 52 (charge sharing line 50) are set on the same layer, so the bridge section 55 should be set on a different layer than the first connecting section 52.

[0067] Optionally, the bridge segment 55, the primary pixel electrode 31, and the sub-pixel electrode 32 are provided in the same layer. In this way, the bridge segment 55, the primary pixel electrode 31, and the sub-pixel electrode 32 are all made of a transparent electrode layer (ITO), and can be manufactured simultaneously using a single mask, thereby reducing the number of masks and shortening the manufacturing process.

[0068] In this way, the three thin film transistors in each of the adjacent first pixel and second pixel in the embodiment of the present application are specifically arranged as follows:

[0069] The source electrode 41 of the first thin film transistor (T1) is connected to the data line 20, and the drain electrode 42 of the first thin film transistor is connected to the primary pixel electrode 31. The source electrode 41 of the second thin film transistor (T2) is shared with the source electrode 41 of the first thin film transistor, and the drain electrode 43 of the second thin film transistor is connected to the sub-pixel electrode 32, so as to simultaneously receive signals from the data line 20 and drive the primary pixel electrode 31 and the sub-pixel electrode 32.

[0070] The source 44 of the third thin film transistor (T3) is connected to the drain 43 of the second thin film transistor, the drain 45 of the third thin film transistor of the first pixel is connected to the first connecting section 52, and the drain 45 of the third thin film transistor of the second pixel is connected to the second connecting section 54.

[0071] Optional, reference Figure 3, the main pixel electrode 31 and the drain 42 of the first thin-film transistor are connected through the first via 46, and the sub-pixel electrode 32 and the drain 43 of the second thin-film transistor are connected through the second via 47. Specifically, a branch of the main pixel electrode 31 can extend directly above the drain 42 of the first thin-film transistor, and then the branch and the drain 42 of the first thin-film transistor are connected through the first via 46. A branch of the sub-pixel electrode 32 also extends directly above the drain 43 of the second thin-film transistor, and then the branch and the drain 43 of the second thin-film transistor are connected through the second via 47. Since the main pixel electrode 31 and the sub-pixel electrode 32 are transparent electrode layers, and the drain 42 of the first thin-film transistor and the drain 43 of the second thin-film transistor are the second metal layer, and the transparent electrode layer and the second metal layer are different layers, by setting the first via 46 and the second via 47, the connection between structures of different layers can be realized, and the structure is simple.

[0072] Optionally, refer to Figure 3 , the second connection segment 54 and the first connection segment 52 are arranged on the same layer and have the same shape and structure. Specifically, the shape of the first connection segment 52 can be linear, polygonal, arc-shaped, etc., without limitation. As Figure 3 shows that the first connection segment 52 is in a "匚" shape. The second connection segment 54 is also the second metal layer, so that the fabrication of each structure on the second metal layer can be achieved by using one mask plate, reducing the number of mask plates and shortening the manufacturing process. And the shape and structure of the second connection segment 54 are the same as those of the first connection segment 52, so that during fabrication, only minor changes need to be made to the mask plate, and no re-design is required. Specifically, referring to the structure of the charge sharing line 50 in the first pixel, for the second pixel, only the light-transmitting areas corresponding to the first stacked segment 51 and the second stacked segment 53 on the mask plate are removed, and the light-transmitting area corresponding to the part of the first connection segment 52 remains unchanged, and the second connection segment 54 in the second pixel can be obtained.

[0073] Optionally, the bridging segment 55 and the first connection segment 52 are connected through the third via 48, and the bridging segment 55 and the second connection segment 54 are connected through the fourth via 49. Specifically, one end of the bridging segment 55 extends directly above the first connection segment 52, and the other end extends directly above the second connection segment 54, and then they are respectively connected through the third via 48 and the fourth via 49. The bridging segment 55 is a transparent electrode layer, and the first connection segment 52 and the second connection segment 54 are the second metal layer. Since the transparent electrode layer and the second metal layer are different layers, by setting the third via 48 and the fourth via 49, the connection between structures of different layers can be realized, and the structure is simple.

[0074] Optionally, the skeleton width of the main pixel electrode 31 of the second pixel is smaller than the skeleton width of the main pixel electrode 31 of the first pixel. Since the skeleton of the main pixel electrode 31 of the first pixel is stacked with the first stacked section 51 of the charge sharing line 50, the skeleton of the main pixel electrode 31 of the first pixel is wider, which can block the first stacked section 51 and minimize the impact of the first stacked section 51. Since the second pixel does not have the first stacked section 51, there is no need to consider blocking the first stacked section 51. Therefore, the main pixel electrode 31 of the second pixel can be narrower to improve the aperture ratio and transmittance.

[0075] Optionally, the skeleton width of the sub-pixel electrode 32 of the second pixel is smaller than that of the sub-pixel electrode 32 of the first pixel. The distance between them is the same as the relationship between the widths of the main pixel electrodes 31 of the first pixel and the second pixel, and will not be repeated here.

[0076] In a liquid crystal display panel, several pixels are typically grouped together along the row or column directions as a pixel unit. For example, a red pixel (R), a green pixel (G), and a blue pixel (B) arranged sequentially along the row direction are grouped together as a pixel unit. By controlling the different light transmission states and brightness of the RGB pixels, the pixel unit can display a variety of colors. It is understood that two pixels can be grouped together as a pixel unit, or four, five, or other numbers of pixels can be grouped together as a pixel unit.

[0077] In one embodiment, reference Figure 3 The first pixel and the second pixel are repeatedly arranged along the row direction, that is, a structure of first pixel-second pixel-first pixel-second pixel... is formed along the row direction, and three adjacent pixels are regarded as a pixel unit. Figure 1 In the comparative example of FIG. 5 , all three pixels of a pixel unit have a charge sharing line 50 . Figure 1 As shown in the comparative example, this embodiment can improve the aperture ratio. Specifically, in this embodiment, the pixel arrangement in one pixel unit is first pixel-second pixel-first pixel, the first pixel has a charge sharing line 50, and the second pixel does not have a pixel sharing line. This can improve the aperture ratio of one pixel, that is, improve the aperture ratio of 1 / 3 of the pixel unit. In this embodiment, the pixel arrangement in another pixel unit is second pixel-first pixel-second pixel, which can improve the aperture ratio of two pixels, that is, improve the aperture ratio of 2 / 3 of the pixel unit. For a plurality of pixels as a whole, the aperture ratio can be improved by 1 / 2.

[0078] In another embodiment, please refer to Figures 1 to 4 The pixel structure further includes a third pixel adjacent to the first pixel or the second pixel along the row direction, and the third pixel is provided with the same charge sharing line 50 as the first pixel.

[0079] In this embodiment, the third pixel and Figure 3 and Figure 4 The first pixel of is the same as Figure 1 As described above, this embodiment is equivalent to Figure 1 The first and second pixels of Figure 3 In other words, this embodiment is equivalent to the first pixel and the second pixel or the second pixel and the third pixel. Figure 3 The first pixel and the second pixel are arranged as follows: 1. first pixel-second pixel-first pixel-first pixel-second pixel-first pixel..., that is, the first pixel-second pixel-first pixel is repeatedly arranged as a pixel unit; 2. first pixel-first pixel-second pixel-first pixel-first pixel-second pixel..., that is, the first pixel-first pixel-second pixel is repeatedly arranged as a pixel unit. Compared to Figure 1 In the comparative example shown, among the three pixels in one pixel unit of this embodiment, the aperture ratio of one pixel can be improved, that is, the aperture ratio of one-third of the pixel unit can be improved.

[0080] In another embodiment, please refer to Figure 1 、 Figure 2 and Figure 5 The pixel structure further includes a third pixel adjacent to the first pixel or the second pixel along the row direction, and the drain 45 of the third thin film transistor of the third pixel is connected to the charge sharing line 50 in the first pixel.

[0081] In this embodiment, the third pixel and Figure 3 and Figure 4 The second pixel of Figure 3 The first pixel and the second pixel are arranged as follows: 1. first pixel-second pixel-second pixel-first pixel-second pixel-second pixel..., that is, the first pixel-second pixel-second pixel is repeatedly arranged as a pixel unit; 2. second pixel-first pixel-second pixel-second pixel-first pixel-second pixel..., that is, the second pixel-first pixel-second pixel is repeatedly arranged as a pixel unit. Compared to Figure 1 In the comparative example shown, the aperture ratio of two pixels among three pixels in one pixel unit of this embodiment can be improved, that is, the aperture ratio of two-thirds of the pixel unit can be improved.

[0082] An embodiment of the present application further provides a display device, comprising the pixel structure of any of the aforementioned embodiments.

[0083] The pixel structure is described above for details and is not limited here. The display device may include the display panel described in the aforementioned embodiment, which is a VA panel. The display panel includes a backlight module, a liquid crystal module, etc. The display device may also include a touch module. The display device is a device that uses the liquid crystal display principle, including but not limited to a display screen, a television, etc.

[0084] By adopting the design of the pixel structure of the embodiment of the present application, the overall aperture ratio and transmittance of multiple pixels can be improved, that is, the aperture ratio and transmittance of the display device can be improved, and a better display effect can be achieved.

[0085] In the description of the embodiments of the present application, it should be noted that the orientation or positional relationship of terms such as "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", and "outside" are based on the orientation or positional relationship described in the accompanying drawings. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present application.

[0086] The above disclosure is only a preferred embodiment of the present application, and certainly cannot be used to limit the scope of rights of the present application. Ordinary technicians in this field can understand that all or part of the processes of the above embodiment and equivalent changes made in accordance with the claims of the present application are still within the scope covered by the present application.

Claims

1. A pixel structure, characterized in that: comprising a plurality of pixels arranged in multiple rows and columns; Each pixel comprises a primary pixel electrode and a secondary pixel electrode spaced apart along a column direction, wherein both the primary pixel electrode and the secondary pixel electrode have a multi-domain structure; a scan line is disposed between the primary pixel electrode and the secondary pixel electrode, and the scan line extends along a row direction; pixels in two adjacent columns are spaced apart by a data line extending along the column direction; Each of the pixels includes a first thin film transistor, a second thin film transistor, and a third thin film transistor, the first thin film transistor is correspondingly connected to the scan line, the data line, and the primary pixel electrode, and the second thin film transistor is correspondingly connected to the scan line, the data line, and the secondary pixel electrode; The pixel includes a first pixel and a second pixel adjacent to each other in a row direction, the pixel structure further includes a charge sharing line, the charge sharing line is arranged in the first pixel, the third thin film transistor of the first pixel is connected to the scan line, the second thin film transistor and the charge sharing line, and the third thin film transistor of the second pixel is connected to the scan line, the second thin film transistor and the charge sharing line in the first pixel; The charge sharing line includes a first connecting segment, the first connecting segment is located between the primary pixel electrode and the secondary pixel electrode, and the third thin film transistors of the first pixel and the second pixel are both connected to the first connecting segment; The pixel structure further includes a bridging segment, the second pixel includes a second connecting segment, the third thin film transistor of the second pixel is connected to the second connecting segment, and the bridging segment connects the first connecting segment and the second connecting segment.

2. The pixel structure according to claim 1, wherein: The charge sharing line includes a first stacking segment, the first connecting segment, and a second stacking segment connected in sequence. The first stacking segment is stacked with the skeleton of the main pixel electrode, and the second stacking segment is stacked with the skeleton of the sub-pixel electrode.

3. The pixel structure according to claim 2, wherein: The second connecting segment is located between the primary pixel electrode and the secondary pixel electrode of the second pixel.

4. The pixel structure according to claim 3, wherein: The source of the first thin film transistor is connected to the data line, and the drain of the first thin film transistor is connected to the main pixel electrode; The source of the second thin film transistor is shared with the source of the first thin film transistor, and the drain of the second thin film transistor is connected to the sub-pixel electrode; The source of the third thin film transistor is connected to the drain of the second thin film transistor, the drain of the third thin film transistor of the first pixel is connected to the first connecting segment, and the drain of the third thin film transistor of the second pixel is connected to the second connecting segment.

5. The pixel structure according to claim 4, wherein: The main pixel electrode and the drain electrode of the first thin film transistor are connected through a first via hole, and the sub-pixel electrode and the drain electrode of the second thin film transistor are connected through a second via hole.

6. The pixel structure according to claim 3, wherein: The second connecting section is arranged on the same layer as the first connecting section and has the same shape and structure.

7. The pixel structure according to claim 4, wherein: The bridging section is connected to the first connecting section through a third via hole, and the bridging section is connected to the second connecting section through a fourth via hole.

8. The pixel structure according to claim 3, wherein: The bridge segment, the main pixel electrode and the sub-pixel electrode are arranged in the same layer.

9. The pixel structure according to claim 1, wherein: The skeleton width of the main pixel electrode of the second pixel is smaller than the skeleton width of the main pixel electrode of the first pixel, and / or the skeleton width of the sub-pixel electrode of the second pixel is smaller than the skeleton width of the sub-pixel electrode of the first pixel.

10. The pixel structure according to any one of claims 1 to 9, wherein: The pixel structure further includes a third pixel adjacent to the first pixel or the second pixel along a row direction; The third pixel is provided with the same charge sharing line as the first pixel, or, A drain of the third thin film transistor of the third pixel is connected to the charge sharing line in the first pixel.

11. A display device, characterized in that: Comprising the pixel structure according to any one of claims 1 to 10.

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