Preparation method of linear array CZT detector

Abstract

The present invention provides a method for preparing a linear array CZT detector, comprising: cutting a crystal into rectangular wafers along the <111> crystal orientation, performing surface treatment to remove surface damage, forming electrode patterns on the {111}Te surface of the wafer, providing scribe lines between the electrode patterns, and performing photolithography followed by gold plating; stripping the gold film on the photoresist, applying photoresist on the {111}Te and {111}Cd surfaces, cutting the wafer into multiple wafers along the scribe lines, and removing the photoresist; placing the multiple wafers in the grooves of a PVD tray fixture, and gold plating the {111}Cd surfaces; applying positive resist to the {111}Te and {111}Cd surfaces of the gold-plated wafers for protection, polishing the four side surfaces, and finally removing the photoresist to complete the preparation. This method solves the problems of edge chipping and missing electrode patterns caused by uneven resist coating, and can prepare multiple linear array detectors at a time, with high production efficiency, low processing costs, simple operation, and strong controllability.

Description

Technical Field

[0001] The present invention belongs to the field of detector preparation, and in particular relates to a method for preparing a linear array CZT detector. Background Art

[0002] Due to its large atomic number, CZT (cadmium zinc telluride) material has high energy resolution and excellent detection efficiency for X-rays or gamma rays with energy in the range of 10keV to 1MeV. Therefore, CZT material is widely used in the field of nuclear radiation detection, among which linear array CZT detectors are more commonly used in the field of security inspection.

[0003] However, in the preparation of linear array CZT detectors, due to the high aspect ratio of the crystal reaching 5:1, the crystal is in an elongated shape. The existing preparation process cannot evenly coat the entire surface of the crystal with photoresist during photolithography, resulting in missing electrode patterns. Furthermore, when grinding and polishing the elongated crystal, the crystal is prone to crystal breakage or edge collapse. Existing patent CN103560167 A uses wet gold plating followed by etching to prepare gold electrodes. However, the resulting electrode morphology is poor, and a large amount of gold is also plated on all four sides of the crystal, necessitating a subsequent side polishing process, which increases the complexity of the process. The removal of the side gold is also less effective, potentially causing leakage in the detector, affecting its performance and reliability. Summary of the Invention

[0004] In order to solve the above problems, the present invention provides a method for preparing a linear array CZT detector.

[0005] In view of the problems existing in the prior art, the present invention provides the following technical solutions:

[0006] A method for preparing a linear array CZT detector comprises:

[0007] S1. Cut the CZT crystal into rectangular wafers along the ﹤111﹥ crystal direction;

[0008] S2, polishing the wafer and then treating it with a bromine methanol solution;

[0009] S3, coating a negative resist on the {111}Te surface of the processed wafer, and then performing a subsequent photolithography process to prepare a plurality of electrode patterns, with a scribe line area covered with the negative resist left between adjacent electrode patterns after the photolithography process, and then gold plating on the {111}Te surface;

[0010] S4, using a degumming solution to treat the gold-plated wafer on the {111}Te surface to peel off the gold film on the photoresist;

[0011] S5, applying photoresist as a protective layer on the {111}Te surface and the {111}Cd surface of the wafer, cutting the wafer into a plurality of linear array CZT detector wafers along the scribe line area, and then removing the photoresist on the {111}Te surface and the {111}Cd surface with a stripping solution;

[0012] S6, placing multiple wafers in the grooves of a PVD tray fixture and gold-plating the {111}Cd surface;

[0013] S7. Apply positive photoresist to the {111}Te surface and {111}Cd surface of the gold-plated chip for protection, then manually polish the four side surfaces to remove a small amount of gold layer on the side surfaces due to inadequate protection, and then remove the photoresist on the {111}Te surface and {111}Cd surface to complete the preparation of the linear array CZT detector.

[0014] Preferably, the thickness of the rectangular wafer is 1-3 mm.

[0015] Preferably, the aspect ratio of the rectangular wafer is 1-1.2. If the aspect ratio is too large, it will be difficult to spread the photoresist all over the wafer evenly during the spin coating process.

[0016] Preferably, the depth of the groove is not less than the thickness of the wafer; the length and width of the groove are respectively 2-3 mm larger than the length and width of the wafer.

[0017] Preferably, in step S2, the concentration of the bromomethanol solution is 1-5%; and the treatment time is 2-5 minutes.

[0018] Preferably, in step S3, the width of the scribing lane is 0.6-0.8 mm.

[0019] Preferably, in step S3, the thickness of the gold plating is 100-150 nm.

[0020] Preferably, in step S6, the thickness of the gold plating is 100-150 nm.

[0021] Preferably, in step S6, before placing the linear array CZT detector in the groove of the PVD tray jig, the step further includes covering the four sides of the linear array CZT detector with high temperature tape.

[0022] Preferably, in step S3, before gold plating, a step of plasma cleaning the crystal after photolithography is also included.

[0023] Preferably, the gold plating is achieved by thermal evaporation or magnetron sputtering.

[0024] Preferably, step S1 further includes placing the rectangular wafer with the {111}Te surface facing upwards, and chamfering the upper left corner or the upper right corner for distinguishing the {111}Te surface from the {111}Cd surface in subsequent processes.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] The present invention first applies a negative resist to the {111}Te surface of a rectangular wafer, forms electrodes by photolithography, and reserves a scribe line area. Under the protection of the resist, the wafer is then cut into multiple linear array detector wafers along the scribe line area. The multiple wafers are then placed in the grooves of a PVD pallet jig and gold-plated on the {111}Cd surface. Under the protection of the pallet jig, the probability of gold plating on the side surfaces is significantly reduced. Finally, the small amount of gold plated on the side walls is removed by sidewall polishing to prevent detector leakage. This method effectively solves the problem of {111}Te and {111}Cd edge chipping that can easily occur when dicing on gold-plated CZT wafers. It also addresses the problem of missing electrode patterns in linear array detectors caused by uneven resist coating, allowing the production of multiple linear array detectors at a time. This method not only increases production efficiency and reduces processing costs, but also offers simple operation and strong controllability, making it suitable for large-scale application. The linear array CZT detectors produced using this method have a yield rate exceeding 95% and an edge chipping rate of less than 5%. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 This is a process flow chart of the method for preparing the linear array CZT detector of the present invention. DETAILED DESCRIPTION

[0029] In order to facilitate understanding of the present invention, the present invention will be described in more comprehensive and detailed manner below in conjunction with preferred embodiments, but the protection scope of the present invention is not limited to the following specific embodiments.

[0030] Example 1

[0031] (1) The CZT crystal is cut into rectangular wafers with an aspect ratio of 1:1 along the ﹤111﹥ crystal direction. The wafer thickness is 1.5 mm, and the {111}Te surface is placed upward. The upper left corner of the crystal is chamfered to distinguish the {111}Te surface from the {111}Cd surface in subsequent processes.

[0032] (2) The cut rectangular wafers were subjected to chemical mechanical polishing and then treated with 3% bromine methanol solution for 4 minutes to remove the surface damage layer.

[0033] (3) The {111}Te surface of the processed crystal is coated with negative photoresist using a photoresist spreader, and the subsequent photolithography process is carried out, that is, exposure and development are performed to make the anode electrode pattern, and a scribing line is designed between adjacent electrode patterns on the photolithography board. The width of the scribing line is 0.7 mm. After the photolithography process is completed, a scribing line area is left between adjacent anode electrode patterns. The scribing line area is covered with photoresist for protection and then cleaned with a plasma cleaner for 2 minutes. Finally, gold is plated using a thermal evaporation process, and the thickness of the gold plating is 125 nm.

[0034] (4) Use a degumming solution to remove the gold film on the photoresist of the crystal after gold plating on the {111}Te surface, and then apply a photoresist evenly on the {111}Te surface and {111}Cd surface of the crystal to form a protective layer.

[0035] (5) The crystal protected by the uniform photoresist is cut into multiple linear array CZT detectors along the dicing path, and then the photoresist on the {111}Te surface and the {111}Cd surface is removed with a degumming solution.

[0036] (6) Cover the four sides of the processed wafer with commercially available high-temperature tape and place it in the groove of the PVD tray fixture. The depth of the groove is the same as the thickness of the wafer, and the length and width of the groove are 2.5 mm larger than the length and width of the wafer. This protects the four sides of the crystal from being plated with gold, leaving only the {111}Cd surface exposed. A thermal evaporation process is used to plate gold on the entire {111}Cd surface to form a cathode electrode pattern. The gold plating thickness is 125 nm.

[0037] (7) The {111}Te surface and {111}Cd surface of the crystal plated with gold in the previous step are coated with positive photoresist for protection, and the four side surfaces are manually polished to remove a small amount of gold plated on the side surfaces due to lack of protection. Finally, the photoresist on the {111}Te surface and {111}Cd surface is removed with a degumming solution, and a passivation layer is applied to the side surfaces. The linear array CZT detector is then prepared.

[0038] The thermal evaporation process used for gold plating in step (3) and step (6) of this embodiment can also be replaced by magnetron sputtering.

[0039] In step (3) of this embodiment, exposure and development can be replaced by baking and development.

[0040] The yield of the linear array CZT detector prepared by the preparation method of the present invention through repeated experiments is above 95%, and the edge collapse abnormality rate is less than 5%.

[0041] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A method for preparing a linear array CZT detector, characterized in that: include: S1. Cut the CZT crystal into rectangular wafers along the ﹤111﹥ crystal direction; S2, polishing the wafer and then treating it with a bromine methanol solution; S3, coating a negative resist on the {111}Te surface of the processed wafer, performing a subsequent photolithography process to prepare a plurality of electrode patterns, and leaving a scribe line area covered with the negative resist between adjacent electrode patterns after the photolithography process, and then gold plating on the {111}Te surface; S4, treating the gold-plated wafer with a degumming solution to remove the gold film on the photoresist; S5, applying photoresist on the {111}Te surface and the {111}Cd surface of the wafer as a protective layer, cutting the wafer into multiple pieces along the scribe line area, and then removing the photoresist on the {111}Te surface and the {111}Cd surface; S6, placing multiple wafers in the grooves of a PVD tray fixture and gold-plating the {111}Cd surface; S7. Apply positive photoresist to the {111}Te surface and {111}Cd surface of the gold-plated wafer for protection, then polish to remove a small amount of gold layer on the side due to inadequate protection, and remove the photoresist on the {111}Te surface and {111}Cd surface, thus completing the preparation of the linear array CZT detector.

2. The method for preparing the linear array CZT detector according to claim 1, wherein: The thickness of the rectangular wafer is 1-3 mm; the aspect ratio of the rectangular wafer is 1-1.

2.

3. The method for preparing the linear array CZT detector according to claim 1, wherein: The depth of the groove is not less than the thickness of the wafer; the length and width of the groove are respectively 2-3 mm larger than the length and width of the wafer.

4. The method for preparing a linear array CZT detector according to any one of claims 1 to 3, wherein: In step S2, the concentration of the bromomethanol solution is 1-5%; and the treatment time is 2-5 minutes.

5. The method for preparing a linear array CZT detector according to any one of claims 1 to 3, wherein: In step S3, the width of the scribing street is 0.6-0.8 mm.

6. The method for preparing a linear array CZT detector according to any one of claims 1 to 3, wherein: In step S3, the thickness of the gold plating is 100-150 nm; In step S6, the thickness of the gold plating is 100-150 nm.

7. The method for preparing a linear array CZT detector according to any one of claims 1 to 3, characterized in that: In step S6 , before placing the linear array CZT detector in the groove of the PVD tray jig, the step further includes covering the four sides of the linear array CZT detector with high temperature tape.

8. The method for preparing a linear array CZT detector according to any one of claims 1 to 3, wherein: In step S3, before gold plating, a step of plasma cleaning the wafer after photolithography is also included.

9. The method for preparing a linear array CZT detector according to any one of claims 1 to 3, wherein: In steps S3 and S6, the gold plating is achieved by thermal evaporation or magnetron sputtering.

10. The method for preparing a linear array CZT detector according to any one of claims 1 to 3, characterized in that: Step S1 also includes placing the wafer with the {111}Te surface facing upward and performing chamfering on the upper left corner or the upper right corner.

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