Semiconductor light emitting element and manufacturing method thereof

Abstract

The present invention provides a semiconductor light-emitting element and a method for manufacturing the same. The epitaxial stack comprises an N-type semiconductor layer, an active region, a P-type semiconductor layer, and a V-shaped pit extending through the active region. Furthermore, a static charge collection layer is provided between the N-type semiconductor layer and the active region, with the tip of the V-shaped pit extending into the static charge collection layer. The N-type semiconductor layer has threading dislocations. Thus, the static charge collection layer collects static charge on the lower surface of the epitaxial stack (i.e., the N-type semiconductor layer side). The threading dislocations and the V-shaped pits then form a leakage path, transporting the static charge to the surface of the epitaxial stack (i.e., the P-type semiconductor layer side) to neutralize the accumulated positive charge. This prevents static charge from accumulating on the lower surface of the epitaxial stack, reduces the risk of electrostatic breakdown of the semiconductor light-emitting element, and improves the anti-static capability of the semiconductor light-emitting element.

Description

Technical Field

[0001] The present invention relates to the field of light emitting diodes, and in particular to a semiconductor light emitting element and a manufacturing method thereof. Background Art

[0002] A light-emitting diode (LED) is a semiconductor electronic component that emits light. Epitaxial wafers are the primary product in the LED manufacturing process. Existing LED epitaxial wafers consist of a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer. The substrate provides a growth surface for the epitaxial material, the N-type semiconductor layer provides electrons for recombination and luminescence, the P-type semiconductor layer provides holes for recombination, and the active layer facilitates the radiative recombination of electrons and holes.

[0003] In recent years, III-V nitrides have been widely used in the electronics and optics fields due to their excellent physical and chemical properties (large bandgap, high breakdown electric field, high electron saturation mobility, etc.). Among them, blue-green light-emitting diodes, based on GaN as the primary material, have made significant progress in lighting, display, and digital applications. As the application of LEDs gradually expands, market demands for LED performance are also increasing. Current high-efficiency application products such as filament lamps, high-end tubes, high-efficiency panel lights, machine backlights, and TV backlights have strict requirements for LED luminous efficiency and reliability. These high technical barriers have made them a hot topic in technology research and development for major LED epitaxy and chip manufacturers.

[0004] To improve LED luminous efficiency, engineers have introduced a composite shallow quantum well superlattice layer between the N-type semiconductor layer and the active region. This layer allows some of the underlying linear dislocations to form V-pits. Currently, the primary function of V-pits is to increase forward current injection and shield non-radiative recombination caused by defects, thereby improving luminous efficiency.

[0005] However, due to the wide bandgap and high resistivity of GaN materials, the induced charge generated by static electricity during the production process of these LED chips is difficult to dissipate. When this charge accumulates to a certain level, it generates a very high static voltage. When this static voltage exceeds the material's tolerance, it causes breakdown and discharge. For horizontally structured LED chips, which are widely used in the market, the positive and negative electrodes are located on the chip surface, with a very small distance between them. Furthermore, the active layer is thin, with little tolerance for static electricity, making it extremely susceptible to static electricity breakdown, causing device failure. Therefore, compared with traditional LEDs, GaN-based LEDs have a distinct disadvantage: poor anti-static ability. Failure caused by static electricity has become a very difficult problem that affects product qualification rates and widespread use.

[0006] In view of this, the inventors specially designed a semiconductor light-emitting element and a method for manufacturing the same, which resulted in this case. Summary of the Invention

[0007] The object of the present invention is to provide a semiconductor light emitting element and a manufacturing method thereof, so as to solve the problem that the existing LED chip with V-shaped defects is easily broken down by static electricity.

[0008] In order to achieve the above object, the technical solution adopted by the present invention is as follows:

[0009] A semiconductor light emitting element, comprising:

[0010] A substrate and an epitaxial stack disposed on a surface of the substrate; the epitaxial stack at least comprising an N-type semiconductor layer, an active region, a P-type semiconductor layer, and a V-shaped pit penetrating the active region, stacked in sequence along a first direction; the first direction being perpendicular to the substrate and pointing from the substrate to the epitaxial stack;

[0011] Wherein, an electrostatic charge collection layer is further provided between the N-type semiconductor layer and the active region, the tip of the V-shaped pit extends to the electrostatic charge collection layer, and the N-type semiconductor layer has threading dislocations.

[0012] Preferably, the V-shaped pit is formed on the top of the threading dislocation to form a leakage channel.

[0013] Preferably, the electrostatic charge collection layer has N-type doping, and the doping concentration of the electrostatic charge collection layer is greater than the doping concentration of the N-type semiconductor layer.

[0014] Preferably, the V-shaped pit does not penetrate the electrostatic charge collection layer.

[0015] Preferably, the semiconductor light emitting element includes a GaN-based LED element.

[0016] Preferably, a buffer layer and a U-GaN layer are further provided on the substrate and the N-type semiconductor layer.

[0017] Preferably, the active region comprises quantum barriers and quantum wells that are alternately stacked and grown along a growth direction; the quantum barriers comprise GaN layers, and the quantum wells comprise InGaN layers.

[0018] Preferably, the electrostatic charge collection layer includes any one or more composite structures of a GaN layer, an AlN layer, an InN layer, an AlGaN layer, an InGaN layer or an AlInGaN layer.

[0019] Preferably, a current blocking layer is further provided between the N-type semiconductor layer and the static charge collection layer.

[0020] Preferably, an electron blocking layer is further provided between all source regions and the P-type semiconductor layer.

[0021] Preferably, the V-shaped pit extends from the electrostatic charge collection layer through the active region to the electron blocking layer.

[0022] Preferably, the dopant of the electrostatic charge collection layer is Si.

[0023] Preferably, the electrostatic charge collection layer has a thickness of 10-100 nm, inclusive.

[0024] The present invention also provides a method for manufacturing a semiconductor light-emitting element, comprising the following steps:

[0025] S01, providing a substrate;

[0026] S02, forming an N-type semiconductor layer on the surface of the substrate, wherein the N-type semiconductor layer has threading dislocations;

[0027] S03, forming an electrostatic charge collection layer on the surface of the N-type semiconductor layer, and making the position of the electrostatic charge collection layer corresponding to the threading dislocation serve as the tip starting point of the V-shaped pit;

[0028] S04, forming an active area on the surface of the electrostatic charge collection layer, and maintaining the opening shape of the V-shaped pit in the active area;

[0029] S05 , forming a P-type semiconductor layer on the surface of the active area, wherein the P-type semiconductor layer fills the V-shaped pit.

[0030] Preferably, the V-shaped pit is formed on the top of the threading dislocation to form a leakage channel.

[0031] Preferably, the electrostatic charge collection layer has N-type doping, and the doping concentration of the electrostatic charge collection layer is greater than the doping concentration of the N-type semiconductor layer.

[0032] The above technical solution shows that the semiconductor light-emitting element provided by the present invention comprises an epitaxial stack comprising an N-type semiconductor layer, an active region, a P-type semiconductor layer, and a V-shaped pit extending through the active region, stacked in sequence. Furthermore, a static charge collection layer is provided between the N-type semiconductor layer and the active region, the tip of the V-shaped pit extending into the static charge collection layer, and the N-type semiconductor layer has threading dislocations. Thus, the static charge collection layer collects static charge on the lower surface of the epitaxial stack (i.e., the N-type semiconductor layer side). The threading dislocations and the V-shaped pits then form a leakage path, transporting the static charge to the surface of the epitaxial stack (i.e., the P-type semiconductor layer side) to neutralize the accumulated positive charge on the surface. This achieves the beneficial effects of preventing static charge accumulation on the lower surface of the epitaxial stack, reducing the risk of electrostatic breakdown of the semiconductor light-emitting element, and improving the anti-static capability of the semiconductor light-emitting element.

[0033] Furthermore, by setting: the doping concentration of the electrostatic charge collection layer is greater than the doping concentration of the N-type semiconductor layer, the electrostatic charge collection layer has a relatively low resistivity, so that the electrostatic charge is effectively gathered in the electrostatic charge collection layer and is more fully neutralized with the positive charge through the leakage channel.

[0034] The method for manufacturing a semiconductor light-emitting element provided by the present invention achieves the above-mentioned beneficial effects while having a simple and convenient manufacturing process and is easy to produce. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0036] Figure 1 A schematic diagram of the structure of an LED chip provided by an embodiment of the present invention;

[0037] Figures 2 to 6 A schematic structural diagram corresponding to the steps of the method for manufacturing an LED chip provided in an embodiment of the present invention;

[0038] Explanation of symbols in the figure: 1. Substrate, 2. Buffer layer, 3. U-GaN layer, 4. N-type semiconductor layer, 5. Current blocking layer, 6. Electrostatic charge collection layer, 7. Active region, 8. Electron blocking layer, 9. P-type semiconductor layer, 10. Threading dislocation, 11. V-shaped pit. DETAILED DESCRIPTION

[0039] To make the content of the present invention clearer, the content of the present invention is further described below with reference to the accompanying drawings. The present invention is not limited to the specific embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts are within the scope of protection of the present invention.

[0040] like Figure 1 As shown, a semiconductor light emitting element comprises:

[0041] A substrate 1 and an epitaxial stack disposed on a surface of the substrate 1; the epitaxial stack at least comprising an N-type semiconductor layer 4, an active region 7, a P-type semiconductor layer 9, and a V-shaped pit 11 extending through the active region 7, stacked sequentially along a first direction; the first direction being perpendicular to the substrate 1 and extending from the substrate 1 toward the epitaxial stack;

[0042] A static charge collection layer 6 is further provided between the N-type semiconductor layer 4 and the active region 7 . The tip of the V-shaped pit 11 extends to the static charge collection layer 6 . The N-type semiconductor layer 4 has a threading dislocation 10 .

[0043] In this embodiment, the V-shaped pit 11 is formed on the top of the threading dislocation 10 to form a leakage path.

[0044] In this embodiment, the electrostatic charge collection layer 6 has N-type doping, and the doping concentration of the electrostatic charge collection layer 6 is greater than the doping concentration of the N-type semiconductor layer 4 .

[0045] In this embodiment, the V-shaped pit 11 does not penetrate the electrostatic charge collection layer 6 .

[0046] In this embodiment, the semiconductor light emitting element includes a GaN-based LED element.

[0047] In this embodiment, a buffer layer 2 and a U-GaN layer 3 are further provided on the substrate 1 and the N-type semiconductor layer 4 .

[0048] In this embodiment, the active region 7 includes quantum barriers and quantum wells that are alternately stacked and grown along the growth direction; the quantum barriers include GaN layers, and the quantum wells include InGaN layers.

[0049] In this embodiment, the electrostatic charge collection layer 6 includes any one or more composite structures of a GaN layer, an AlN layer, an InN layer, an AlGaN layer, an InGaN layer or an AlInGaN layer.

[0050] In this embodiment, a current blocking layer 5 is further provided between the N-type semiconductor layer 4 and the electrostatic charge collection layer 6 .

[0051] In this embodiment, an electron blocking layer 8 is further provided between all source regions 7 and the P-type semiconductor layer 9 .

[0052] In this embodiment, the V-shaped pit 11 extends from the electrostatic charge collection layer 6 through the active region 7 to the electron blocking layer 8 .

[0053] In this embodiment, the dopant of the electrostatic charge collection layer 6 is Si.

[0054] In this embodiment, the thickness of the electrostatic charge collection layer 6 is 10-100 nm, including end points.

[0055] The present invention also provides a method for manufacturing a semiconductor light-emitting element, comprising the following steps:

[0056] S01、 Figure 2 As shown, a substrate 1 is provided;

[0057] Specifically, the substrate 1 may be a different material having a crystal structure different from that of the nitride semiconductor layer, such as a sapphire substrate 1 .

[0058] S02, such as Figure 3 As shown, an N-type semiconductor layer 4 is formed on the surface of the substrate 1, and the N-type semiconductor layer 4 has threading dislocations 10;

[0059] Specifically, a Group III element source, an N source, and an n-type dopant can be introduced into a chamber and allowed to grow. For example, a Ga source such as trimethylgallium (TMGa) or triethylgallium (TEGa), an N source such as NH3, and an N-type dopant (such as Si) can be introduced into the chamber to grow an N-type GaN layer, thereby forming the N-type semiconductor layer 4.

[0060] The N-type semiconductor layer 4 can be grown at a relatively high temperature, thereby having a low defect density. For example, the N-type semiconductor layer 4 can be grown at a high temperature of approximately 1000° C. or higher. Furthermore, the N-type semiconductor layer 4 can be formed as a single layer or multiple layers.

[0061] Here, the N-type semiconductor layer 4 may have a different lattice constant from the substrate 1, and thus have a lattice mismatch to form threading dislocations 10. In this embodiment, the N-type semiconductor layer 4 may include one or more threading dislocations 10, which is not limited here.

[0062] According to one embodiment of the present invention, the semiconductor light-emitting element may further include a process of forming a buffer layer 2 and a U-GaN layer 3, wherein the buffer layer 2 and the U-GaN layer 3 are sequentially stacked between the substrate 1 and the N-type semiconductor layer 4, and play a role in alleviating the stress and strain caused by the lattice constant mismatch between the substrate 1 and the N-type semiconductor layer 4.

[0063] The semiconductor light emitting element according to an embodiment of the present invention may further include a current blocking layer 5 , which is disposed on the surface of the N-type semiconductor layer 4 .

[0064] S03, such as Figure 4 As shown, an electrostatic charge collection layer 6 is formed on the surface of the N-type semiconductor layer 4, and the position of the electrostatic charge collection layer 6 corresponding to the threading dislocation 10 is used as the tip starting point of the V-shaped pit 11; further, the doping concentration of the electrostatic charge collection layer 6 is greater than the doping concentration of the N-type semiconductor layer 4; as a preferred embodiment, the V-shaped pit 11 is formed on the top of the threading dislocation 10 to constitute a leakage channel.

[0065] Specifically, the electrostatic charge collection layer 6 can be formed by introducing a Group III element source and an N source into a chamber, and introducing and growing an N-type dopant. In this case, the amount of the N-type dopant introduced into the chamber can be adjusted so that the electrostatic charge collection layer 6 has a higher doping concentration than the N-type semiconductor layer 4.

[0066] In addition, the electrostatic charge collection layer 6 can be formed on the N-type semiconductor layer 4 at a relatively low temperature. For example, the electrostatic charge collection layer 6 can be formed at a low temperature of about 800 to 1100°C. Furthermore, the electrostatic charge collection layer 6 can have a higher defect density than the N-type semiconductor layer 4. By forming the electrostatic charge collection layer 6 to have a relatively high defect density, the electrostatic charge collection layer 6 can provide a tip starting point for generating the V-shaped pit 11. Further, the V-shaped pit 11 is formed corresponding to the top of the threading dislocation 10. It should be emphasized that in this embodiment, there is no specific limitation on the slope and height of the V-shaped pit 11.

[0067] The semiconductor light emitting element according to an embodiment of the present invention may further include a current blocking layer 5 , which is disposed on the surface of the N-type semiconductor layer 4 .

[0068] S04, such as Figure 5 As shown, an active area 7 is formed on the surface of the electrostatic charge collection layer 6, and the opening shape of the V-shaped pit 11 is maintained in the active area 7; further, the active area 7 includes quantum barriers and quantum wells that are alternately stacked and grown along the growth direction; the quantum barriers include GaN layers, and the quantum wells include InGaN layers.

[0069] Specifically, Ga source, N source, and N2 carriers are injected into the chamber to grow a GaN layer to form quantum barriers. Subsequently, In source, Ga source, N source, and N2 carriers are injected into the chamber to grow an InGaN layer to form quantum wells. By alternating and repeating the aforementioned quantum barrier and quantum well growth processes, the active region 7 is formed. Furthermore, the active region 7 maintains the open shape of the V-shaped pit 11.

[0070] The semiconductor light emitting element according to an embodiment of the present invention may further include an electron blocking layer 8 . The electron blocking layer 8 is disposed on the surface of the active region 7 , and the electron blocking layer 8 has a flat surface.

[0071] S05, such as Figure 6 As shown, a P-type semiconductor layer 9 is formed on the surface of the active region 7 , and the P-type semiconductor layer 9 fills the V-shaped pit 11 .

[0072] Specifically, a Group III element source, an N source, and a P-type dopant can be introduced into a chamber and allowed to grow. For example, a Ga source such as trimethylgallium (TMGa) or triethylgallium (TEGa), an N source such as NH3, and a P-type dopant (such as Mg) can be introduced into the chamber to grow a P-type GaN layer, thereby forming the P-type semiconductor layer 9.

[0073] As can be seen from the above technical solution, the semiconductor light-emitting element provided by the present invention comprises an epitaxial stack comprising an N-type semiconductor layer 4, an active region 7, a P-type semiconductor layer 9, and a V-shaped pit 11 extending through the active region 7. Furthermore, a static charge collection layer 6 is provided between the N-type semiconductor layer 4 and the active region 7. The tip of the V-shaped pit 11 extends to the static charge collection layer 6, and the N-type semiconductor layer 4 has a threading dislocation 10. Thus, static charge on the lower surface of the epitaxial stack (i.e., on the N-type semiconductor layer 4 side) is collected by the static charge collection layer 6. The threading dislocation 10 and the V-shaped pit 11 then form a leakage path, transporting the static charge to the surface of the epitaxial stack (i.e., on the P-type semiconductor layer 9 side) to neutralize the accumulated positive charge on the surface. This achieves the beneficial effects of preventing static charge accumulation on the lower surface of the epitaxial stack, reducing the risk of electrostatic breakdown of the semiconductor light-emitting element, and improving the anti-static capability of the semiconductor light-emitting element.

[0074] Furthermore, by setting: the doping concentration of the electrostatic charge collection layer 6 is greater than the doping concentration of the N-type semiconductor layer 4, the electrostatic charge collection layer 6 has a relatively low resistivity, so that the electrostatic charge is effectively gathered in the electrostatic charge collection layer 6 and more fully neutralized with the positive charge through the leakage channel.

[0075] The method for manufacturing a semiconductor light-emitting element provided by the present invention achieves the above-mentioned beneficial effects while having a simple and convenient manufacturing process and is easy to produce.

[0076] The device provided in the embodiment of the present invention has the same implementation principle and technical effects as the aforementioned method embodiment. For the sake of brevity, any matters not mentioned in the device embodiment can be referred to the corresponding contents in the aforementioned method embodiment. Those skilled in the art will clearly understand that for the convenience and brevity of description, the specific working processes of the systems, devices, and units described above can all refer to the corresponding processes in the aforementioned method embodiment and will not be repeated here.

[0077] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0078] It should also be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such article or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the article or device comprising the aforementioned elements.

[0079] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A semiconductor light emitting element, characterized in that: include: A substrate and an epitaxial stack disposed on a surface of the substrate; the epitaxial stack at least comprising an N-type semiconductor layer, an active region, a P-type semiconductor layer, and a V-shaped pit penetrating the active region, stacked in sequence along a first direction; the first direction being perpendicular to the substrate and pointing from the substrate to the epitaxial stack; Wherein, an electrostatic charge collection layer is further provided between the N-type semiconductor layer and the active region, the tip of the V-shaped pit extends to the electrostatic charge collection layer, and the N-type semiconductor layer has a threading dislocation; The electrostatic charge collection layer has N-type doping, and the doping concentration of the electrostatic charge collection layer is greater than the doping concentration of the N-type semiconductor layer.

2. The semiconductor light emitting element according to claim 1, wherein The V-shaped pit is formed on the top of the threading dislocation to form a leakage path.

3. The semiconductor light emitting element according to claim 1, wherein The V-shaped pits do not penetrate the electrostatic charge collection layer.

4. The semiconductor light emitting element according to claim 1, wherein The electrostatic charge collection layer includes any one or more composite structures of a GaN layer, an AlN layer, an InN layer, an AlGaN layer, an InGaN layer or an AlInGaN layer.

5. The semiconductor light emitting element according to claim 1, wherein A current blocking layer is further provided between the N-type semiconductor layer and the static charge collection layer. The semiconductor light emitting element according to claim 1 , wherein: An electron blocking layer is further provided between all source regions and the P-type semiconductor layer.

7. The semiconductor light emitting element according to claim 6, wherein: The V-shaped pit extends from the electrostatic charge collection layer through the active region to the electron blocking layer.

8. A method for manufacturing a semiconductor light emitting element, characterized in that: The steps include: S01, providing a substrate; S02, forming an N-type semiconductor layer on the surface of the substrate, wherein the N-type semiconductor layer has threading dislocations; S03, forming an electrostatic charge collection layer on the surface of the N-type semiconductor layer, and the position of the electrostatic charge collection layer corresponding to the threading dislocation serves as the tip starting point of the V-shaped pit; S04, forming an active area on the surface of the electrostatic charge collection layer, and maintaining the opening shape of the V-shaped pit in the active area; S05, forming a P-type semiconductor layer on the surface of the active area, wherein the P-type semiconductor layer fills the V-shaped pit; The electrostatic charge collection layer has N-type doping, and the doping concentration of the electrostatic charge collection layer is greater than the doping concentration of the N-type semiconductor layer.

9. The method for manufacturing a semiconductor light emitting element according to claim 8, wherein: The V-shaped pit is formed on the top of the threading dislocation to form a leakage path.

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