An output adjustable low ripple charge pump circuit
By introducing a filter capacitor and feedback regulation of the operational amplifier into the charge pump circuit, the problems of non-adjustable output voltage and large ripple in conventional charge pump circuits are solved, achieving adjustable output voltage and reduced ripple.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TIANJIN UNIV
- Filing Date
- 2022-11-30
- Publication Date
- 2026-06-02
AI Technical Summary
Conventional charge pump circuits can only output voltage that is an integer multiple of the power supply voltage, and load changes cause output voltage changes, resulting in large ripple that is difficult to control.
The circuit consists of a first pump capacitor, a second pump capacitor, a filter capacitor, a switch, and an operational amplifier. The output voltage is controlled by a reference voltage, and the feedback adjustment of the operational amplifier is used to achieve a balance of charge between the pump capacitor and the filter capacitor, thereby reducing ripple.
It achieves adjustable output voltage and significantly reduces ripple, thus improving output voltage stability.
Smart Images
Figure CN115833572B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of analog integrated circuit design, mainly to charge pump circuits, and more specifically, to a low-ripple charge pump circuit with adjustable output. Background Technology
[0002] A charge pump circuit is a DC-DC converter that can generate voltages higher or lower than the power supply voltage. Theoretically, a conventional charge pump's output voltage can only be an integer multiple of the power supply voltage, and the actual output voltage varies with load changes, making it difficult to control. Furthermore, because the charge pump works by first charging the pump capacitor and then connecting it in series with the power supply for output, the pump capacitor voltage constantly changes during this process, causing the output voltage to fluctuate and generating significant ripple. Summary of the Invention
[0003] The purpose of this invention is to overcome the shortcomings of the prior art and propose an output adjustable low-ripple charge pump circuit with adjustable output voltage and output ripple much smaller than that of conventional charge pumps.
[0004] The objective of this invention is achieved through the following technical solutions.
[0005] The present invention provides an adjustable low-ripple charge pump circuit, comprising a pump capacitor, a filter capacitor, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a switch, a feedback resistor, a feedback resistor, and an operational amplifier.
[0006] The negative plate of the first pump capacitor is connected to the output terminal and ground of the operational amplifier via switches 3 and 4, respectively, and the positive plate is connected to the power supply and the output terminal via switches 1 and 2, respectively. The negative plate of the second pump capacitor is connected to the output terminal and ground of the operational amplifier via switches 7 and 8, respectively, and the positive plate is connected to the power supply and the output terminal via switches 5 and 6, respectively. The positive plate of the filter capacitor is connected to the output terminal, and the negative plate is grounded. The first and second feedback resistors are connected in series between the output terminal and ground. The inverting input terminal of the operational amplifier is connected to the feedback voltage between the first and second feedback resistors, and the non-inverting input terminal is connected to the reference voltage.
[0007] The output voltage is controlled by the reference voltage Vref, and the relationship is output voltage Vout=Vref×(R1+R2) / R1; during the startup process of this circuit, the output voltage of the operational amplifier is equal to the power supply voltage. At this time, the working state of this circuit is the same as that of a conventional cross-coupled charge pump. In the two phases of the clock, the first pump capacitor and the second pump capacitor are charged and connected in series with the power supply in turn until the output voltage reaches the set value, and the circuit gradually enters a stable working state.
[0008] During one phase of the clock, from 0 to T / 2, switches 2, 3, 5, and 8 are turned on, while switches 1, 4, 6, and 7 are turned off. The positive plate of pump capacitor 2 is connected to the power supply, and its negative plate is connected to ground. The power supply charges pump capacitor 2, gradually increasing its voltage to the power supply voltage. The negative plate of pump capacitor 1 is connected to the output of the operational amplifier, and its positive plate is connected to the output terminal. Pump capacitor 1 and the output voltage of the operational amplifier form a series connection, generating a voltage higher than the power supply voltage and sharing the charge with the filter capacitor. Through the negative feedback regulation of the operational amplifier, the output voltage of the operational amplifier increases, compensating for the voltage loss of pump capacitor 1 and ensuring a stable transfer of charge from pump capacitor 1 to the filter capacitor, maintaining the output voltage. The output voltage remains constant. At time T / 2, switches 1, 4, 6, and 7 are turned on, while switches 2, 3, 5, and 8 are turned off. Pump capacitor 1 is disconnected from the output terminal, while pump capacitor 2 is connected to the output terminal. At this time, the voltage across pump capacitor 2 equals the power supply voltage. More charge is transferred to the filter capacitor, causing the output terminal voltage to rise slightly. This causes the voltage at the inverting input of the operational amplifier to rise, and the negative feedback adjustment of the operational amplifier causes the output terminal voltage to drop immediately, keeping the output terminal voltage constant. Similarly, during the other phase of the clock, from T / 2 to T, the power supply charges pump capacitor 1, and pump capacitor 2 outputs to the filter capacitor. By controlling the output voltage of the operational amplifier, the output terminal voltage is stabilized.
[0009] The first switch uses a transistor, the second switch uses two transistors connected in series, the third and fourth switches use two transistors from the same inverter, the fifth switch (S5) uses a transistor, the sixth switch uses two transistors connected in series, and the seventh and eighth switches use two transistors from the same inverter. The operational amplifier is a Class AB operational amplifier.
[0010] Compared with the prior art, the beneficial effects of the technical solution of the present invention are:
[0011] (1) The present invention makes the output terminal voltage adjustable by adjusting the voltage of the negative plate of the pump capacitor.
[0012] (2) Compared with traditional charge pumps, the output ripple of the present invention is significantly reduced. Attached Figure Description
[0013] Figure 1 A schematic diagram of a low-ripple charge pump circuit with adjustable output.
[0014] Figure 2 This is a schematic diagram of the voltage at some nodes in the circuit under stable conditions.
[0015] Figure labeling: C1 pump capacitor 1, C2 pump capacitor 2, C3 filter capacitor, S1 switch 1, S2 switch 2, S3 switch 3, S4 switch 4, S5 switch 5, S6 switch 6, S7 switch 7, S8 switch 8, R1 feedback resistor 1, R2 feedback resistor 2, D operational amplifier, VDD power supply, Vref reference voltage, out output terminal. Detailed Implementation
[0016] The present invention will now be further described with reference to the accompanying drawings.
[0017] like Figure 1 As shown, the adjustable low-ripple charge pump circuit of the present invention mainly includes pump capacitor C1, pump capacitor C2, filter capacitor C3, switch S1, switch S2, switch S3, switch S4, switch S5, switch S6, switch S7, switch S8, feedback resistor R1, feedback resistor R2, and operational amplifier D.
[0018] The negative plate (node C) of pump capacitor C1 is connected to the output terminal (node A) of operational amplifier D and ground via switches S3 and S4, respectively. Its positive plate (node B) is connected to power supply VDD and output terminal out via switches S1 and S2, respectively. The negative plate (node E) of pump capacitor C2 is connected to the output terminal of operational amplifier D and ground via switches S7 and S8, respectively. Its positive plate (node D) is connected to power supply VDD and output terminal out via switches S5 and S6, respectively. The positive plate of filter capacitor C3 is connected to output terminal out, and its negative plate is grounded. Feedback resistors R1 and R2 are connected in series between output terminal out and ground. The inverting input of operational amplifier D is connected to the feedback voltage between feedback resistors R1 and R2, and the non-inverting input is connected to the reference voltage Vref.
[0019] Specifically, switch S1 can be a transistor, switch S2 can be composed of two transistors connected in series, switches S3 and S4 can be composed of two transistors from the same inverter, switch S5 can be a transistor, switch S6 can be composed of two transistors connected in series, and switches S7 and S8 can be composed of two transistors from the same inverter. The operational amplifier D can be a class AB operational amplifier, which has high gain, good stability, and fast output response.
[0020] The adjustable low-ripple charge pump circuit of this invention can control the output voltage through a reference voltage Vref, with the relationship being output voltage Vout = Vref × (R1 + R2) / R1. During the circuit startup process, since the output terminal voltage has not reached the set value, the inverting input voltage Vout × R1 / (R1 + R2) of operational amplifier D is less than the non-inverting input Vref. Therefore, the output voltage of operational amplifier D (node A) is equal to the power supply voltage VDD. At this time, the circuit operates in the same way as a conventional cross-coupled charge pump. In the two phases of the clock, pump capacitor C1 and pump capacitor C2 alternately charge and are connected in series with the power supply VDD for output until the output voltage reaches the set value, and the circuit gradually enters a stable operating state.
[0021] Figure 2 This diagram illustrates the voltage distribution at some nodes in the stable operating state of the adjustable low-ripple charge pump circuit of this invention. During one phase of the clock cycle, from 0 to T / 2 (where T is the clock period), switches S2, S3, S5, and S8 are turned on, while switches S1, S4, S6, and S7 are turned off. The positive terminal (node D) of pump capacitor C2 is connected to the power supply VDD, and the negative terminal (node E) is connected to ground. The power supply VDD charges pump capacitor C2, gradually increasing its voltage to the power supply VDD voltage. The negative terminal (node C) of pump capacitor C1 is connected to the output terminal (node A) of operational amplifier D, and the positive terminal (node B) is connected to the output terminal out. C1 is connected in series with the output voltage of operational amplifier D, generating a voltage higher than the power supply VDD and sharing the charge with filter capacitor C3. As the first pump capacitor C1 transfers charge to the filter capacitor C3, the voltage across it gradually decreases. The filter capacitor C3 does not receive charge replenishment, resulting in a slight drop in the output terminal out voltage. This causes a drop in the voltage at the inverting input terminal of operational amplifier D. Through the negative feedback regulation of operational amplifier D, the voltage at the output terminal (node A) of operational amplifier D is increased, making up for the voltage loss of the first pump capacitor C1. This ensures that the first pump capacitor C1 stably transfers charge to the filter capacitor C3, maintaining a constant output terminal out voltage.
[0022] At time T / 2, switches S1, S4, S6, and S7 are turned on, while switches S2, S3, S5, and S8 are turned off. Pump capacitor C1 is disconnected from the output terminal out, and pump capacitor C2 is connected to the output terminal out. At this time, the voltage across pump capacitor C2 is equal to the power supply VDD voltage. More charge is transferred to filter capacitor C3, and the voltage at the output terminal out rises slightly, causing the voltage at the inverting input of operational amplifier D to rise. Through the negative feedback regulation of operational amplifier D, the voltage at the output terminal (node A) of operational amplifier D immediately drops, keeping the voltage at the output terminal out unchanged.
[0023] Similarly, during the other phase of the clock, from T / 2 to T, the power supply VDD charges the first pump capacitor C1, and the second pump capacitor C2 outputs to the filter capacitor C3. By controlling the voltage at the output terminal (node A) of the operational amplifier D, the voltage at the output terminal out is stabilized. Specifically, switches S1, S4, S6, and S7 are in the ON state, while switches S2, S3, S5, and S8 are in the OFF state. The positive plate (node B) of the first pump capacitor C1 is connected to the power supply VDD, and the negative plate (node C) is connected to ground. The power supply VDD charges the first pump capacitor C1, causing its voltage to gradually rise to the power supply VDD voltage. The negative plate (node E) of the second pump capacitor C2 is connected to the output terminal (node A) of operational amplifier D, and the positive plate (node D) is connected to the output terminal out. The second pump capacitor C2 and the output terminal voltage of operational amplifier D form a series relationship, generating a voltage higher than the power supply VDD and sharing the charge with the filter capacitor C3. As the second pump capacitor C2 transfers charge to the filter capacitor C3, the voltage across it gradually decreases. The filter capacitor C3 does not receive charge replenishment, and the voltage at the output terminal out will drop slightly, causing the voltage at the inverting input terminal of operational amplifier D to drop. Through the negative feedback regulation of operational amplifier D, the voltage at the output terminal (node A) of operational amplifier D is increased, making up for the voltage loss of the second pump capacitor C2, ensuring that the second pump capacitor C2 stably transfers charge to the filter capacitor C3, and maintaining the voltage at the output terminal out unchanged.
[0024] At time T, switches S1, S4, S6, and S7 are off, while switches S2, S3, S5, and S8 are on. Pump capacitor C2 is disconnected from the output terminal out, and pump capacitor C1 is connected to the output terminal out. At this time, the voltage across pump capacitor C1 is equal to the power supply VDD voltage. More charge is transferred to filter capacitor C3, and the voltage at the output terminal out rises slightly, causing the voltage at the inverting input of operational amplifier D to rise. Through the negative feedback adjustment of operational amplifier D, the voltage at the output terminal (node A) of operational amplifier D immediately drops, keeping the voltage at the output terminal out unchanged.
[0025] Although the functions and working processes of the present invention have been described above in conjunction with the accompanying drawings, the present invention is not limited to the specific functions and working processes described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these are within the protection scope of the present invention.
Claims
1. A low-ripple charge pump circuit with adjustable output, characterized in that, This includes pump capacitor #1 (C1), pump capacitor #2 (C2), filter capacitor (C3), switch #1 (S1), switch #2 (S2), switch #3 (S3), switch #4 (S4), switch #5 (S5), switch #6 (S6), switch #7 (S7), switch #8 (S8), feedback resistor #1 (R1), feedback resistor #2 (R2), and operational amplifier (D); The negative plate of the first pump capacitor (C1) is connected to the output terminal of the operational amplifier (D) and ground via switches 3 (S3) and 4 (S4), respectively, and the positive plate is connected to the power supply (VDD) and the output terminal (out) via switches 1 (S1) and 2 (S2), respectively. The negative plate of the second pump capacitor (C2) is connected to the output terminal of the operational amplifier (D) and ground via switches 7 (S7) and 8 (S8), respectively, and the positive plate is connected to the power supply (VDD) and the output terminal (out) via switches 5 (S5) and 6 (S6), respectively. The positive plate of the filter capacitor (C3) is connected to the output terminal (out), and the negative plate is grounded. The first feedback resistor (R1) and the second feedback resistor (R2) are connected in series between the output terminal (out) and ground. The inverting input terminal of the operational amplifier (D) is connected to the feedback voltage between the first feedback resistor (R1) and the second feedback resistor (R2), and the non-inverting input terminal is connected to the reference voltage (Vref).
2. The low-ripple charge pump circuit with adjustable output according to claim 1, characterized in that, The output voltage is controlled by the reference voltage Vref, and the relationship is output voltage Vout=Vref×(R1+R2) / R1. During the startup process of this circuit, the output voltage of the operational amplifier is equal to the power supply (VDD) voltage. At this time, the working state of this circuit is the same as that of a conventional cross-coupled charge pump. In the two phases of the clock, the first pump capacitor (C1) and the second pump capacitor (C2) are charged and connected in series with the power supply (VDD) in turn until the output voltage reaches the set value, and the circuit gradually enters a stable working state. During one phase of the clock, from 0 to T / 2, switches 2 (S2), 3 (S3), 5 (S5), and 8 (S8) are turned on, while switches 1 (S1), 4 (S4), 6 (S6), and 7 (S7) are turned off. The positive terminal of pump capacitor 2 (C2) is connected to the power supply (VDD), and the negative terminal is connected to ground. The power supply (VDD) charges pump capacitor 2 (C2), causing its voltage to gradually rise to the power supply (VDD) voltage. The negative terminal of pump capacitor 1 (C1) is... The board is connected to the output terminal of the operational amplifier (D), and the positive plate is connected to the output terminal (out). The first pump capacitor (C1) is connected in series with the output voltage of the operational amplifier (D), generating a voltage higher than the power supply (VDD) and sharing the charge with the filter capacitor (C3). Through the negative feedback regulation of the operational amplifier (D), the output voltage of the operational amplifier (D) is increased, making up for the voltage loss of the first pump capacitor (C1), ensuring that the first pump capacitor (C1) stably transfers charge to the filter capacitor (C3), and maintaining the output terminal (out). At time T / 2, switches S1, S4, S6, and S7 are turned on, while switches S2, S3, S5, and S8 are turned off. Pump capacitor C1 is disconnected from the output terminal (out), and pump capacitor C2 is connected to the output terminal (out). At this time, the voltage across pump capacitor C2 is equal to the power supply voltage (VDD), and more charge is transferred to the filter capacitor C3. A slight increase in the output terminal (out) voltage causes the voltage at the inverting input of the operational amplifier (D) to rise. The negative feedback adjustment of the operational amplifier causes the output voltage of the operational amplifier (D) to drop immediately, keeping the output terminal (out) voltage constant. Similarly, during the other phase of the clock, from T / 2 to T, the power supply (VDD) charges the first pump capacitor (C1), and the second pump capacitor (C2) outputs to the filter capacitor (C3). By controlling the output voltage of the operational amplifier (D), the output terminal (out) voltage is stabilized.
3. The low-ripple charge pump circuit with adjustable output according to claim 1, characterized in that, The first switch (S1) uses a transistor, the second switch (S2) uses two transistors connected in series, the third switch (S3) and the fourth switch (S4) use two transistors in the same inverter, the fifth switch (S5) uses a transistor, the sixth switch (S6) uses two transistors connected in series, the seventh switch (S7) and the eighth switch (S8) use two transistors in the same inverter, and the operational amplifier (D) is a Class AB operational amplifier.