LED pixel packaging with controllable luminous time

Abstract

The LED pixel package according to the present invention includes: a data signal corresponding to a unit pixel of R (red), G (green) and B (blue) LEDs and the light-emitting time of the R, G and B LEDs included in the unit pixel; and a control circuit that receives a control signal embedded with a clock signal including a plurality of pulses and an activation signal and the unit pixel.

Description

Technical Field

[0001] The invention relates to an LED pixel package with controllable luminous time. Background Art

[0002] Recently, the trend in the implementation of commercial outdoor and indoor electronic signage is that the electronic display area continues to expand while the display resolution continues to increase. In addition, LEDs are used as light-emitting elements in order to achieve high brightness, high contrast and good color reproducibility.

[0003] In display screens using LEDs, the necessity of using active matrices is becoming increasingly prominent. In this case, active elements are used to control the horizontal and vertical axes instead of directly controlling the LEDs that form the pixels, which has the advantage of significantly reducing the number of control pins compared to the passive matrix method. Accordingly, since the driving circuit used for driving is very simplified, it is very helpful to reduce the pixel size and pixel pitch, and it can also reduce power consumption.

[0004] In an LED display, as the spacing between each LED is narrower and the number of pixels is denser, the clarity of the entire display increases as the brightness of each LED increases, thereby improving picture quality. Preferably, if the LED display is implemented with an active matrix, the LED display can be implemented more efficiently in terms of physical size or cost.

[0005] To this end, the LED pixel package must be configured with pins for power supply, data input, grounding, etc. In addition, the LED pixel package must also be configured with switch control pins for enabling and emitting operations of the red LED, green LED, and blue LED, respectively. Summary of the invention

[0006] Technical issues

[0007] In existing LED pixel packages, the brightness of the LED is controlled by the voltage charged to the capacitor. Therefore, the display drive circuit must include a capacitor for storing the brightness information of each pixel, but this is not conducive to the linearity of the brightness control, especially limiting the display of low brightness.

[0008] The problem to be solved by this technology is to provide an economical LED pixel package by solving the problems of the prior art.

[0009] Technical Solution

[0010] The LED pixel package according to the present invention includes: a data signal corresponding to the unit pixel of R (red), G (green) and B (blue) LEDs and the light-emitting time of the R, G and B LEDs included in the unit pixel; and a control circuit, which receives a control signal embedded with a clock signal including a plurality of pulses and an activation signal to control the unit pixel, wherein the control circuit includes: a signal separation unit, which separates and outputs the activation signal and the clock signal; a data control unit, which is activated by the activation signal, and forms R driving time data, G driving time data and B driving time data by the data signal, and outputs the R driving time data, G driving time data and B driving time data as a load signal after latching up; and a driving circuit unit, which is input with R, G, B emission signals, and drives the R, G and B LEDs to emit light during the pulse width corresponding to the input R, G and B emission signals.

[0011] As an example of an LED pixel package according to the present invention, a control signal is embedded with: an activation signal that swings between a first level and a second level greater than the first level; and a clock signal that includes a plurality of pulses that swing between a second level and a third level greater than the second level, and a signal separation unit includes: an activation signal separation circuit that includes a transistor having a threshold voltage between the first level and the second level to separate the activation signal and output it to swing between the first level and the third level; and a clock signal separation circuit that includes a transistor having a threshold voltage between the second level and the third level to separate the clock signal and output it to swing between the first level and the third level.

[0012] As an example of an LED pixel package according to the present invention, the data signal is a serial continuous signal of R driving time data, G driving time data, and B driving time data, and the data control unit separates the R driving time data, G driving time data, and B driving time data and then separates them in parallel according to each bit and outputs them.

[0013] As an example of an LED pixel package according to the present invention, its data control unit includes: a shift register, which receives a serial continuous data signal according to each bit; and a latch, which is used to latch the R driving time data, G driving time data and B driving time data output by the shift register.

[0014] As an example of the LED pixel package according to the present invention, the R driving time data, the G driving time data, and the B driving time data outputted from the shift register are outputted in parallel.

[0015] As an example of an LED pixel package according to the present invention, a light-emitting control unit includes: a counter that receives a clock signal and counts the number of pulses contained in the clock signal; and a calculation unit that outputs an R matching signal when the R driving time data matches the number of pulses, outputs a G matching signal when the G driving time data matches the number of pulses, and outputs a G matching signal when the B driving time data matches the number of pulses, wherein the light-emitting control unit also includes: an R emission latch that receives a load signal to form a first edge of the R emission signal, and uses the R matching signal to form and output a second edge of the R emission signal; a G emission latch that receives a load signal to form a first edge of the G emission signal; a G emission latch that uses the G matching signal to form and output a second edge of the G emission signal; and a B emission latch that receives a load signal and forms a first edge of the B emission signal, and uses the B matching signal to form and output a second edge of the B emission signal.

[0016] As an example of an LED pixel package according to the present invention, the pulse width from the first edge to the second edge of the R emission signal corresponds to the R driving time data, the pulse width from the first edge to the second edge of the G emission signal corresponds to the G driving time data, and the width from the first edge to the second edge of the B emission signal corresponds to the B driving time data.

[0017] As an example of an LED pixel package according to the present invention, the driving circuit portion includes an R driving circuit, a G driving circuit and a B driving circuit respectively used to drive the R, G and B LEDs contained in the pixel of the driving portion, and the R driving circuit, the G driving circuit and the B driving circuit respectively include: a driving switch, which is connected to an electrode of the LED; and a light emitting control switch, which is provided with an emission signal to control the LED driving switch to be turned on.

[0018] As an example of the LED pixel package according to the present invention, it also includes: an operational amplifier, which provides a driving voltage to the R driving circuit, the G driving circuit and the B driving circuit as an input, and provides the driving voltage copied to another input terminal to another electrode of the LED driving switch, and at the same time, the output terminal is connected to the control electrode of the LED driving switch; and an emission control switch, the output terminal of the operational amplifier is connected to one electrode, and the ground voltage is connected to the other electrode, and the emission signal is provided to the control electrode, so that it is turned on with the emission signal. If the emission control switch is turned off, the LED driving switch is turned on.

[0019] As an example of the LED pixel package according to the present invention, the R driving circuit, the G driving circuit and the B driving circuit respectively further include: a current limiting resistor connected between the other electrode of the LED driving switch and the ground voltage to limit the current provided to the LED.

[0020] As an example of the LED pixel package according to the present invention, the LED pixel package is connected in an active matrix form.

[0021] Effects of the Invention

[0022] According to the present invention, the brightness of each pixel can be adjusted by adjusting the light emission time of the R, G, and B LEDs to correspond to the input signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a diagram showing an outline of an LED pixel package according to the present embodiment;

[0024] Figure 2 is a diagram showing an overview of a control circuit according to this embodiment;

[0025] Figure 3 (A) is a schematic circuit diagram of the signal separation unit. Figure 3 (B) is a diagram showing an overview of a control signal, an activation signal, and a pulse train output from a signal separation unit;

[0026] Figure 4 is a diagram showing an overview of a data control unit;

[0027] Figure 5 is a schematic timing diagram of signals input and output to the data control section;

[0028] Figure 6 (a) is a diagram showing an overview of a light emission control unit, Figure 6 (b) is a timing diagram showing an overview of input and output signals to the light emission control unit;

[0029] Figure 7 is a circuit diagram schematically showing an R driving circuit for driving an R LED included in a driving circuit section;

[0030] Figure 8 : is a diagram showing a state in which the LED pixel packages according to the present embodiment are arranged in an array and implemented as an active matrix.

[0031] Best Mode for Carrying Out the Invention

[0032] According to an embodiment of the present invention, the LED pixel package with controllable luminous time is characterized in that it includes: a data signal corresponding to the luminous time of the unit pixel of R (red), G (green) and B (blue) LEDs and the R, G and BLEDs included in the unit pixel; and a control circuit that receives a control signal embedded with a clock signal including multiple pulses and an activation signal and controls the unit pixel. DETAILED DESCRIPTION

[0033] Since the description of the present invention is only an embodiment of the structure or function description, the scope of the present invention should not be interpreted as being limited to the embodiments described herein. That is, the embodiments can be variously modified and can have various forms, so it should be understood that the scope of the present invention includes equivalents that can achieve the technical purpose.

[0034] Figure 1 is a diagram showing an overview of an LED pixel package according to this embodiment. Figure 1 The LED pixel package 1 of this embodiment includes: a unit pixel 10, which includes R (red), G (green) and B (blue) LEDs whose anodes are connected in common; and a control circuit 20, which controls the unit pixel 10.

[0035] Figure 2 2 , the control circuit 20 according to the present embodiment receives a data signal (DATA) and a control signal (S_SIG) and controls a unit pixel.

[0036] The control circuit section 20 includes: a signal separation section 100, which separates and outputs an activation signal (ON) and a clock signal (CLK) respectively embedded in a control signal (S_SIG); a data control section, which is activated by the activation signal (ON), forms R driving time data (R[9:0]), G driving time data (G[9:0]) and B driving time data (B[9:0]) from a data signal (DATA), and outputs the R driving time data (R[9:0]), G driving time data (G[9:0]) and B driving time data (B[9:0]) after latching up the R driving time data (R[9:0]), G driving time data (G[9:0]) and B driving time data (B[9:0]) with a load (LOAD) signal; and a light emission control section 300, which receives the clock signal (CLK), the load signal (LOAD) and the R driving time data (R[9:0]), the G driving time data (G[9:0]) and the B driving time data (B[9:0]) to form R, G and B LEDs having pulse widths corresponding to the light emission times of the R, G and B LEDs. and a driving circuit portion 400 which is input with the R, G and B emission signals ( / EMI_R, / EMI_G, / EMI_B) and drives the R, G and B LEDs to emit light in a time corresponding to the input R, G and B emission signals ( / EMI_R, / EMI_G, / EMI_B).

[0037] Figure 3 (A) is a schematic circuit diagram of the signal separation unit. Figure 3 (B) is a diagram showing an overview of a control signal, an activation signal, and a pulse train output from the signal separation unit.

[0038] Reference Figure 3 (A) and Figure 3 (B), the control signal (S_SIG) may swing between a first level, a second level, and a third level. As an example, the first level may be a ground voltage level, the third level may be a drive voltage (VCC) level, the second level is greater than a threshold voltage of an NMOS transistor included in the signal separation unit 100 and lower than the third level, and may be less than twice the threshold voltage of the NMOS transistor.

[0039] The control signal (S_SIG) is a pulse train embedded with a pulse including an activation signal swinging between a ground voltage and a second level and a pulse swinging between the second level and a third level as a driving voltage (VCC).

[0040] The signal separation section 100 includes an activation signal separation circuit 112 that separates an activation signal (ON) from a control signal (S_SIG) and a clock signal separation circuit 114 that separates a clock signal (CLK) from a control signal (S_SIG).

[0041] The activation signal separation circuit 112 includes a resistor (Ra) and a transistor (N1) having a threshold voltage between a first level and a second level, a Schmitt trigger (ST), and an inverter (I2) cascaded. The threshold voltage of the transistor (N1) is greater than the first level but less than the second level. Accordingly, if the first level control signal (S_SIG) is input to the inverter (I1), the transistor (N1) is turned off, thereby outputting a third level logic high signal. However, if the second level or third level control signal (S_SIG) is input to the transistor (N1), it is turned on. Accordingly, the inverter (I1) outputs a first level logic low signal.

[0042] The Schmitt trigger is a circuit that does not respond to instantaneous noise because the output response according to the input size and direction has the characteristics of a hysteresis curve. When the input rises, the output response has a relatively high threshold voltage, and when the input falls, the output response has a relatively low threshold voltage.

[0043] The output of the Schmitt trigger (ST) is a signal provided to the inverter (I2) and swings between the first level and the third level. The output of the inverter (I2) is an activation signal (ON) for controlling subsequent activation of the light emission control section 120.

[0044] The clock signal separation circuit 114 may include cascaded inverters (I3, I4), and the inverter (I3) of the first stage is connected to an NMOS transistor (N3) connected to a ground voltage via a diode. The NMOS transistor (N4) included in the inverter (I3) is turned on at a voltage obtained by adding a threshold voltage of the diode-connected NMOS transistor (N3) and a threshold voltage of the transistor (N4).

[0045] As described above, the voltage obtained by adding the threshold voltage of N3 and the threshold voltage of N4 is greater than the second level. Accordingly, if the control signal (S_SIG) having the first and second levels is provided to the inverter (I3), the NMOS transistor (N4) is not turned on and the inverter (I3) outputs a logic high signal of the third level. However, if the control signal (S_SIG) having the third level is provided to the inverter (I3), the NMOS transistor (N4) is turned on and the inverter (I3) outputs a logic low signal of the first level. Accordingly, the pulse train embedded in the control signal (S_SIG) can be separated. The inverter (I4) inverts the output signal of the inverter (I3) and outputs it as a clock signal (CLK) swinging between the first level and the third level.

[0046] Figure 4 is a diagram showing an overview of a data control unit, Figure 5 is a schematic timing diagram of the signals input and output to the data control unit. Figure 4 and Figure 5 The data control unit 200 includes: a shift register 240, which receives a serial continuous data signal (DATA) for each bit; and a latch unit 250, which latches the R driving time data (R[9:0]), G driving time data (G[9:0]) and B driving time data (B[9:0]) output from the shift register 240 through a load signal.

[0047] exist Figure 4 and Figure 5 In the illustrated embodiment, the data signal (DATA) input to the data control unit 200 may include: 10 bits of R[9:0] corresponding to the driving time of the R LED, 10 bits of G[9:0] corresponding to the driving time of the G LED, and 10 bits of B[9:0] corresponding to the driving time of the B LED.

[0048] The data control unit 200 includes a counter 210 that receives a clock signal (CLK) and counts pulses included in the clock after being reset to an activation signal (ON); and a load signal forming unit 220 that outputs a load signal (LOAD) when the count result of the counter 210 reaches a predetermined value. The predetermined value may correspond to a value at which all bits of the data signal (DATA) are stored in the shift register 240.

[0049] In addition, the data control unit 200 includes an SR latch 230 that receives an activation signal (ON) to form a first edge of a clock activation signal (EN), and receives a load signal (LOAD) to form a second edge of the clock activation signal.

[0050] The operation of the data control section 200 having such a configuration is described below. As the signal separation section 100 outputs the activation signal (ON), the counter 210 included in the data control section 200 is reset, and the clock activation signal (EN) output from the SR latch 230 is converted to a logic high state.

[0051] As the clock enable signal (EN) is converted to a logic high state, the CLK_EN signal is provided to the shift register 240 , and each bit of the data signal (DATA) signal is sequentially stored in the shift register 240 .

[0052] The reset counter 210 counts and outputs the number of pulses included in the clock (CLK) provided by the signal separation unit 100. If the count result output by the counter 210 corresponds to a predetermined value, the load signal forming unit 220 outputs a load signal (LOAD). As an example, the load signal forming unit may output the load signal (LOAD) when all bits of the data signal (DATA) are stored in the shift register 240. Figure 4 In the example shown, the R, G, and B driving time data are all 10 bits. The load signal forming section 220 receives the result of the counter counting from [0000 0] to

[11111] and outputs a load signal (LOAD).

[0053] As the load signal (LOAD) is output, the input provided to the set input terminal of the SR latch is converted to logic low (not shown), and the clock enable signal (EN) is converted to logic low, and at the same time, the clock is not input to the shift register 240. In addition, the latch section 250 latches and outputs the R driving time data (R[9:0]), the G driving time data (G[9:0]), and the B driving time data (B[9:0]) as the load signal (LOAD) is output.

[0054] Figure 6(a) is a diagram showing an overview of a light emission control unit, Figure 6 (b) is a timing diagram showing an overview of input and output signals to the light control unit. Referring to Fig. 6 (a) and Fig. 6 (b), the light control unit 300 includes: a counter 310, which counts the number of pulses included in the clock signal (CLK) after the load signal (LOAD) is reset; an operation unit 320, which calculates whether the count result output by the counter 310 matches the R drive time data (R[9:0]), the G drive time data (G[9:0]), and the B drive time data (B[9:0]); and an SR latch 332 that forms an R emission signal (EMI_R) according to the load signal (LOAD) and the matching signal output by the operation unit 320, an SR latch 334 that forms a G emission signal (EMI_G) according to the load signal (LOAD) and the matching signal output by the operation unit 320, and an SR latch 336 that forms a B emission signal (EMI_B) according to the load signal (LOAD) and the matching signal output from the operation unit 320.

[0055] The counter 310 is reset as the data control unit 200 outputs the load signal (LOAD). The counter 310 counts and outputs the number of pulses included in the clock signal (CLK). In addition, the R emission signal (EMI_R), the emission signal (EMI_G), and the B emission signal (EMI_B) output by the SR latches 332, 334, and 336 form a rising edge and change from a logic low state to a logic high state.

[0056] As the data control section 200 outputs the load signal (LOAD), the R driving time data R[9:0], the G driving time data G[9:0], and the B driving time data B[9:0] are provided to the matching signal calculation section 320. If the R driving time data (R[9:0]), the G driving time data (G[9:0]), and the B driving time data (B[9:0]) match the counted result of the counter 310, a matching signal is output.

[0057] As an example, when the R driving time data (R[9:0]) corresponds to [1111 1111 01], the G driving time data (G[9:0]) corresponds to [1111 1111 11], and the B driving time data (B[9:0]) corresponds to [1111 1111 10], if the number of clocks (CLK) counted by the counter 310 reaches 1024 (?), the operation unit 320 outputs an R match signal to the reset input terminal of the SR latch 332. The SR latch 332 forms a second edge to change the state of the R emission signal (EMI_R).

[0058] If the number of clocks (CLK) counted by the counter 310 reaches 1024 (?), the operation section 320 outputs a G match signal to the reset input terminal of the SR latch 334. The SR latch 334 forms a second edge of the G emission signal to change the state of the G emission signal (EMI_G). Similarly, if the number of clocks (CLK) counted by the counter 310 reaches 1023 (?), the operation section 320B outputs a match signal to the SR latch 336 to change the state of the B emission signal (EMI_B).

[0059] According to this, if Figure 6 As shown in (b), the R emission signal (EMI_R), the G emission signal (EMI_G) and the B emission signal (EMI_B) respectively have pulse widths corresponding to the R driving time data (R[9:0]), the G driving time data (B[9:0]) and the B driving time data (B[9:0]).

[0060] Figure 7 Schematically shows a circuit diagram of an R driving circuit for driving an R LED included in a driving circuit section. Figure 2 As shown, the driving circuit unit 400 includes: an R driving circuit (410R) for driving an R LED, a G driving circuit (410G) for driving a G LED, and a B driving circuit (410B) for driving a B LED. The R driving circuit (410R), the G driving circuit (410G), and the B driving circuit may have the same configuration. For ease of understanding, the R driving circuit (410R) is described exemplarily below.

[0061] 7 , the R driving circuit (410R) may include an LED driving switch 412, an emission control switch 414, and an operational amplifier 416. As the R emission signal ( / EMI_R) is maintained at a logic high state, the emission control switch 414 is turned on to maintain the voltage of the output node of the operational amplifier 416 at a ground voltage (GND). Accordingly, the LED driving switch 412 is turned off and the R LED does not emit light.

[0062] The emission control switch 414 is turned off as the logic low R emission signal ( / EMI_R) is provided. Accordingly, the voltage at the output node of the operational amplifier 416 is maintained at a logic high state, and the LED driving switch 412 is turned on. In addition, the driving voltage (Vref) is copied to the non-inverting input of the operational amplifier 416 and then provided to the source of the LED driving switch 412. As a result, the current (i) is provided to the red LED through the current limiting resistor (Rlimit) to drive power.

[0063] The current (i) flowing through the LED can be expressed as shown in Equation 1 below.

[0064] [Equation 1]

[0065]

[0066] As shown in Equation 1, the value of the current (i) can be limited by adjusting the resistance of the current limiting resistor (Rlimit), thereby controlling the brightness of the R LED.

[0067] In this embodiment, the pulse widths of the R emission signal (EMI_R), the G emission signal (EMI_G), and the B emission signal (EMI_B) can be controlled by adjusting the R driving time data (R[9:0]), the G driving time data (G[9:0]), and the B driving time data (B[9:0]) provided as the data signal (DATA). In this way, the light emission time of the R LED, the G LED, and the B LED can be controlled, thereby controlling the light emission brightness of R, G, and B.

[0068] Figure 8 8 , the same control signal (S_SIG) is provided to the LED pixel packages arranged in the same row, and the same data signal (DATA) is provided to the LED pixel packages arranged in the same column.

[0069] Accordingly, the LED pixel package array according to the present embodiment implemented as an active matrix can be controlled to emit light while being individually provided with light emission data by providing a control signal (S_SIG) and a data signal (DATA).

[0070] In order to help understand the present invention, the embodiments shown in the accompanying drawings have been described, but these are embodiments for implementation and are only exemplary. It can be understood by those skilled in the art that various modifications and other equivalent embodiments can be implemented. Accordingly, the true technical protection scope of the present invention shall be subject to the attached claims.

Claims

1. An LED pixel package, It is characterized in that include: The LED pixel package according to the present invention comprises: data signals corresponding to unit pixels of R (red), G (green), and B (blue) LEDs and light emission times of the R, G, and B LEDs included in the unit pixels; and a control circuit that receives a control signal embedded with a clock signal including a plurality of pulses and an activation signal to control the unit pixel, Wherein, the control circuit comprises: a signal separation unit, which separates the activation signal and the clock signal; a data control unit that is activated by the activation signal, forms R driving time data, G driving time data, and B driving time data from the data signal, and outputs the R driving time data, G driving time data, and B driving time data as a load signal after latching; a light emitting control unit that receives the clock signal, the load signal, and the R driving time data, the G driving time data, and the B driving time data to form R, G, and B emission signals having pulse widths corresponding to the light emitting times of the R, G, and B LEDs; and a driving circuit section which receives the R, G, and B emission signals and drives the R, G, and B LEDs to emit light during a pulse width corresponding to the input R, G, and B emission signals, Wherein, the control signal is embedded with: the activation signal swings between a first level and a second level greater than the first level; and the clock signal including a plurality of pulses swinging between the second level and a third level greater than the second level, Wherein, the signal separation unit comprises: an activation signal separation circuit including a transistor having a threshold voltage between the first level and the second level to separate the activation signal and output it to swing between the first level and the third level; and a clock signal separation circuit including a transistor having a threshold voltage between the second level and the third level to separate the clock signal and output it to swing between the first level and the third level, wherein the first level is a ground voltage level, the third level is a drive voltage (VCC) level, the second level is greater than a threshold voltage of an NMOS transistor included in the signal separation unit but lower than the third level, and less than twice the threshold voltage of the NMOS transistor, Wherein, the light emitting control unit is configured with: a counter that receives the clock signal and counts the number of pulses contained in the clock signal; and a calculation unit, which outputs an R matching signal when the R driving time data matches the pulse number, outputs a G matching signal when the G driving time data matches the pulse number, and outputs a B matching signal when the B driving time data matches the pulse number, Wherein, the light emitting control unit further includes: An R emission latch, which receives the load signal to form a first edge of an R emission signal, and uses the R matching signal to form and output a second edge of the R emission signal; a G emission latch receiving the load signal to form a first edge of a G emission signal, and using the G match signal to form and output a second edge of the G emission signal; and a B emission latch receiving the load signal to form a first edge of a B emission signal, and using the B match signal to form and output a second edge of the B emission signal, The pulse width from the first edge to the second edge of the R emission signal corresponds to the R driving time data, the pulse width from the first edge to the second edge of the G emission signal corresponds to the G driving time data, and the pulse width from the first edge to the second edge of the B emission signal corresponds to the B driving time data. The driving circuit section includes an R driving circuit, a G driving circuit and a B driving circuit for respectively driving the R, G and B LEDs included in the unit pixel, Wherein, the R driving circuit, the G driving circuit and the B driving circuit respectively include: an LED driving switch connected to an electrode of the LED; an emission control switch, which is provided with the emission signal to control the conduction of the LED driving switch; an operational amplifier, which is provided with a driving voltage as an input, and provides the driving voltage copied as another input to the other electrode of the LED driving switch, and the output end is connected to the control electrode of the LED driving switch; and a current limiting resistor, which is connected between the other electrode of the LED driving switch and the ground voltage to limit the current provided to the LED, and when the emission control switch is turned off, the LED driving switch is turned on, wherein the emission control switch connects the output end and an electrode of the operational amplifier, and the ground voltage is connected to the other electrode, the emission signal is provided to the control electrode of the LED driving switch and is turned on according to the emission signal, The data signal is a signal in which the R driving time data, the G driving time data and the B driving time data are connected in series. The data control unit separates the R driving time data, the G driving time data, and the B driving time data, and then separates the data in parallel for each bit and outputs the data.

2. The LED pixel package according to claim 1, It is characterized in that The data control unit includes: a shift register receiving the serially continuous data signal for each bit; and A latch section latches the R driving time data, the G driving time data, and the B driving time data outputted from the shift register.

3. The LED pixel package according to claim 2, It is characterized in that The R driving time data, the G driving time data, and the B driving time data outputted from the shift register are outputted in parallel.

4. The LED pixel package according to claim 1, It is characterized in that The LED pixel packages are connected in an active matrix configuration.

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