A method of laminate packaging

Abstract

The application discloses a laminated packaging method, which comprises the following steps: providing a first substrate, wherein the first substrate comprises a first front surface and a first back surface arranged oppositely; forming a plurality of metal columns on one side of the first front surface, wherein the metal columns are electrically connected with the first substrate; forming a solder layer on the top surface of the metal columns away from the first substrate; wherein the solder layer uniformly covers the top surface of the metal columns away from the first substrate, and the height of the solder layer is within a preset range; forming a first plastic sealing layer on one side of the first front surface of the first substrate, wherein the first plastic sealing layer covers the metal columns, and at least part of the solder layer is exposed from the first plastic sealing layer; arranging a second substrate on the side of the metal columns away from the first substrate, wherein the metal columns are electrically connected with the second substrate through the solder layer; and fixing the second substrate and the metal columns through the solder layer by reflowing. By the above method, the packaging cost can be reduced, and the yield of the packaged device can be improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor packaging technology, and in particular to a stacked packaging method. Background Technology

[0002] PoP (Package on Package) is a method of placing components on top of existing components. The combination of components can be freely selected according to actual needs, facilitating flexible product design and upgrades. Traditional PoP packaging technology involves laser-forming vias on the lower-layer components and forming solder balls within these vias, while solder balls are formed at corresponding positions on the bottom surface of the upper-layer components. A reflow process connects the solder balls of the lower-layer components to those of the upper-layer components, enabling communication between them. However, the laser-forming process on the lower-layer components can easily cause warping and generate residue that affects device stability. Summary of the Invention

[0003] The main technical problem addressed by this application is to provide a stacked packaging method that can reduce packaging costs and improve the yield of packaged devices.

[0004] To solve the above-mentioned technical problems, one technical solution adopted in this application is: providing a stacked packaging method, comprising: providing a first substrate, the first substrate including a first front side and a first back side disposed opposite to each other; forming a plurality of metal pillars on one side of the first front side, the metal pillars being electrically connected to the first substrate; forming a solder layer at least on the top surface of the metal pillars on the side away from the first substrate; wherein the solder layer uniformly covers the top surface of the metal pillars on the side away from the first substrate, and the height of the solder layer is within a preset range; forming a first molding compound on one side of the first front side of the first substrate, the first molding compound covering the metal pillars, at least a portion of the solder layer being exposed from the first molding compound; disposing a second substrate on the side of the metal pillars away from the first substrate, the metal pillars being electrically connected to the second substrate through the solder layer; and using a reflow method to fix the second substrate to the metal pillars through the solder layer.

[0005] The step of forming a solder layer on at least the top surface of the metal pillar on the side away from the first substrate includes: applying solder to the top surface of the metal pillar on the side away from the first substrate, melting the solder into a liquid state using a laser, and solidifying the liquid solder to form the solder layer fixedly connected to the metal pillar.

[0006] The solder layer covers the top surface and side surface of the metal pillar. The step of forming a solder layer on the top surface of the metal pillar on the side away from the first substrate includes: applying solder to the top surface of the metal pillar on the side away from the first substrate; melting the solder using a laser; the partially melted solder flowing from the top surface of the metal pillar to the side surface of the metal pillar along the height direction of the metal pillar; and solidifying the melted solder to form the solder layer.

[0007] The step of using reflow to fix the second substrate to the metal pillar through the solder layer includes: melting at least a portion of the solder layer and fixing the second substrate to the metal pillar through the melted solder; wherein, based on the height of the solder layer being within a preset range, there are gaps between the solder formed after the solder layers on adjacent metal pillars are melted.

[0008] The step of forming a plurality of metal pillars on the first front side includes: forming an insulating layer on the first front side of the first substrate; forming a plurality of openings on the insulating layer by exposure and development; and forming a plurality of metal pillars in the openings by electroplating.

[0009] Prior to the step of forming multiple metal pillars on the first front side, the method includes: providing a first chip, the first chip including a first functional surface and a first non-functional surface disposed opposite to each other, the first functional surface being provided with multiple first pads; forming multiple conductive bumps on the first functional surface, the conductive bumps corresponding one-to-one with the first pads and electrically connected; aligning the first functional surface of the first chip towards the first substrate, the first pads being electrically connected to the first substrate through the conductive bumps; wherein the multiple metal pillars are located on the periphery of the first chip.

[0010] The sum of the heights of the metal pillar and the solder layer is greater than the sum of the heights of the first chip and the conductive bump.

[0011] The step of forming a first molding compound on the first front side of the first substrate includes: forming a first molding compound on the first front side of the first substrate, the first molding compound covering the metal pillar, the solder layer, the side surface of the first chip, and the first non-functional side of the first chip; and grinding the first molding compound away from the first substrate so that at least a portion of the solder layer is exposed from the first molding compound.

[0012] The step of fixing the second substrate to the metal pillar via the solder layer using reflow includes: providing a second chip, the second chip including a second functional surface and a second non-functional surface disposed opposite to each other, the second functional surface being provided with a plurality of second pads; disposing the second chip on the side of the second substrate away from the first substrate, the second pads of the second chip being electrically connected to the second substrate; and forming a second molding compound on the side of the second substrate away from the first substrate, the second molding compound covering the second chip.

[0013] The step of fixing the second substrate to the metal pillar through the solder layer by means of reflow includes: forming a plurality of solder balls on the first back side of the first substrate, wherein the solder balls are electrically connected to the first substrate.

[0014] The beneficial effects of this application are as follows: Unlike existing technologies, the stacked packaging method proposed in this application forms multiple metal pillars on the first front side of the first substrate, and forms a solder layer on at least the top surface of the metal pillars. By setting the height of the solder layer within a preset range, gaps are formed between the solder layers on adjacent metal pillars after melting when the second substrate is connected to the metal pillars using reflow, thus avoiding short circuits. Furthermore, by connecting the first and second substrates through the formation of metal pillars and solder, vias are avoided on the first substrate, reducing process complexity and saving packaging costs. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0016] Figure 1 This is a flowchart illustrating one embodiment of the stacked encapsulation method of this application;

[0017] Figure 2 This is a cross-sectional structural schematic diagram corresponding to an embodiment of step S101;

[0018] Figure 3 This is a cross-sectional structural diagram of an embodiment prior to step S102;

[0019] Figure 4 This is a cross-sectional structural diagram corresponding to one embodiment of step S102;

[0020] Figure 5 This is a cross-sectional structural schematic diagram corresponding to one embodiment of step S103;

[0021] Figure 6 This is a schematic diagram of one embodiment of the laser solder injection device;

[0022] Figure 7 This is a cross-sectional structural schematic diagram corresponding to another embodiment of step S103;

[0023] Figure 8 This is a cross-sectional structural diagram corresponding to one embodiment of step S105;

[0024] Figure 9 This is a cross-sectional structural schematic diagram of an embodiment corresponding to step S106;

[0025] Figure 10 This is a cross-sectional structural schematic diagram of an embodiment following step S106;

[0026] Figure 11 This is a cross-sectional structural diagram of another embodiment following step S106. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0028] Please see Figure 1 , Figure 1 This is a flowchart illustrating one embodiment of the stacked encapsulation method of this application, the method comprising:

[0029] S101: A first substrate is provided, the first substrate including a first front side and a first back side disposed opposite to each other.

[0030] Please see Figure 2 , Figure 2 This is a cross-sectional structural diagram corresponding to one embodiment of step S101. Specifically, the implementation process of step S101 includes: providing a first substrate 100, which includes a first front side 101 and a first back side 102 disposed opposite to each other. The first back side 102 of the first substrate 100 is provided with a plurality of third pads 103, and other devices can be electrically connected to the first substrate 100 through the third pads 103.

[0031] In one implementation, please refer to... Figure 2Step S101 may further include: providing a support plate 500, attaching a peelable layer (not shown) to one side surface of the support plate 500, placing the first back surface 102 of the first substrate 100 towards the support plate 500, and attaching the first substrate 100 to the support plate 500 through the peelable layer. The support plate 500 may be made of silicon, metal, glass, or organic composite materials. The support plate 500 can provide a certain degree of fixation and protection for the first back surface 102 of the first substrate 100.

[0032] S102: A plurality of metal pillars are formed on one side of the first front side, and the metal pillars are electrically connected to the first substrate.

[0033] Please see Figure 3 , Figure 3 This is a cross-sectional structural diagram corresponding to an embodiment prior to step S102. Specifically, prior to step S102 includes: Figure 3 As shown in Figure a, a first chip 200 is provided. The first chip 200 includes a first functional surface 201 and a first non-functional surface 202 disposed opposite to each other. A plurality of first pads 203 are disposed on the first functional surface 201. The first chip 200 communicates with other devices through the plurality of first pads 203. A plurality of conductive bumps 205 are formed on the first functional surface 201, and the conductive bumps 205 correspond one-to-one with and are electrically connected to the first pads 203. The conductive bumps 205 can be made of at least one of copper, gold, silver, nickel, etc.

[0034] Further, please refer to Figure 3 In Figure b, the first functional surface 201 of the first chip 200 faces the first substrate 100, and the first pad 203 of the first chip 200 is electrically connected to the first substrate 100 through conductive bumps 205.

[0035] In this embodiment, after the first chip 200 is electrically connected to the first substrate 100, an underfill 210 is formed between the first substrate 100 and the first chip 200. The underfill 210 at least covers the conductive bumps 205 and the first functional surface 201 of the first chip 200, so as to play a certain role in fixing and protecting the conductive bumps 205 and the first functional surface 201 of the first chip 200.

[0036] Please see Figure 4 , Figure 4 This is a cross-sectional structural diagram corresponding to one embodiment of step S102. Specifically, the implementation process of step S102 includes: Figure 4As shown in Figure a, an insulating layer 110 is formed on the first front side 101 of the first substrate 100. The insulating layer 110 can be made of photoresist. Further, multiple openings 13 are formed on the insulating layer 110 using an exposure and development method. These openings 13 are located on the periphery of the first chip 200 and can be cylindrical or prismatic. Specifically, a film is placed on the surface of the insulating layer 110 away from the first substrate 100. Multiple through-holes are formed on this film at positions corresponding to the metal pillars 10. By irradiating the side of the film away from the first substrate 100, the insulating layer 110 at the positions of the multiple through-holes is removed, forming the multiple openings 13. Optionally, in other embodiments, the insulating layer 110 can also be made of silicon dioxide or polyimide, and the multiple openings 13 can be formed by etching or other methods.

[0037] Furthermore, such as Figure 4 As shown in Figure b, multiple metal pillars 10 are formed within the opening 13 by electroplating, and the insulating layer 110 is removed. The formed multiple metal pillars 10 are located on the periphery of the first chip 200. The metal pillars 10 can be any type of cylinder or prism, and their material can be at least one of titanium, copper, gold, silver, etc. In this embodiment, forming the insulating layer 110 helps prevent some conductive metal from sputtering onto the first substrate 100 during the formation of the metal pillars 10, thus preventing any impact on the functionality of the first substrate 100.

[0038] In another embodiment, please refer to [link / reference needed]. Figure 4 As shown in Figure b, step S102 can also include: after the first chip 200 is disposed on one side of the first front surface 101 of the first substrate 100, conductive adhesive (not shown) is coated on the first front surface 101 of the first substrate 100. The conductive adhesive's projection on the first substrate 100 is located outside the projection of the first chip 200 on the first substrate 100; the conductive adhesive can be silver paste, etc. Further, a plurality of fabricated metal pillars 10 are disposed on one side of the first front surface 101 of the first substrate 100, and the metal pillars 10 are electrically connected to the first substrate 100 via the conductive adhesive. Additionally, after electrically connecting the metal pillars 10 to the first substrate 100 via the conductive adhesive, a reflow process can be used to improve the connection stability between the metal pillars 10 and the first substrate 100. This embodiment utilizes conductive adhesive to electrically connect the fabricated metal pillars 10 to the first substrate 100, avoiding the fabrication of metal pillars 10 on the first substrate 100 and reducing the process difficulty.

[0039] Alternatively, in other embodiments, a plurality of metal pillars 10 may be formed first on the first front side 101 of the first substrate 100, and then the first chip 200 may be formed within the area enclosed by the plurality of metal pillars 10. The specific formation process of the metal pillars 10 can be referred to the embodiments described above.

[0040] It should be noted that, Figure 4 The central metal pillar 10 includes a plurality of first metal pillars 11 located around the first chip 200 and second metal pillars 12 located around the plurality of first metal pillars 11. However, in other embodiments, only a plurality of first metal pillars 11 or a plurality of second metal pillars 12 may be provided, or a plurality of third metal pillars (not shown) may be provided around the second metal pillars 12. Optionally, in other embodiments, the plurality of first metal pillars 11 or the plurality of second metal pillars 12 may also be connected to each other to form a ring structure, that is, in this case, the plurality of first metal pillars 11 or the plurality of second metal pillars 12 are equivalent to a ring or other ring structure surrounding the side periphery of the first chip 200.

[0041] S103: A solder layer is formed on at least the top surface of the metal pillar on the side away from the first substrate. The solder layer uniformly covers the top surface of the metal pillar on the side away from the first substrate, and the height of the solder layer is within a preset range.

[0042] Please see Figure 5 , Figure 5 This is a cross-sectional view of step S103 corresponding to one embodiment. Specifically, solder is applied to the top surface of the metal pillar 10 on the side away from the first substrate 100. The solder can be solder paste. Further, the solder at the top of the metal pillar 10 is irradiated with a laser to melt it into a liquid state, resulting in a uniform distribution of the liquid solder at the top of the metal pillar 10. After solidification, the liquid solder is tightly bonded to the metal pillar 10 to form a solder layer 20. The height of the solder layer 20 is within a preset range, meaning the distance from the top surface of the solder layer 20 on the side away from the first substrate 100 to the top surface of the corresponding metal pillar 10 on the side away from the first substrate 100 is greater than a first threshold and less than a second threshold.

[0043] In this embodiment, the first threshold and the second threshold can be estimated by those skilled in the art or derived through multiple experiments. Specifically, the amount of solder applied can be controlled to ensure that the formed solder layer 20 is within a preset range. Forming a solder layer 20 on the metal pillar 10 facilitates the fixed connection of other devices to the metal pillar 10 via the solder layer 20, and avoids the subsequent formation of solder balls on the metal pillar 10 or other devices for connection. Furthermore, during the reflow process, the solder formed by the melting of the solder layer 20 on the metal pillar 10 flows outwards. By setting the height of the solder layer 20 within a preset range, it is possible to avoid the solder layer 20 being too high, which could cause fusion when the solder layers 20 on adjacent metal pillars 10 melt and flow outwards, resulting in a short circuit between adjacent metal pillars 10. It also avoids the solder layer 20 being too low, which could lead to insufficient solder formed during the reflow process, resulting in unstable connections between the metal pillar 10 and other devices.

[0044] For other implementation methods, please refer to [link / reference]. Figure 5 The implementation process of step S103 may further include: injecting liquid solder onto the top surface of the metal pillar 10 on the side away from the first substrate 100, and solidifying the liquid solder to form a solder layer 20. The height of the solder layer 20 is within a preset range. For details, please refer to... Figure 6 , Figure 6 This is a schematic diagram of one embodiment of a laser solder injection device. In this embodiment, liquid solder is injected into the top surface of a metal column 10 using a laser solder injection device 40. The laser solder injection device 40 includes a solder inlet 41, a laser end 43, and a liquid solder outlet 42. The laser end 43 melts the solid solder input from the solder inlet 41 into liquid solder, which then flows out from the solder outlet 42.

[0045] Please see Figure 7 , Figure 7 This is a cross-sectional view of step S103 corresponding to another embodiment. In this embodiment, the solder layer 20 covers the top surface and side surface of the metal pillar 10. Specifically, solder is applied to the top surface of the metal pillar 10 on the side away from the first substrate 100, and the solder is melted using a laser. The partially melted liquid solder flows from the top surface of the metal pillar 10 to the side surface of the metal pillar 10 along the height direction of the metal pillar 10. The melted solder solidifies to form the solder layer 20, which covers the top surface and side surface of the metal pillar 10, as well as part of the first front surface 101 of the first substrate 100. The distance from the top surface of the metal pillar 10 on the side away from the first substrate 100 to the top surface of the solder layer 20 on the side away from the first substrate 100 is within a preset range, that is, the height of the solder layer 20 on the top surface of the metal pillar 10 is within a preset range, so as to facilitate the fixed connection of other devices to the metal pillar 10 through the solder layer 20 on the top surface of the metal pillar 10. Optionally, in other embodiments, it is also possible to use... Figure 6 The laser injection device shown injects liquid solder onto the top surface of the metal pillar 10 on the side away from the first substrate 100. Part of the solder flows from the top surface of the metal pillar 10 to the side surface of the metal pillar 10 along the height direction of the metal pillar 10, and the liquid solder solidifies to form a solder layer 20. The solder layer 20 covers the top surface, side surface and part of the first front surface 101 of the first substrate 100 of the metal pillar 10.

[0046] S104: A first molding compound is formed on one side of the first front side of the first substrate, the first molding compound covering the metal pillar, and at least a portion of the solder layer is exposed from the first molding compound.

[0047] For details, please continue reading Figure 5The implementation process of step S104 includes: forming a first molding compound 30 on one side of the first front surface 101 of the first substrate 100, the first molding compound 30 covering the metal pillar 10, the solder layer 20, the side surface of the first chip 200, and one side of the first non-functional surface 202 of the first chip 200. Further, the side of the first molding compound 30 away from the first substrate 100 is ground so that at least a portion of the solder layer 20 is exposed from the first molding compound 30, and the height of the exposed solder layer 20 is greater than or equal to a first height and less than or equal to a second height. The second height is less than or equal to the second threshold value in step S103. The formation of the first molding compound 30 helps to fix and protect the multiple metal pillars 10. Furthermore, by setting the height of the solder layer 20 exposed from the first molding compound 30 between the first height and the second height, it helps that during the reflow process, the solder layer 20 exposed from the first molding compound 30 can support the connection between other devices and the metal pillars 10, and avoids the solder layer 20 exposed from the first molding compound 30 being too high, which would cause the solder layer 20 on adjacent metal pillars 10 to melt and flow to the surroundings, resulting in fusion and short circuits between adjacent metal pillars 10.

[0048] In another embodiment, please refer to [link / reference needed]. Figure 7 When the solder layer 20 covers the top surface, side surface and part of the first front surface 101 of the first substrate 100 of the metal pillar 10, the first molding compound 30 formed in step S104 covers the solder layer 20 on the side surface of the metal pillar 10 and part of the solder layer 20 on the first front surface 101.

[0049] S105: A second substrate is disposed on the side of the metal pillar away from the first substrate, and the metal pillar is electrically connected to the second substrate through a solder layer.

[0050] Please see Figure 8 , Figure 8 This is a cross-sectional view of an embodiment corresponding to step S105. Specifically, the implementation process of step S104 includes: setting a second substrate 300 on the side of the metal pillar 10 away from the first substrate 100; the metal pillar 10 is electrically connected to the second substrate 300 through a solder layer 20, thereby enabling information interaction between the first substrate 100 and the second substrate 300. Specifically, the second substrate 300 can be attached to the first molding compound 30 to fix the second substrate 300 and facilitate the execution of subsequent steps.

[0051] In another embodiment, a redistribution layer may be formed first on the surface of the second substrate 300 near the first substrate 100, and this redistribution layer may be electrically connected to the second substrate 300. Further, the side of the second substrate 300 with the redistribution layer is oriented towards the first substrate 100, so that the metal pillar 10 is electrically connected to the first substrate 100 through the redistribution layer.

[0052] S106: The second substrate is fixedly connected to the metal pillar through the solder layer by means of reflow.

[0053] Please see Figure 9 , Figure 9 This is a cross-sectional view of step S106 corresponding to one embodiment. Specifically, at least a portion of the solder layer 20 is melted by reflow, and the melted solder fixes the second substrate to the metal pillar 10. Specifically, infrared reflow, vapor phase reflow, or other techniques can be used to melt the portion of the solder layer 20 exposed in the first molding compound 30, thereby electrically connecting the second substrate 300 to the metal pillar 10. Since the height of the solder layer 20 is within a preset range, less solder flows to the surrounding area after melting the solder layer 20 on the metal pillar 10, preventing the solder layers 20 on adjacent metal pillars 10 from forming a connection after the reflow process. That is, after the reflow process, there are gaps between the solder layers 20 on adjacent metal pillars 10, thereby reducing the probability of short circuits between adjacent metal pillars 10. Furthermore, the presence of the solder layer 20 between the second substrate 300 and the first molding compound 30, and the gap between them, facilitates heat dissipation of the second substrate 300, thereby improving the overall performance of the device.

[0054] Furthermore, please combine Figure 9 See Figure 10 , Figure 10 This is a cross-sectional view of an embodiment following step S106. Specifically, after the step of fixing the second substrate 300 to the metal pillar 10 via the solder layer 20 using reflow, a second chip 400 is provided. The second chip 400 includes a second functional surface 401 and a second non-functional surface 402 disposed opposite to each other. A plurality of second pads 403 are provided on the second functional surface 401. The second chip 400 is disposed on the side of the second substrate 300 away from the first substrate 100, and the second pads 403 of the second chip 400 are electrically connected to the second substrate 300. In this embodiment, the second chip 400 is electrically connected to the second substrate 300 via a wire; that is, one end of the wire is electrically connected to the second pad 403 of the second chip 400, and the other end is electrically connected to the second substrate 300.

[0055] For further information, please refer to [link / reference]. Figure 10 A second molding layer 50 is formed on the side of the second substrate 300 away from the first substrate 100. The second molding layer 50 covers the second chip 400 and the aforementioned wires, so as to fix and protect the second chip 400 and the aforementioned wires.

[0056] The stacked packaging method proposed in this application forms a plurality of metal pillars on the first front side of a first substrate, and forms a solder layer on at least the top surface of the metal pillars. By setting the height of the solder layer within a preset range, gaps are formed between the solder layers on adjacent metal pillars after melting when the second substrate is connected to the metal pillars using reflow, thus avoiding short circuits. Furthermore, by forming metal pillars and solder to connect the first and second substrates, vias are avoided on the first substrate, reducing process complexity and saving packaging costs.

[0057] Please combine Figure 10 See Figure 11 , Figure 11 for Figure 1 The diagram shows a cross-sectional view of another embodiment following step S106. Specifically, the peelable layer and support plate 500 are removed, and a plurality of solder balls 60 are formed on the first back surface 102 side of the first substrate 100. The solder balls 60 are electrically connected to the first substrate 100, and each solder ball 60 corresponds one-to-one with a third pad 103 of the first substrate 100. Forming a plurality of solder balls 60 facilitates the placement of other electrical components on the first back surface 102 side of the first substrate 100, and the first substrate 100 interacts with other electrical components through the solder balls 60.

[0058] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A layered packaging method, characterized in that, include: A first substrate is provided, the first substrate including a first front side and a first back side disposed opposite to each other; A plurality of metal pillars are formed on one side of the first front side, and the metal pillars are electrically connected to the first substrate. A solder layer is formed on at least the top surface of the metal pillar on the side away from the first substrate; wherein the solder layer uniformly covers the top surface of the metal pillar on the side away from the first substrate, and the height of the solder layer is within a preset range; A first molding compound is formed on the first front side of the first substrate, the first molding compound covering the metal pillar, and at least a portion of the solder layer is exposed from the first molding compound; A second substrate is disposed on the side of the metal pillar away from the first substrate, and the metal pillar is electrically connected to the second substrate through the solder layer; The second substrate is fixedly connected to the metal pillar through the solder layer by reflow. The solder layer covers the top surface and side surface of the metal pillar. The step of forming a solder layer on at least the top surface of the metal pillar on the side away from the first substrate includes: applying solder to the top surface of the metal pillar on the side away from the first substrate; melting the solder using a laser, with the partially melted solder flowing from the top surface of the metal pillar to the side surface of the metal pillar along the height direction of the metal pillar; and solidifying the melted solder to form the solder layer. The first molding compound covers the solder layer on the side surface of the metal pillar and a portion of the solder layer on the first front surface. The step of using reflow to fix the second substrate to the metal pillar through the solder layer includes: melting at least a portion of the solder layer and fixing the second substrate to the metal pillar through the melted solder; wherein, based on the height of the solder layer being within a preset range, there are gaps between the solder formed after the solder layers on adjacent metal pillars are melted.

2. The method according to claim 1, characterized in that, The step of forming a plurality of metal pillars on one side of the first front side includes: An insulating layer is formed on the first front side of the first substrate; Multiple openings are formed on the insulating layer using an exposure and development process; Multiple metal pillars are formed inside the opening by electroplating.

3. The method according to claim 1, characterized in that, Prior to the step of forming multiple metal pillars on one side of the first front side, the method includes: A first chip is provided, the first chip includes a first functional surface and a first non-functional surface disposed opposite to each other, and a plurality of first pads are disposed on the first functional surface; Multiple conductive bumps are formed on the first functional surface, and the conductive bumps correspond one-to-one with the first pads and are electrically connected. The first functional surface of the first chip faces the first substrate, and the first pad is electrically connected to the first substrate through the conductive bump; wherein, a plurality of the metal pillars are located on the periphery of the first chip.

4. The method according to claim 3, characterized in that, include: The sum of the heights of the metal pillar and the solder layer is greater than the sum of the heights of the first chip and the conductive bump.

5. The method according to claim 3, characterized in that, The step of forming a first molding layer on the first front side of the first substrate includes: A first molding compound is formed on one side of the first front side of the first substrate, and the first molding compound covers the metal pillar, the solder layer, the side of the first chip, and one side of the first non-functional surface of the first chip. The first molding compound is ground away from the first substrate so that at least a portion of the solder layer is exposed from the first molding compound.

6. The method according to claim 1, characterized in that, After the step of fixing the second substrate to the metal pillar through the solder layer using reflow, the method includes: A second chip is provided, the second chip including a second functional surface and a second non-functional surface disposed opposite to each other, and a plurality of second pads are disposed on the second functional surface; The second chip is disposed on the side of the second substrate away from the first substrate, and the second pad of the second chip is electrically connected to the second substrate. A second molding compound is formed on the side of the second substrate away from the first substrate, and the second molding compound covers the second chip.

7. The method according to claim 1, characterized in that, After the step of fixing the second substrate to the metal pillar through the solder layer using reflow, the method includes: A plurality of solder balls are formed on the first back side of the first substrate, and the solder balls are electrically connected to the first substrate.

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