Ferroelectric memory and electronic device

Abstract

A ferroelectric memory (1) and an electronic device, the ferroelectric memory (1) comprising: at least one memory cell (10); the memory cell (10) comprising: an outer electrode (101), a center electrode (102), and a ferroelectric structure (103); the ferroelectric structure (103) comprising: a ferroelectric material, and a through hole (U) penetrating the ferroelectric material in a first direction (F1); the center electrode (102) being a strip structure located in the through hole (U); the outer electrode (101) surrounding part of the ferroelectric structure (103); and an initial polarization direction (T) of the ferroelectric structure (103) being any direction parallel to a first plane, the first plane being a plane perpendicular to the first direction (F1) and passing through the outer electrode (101). The ferroelectric memory (1) sets the outer electrode (101) to surround part of the ferroelectric structure (103), and the center electrode (102) is located in the through hole (U) of the ferroelectric structure (103). During the manufacturing process of the ferroelectric memory (1), as long as the initial polarization direction (T) of the ferroelectric structure (103) is parallel to the first plane, it is not necessary to accurately design and calculate the polarization direction and micro-nano processing direction of the ferroelectric material, and the requirement for processing precision is lower, and the difficulty of manufacturing process is smaller.

Description

Technical Field

[0001] This application relates to the field of data storage technology, and in particular to a ferroelectric memory and electronic device. Background Technology

[0002] With the continuous development of information technology, from the transmission of simple digital sequences to today's big data era, we cannot do without the storage of massive amounts of data, and we cannot do without the rapidly developing data storage devices.

[0003] Ferroelectric random access memory (FRAM) stores data based on the ferroelectric effect of ferroelectric materials. Ferroelectric materials are substances that can spontaneously polarize within a certain temperature range. Because the positive and negative centers in the lattice of ferroelectric materials do not coincide, each unit cell has an electric dipole moment. The periodic arrangement of unit cells constitutes the initial polarization direction of the ferroelectric material. The polarization direction and polarization intensity of ferroelectric materials can be adjusted by an external electric field. Specifically, when the initial polarization direction of a ferroelectric material is reversed, there are domain walls between the reversed and unreversed regions. When the polarization directions of the reversed and unreversed regions are opposite, the domain walls open, resulting in a conductive state (low-resistance state). When the polarization directions of the reversed and unreversed regions are the same, the domain walls close, resulting in an insulating state (high-resistance state). The high-resistance and low-resistance states represent the stored "0" and "1" states, respectively, to achieve the data storage function.

[0004] However, the initial polarization direction of ferroelectric materials needs to be set parallel to the electric field direction. This makes it difficult to accurately design and calculate the polarization direction of ferroelectric materials and the direction of micro-nano processing during the fabrication of ferroelectric memory. Summary of the Invention

[0005] This application provides a ferroelectric memory and electronic device to reduce the difficulty of manufacturing ferroelectric memory.

[0006] In a first aspect, this application provides a ferroelectric memory, which includes at least one storage cell, wherein the storage cell includes: an outer electrode, a central electrode, and a ferroelectric structure; the ferroelectric structure includes: a ferroelectric material, and a through hole penetrating the ferroelectric material in a first direction; the central electrode is a strip-shaped structure located within the through hole; the outer electrode surrounds a portion of the ferroelectric structure; the initial polarization direction of the ferroelectric structure is any direction parallel to a first plane, and the first plane is a plane perpendicular to the first direction and passing through the outer electrode.

[0007] In this embodiment, by setting the outer electrode to surround a portion of the ferroelectric structure and the central electrode located within the through-hole of the ferroelectric structure, the direction of the electric field formed by the outer and central electrodes is generally divergent, resulting in multiple angles between the electric field direction and the polarization direction of the ferroelectric material. The initial polarization direction of the ferroelectric structure is parallel to any direction of the first plane. Thus, in the electric field formed by the outer and central electrodes, there must be an electric field direction (or a component of the electric field direction) opposite to the initial polarization direction of the ferroelectric structure. Therefore, as long as a sufficiently large voltage is applied to the outer and central electrodes, the resulting electric field can reverse the polarization of the ferroelectric material in the ferroelectric structure. Thus, in the fabrication of the ferroelectric memory, it is only necessary to ensure that the initial polarization direction of the ferroelectric structure is parallel to the first plane; precise design and calculation of the polarization direction of the ferroelectric material and the micro / nano fabrication direction are not required. This reduces the requirements for processing precision, lowers the difficulty of the fabrication process, and makes it easier to fabricate memory cells with good miniaturization.

[0008] In one possible implementation, the materials of the outer electrode and the central electrode can be the same or different. Optionally, the materials of the outer electrode or the central electrode may include: titanium nitride, tungsten, nickel, platinum, titanium, tungsten nitride, ruthenium, ruthenium oxide, iridium, iridium oxide, tantalum nitride, cobalt, aluminum, copper, polycrystalline silicon, or compounds of silicon and metal. Of course, other materials suitable as electrodes may also be used for the outer electrode or the central electrode, which is not limited here. In addition, the aforementioned ferroelectric materials may include: lithium niobate, blackened lithium niobate, doped lithium niobate, lithium tantalate, blackened lithium tantalate, doped lithium tantalate, bismuth ferrite, barium titanate, barium strontium titanate, or strontium titanate. Ferroelectric materials may also be other materials with ferroelectric properties, which is not limited here.

[0009] In one possible implementation, the outer electrode has two endpoints at the edge of the first plane, namely the first endpoint and the second endpoint; the angle between the geometric center of the central electrode and the lines connecting the first endpoint and the second endpoint, respectively, towards the outer electrode is less than or equal to 180°. This avoids the phenomenon of electric field components canceling each other out.

[0010] In one possible implementation, the memory cell may further include a switch control layer located between the outer electrode and the ferroelectric structure. The switch control layer covers the surface of the outer electrode facing the ferroelectric structure, preventing direct contact between the outer electrode and the ferroelectric structure. In a specific implementation, the switch control layer is turned on when the voltage applied to it exceeds a conduction threshold, and turned off when the voltage applied to it is less than the conduction threshold. This allows selection of which memory cells in the ferroelectric memory to be read from or written to, improving the flexibility of the ferroelectric memory. The switch control layer may include: a titanium oxide thin film, a composite thin film of copper oxide and indium zinc oxide, a hafnium oxide thin film, a doped hafnium oxide thin film, a doped nickel oxide thin film, a composite thin film of tungsten oxide and zinc oxide, or a composite thin film of tantalum nitride, silicon nitride, and tantalum nitride.

[0011] In one possible implementation, the memory cell may further include a switch control layer located between the outer electrode and the ferroelectric structure. The switch control layer covers the surface of the outer electrode facing the ferroelectric structure, preventing direct contact between the outer electrode and the ferroelectric structure. In a specific implementation, the switch control layer is turned on when the voltage applied to it exceeds a conduction threshold, and turned off when the voltage applied to it is less than the conduction threshold. This allows selection of which memory cells in the ferroelectric memory to be read from or written to, improving the flexibility of the ferroelectric memory. In the ferroelectric structure, multiple metal particles are distributed within a predetermined depth from the surface of the ferroelectric structure facing the outer electrode, and the portion of the ferroelectric structure containing these metal particles serves as the switch control layer. Optionally, the material of the metal particles may include titanium, chromium, iridium, or platinum; other metal materials may also be used, without limitation.

[0012] In one possible implementation, the memory cell may further include a switch control layer located between the ferroelectric structure and the central electrode; the switch control layer covers the side of the central electrode, preventing direct contact between the central electrode and the ferroelectric structure. In a specific implementation, the switch control layer is turned on when the voltage applied to it exceeds a conduction threshold, and turned off when the voltage applied to it is less than the conduction threshold. This allows selection of which memory cells in the ferroelectric memory to be read from or written to, improving the flexibility of the ferroelectric memory. The switch control layer may include: a titanium oxide thin film, a composite thin film of copper oxide and indium zinc oxide, a hafnium oxide thin film, a doped hafnium oxide thin film, a doped nickel oxide thin film, a composite thin film of tungsten oxide and zinc oxide, or a composite thin film of tantalum nitride, silicon nitride, and tantalum nitride.

[0013] In one possible implementation, the memory cell may further include a switch control layer located between the ferroelectric structure and the central electrode; the switch control layer covers the side of the central electrode, preventing direct contact between the central electrode and the ferroelectric structure. In a specific implementation, the switch control layer is turned on when the voltage applied to it exceeds a conduction threshold, and turned off when the voltage applied to it is less than the conduction threshold. This allows selection of which memory cells in the ferroelectric memory to be read from or written to, improving the flexibility of the ferroelectric memory. In the ferroelectric structure, multiple metal particles are distributed within a predetermined depth from the surface of the ferroelectric structure facing the central electrode, and the portion of the ferroelectric structure containing these metal particles serves as the switch control layer. Optionally, the material of the metal particles may include titanium, chromium, iridium, or platinum; other metal materials may also be used, without limitation.

[0014] In one possible implementation, the ferroelectric memory includes at least one memory string; the memory string includes multiple memory cells arranged in a first direction; the multiple memory cells in the memory string share a central electrode and a ferroelectric structure. By sharing the central electrode and the ferroelectric structure, the fabrication process of the memory string can be simplified, saving manufacturing costs. The memory string may also include multiple insulating layers; the multiple insulating layers and multiple outer electrodes in the memory string are alternately arranged in the first direction, and both the multiple insulating layers and the multiple outer electrodes partially surround the ferroelectric structure. In this way, the outer electrodes in different memory cells can be insulated from each other, thereby allowing different memory cells to be controlled to perform data read and write operations separately. The material of the insulating layers may include: silicon dioxide, silicon nitride, titanium dioxide, hafnium dioxide, aluminum nitride, or aluminum oxide.

[0015] In one possible implementation, within a memory string, one end of the center electrode is located outside the first outer electrode, and the other end is located outside the last outer electrode. This ensures that a center electrode is present at the corresponding position of each outer electrode, resulting in a stronger electric field component in the first plane formed by the center and outer electrodes, thus improving the electrical performance of the memory string.

[0016] In one possible implementation, the ferroelectric memory may further include multiple memory strings arranged in a second direction and a third direction; the second direction is perpendicular to the first direction, the third direction is perpendicular to the first direction, and the second direction is perpendicular to the third direction. This allows the ferroelectric memory to form a three-dimensional structure, resulting in a more compact structure, higher memory cell density, and consequently, a larger capacity. Multiple memory strings in the ferroelectric memory share a single ferroelectric structure. This makes the ferroelectric memory structure more compact and simplifies its fabrication process, reducing raw material and manufacturing costs.

[0017] In one possible implementation, the ferroelectric memory may further include: multiple lead-out electrodes; in a row of memory strings arranged in a second direction, the i-th outer electrode in each memory string is connected to the lead-out electrodes; where i takes any positive integer from 1 to N, and N is the number of memory cells in the memory string; at the edge of the row of memory strings arranged in the second direction, multiple insulating layers and multiple outer electrodes are stacked in a stepped manner to expose each lead-out electrode. In practical use, voltage can be applied to the outer electrodes in the row of memory cells arranged in the second direction through the lead-out electrodes, and voltage can be applied to the center electrode in the row of memory cells arranged in the first direction through the center electrode. Therefore, in this application, the read and write operations of each memory cell can be controlled separately through each lead-out electrode and each center electrode.

[0018] In one possible implementation, the minimum distance between the center electrode and the outer electrode belonging to the same memory cell is a first distance; the spacing between two adjacent rows of memory strings on the third upward direction is a second distance; the first distance is less than the second distance. For example, the first distance can be set to be less than half of the second distance, which can prevent crosstalk between electric fields of adjacent memory cells and improve the electrical performance of ferroelectric memory.

[0019] Secondly, this application also provides an electronic device, which may include: any of the aforementioned ferroelectric memories, and a memory controller; the memory controller is used to control the reading and writing of the ferroelectric memory. Optionally, the memory controller can apply voltages to the outer electrodes and the center electrode in the ferroelectric memory to control the ferroelectric memory to perform read and write operations. The electronic device in this application may be a processor, a computer, or a server, etc. Attached Figure Description

[0020] Figure 1a This is a schematic diagram of the structure of a ferroelectric memory applied to an electronic device according to an embodiment of the present disclosure;

[0021] Figure 1b This is a three-dimensional structural diagram of the storage unit in an embodiment of this application;

[0022] Figure 1c for Figure 1b A cross-sectional diagram of the plane containing the dashed box W;

[0023] Figure 1d for Figure 1b A schematic diagram of another cross-section of the plane containing the dashed box W;

[0024] Figure 2a This is another three-dimensional structural diagram of the storage unit in the embodiments of this application;

[0025] Figure 2b for Figure 2a A cross-sectional diagram of the plane containing the dashed box W;

[0026] Figure 2c for Figure 2a A schematic diagram of another cross-section of the plane containing the dashed box W;

[0027] Figure 3a This is another three-dimensional structural diagram of the storage unit in the embodiments of this application;

[0028] Figure 3b for Figure 3a A cross-sectional diagram of the plane containing the dashed box W;

[0029] Figure 3c for Figure 3a A schematic diagram of another cross-section of the plane containing the dashed box W;

[0030] Figure 3d This is a schematic diagram of the cross-section of the storage cell in the first plane when the included angle α is greater than 180°;

[0031] Figure 4a and Figure 4b This is a schematic diagram illustrating the working principle of the storage unit in the embodiments of this application;

[0032] Figure 5a for Figure 1b A schematic diagram of another cross-section of the plane containing the dashed box W;

[0033] Figure 5b for Figure 2a A schematic diagram of another cross-section of the plane containing the dashed box W;

[0034] Figure 5c for Figure 3a A schematic diagram of another cross-section of the plane containing the dashed box W;

[0035] Figure 5d for Figure 5a A schematic diagram of the cross-section at the dashed line MM';

[0036] Figure 6a for Figure 1b A schematic diagram of another cross-section of the plane containing the dashed box W;

[0037] Figure 6b for Figure 2a A schematic diagram of another cross-section of the plane containing the dashed box W;

[0038] Figure 6c for Figure 3a A schematic diagram of another cross-section of the plane containing the dashed box W;

[0039] Figure 6d for Figure 6a A schematic diagram of the cross-section at the dashed line KK';

[0040] Figure 7 This is a schematic diagram of the three-dimensional structure of the storage string in an embodiment of this application;

[0041] Figure 8 for Figure 7 A schematic diagram of the cross-section at the dashed line NN';

[0042] Figure 9 This is a three-dimensional structural diagram of the ferroelectric memory in an embodiment of this application;

[0043] Figure 10 for Figure 9 A top view of the ferroelectric memory shown;

[0044] Figure 11 for Figure 9 A schematic diagram of the cross-section of the dashed line RR';

[0045] Figure 12 for Figure 9 A cross-sectional diagram of the dashed line QQ';

[0046] Figure 13 This is another top view of the ferroelectric memory in the embodiments of this application;

[0047] Figure 14 This is another top view of the ferroelectric memory in the embodiments of this application;

[0048] Figure 15 This is another top view of the ferroelectric memory in the embodiments of this application;

[0049] Figure 16 This is another top view of the ferroelectric memory in an embodiment of this application.

[0050] Figure label:

[0051] 1-Ferroelectric memory; 10-Memory cell; 101-Outer electrode; 102-Center electrode; 103-Ferroelectric structure; 104-Switch control layer; 105-Insulating layer; 106-Lead electrode; 20-Memory string; 11-Interface; 2-Memory controller; U-Through hole; A1-First endpoint; A2-Second endpoint; C-Geometric center; T-Initial polarization direction; E-Electric field direction; P-Metal particle; V-Strip groove; F1-First direction; F2-Second direction; F3-Third direction. Detailed Implementation

[0052] Ferroelectric memories can be applied to various data storage fields. For example, they can be used in the memory of electronic devices such as processors, computers, or servers. The processor can be a central processing unit, an artificial intelligence processor, a digital signal processor, or a neural network processor. Of course, the ferroelectric memory in the embodiments of this application can also be applied to other electronic devices, which is not limited here.

[0053] To make the objectives, technical solutions, and advantages of this application clearer, the application will now be described in further detail with reference to the accompanying drawings.

[0054] It should be noted that in this specification, similar reference numerals and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0055] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0056] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0057] Current ferroelectric RAMs (FRAMs) store data based on the ferroelectric effect of ferroelectric materials. However, the initial polarization direction of the ferroelectric material needs to be parallel to the electric field direction. This necessitates precise design and calculation of the polarization direction of the ferroelectric material and the direction of micro / nano fabrication during the fabrication process, resulting in significant manufacturing challenges. To reduce the fabrication difficulty of ferroelectric RAMs... Figure 1a This is a schematic diagram of the structure of a ferroelectric memory provided in an embodiment of this disclosure applied to an electronic device, such as... Figure 1aAs shown, the electronic device includes a ferroelectric memory 1 and a memory controller 2. The memory controller 2 is used to control the reading and writing of the ferroelectric memory 1. The ferroelectric memory 1 may include at least one storage cell 10 and an interface 11. Figure 1a The ferroelectric memory 1 is illustrated by example, which includes three storage units 10 and one interface 11. The number of storage units 10 and interface 11 in the ferroelectric memory 1 is not limited. Figure 1b This is a three-dimensional structural diagram of the storage unit in an embodiment of this application. Figure 1c for Figure 1b A cross-sectional diagram of the plane containing the dashed box W, combined with... Figure 1b and Figure 1c As shown, the storage cell 10 includes: an outer electrode 101, a central electrode 102, and a ferroelectric structure 103; the ferroelectric structure 103 includes: a ferroelectric material, and a through-hole U penetrating the ferroelectric material in a first direction F1; the central electrode 102 is a strip-shaped structure located within the through-hole U; the outer electrode 101 surrounds a portion of the ferroelectric structure 103; the initial polarization direction T of the ferroelectric structure 103 is any direction parallel to the first plane, and the first plane is a plane perpendicular to the first direction F1 and passing through the outer electrode 101, i.e. Figure 1b The plane defined by the direction vectors indicated by arrow F2 and F3, for example, the first plane can be... Figure 1b The plane containing the dashed box W. In practical applications, the initial polarization direction of ferroelectric materials can be directly observed using a high-precision scanning electron microscope (SEM), or the initial polarization direction can be indirectly detected by placing the ferroelectric material in an electric field and observing its response to the electric field. (Continue referring to...) Figure 1b and Figure 1cIn this embodiment, the outer electrode 101 surrounds a portion of the ferroelectric structure 103, and the central electrode 102 is located within the through-hole U of the ferroelectric structure 103. Therefore, the direction of the electric field formed by the outer electrode 101 and the central electrode 102 is generally divergent; that is, the electric field direction is either the central electrode 102 pointing towards the outer electrode 101 in multiple directions, or the outer electrode 101 pointing towards the central electrode 102 in multiple directions, resulting in multiple angles between the electric field direction and the polarization direction of the ferroelectric material. The initial polarization direction T of the ferroelectric structure 103 is any direction parallel to the first plane. Thus, in the electric field formed by the outer electrode 101 and the central electrode 102, there must be an electric field direction (or a component of the electric field direction) opposite to the initial polarization direction T of the ferroelectric structure 103. Therefore, as long as a sufficiently large voltage is applied to the outer electrode 101 and the central electrode 102, the resulting electric field can reverse the polarization of the ferroelectric material in the ferroelectric structure 103. Thus, in the fabrication process of ferroelectric memory, it is only necessary to make the initial polarization direction T of the ferroelectric structure 103 parallel to the first plane. There is no need to precisely design and calculate the polarization direction of the ferroelectric material and the micro-nano processing direction. The requirements for processing accuracy are low, the fabrication process is less difficult, and it is easier to fabricate memory cells with better miniaturization.

[0058] In this embodiment, the storage cell has a simple structure and can be easily stacked into a compact two-dimensional or three-dimensional ferroelectric memory, thus easily obtaining a ferroelectric memory with a large storage capacity. Data read and write operations are achieved by reversing the polarization direction of the ferroelectric material through an electric field, eliminating the need for current driving and resulting in low power consumption. Furthermore, the polarization direction reversal speed of the ferroelectric material under the control of the electric field is relatively fast, leading to a faster read and write speed for the ferroelectric memory. In addition, parallel random access memory can be used, resulting in a higher transmission bandwidth for the ferroelectric memory.

[0059] Optionally, in this application, such as Figure 1b As shown, the surface of the outer electrode 101 near the central electrode 102 is a curved surface with a certain curvature. The ferroelectric structure 103 is in contact with the curved surface of the outer electrode 101. The central electrode 102 is located inside the through hole U, and the central electrode 102 is in contact with the ferroelectric structure 103. The outer electrode 101 can be a polyhedral structure of various shapes, such as... Figure 1b and Figure 1c As shown, the outer electrode 101 can be a U-shaped polyhedral structure. Figure 2a This is another three-dimensional structural diagram of the storage unit in an embodiment of this application. Figure 2b for Figure 2a A cross-sectional diagram of the plane containing the dashed box W, as shown below. Figure 2a and Figure 2b As shown, the outer electrode 101 can also be a triangular polyhedral structure. Figure 3aThis is another three-dimensional structural diagram of the storage unit in an embodiment of this application. Figure 3b for Figure 3a A cross-sectional diagram of the plane containing the dashed box W, as shown below. Figure 3a and Figure 3b As shown, the outer electrode 101 can also be a semi-circular polyhedral structure. Furthermore, the outer electrode 101 can also have other shapes, as long as it can surround part of the ferroelectric structure 103; the shape of the outer electrode 101 is not limited here. In addition, the cross-section of the central electrode 102 can also have various shapes, for example, Figure 1b The central electrode 102 has a square cross-sectional shape. For example, Figure 2a The cross-sectional shape of the central electrode 102 is rhomboid. For example, Figure 3a The cross-sectional shape of the central electrode 102 is circular, but the cross-section of the central electrode 102 can also be other shapes, which are not limited here.

[0060] In this embodiment, the initial polarization direction of the ferroelectric structure is any direction parallel to the first plane, for example... Figure 1c , Figure 2b and Figure 3b In the figure, the initial polarization direction T of the ferroelectric structure 103 is the direction indicated by arrow F3. Figure 1d for Figure 1b A schematic diagram of another cross-section of the plane containing the dashed box W. Figure 2c for Figure 2a A schematic diagram of another cross-section of the plane containing the dashed box W. Figure 3c for Figure 3a A schematic diagram of another section of the plane containing the dashed box W, for example. Figure 1d , Figure 2c and Figure 3c In the diagram, the initial polarization direction T of the ferroelectric structure 103 is the direction between arrows F2 and F3. Of course, the initial polarization direction T of the ferroelectric structure 103 can also be other directions parallel to the first plane, which is not limited here.

[0061] Figure 4a and Figure 4b This is a schematic diagram illustrating the working principle of the storage unit in an embodiment of this application, and... Figure 4a and Figure 4b The diagram uses an example where the outer electrode 101 is semi-circular. The following uses... Figure 4a and Figure 4b The working principle will be explained in detail using the storage unit shown as an example. Figure 4aAs shown, the initial polarization direction T of the ferroelectric structure 103 points to the right. When a reverse electric field is applied to the outer electrode 101 and the central electrode 102, that is, a high potential voltage is applied to the central electrode 102 and a low potential voltage is applied to the outer electrode 101, the electric field direction E in the ferroelectric material can be multiple directions pointing from the central electrode 102 to the outer electrode 101. At the center of the outer electrode 101, the electric field direction E is opposite to the initial polarization direction T. If the electric field strength is greater than the critical reversal electric field of the ferroelectric material, the polarization of the ferroelectric material at that position will reverse, causing new domains to nucleate, and the polarization direction of the ferroelectric material will be reversed, resulting in the polarization direction shown in the figure. Figure 4a As indicated by the middle arrow T', reverse domains are formed between the outer electrode 101 and the center electrode 102 at this location. Figure 4a The region between dashed lines L1 and L2 is where the reverse domain is located. Subsequently, this reverse domain expands laterally, that is, along arrow F2 and in the opposite direction of arrow F2, forming... Figure 4b The reverse domain is located between the dashed lines L1 and L2. Since the electric field is distributed radially, there is a certain angle θ between the electric field direction E and the domain wall (as shown by the dashed line L1 in the figure). This can increase the read current and result in a lower read voltage, thereby reducing the power consumption of the ferroelectric memory.

[0062] In some embodiments of this application, the materials of the outer electrode and the central electrode can be the same or different. Optionally, the materials of the outer electrode or the central electrode may include: titanium nitride (TiN), tungsten (W), nickel (Ni), platinum (Pt), titanium (Ti), tungsten nitride (WN), ruthenium (Ru), ruthenium oxide (RuOx), iridium (Ir), iridium oxide (IrOx), tantalum nitride (TaN), cobalt (Co), aluminum (Al), copper (Cu), polycrystalline silicon (Si), or compounds of silicon and metals. Of course, other materials that can be used as electrodes may also be used for the outer electrode or the central electrode, which is not limited here. In addition, the above-mentioned ferroelectric materials may include: lithium niobate, blackened lithium niobate, doped lithium niobate, lithium tantalate, blackened lithium tantalate, doped lithium tantalate, bismuth ferrite, barium titanate, barium strontium titanate, or strontium titanate. Ferroelectric materials may also be other materials with ferroelectric properties, which is not limited here. Furthermore, the ferroelectric material can be a thin-film ferroelectric material or a bulk ferroelectric material (such as a ferroelectric wafer), and the morphology of the ferroelectric material is not limited here.

[0063] like Figure 3b As shown, in the ferroelectric memory provided in this embodiment, the outer electrode 101 has two endpoints on the edge of the first plane, namely the first endpoint A1 and the second endpoint A2; the angle α between the geometric center C of the center electrode 102 and the lines connecting the first endpoint A1 and the second endpoint A2 toward the outer electrode 101 is less than or equal to 180°. Figure 3dThis is a cross-sectional diagram of the storage cell on the first plane when the included angle α is greater than 180°, and also refers to... Figure 3d In ferroelectric materials, the electric field direction E can be multiple directions from the central electrode 102 to the outer electrode 101. If the angle α between the geometric center C of the central electrode 102 and the line connecting the first endpoint A1 and the second endpoint A2 is greater than 180°, electric field components with opposite directions will appear, resulting in the phenomenon of mutual cancellation of electric field components, which weakens the electric field strength in a certain direction.

[0064] In some embodiments of this application, a switch control layer may also be provided in the storage unit. The following describes in detail several implementation methods of the switch control layer with reference to the accompanying drawings.

[0065] Method 1:

[0066] Figure 5a for Figure 1b A schematic diagram of another cross-section of the plane containing the dashed box W. Figure 5b for Figure 2a A schematic diagram of another cross-section of the plane containing the dashed box W. Figure 5c for Figure 3a A schematic diagram of another section of the plane containing the dashed box W, as shown below. Figures 5a to 5c As shown, the storage unit may further include a switch control layer 104 located between the outer electrode 101 and the ferroelectric structure 103. The switch control layer 104 covers the surface of the outer electrode 101 facing the ferroelectric structure 103, preventing direct contact between the outer electrode 101 and the ferroelectric structure 103. In a specific implementation, when the voltage applied to the switch control layer 104 is greater than the conduction threshold, the switch control layer 104 is turned on. Then, data reading operations can be performed by applying voltage to the outer electrode 101 and the center electrode 102. When the voltage applied to the switch control layer 104 is less than the conduction threshold, the switch control layer 104 is turned off. At this time, even if voltage is applied to the outer electrode 101 and the center electrode 102, data reading operations cannot be performed. Therefore, it is possible to select which storage units in the ferroelectric memory to perform read and write operations, improving the flexibility of the ferroelectric memory.

[0067] In actual manufacturing processes, a switching control layer can be deposited on the sidewalls of the ferroelectric structure using thin-film deposition. Optionally, the switching control layer may include titanium oxide (TiO2). x Thin film, copper oxide (CuO) and indium zinc oxide (InZnO) x Composite thin films of hafnium oxide (HfO) x Thin film, doped hafnium oxide thin film, doped nickel oxide (NiO) x Thin films, composite films of tungsten oxide (WO3) and zinc oxide (ZnO) or tantalum nitride (TaN) and silicon nitride (SiN) xComposite films of tantalum nitride (TaN) and tantalum nitride.

[0068] Method 2:

[0069] like Figures 5a to 5c As shown, the storage unit may further include a switch control layer 104 located between the outer electrode 101 and the ferroelectric structure 103; the switch control layer 104 covers the surface of the outer electrode 101 facing the ferroelectric structure 103. The function of the switch control layer in Method 2 is the same as that in Method 1, and will not be described again here.

[0070] Figure 5d for Figure 5a A schematic diagram of the cross-section at the dashed line MM', as shown below. Figure 5d As shown, in the ferroelectric structure 103, multiple metal particles P are distributed within a predetermined depth from the surface of the ferroelectric structure 103 facing the outer electrode 101. The portion of the ferroelectric structure 103 with the multiple metal particles P serves as a switch control layer 104. In actual manufacturing processes, the metal particles P can be diffused into the predetermined depth of the surface of the ferroelectric structure 103 using element diffusion. Optionally, the material of the metal particles P may include titanium (Ti), chromium (Cr), iridium (Ir), or platinum (Pt). Furthermore, other metallic materials may also be used for the metal particles P; this is not limited here.

[0071] Method 3:

[0072] Figure 6a for Figure 1b A schematic diagram of another cross-section of the plane containing the dashed box W. Figure 6b for Figure 2a A schematic diagram of another cross-section of the plane containing the dashed box W. Figure 6c for Figure 3a A schematic diagram of another section of the plane containing the dashed box W, as shown below. Figures 6a to 6c As shown, the storage unit may further include a switch control layer 104 located between the ferroelectric structure 103 and the central electrode 102; the switch control layer 104 covers the side of the central electrode 102, preventing direct contact between the central electrode 102 and the ferroelectric structure 103. In a specific implementation, when the voltage applied to the switch control layer 104 is greater than the conduction threshold, the switch control layer 104 is turned on. Then, data reading operations can be performed by applying voltage to the outer electrode 101 and the central electrode 102. When the voltage applied to the switch control layer 104 is less than the conduction threshold, the switch control layer 104 is turned off. At this time, even if voltage is applied to the outer electrode 101 and the central electrode 102, data reading operations cannot be performed. Therefore, it is possible to select which storage units in the ferroelectric memory to perform read and write operations, improving the flexibility of the ferroelectric memory.

[0073] In actual manufacturing processes, a switching control layer can be deposited on the sidewalls of the ferroelectric structure using thin-film deposition. Optionally, the switching control layer includes titanium oxide (TiO2). x Thin film, copper oxide (CuO) and indium zinc oxide (InZnO) x Composite thin films of hafnium oxide (HfO) x Thin film, doped hafnium oxide thin film, doped nickel oxide (NiO) x Thin films, composite films of tungsten oxide (WO3) and zinc oxide (ZnO) or tantalum nitride (TaN) and silicon nitride (SiN) x Composite films of tantalum nitride (TaN) and tantalum nitride.

[0074] Method 4:

[0075] like Figures 6a to 6c As shown, the storage unit may further include a switch control layer 104 located between the ferroelectric structure 103 and the central electrode 102; the switch control layer 104 covers the side of the central electrode 102. The function of the switch control layer in Method 4 is the same as that in Method 3, and will not be described again here.

[0076] Figure 6d for Figure 6a A schematic diagram of the cross-section at the dashed line KK', as shown below. Figure 6d As shown, in the ferroelectric structure 103, multiple metal particles P are distributed within a predetermined depth from the surface of the ferroelectric structure 103 facing the central electrode 102. The portion of the ferroelectric structure 103 with the multiple metal particles P serves as a switch control layer 104. In actual manufacturing processes, the metal particles P can be diffused into the predetermined depth of the surface of the ferroelectric structure 103 using element diffusion. Optionally, the material of the metal particles P may include titanium (Ti), chromium (Cr), iridium (Ir), or platinum (Pt). Furthermore, other metallic materials may also be used for the metal particles P; this is not limited here.

[0077] In other embodiments, the ferroelectric memory may include at least one memory string. Figure 7 This is a schematic diagram of the three-dimensional structure of the storage string in an embodiment of this application. Figure 8 for Figure 7 A schematic diagram of the cross-section at the dashed line NN', as shown below. Figure 7 and Figure 8As shown, the storage string 20 may include a plurality of storage cells 10 arranged in the first direction F1; the plurality of storage cells 10 in the storage string 20 share a central electrode 102 and a ferroelectric structure 103. By sharing the central electrode 102 and the ferroelectric structure 103, the manufacturing process of the storage string 20 can be simplified and manufacturing costs can be saved. Specifically, during the manufacturing process, a hole can be drilled along the first direction F1 in a whole piece of ferroelectric material to form a through hole U penetrating the ferroelectric material in the first direction F1, and then a metal material is filled into the through hole U to form the central electrode 102 located in the through hole U. Furthermore, by placing the central electrode 102 in the through hole U of the ferroelectric material, the structure of the storage string 20 can be made more compact.

[0078] Continue to refer to Figure 7 and Figure 8 The storage string 20 may further include multiple insulating isolation layers 105; the multiple insulating isolation layers 105 and multiple outer electrodes 101 in the storage string 20 are alternately arranged in the first direction F1, and the multiple insulating isolation layers 105 and multiple outer electrodes 101 all surround a portion of the ferroelectric structure 103. In this way, the outer electrodes 101 in different storage cells 10 can be insulated from each other, thereby allowing different storage cells 10 to be controlled to perform data read and write operations respectively. The material of the insulating isolation layer 105 may include: silicon dioxide, silicon nitride, titanium dioxide, hafnium dioxide, aluminum nitride, or aluminum oxide. In addition, the insulating isolation layer 105 may also include other insulating materials, which are not limited here.

[0079] Optionally, in the ferroelectric memory provided in the embodiments of this application, reference is made to... Figure 7 and Figure 8 In a memory string 20, one end of the center electrode 102 is located outside the first outer electrode 101, and the other end is located outside the last outer electrode 101. That is, the top surface of the center electrode 102 is higher than the top surface of the first outer electrode 101, and the bottom surface of the center electrode 102 is lower than the bottom surface of the last outer electrode 101. In this way, it can be ensured that there is a center electrode 102 at the corresponding position of each outer electrode 101, so that the electric field component formed by the center electrode 102 and the outer electrode 101 has a larger strength in the first plane, thereby improving the electrical performance of the memory string.

[0080] Figure 9 This is a three-dimensional structural diagram of the ferroelectric memory in an embodiment of this application. Figure 10 for Figure 9 The top view of the ferroelectric memory is shown, as follows: Figure 9 and Figure 10As shown, the ferroelectric memory also includes multiple storage strings 20 arranged in a second direction F2 and a third direction F3. The second direction F2 is perpendicular to the first direction F1, the third direction F3 is perpendicular to the first direction F1, and the second direction F2 is perpendicular to the third direction F3. This allows the ferroelectric memory to form a three-dimensional structure, resulting in a compact structure and a high density of storage cells, thus leading to a large capacity. Furthermore, the multiple storage strings 20 in the ferroelectric memory share a single ferroelectric structure 103. This makes the structure of the ferroelectric memory more compact and simplifies its manufacturing process, reducing raw material and manufacturing costs. Figure 11 for Figure 9 A cross-sectional diagram of the dashed line RR', combined with... Figure 9 and Figure 11 As shown, during the fabrication process, single-layer ferroelectric materials or bulk ferroelectric materials (such as ferroelectric wafers) can be selected for processing. Multiple strip-shaped grooves V can be formed in the ferroelectric material. These grooves V accommodate the outer electrodes 101 and insulating isolation layers 105 of a row of storage strings 20. The shape of the grooves V matches the shape of the outer electrodes 101, so that the outer electrodes 101 subsequently placed within the grooves V partially surround the ferroelectric structure 103. Then, through-holes U penetrating the ferroelectric structure are formed within the area surrounded by the outer electrodes 101. The depth of the through-holes U is greater than the depth of the grooves V. Subsequently, metal material is filled into each through-hole U to form multiple central electrodes 102. The outer electrodes 101 and insulating isolation layers 105 are deposited layer by layer within each groove V. Optionally, etching processes can be used to fabricate the grooves V, through-holes U, outer electrodes 101, and insulating isolation layers 105; other processes are also possible and are not limited here. In the fabrication of three-dimensional ferroelectric memories, multiple memory cells can share process steps, such as etching, thus saving fabrication costs. Furthermore, the fabrication process has a high tolerance for errors; as long as the outer and central electrodes can contact the ferroelectric material, the memory cell can achieve its storage function. This reduces the requirements for fabrication precision, resulting in lower fabrication difficulty and cost.

[0081] Figure 12 for Figure 9 A cross-sectional diagram of the dashed line QQ', combined with... Figure 9 and Figure 12The ferroelectric memory in this embodiment may further include: a plurality of lead-out electrodes 106; in a row of memory strings arranged in the second direction F2, the i-th outer electrode 101 in each memory string is connected to the lead-out electrode 106; where i takes any positive integer from 1 to N, and N is the number of memory cells in the memory string; at the edge of the row of memory strings arranged in the second direction F2, a plurality of insulating isolation layers 105 and a plurality of outer electrodes 101 are stacked in a stepped manner to expose each lead-out electrode 106. For ease of control, the i-th outer electrode 101 of each memory string in a row of memory strings can be connected as a whole, that is, the outer electrodes 101 belonging to the same layer in a row of memory strings can be connected as a whole. Optionally, the i-th outer electrode 101 in each memory string can be connected to one lead-out electrode 106, or one lead-out electrode 106 can be connected to each end. Each lead-out electrode 106 can serve as a word line (WL) of the ferroelectric memory, and each center electrode 102 can serve as a bit line (BL) of the ferroelectric memory. In actual use, voltage can be applied to the outer electrode 101 of a row of memory cells arranged in the second direction F2 through the lead-out electrode 106, and voltage can be applied to the center electrode 102 of a row of memory cells arranged in the first direction F1 through the center electrode 102. Therefore, in this application, the read and write operations of each memory cell can be controlled by each lead-out electrode 106 and each center electrode 102 respectively.

[0082] like Figure 10 As shown in this embodiment, the minimum distance between the center electrode 102 and the outer electrode 101 belonging to the same memory cell is the first distance d1; the spacing between two adjacent rows of memory strings 20 on the third direction F3 is the second distance d2; the first distance d1 is less than the second distance d2. For example, the first distance d1 can be set to be less than half of the second distance d2. In this way, crosstalk between electric fields of adjacent memory cells can be prevented, and the electrical performance of the ferroelectric memory can be improved.

[0083] Figure 13 This is another top view of the ferroelectric memory in an embodiment of this application, as shown below. Figure 13 As shown, the surface of the outer electrode 101 facing away from the center electrode 102 can be set as a plane, as long as the surface of the outer electrode 101 facing the center electrode 102 is a curved surface with a certain curvature. This can reduce the manufacturing difficulty. Figure 14 This is another top view of the ferroelectric memory in an embodiment of this application, as shown below. Figure 14 As shown, the surface of the outer electrode 101 facing away from the center electrode 102 can also be a curved surface. Here, the shape of the surface of the outer electrode 101 facing away from the center electrode 102 is not limited.

[0084] Figure 15 This is another top view of the ferroelectric memory in the embodiments of this application. Figure 16 This is another top view of the ferroelectric memory in an embodiment of this application, as shown below. Figure 15 and Figure 16 As shown, in a row of memory cells arranged in the second direction F2, the shape of the connection position between adjacent outer electrodes 101 can be set according to the actual situation, and can be... Figure 15 The shape shown can also be Figure 16 The shapes shown are not limited here. Furthermore, as... Figure 15 As shown, the central electrode 102 can be located at the center of the corresponding outer electrode 101, or, as... Figure 16 As shown, the center electrode 102 can also be offset from the center position of the corresponding outer electrode 101. The relative position of the outer electrode 101 and the center electrode 102 is not limited here. That is to say, the structure of the ferroelectric memory of this application has a large tolerance for process. For example, if the center electrode 102 is offset from the center position of the corresponding outer electrode 101 due to errors during the manufacturing process, it will not affect the performance of the device.

[0085] Based on the same technical concept, embodiments of this application also provide an electronic device, such as... Figure 1a As shown, it includes: any of the aforementioned ferroelectric memory 1, and a storage controller 2; the storage controller 2 is used to control the reading and writing of the ferroelectric memory 1. Optionally, the storage controller 2 can apply voltage to the outer electrode and the center electrode in the ferroelectric memory 1 to control the ferroelectric memory 1 to perform read and write operations. The electronic device in this application can be a processor, computer, or server, or other electronic devices, which are not limited here.

[0086] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A ferroelectric memory, characterized in that, include: At least one storage unit; The storage unit includes: an outer electrode, a central electrode, and a ferroelectric structure; The ferroelectric structure includes: a ferroelectric material, and a through hole penetrating the ferroelectric material in a first direction; the central electrode is a strip-shaped structure located within the through hole; and the outer electrode surrounds a portion of the ferroelectric structure. The initial polarization direction of the ferroelectric structure is any direction parallel to the first plane, and the first plane is a plane perpendicular to the first direction and passing through the outer electrode; The surface of the ferroelectric structure facing the outer electrode is convex, and the outer electrode surrounds at least a portion of the convex surface.

2. The ferroelectric memory as described in claim 1, characterized in that, The outer electrode has two endpoints at the edge of the first plane, namely the first endpoint and the second endpoint. The angle between the geometric center of the central electrode and the lines connecting the first endpoint and the second endpoint toward the outer electrode is less than or equal to 180°.

3. The ferroelectric memory as described in claim 1, characterized in that, The storage unit further includes a switch control layer located between the outer electrode and the ferroelectric structure; The switch control layer covers the surface of the outer electrode facing the ferroelectric structure. The switch control layer includes: a titanium oxide thin film, a composite thin film of copper oxide and indium zinc oxide, a hafnium oxide thin film, a doped hafnium oxide thin film, a doped nickel oxide thin film, a composite thin film of tungsten oxide and zinc oxide, or a composite thin film of tantalum nitride, silicon nitride, and tantalum nitride.

4. The ferroelectric memory as described in claim 1, characterized in that, The storage unit further includes a switch control layer located between the outer electrode and the ferroelectric structure; The switch control layer covers the surface of the outer electrode facing the ferroelectric structure. In the ferroelectric structure, a plurality of metal particles are distributed within a set depth from the surface of the ferroelectric structure facing the outer electrode, and the portion of the ferroelectric structure having the plurality of metal particles serves as the switch control layer.

5. The ferroelectric memory as described in claim 1, characterized in that, The storage unit further includes a switch control layer located between the ferroelectric structure and the central electrode; The switch control layer covers the side of the central electrode; The switch control layer includes: a titanium oxide thin film, a composite thin film of copper oxide and indium zinc oxide, a hafnium oxide thin film, a doped hafnium oxide thin film, a doped nickel oxide thin film, a composite thin film of tungsten oxide and zinc oxide, or a composite thin film of tantalum nitride, silicon nitride, and tantalum nitride.

6. The ferroelectric memory as described in claim 1, characterized in that, The storage unit further includes a switch control layer located between the ferroelectric structure and the central electrode; The switch control layer covers the side of the central electrode; In the ferroelectric structure, a plurality of metal particles are distributed within a set depth from the surface of the ferroelectric structure facing the central electrode, and the portion of the ferroelectric structure having the plurality of metal particles serves as the switch control layer.

7. The ferroelectric memory as described in any one of claims 1 to 6, characterized in that, The ferroelectric memory includes at least one memory string; The storage string includes a plurality of storage cells arranged in the first direction; the plurality of storage cells in the storage string share a central electrode and a ferroelectric structure; The storage string further includes multiple insulating isolation layers; the multiple insulating isolation layers and multiple outer electrodes in the storage string are arranged alternately in the first direction, and the multiple insulating isolation layers and multiple outer electrodes all surround a portion of the ferroelectric structure.

8. The ferroelectric memory as described in claim 7, characterized in that, In one of the memory strings, one end of the center electrode is located outside the first outer electrode, and the other end is located outside the last outer electrode.

9. The ferroelectric memory as described in claim 7, characterized in that, The ferroelectric memory further includes a plurality of memory strings arranged in a second direction and a third direction; the second direction is perpendicular to the first direction, the third direction is perpendicular to the first direction, and the second direction is perpendicular to the third direction. The multiple memory strings in the ferroelectric memory share a single ferroelectric structure.

10. The ferroelectric memory as described in claim 9, characterized in that, The ferroelectric memory also includes: multiple lead-out electrodes; In a row of storage strings arranged in the second direction, the i-th outer electrode in each storage string is connected to the lead-out electrode; wherein i takes any positive integer from 1 to N, and N is the number of storage cells in the storage string; At the edge of a row of memory strings arranged in the second direction, multiple insulating isolation layers and multiple outer electrodes are stacked in a stepped manner to expose each of the lead-out electrodes.

11. The ferroelectric memory as described in claim 9, characterized in that, The minimum distance between the central electrode and the outer electrode belonging to the same memory cell is the first distance; The spacing between two adjacent rows of storage strings in the third direction is the second distance; The first distance is less than the second distance.

12. An electronic device, characterized in that, include: The ferroelectric memory as described in any one of claims 1 to 11, and the memory controller; The storage controller is used to control the reading and writing of the ferroelectric memory.

Images