A method for realizing digital down-conversion of stepped frequency signals

Abstract

The present invention provides a method for implementing digital down-conversion of a stepped frequency signal, comprising the following steps: receiving a stepped frequency echo signal, wherein each frame of the stepped frequency echo signal includes multiple echo pulses with stepped frequencies, each echo pulse having an equal pulse period; determining the starting frequency of the echo pulses in the frame of the stepped frequency echo signal based on a starting flag of each frame of the stepped frequency echo signal, and obtaining the frequency of each echo pulse in the frame of the stepped frequency echo signal based on the starting frequency, the pulse period, and the frequency step amount; performing AD acquisition on each echo pulse to obtain an AD acquisition signal for each echo pulse; generating a down-conversion mixing coefficient of a corresponding frequency based on the frequency of each echo pulse; and performing mixing processing on the AD acquisition signal of each echo pulse using the down-conversion mixing coefficient to obtain a baseband signal for each echo pulse. The present invention implements digital down-conversion of echo pulses of different frequencies in a stepped frequency radar echo signal, and is of vital importance for digital signal processing of stepped frequency radars.

Description

Technical Field

[0001] The present invention belongs to the technical field of stepped frequency radar, and in particular relates to a method for realizing digital down-conversion of a stepped frequency signal. Background Art

[0002] Asteroid exploration has always been a hot topic in deep space exploration. my country's deep space exploration will achieve the companionship, attachment, sample return and flyby of near-Earth asteroids and main-belt comets, providing scientific exploration data and real samples for cutting-edge scientific research such as the origin and evolution of asteroids.

[0003] The radar aboard the asteroid probe should be capable of acquiring surface and subsurface echo data from asteroids and comets, while also providing data compression capabilities. The radar will survey the internal structure of asteroids during flybys and orbits. The appropriate radar for these missions is a question worth exploring.

[0004] Pulse radar and frequency-modulated continuous wave radar have relatively mature signal source technologies due to their earlier development. However, the frequency source for stepped-frequency continuous wave radar developed relatively late. As early as the late 1960s, American scholars Ruttenburg K and Chanzi L proposed a new technology to improve radar range resolution. This technology used a series of hopping pulse signals to replace the conventional radar frequency source. This was the early prototype of the stepped-frequency signal.

[0005] In recent years, with the increasing application of radar and integrated circuit technology, stepped-frequency technology has made significant progress and is widely used in civilian radar applications such as ground-penetrating radar, wall-penetrating radar, and even in vehicle-mounted radar for intelligent transportation. Its unique characteristic—utilizing a relatively small instantaneous bandwidth while simultaneously synthesizing a larger operating bandwidth through continuous frequency hopping—significantly improves radar resolution while simultaneously reducing the system's noise figure, thereby increasing radar sensitivity. Consequently, the research on stepped-frequency sources and their transceiver systems is gaining increasing attention among researchers both domestically and internationally.

[0006] Stepped-frequency signals, which achieve pulse compression through inverse Fourier transforms, are widely used in wall penetration research. Their advantages include achieving a large system bandwidth using a narrow instantaneous bandwidth, simplifying the receiver structure, and having fewer minimum detection range restrictions than linear frequency modulation signals with large time widths.

[0007] Completing the digital signal processing of stepped-frequency signals is of vital importance for obtaining surface and subsurface echo detection data of asteroids and comets. The first step in digital signal processing of stepped-frequency signals is to digitally down-convert the intermediate-frequency echoes collected by the detection radar. Currently, there is no digital down-conversion processing method for stepped-frequency signals. Summary of the Invention

[0008] The technical problem solved by the present invention is: to overcome the shortcomings of the existing technology and provide a method for realizing digital down-conversion of a stepped frequency signal, which solves the problem that the frequencies of different pulses of the stepped frequency signal are different and it is difficult to generate corresponding digital down-conversion mixing coefficients for each pulse of different frequency to realize stepped frequency digital down-conversion processing.

[0009] The technical solution of the present invention is:

[0010] A method for implementing digital down-conversion of a stepped frequency signal, comprising the following steps:

[0011] (1) receiving a stepped frequency echo signal, wherein each frame of the stepped frequency echo signal includes a plurality of echo pulses with frequencies stepped in sequence, and the pulse periods of the echo pulses are equal;

[0012] (2) determining the starting frequency of the echo pulse in each frame of the stepped frequency echo signal according to the starting mark of the frame of the stepped frequency echo signal, and obtaining the frequency of each echo pulse in the frame of the stepped frequency echo signal according to the starting frequency, the pulse period and the frequency step amount;

[0013] (3) performing AD acquisition on each echo pulse to obtain an AD acquisition signal of each echo pulse;

[0014] (4) generating down-conversion mixing coefficients of corresponding frequencies according to the frequencies of the echo pulses, wherein the down-conversion mixing coefficients include an in-phase mixing coefficient and a quadrature mixing coefficient;

[0015] (5) The AD acquisition signal of each echo pulse is mixed using the down-conversion mixing coefficient to obtain the baseband signal of each echo pulse, including the in-phase baseband signal and the orthogonal baseband signal.

[0016] Preferably, in step (4), the down-conversion mixing coefficient of the corresponding frequency is generated according to the frequency of each echo pulse, specifically:

[0017] (41) generating a phase step amount according to the frequency of each echo pulse and the AD sampling rate;

[0018] (42) In the pulse period of each echo pulse, the phase step amount is accumulated using the AD sampling rate as the clock frequency to obtain the digital phase corresponding to each sampling point of the AD sampling signal;

[0019] (43) Generate corresponding down-conversion mixing coefficients according to the digital phase corresponding to each sampling point.

[0020] Preferably, in step (41), the phase step amount is generated according to the frequency of each echo pulse and the AD sampling rate, specifically:

[0021]

[0022] in, represents the phase step, f c Represents the frequency of the current echo pulse, f s Represents the AD sampling rate.

[0023] Preferably, in step (42), the phase step amount is accumulated using the AD sampling rate as the clock frequency, and when the digital phase is accumulated to 2π, it is accumulated again from 0, and the digital phase is accumulated cyclically in the range of 0 to 2π.

[0024] Preferably, in step (43), the generated down-conversion mixing coefficient is specifically:

[0025]

[0026] Among them, I_xishu(n) represents the in-phase mixing coefficient, Q_xishu(n) represents the orthogonal mixing coefficient, and n represents the number of sampling points.

[0027] Preferably, the step (43) is implemented by a cordic core of an FPGA.

[0028] Preferably, the sampling rate of the AD acquisition is 100 MHz to 150 MHz, and the bit width is 12 bits to 14 bits.

[0029] The advantages of the present invention compared with the prior art are:

[0030] (1) The present invention identifies the stepped frequency echo signal as a plurality of point frequency pulse signals with different frequencies according to the characteristics of the stepped frequency signal, and performs digital down-conversion processing on each point frequency pulse respectively, thereby obtaining high-precision baseband data of the stepped frequency signal digital down-conversion processing;

[0031] (2) The present invention utilizes the cordic core input phase word to generate two-way mixing coefficients in real time, which can effectively improve the real-time performance of the digital down-conversion processing of the stepped frequency signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a flow chart of a method for implementing digital down-conversion of a stepped frequency signal according to the present invention;

[0033] Figure 2 Schematic diagram of the stepped-frequency radar signal processing unit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0034] The following detailed description of the present invention will make the features and advantages of the present invention more clear and explicit.

[0035] According to the characteristics of the step frequency pulse signal, it can be identified as a plurality of point frequency pulse signals with different frequencies, so that the digital down-conversion processing of the step frequency signal can be simplified to the digital down-conversion processing of the point frequency signal. It is only necessary to identify the frequency of the corresponding pulse when each pulse arrives. Based on this consideration, the present invention provides a method for realizing digital down-conversion of a step frequency signal, such as Figure 1 As shown, the following steps are included:

[0036] (1) Generate corresponding frequency control words according to the starting frequency and frequency step amount of different working modes;

[0037] Specifically, based on the fixed radar timing, the starting mark of each frame of radar signal is first designed, and then the starting frequency of each frame is determined by the starting mark of each frame, thereby obtaining the frequency control word corresponding to the starting echo pulse signal of each frame.

[0038] Furthermore, a radar echo signal frame consists of multiple pulse cycles. In a stepped frequency signal, each pulse cycle has the same duration and contains a radar echo. After the multiple echo pulses in one frame end, the next frame of multiple pulses begins again. The start flag of each frame determines the starting frequency control word for each frame. The frequency control word is the actual frequency of the current echo pulse signal.

[0039] (2) The start mark of each echo pulse signal is generated according to the timing of each echo pulse cycle. When the start mark of each echo pulse arrives, the frequency control word of the current echo pulse is calculated by adding the frequency step amount to the current frequency control word.

[0040] (3) Calculating the pulse phase control word corresponding to each step frequency echo pulse signal according to the pulse frequency control word;

[0041] Specifically, the starting phase control word for each echo pulse is generated by dividing the frequency control word of the current pulse by the ADC sampling rate multiplied by 2. The bit width of the phase control word in the FPGA is determined by the bit width of the cordic core input parameter. This phase control word is accumulated during each clock cycle of the receive window until a period of 0 to 2π is met. Subsequent phase control words are cyclically input within a period of 0 to 2π, covering the entire radar receive window. The FPGA uses the same clock frequency as the ADC sampling rate for processing.

[0042] (4) generating down-conversion mixing coefficients corresponding to the corresponding stepped frequency echo pulse signal based on the pulse phase control word; the down-conversion mixing coefficients include an in-phase channel mixing coefficient and a quadrature channel mixing coefficient;

[0043] Specifically, the FPGA uses the cordic core to generate down-conversion mixing coefficients. In order to improve the mixing efficiency, the cordic core simultaneously outputs the mixing coefficients of two orthogonal channels.

[0044] Furthermore, the generated two-way mixing coefficients are:

[0045]

[0046] Among them, I_xishu(n) represents the I branch mixing coefficient, Q_xishu(n) represents the Q branch mixing coefficient, f c Represents the frequency of the current pulse, f s represents the AD sampling rate, and n represents the number of sampling points;

[0047] (5) performing AD acquisition on each step frequency echo pulse signal to obtain an AD acquisition signal;

[0048] Specifically, AD acquisition is performed on the stepped frequency echo signal in the receiving time window of each pulse cycle, and the AD sampling rate is the clock frequency acquired by the AD chip.

[0049] Preferably, the frequency of AD sampling is 100-150 MHz, and the bit width of AD acquisition is 12-14 bits.

[0050] The signal collected by AD is:

[0051]

[0052] f c =f0+n'Δf

[0053]

[0054] τ is the echo pulse width, f0 is the starting frequency, Δf is the frequency step, is the starting phase, t is the number of sampling points, and n' is the number of step points.

[0055] (6) Using the down-conversion mixing coefficient generated in step (4) to mix the corresponding AD acquisition signal, obtain the mixed I and Q baseband data, and complete the digital down-conversion processing;

[0056] Specifically, considering the limitation of FPGA resources, the mixing coefficients can be truncated first, and then the two mixing coefficients output by the cordic core and the AD acquisition echo can be multiplied separately using a multiplier to output the I and Q baseband data after digital down-conversion processing.

[0057] The signal after mixing is:

[0058]

[0059] The composition of stepped frequency radar is as follows: Figure 2As shown, the signal processing and power distribution unit is responsible for controlling power distribution, radar timing control, receiving and transmitting telemetry and remote control signals, generating transmit intermediate frequency signals, data acquisition and processing, and gain control. The transceiver channel generates the reference clock signal, performs frequency conversion and filtering on the transmitted radar signal, and amplifies, filters, and frequency converts the received radar signal. The solid-state amplifier amplifies the power of the radar transmit signal, ultimately outputting a RF signal of a certain power.

[0060] The signal processor controls the DA chip based on the preset radar timing to generate a stepped intermediate frequency signal and output it to the transceiver channel. It also switches the transceiver channel and the fixed amplifier module, and performs AD acquisition on the intermediate frequency echo signal output by the receive channel. After the echo signal undergoes digital down-conversion and low-pass filtering, the processed data is packaged and transmitted downstream. Ground-based processing equipment extracts and pulse compresses the collected data to calculate the radar's detected target altitude.

[0061] The contents not described in detail in the specification of the present invention belong to the common knowledge of those skilled in the art.

Claims

1. A method for implementing digital down-conversion of a stepped frequency signal, characterized in that: The following steps are involved: (1) receiving a stepped frequency echo signal, wherein each frame of the stepped frequency echo signal includes a plurality of echo pulses with frequencies stepped in sequence, and the pulse periods of the echo pulses are equal; (2) determining the starting frequency of the echo pulse in each frame of the stepped frequency echo signal according to the starting mark of the frame of the stepped frequency echo signal, and obtaining the frequency of each echo pulse in the frame of the stepped frequency echo signal according to the starting frequency, the pulse period and the frequency step amount; (3) performing AD acquisition on each echo pulse to obtain an AD acquisition signal of each echo pulse; (4) generating down-conversion mixing coefficients of corresponding frequencies according to the frequencies of the echo pulses, wherein the down-conversion mixing coefficients include an in-phase mixing coefficient and a quadrature mixing coefficient; (5) Using the down-conversion mixing coefficient to perform mixing processing on the AD acquisition signal of each echo pulse to obtain the baseband signal of each echo pulse, including the in-phase baseband signal and the orthogonal baseband signal; In step (4), the down-conversion mixing coefficient of the corresponding frequency is generated according to the frequency of each echo pulse, specifically: (41) generating a phase step amount according to the frequency of each echo pulse and the AD sampling rate; (42) In the pulse period of each echo pulse, the phase step amount is accumulated using the AD sampling rate as the clock frequency to obtain the digital phase corresponding to each sampling point of the AD sampling signal; (43) Generate corresponding down-conversion mixing coefficients according to the digital phase corresponding to each sampling point.

2. The method for realizing digital down-conversion of a stepped frequency signal according to claim 1, wherein: In step (41), the phase step amount is generated according to the frequency of each echo pulse and the AD sampling rate, specifically: in, represents the phase step, f c Represents the frequency of the current echo pulse, f s Represents the AD sampling rate.

3. The method for realizing digital down-conversion of a stepped frequency signal according to claim 2, wherein: In the step (42), the phase step amount is accumulated using the AD sampling rate as the clock frequency. When the digital phase is accumulated to 2π, it is accumulated again from 0. The digital phase is accumulated cyclically in the range of 0 to 2π.

4. The method for realizing digital down-conversion of a stepped frequency signal according to claim 3, wherein: In step (43), the generated down-conversion mixing coefficient is specifically: Among them, I_xishu(n) represents the in-phase mixing coefficient, Q_xishu(n) represents the orthogonal mixing coefficient, and n represents the number of sampling points.

5. The method for realizing digital down-conversion of a stepped frequency signal according to claim 4, wherein: The step (43) is implemented by the cordic core of the FPGA.

6. A method for implementing digital down-conversion of a stepped frequency signal according to any one of claims 1 to 5, characterized in that: The sampling rate of the AD acquisition is 100 MHz to 150 MHz, and the bit width is 12 bits to 14 bits.

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