A circuit structure and a radio frequency amplifier circuit

Abstract

The application relates to a circuit structure and a radio frequency amplifier circuit, characterized by comprising a common-source MOS transistor, a common-gate MOS transistor and a control circuit; the common-source MOS transistor is used for amplifying an input signal to form a drain current proportional to the input signal; the drain of the common-source MOS transistor is connected with the source of the common-gate MOS transistor, the common-gate MOS transistor transmits the drain current to the drain of the common-gate MOS transistor for output; the output of the drain of the common-gate MOS transistor is connected with the control circuit; and the control circuit is used for controlling the circuit structure to work in different states. Through the design, the third-order intermodulation point of the amplifier can be obviously improved by only adding a control circuit without increasing the main amplifier path current; in addition, the control circuit can also make the whole circuit be turned off, so that the power consumption is reduced without disconnecting the power supply.

Description

Technical Field

[0001] This application relates to the technical field of radio frequency circuits, and specifically to a circuit structure and a radio frequency amplifier circuit. Background Technology

[0002] Poor contact or aging of radio frequency (RF) devices can cause nonlinearity. When two or more radio waves of different frequencies propagate through a nonlinear RF device, or when they encounter a metal object while propagating in the air, they may generate intermodulation interference signals of other frequencies.

[0003] Intermodulation interference signals have third-, fifth-, seventh-, or higher-order components, but the third-order intermodulation component is the largest. Third-order intermodulation is an important indicator for measuring the nonlinearity of radio frequency (RF) devices. Its magnitude is expressed as the ratio of the intermodulation products to the main output signal, measured in dBc. When selecting RF devices, a higher absolute value for the third-order intermodulation index is better. A larger value indicates that the intermodulation products are smaller relative to the main signal, resulting in less interference to the system.

[0004] Ultra-wideband applications such as phased array radar, electronic countermeasures, satellite communications, 5G MIMO, communication base stations, general wireless equipment, and TDD / FDD systems place higher demands on the linearity of RF amplifiers, especially their third-order intermodulation performance. The third-order intermodulation point determines the dynamic range of the system. Therefore, high-linearity RF systems require not only high 1dB compression point power of the RF amplifier but also high third-order intermodulation performance. Thus, designing an RF amplifier circuit with a high third-order intermodulation point is a crucial technical problem that needs to be solved.

[0005] The background description is provided for the purpose of understanding the relevant technologies in this field and is not intended as an admission of prior art. Summary of the Invention

[0006] Therefore, the present invention aims to provide a circuit structure that occupies a small chip area and can significantly improve the third-order intermodulation point with only a small increase in current.

[0007] In a first aspect, embodiments of the present invention provide a circuit structure, characterized in that it includes: a common-source MOSFET, a common-gate MOSFET, and a control circuit;

[0008] The common-source MOSFET is used to amplify the input signal and generate a leakage current proportional to the input signal;

[0009] The drain of the common-source MOSFET is connected to the source of the common-gate MOSFET, and the common-gate MOSFET transmits the leakage current to the drain of the common-gate MOSFET for output.

[0010] The output of the drain of the common-gate MOS transistor is connected to the control circuit.

[0011] The control circuit is used to control the circuit structure to operate in different states.

[0012] Optionally, the control circuit includes: a thirteenth port, a thirty-fifth port, a thirty-sixth resistor, a thirty-seventh MOSFET, a forty-second resistor, a forty-third resistor, a forty-fourth resistor, a forty-fifth resistor, a forty-sixth resistor, a thirty-eighth MOSFET, a forty-seventh resistor, a forty-eighth resistor, and a thirty-ninth MOSFET.

[0013] The control signal is input from one end of the 35th port, one end of the 36th resistor is connected to the other end of the 35th port, the other end of the 36th resistor is connected to the gate of the 37th MOS transistor, the drain of the 37th MOS transistor is connected to one end of the 43rd resistor, and the 43rd resistor, the 44th resistor, the 45th resistor and the 42nd resistor are connected together.

[0014] The drain of the 37th MOS transistor, the source of the 38th MOS transistor, and the 46th resistor are connected together. The drain of the 38th MOS transistor is connected to one end of the 44th resistor and one end of the 48th resistor a. The gate of the 38th MOS transistor is connected to the 45th resistor and the 46th resistor.

[0015] The other end of the forty-eighth resistor 48 is connected to the gate of the thirty-ninth MOS transistor;

[0016] The forty-sixth resistor and the forty-seventh resistor are connected to the reference ground;

[0017] The forty-third, forty-fourth, and forty-fifth resistors are connected to one end of the forty-second resistor, and the other end of the forty-second resistor is connected to the thirteenth port.

[0018] Optionally, the input signal is input to the circuit structure via a DC blocking capacitor.

[0019] Optionally, the control signal controls the 37th MOSFET to turn on, and the external power supply forms a current path to the reference ground through the off-chip feed inductor, the 42nd resistor, the 43rd resistor, the 37th MOSFET, and the 46th resistor.

[0020] Optionally, the control signal controls the 37th MOSFET to turn on, and the output power signal is formed to the reference ground through the 42nd resistor, the 43rd resistor, the 37th MOSFET, and the 46th resistor, with no output power signal at the load end.

[0021] Optionally, the control signal controls the thirty-seventh MOS transistor to turn off and the thirty-eighth MOS transistor to turn on.

[0022] Optionally, the gate voltage of the thirty-eighth MOSFET is a resistor-divided voltage of the power supply, and the resistor value is selected to turn on the thirty-eighth MOSFET.

[0023] Optionally, increasing the voltage at the thirteenth port increases the current in the forty-seventh resistor, raises the gate voltage of the thirty-eighth MOS transistor, increases the source-drain current of the thirty-eighth MOS transistor, increases the current in the forty-fourth and forty-sixth resistors, raises the voltage at the connection between the forty-second and forty-fourth resistors, and reduces the current in the forty-second resistor, thus forming negative feedback.

[0024] Optionally, the negative feedback can be adjusted by adjusting the resistance ratio or the MOS size of the thirty-ninth MOS transistor.

[0025] In a second aspect of this invention, an embodiment of this invention provides a radio frequency amplifier circuit, characterized in that the radio frequency amplifier circuit uses the first aspect described above and any alternative circuit structure of the first aspect described above.

[0026] Other optional features and technical effects of the embodiments of the present invention are partly described below and partly apparent from reading this document. Attached Figure Description

[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The elements shown are not limited to the scale shown in the drawings, and the same or similar reference numerals in the drawings denote the same or similar elements, wherein:

[0028] Figure 1 A schematic diagram of a feedforward linearization cancellation circuit structure that can implement an embodiment of the present invention is shown;

[0029] Figure 2 A schematic diagram of a common-source cascode amplifier with a negative feedback circuit that can implement embodiments of the present invention is shown;

[0030] Figure 3 The diagram illustrates a circuit structure for a common-source, common-gate amplifier with control circuitry that can implement embodiments of the present invention. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings. Here, the illustrative embodiments and descriptions of this invention are used to explain the invention, but are not intended to limit the invention.

[0032] The term "comprising" and its variations as used herein signify open inclusion, i.e., "including but not limited to". Unless otherwise stated, the term "or" means "and / or". The term "based on" means "at least partially based on". The terms "one example embodiment" and "one embodiment" mean "at least one example embodiment". The term "another embodiment" means "at least one additional embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0033] In this embodiment of the invention, a circuit structure is provided, characterized in that it includes: a common-source MOSFET, a common-gate MOSFET, and a control circuit;

[0034] The common-source MOSFET is used to amplify the input signal and generate a leakage current proportional to the input signal;

[0035] The drain of the common-source MOSFET is connected to the source of the common-gate MOSFET, and the common-gate MOSFET transmits the leakage current to the drain of the common-gate MOSFET for output.

[0036] The output of the drain of the common-gate MOS transistor is connected to the control circuit.

[0037] The control circuit is used to control the circuit structure to operate in different states.

[0038] Figure 1 A schematic diagram of a feedforward linearization cancellation circuit structure that can implement embodiments of the present invention is shown. Figure 1The circuit structure shown includes: signal coupler 1a, attenuator 1b, phase shifter 1c, directional coupler 1d, delay unit 2a, phase shifter 2b, main amplifier 3a, synthesizer 4, and differential amplifier 3b. The input signal (IN) is connected to the input terminal of signal coupler 1a. The output terminal of signal coupler 1a is split into two paths, connected to the input terminals of main amplifier 3a and delay unit 2a respectively. The output terminal of main amplifier 3a is connected to attenuator 1b. The output terminal of delay unit 2a is connected to phase shifter 1c. The output terminal of attenuator 1b is split into two paths: one input to synthesizer 4, and the other connected to the input terminal of phase shifter 2b. The output terminal of phase shifter 1c is split into two paths: one input to synthesizer 4, and the other as the input to differential amplifier 3b. The output signals of phase shifter 2b and differential amplifier 3b are used as inputs to coupler 1d, and output signals (OUT) to coupler 1d.

[0039] exist Figure 1 In the illustrated embodiment, the input signal (IN) is split into two paths after coupler 1a. The first path, after passing through delay unit 2a, is an undistorted sampled signal. Phase shifter 1c inverts the output signal of delay unit 2a, which serves as the first input signal of synthesizer 4. The second path is amplified by main amplifier 3a and appropriately attenuated. Attenuator 1b extracts a portion of the signal from main amplifier 3a as the second input signal of synthesizer 4. The two signals are combined in synthesizer 4, and the error signal is extracted. If there is no gain or phase distortion in main amplifier 3a, synthesizer 4 produces zero output. If there is any gain or phase distortion in main amplifier 3a, a small RF error signal will be generated at the output of synthesizer 4. This error signal is input to error amplifier 3b for amplification, increasing it to the same level of distortion signal as the output of main amplifier 3a. Phase shifter 2b inverts the output signal of attenuator 1b. The undistorted sampled signal and the amplified RF error signal are calibrated in directional coupler 1d before being output. This design reduces intermodulation levels and improves amplifier linearity.

[0040] Figure 1 The illustrated embodiment includes two circuit loops: a distortion signal extraction loop and a distortion signal cancellation loop. The distortion signal extraction loop includes a signal coupler 1a, a main amplifier 3a, an attenuator 1b, a synthesizer 4, a phase shifter 1c, a directional coupler 1d, a delay unit 2a, a phase shifter 2b, and a differential amplifier 3b. These two circuit loops couple signals from the nonlinear main amplifier output that include both carrier and intermodulation components, canceling them out with the carrier-only signal in the reference branch, resulting in an output signal containing only intermodulation components. The distortion signal cancellation loop extracts the intermodulation components from the loop output, processes them, and cancels them out with the intermodulation components in the main branch, thereby reducing the intermodulation level.

[0041] Figure 2 A schematic diagram of a common-source cascode amplifier with a negative feedback circuit that can implement embodiments of the present invention is shown. Figure 2 The amplifier shown includes: input port 5, input port 6, output port 7, transistor 8a, transistor 8b, wire bonding inductor 9, control circuit 10, and logic control terminal 11.

[0042] like Figure 2 In the illustrated embodiment, the common-source common-gate amplifier receives a voltage signal through input port 5, which is converted into a current signal by transistor 8a and enters the main amplification circuit. The signal then passes through the drain of transistor 8b and is finally output from output port 7. Input port 6 provides a bias voltage to transistor 8b, and the drain of transistor 8b is also connected to control circuit 10. The wire bonding inductor 9 adjusts its inductance value by adjusting the wire bonding length, thus achieving an optimal tradeoff between noise and gain performance. When the logic control terminal 11 of control circuit 10 is high, the control circuit pulls the main circuit output down to reference ground, and the output signal forms a path with the reference ground through the MOS transistor of the control circuit, resulting in no output signal at output port 7. When the logic control terminal 10 is low, the control circuit is in a negative feedback state, and a large portion of the third-order component in the output signal is canceled out by the control circuit, thereby improving the linearity of the circuit.

[0043] At the same time, because the resistance value selected for the control circuit 10 is very large, the current consumed by the entire control circuit is very small. Therefore, it does not significantly increase the power consumption of the circuit.

[0044] The amplifier employs a cascode (cas-source, cas-gate) architecture, with the cas-source transistor utilizing source degradation technology and its source grounded via a wire-bonded inductor. Cascode amplifiers offer advantages such as wide bandwidth, high voltage gain, and high reverse isolation, making them suitable for broadband low-noise amplifier applications. However, due to the inherent nonlinearity of the transistors in the cascode structure, the output third-order intermodulation point of the entire circuit is low. This low third-order intermodulation point can distort signal amplitude and phase, resulting in distortion and impacting the overall performance of the communication system.

[0045] Figure 3 This diagram illustrates a circuit structure for a common-source cascode amplifier with control circuitry that can implement embodiments of the present invention. For example... Figure 3The circuit structure shown includes: 12th port, 13th port, 14th MOSFET, 15th MOSFET, 16th inductor a, 16a, 16th inductor b, 16b, 17th capacitor, 18th inductor, 19th inductor, 20th inductor, 21st capacitor, 53rd resistor, 54th port, 22nd load, 55th resistor, 23rd MOSFET, 24th resistor, 25th resistor, 26th resistor, 27th capacitor, 28th resistor, 29th resistor a, 29a, 29th resistor b. b. 30 resistor, 31 capacitor, 32 capacitor, 33 capacitor, 34 resistor, 35 port, 36 resistor, 37 MOSFET, 38 MOSFET, 39 MOSFET, 40 capacitor, 41 capacitor, 42 resistor, 43 resistor, 44 resistor, 45 resistor, 46 resistor, 47 resistor, 48 resistor, 52 resistor, 49 resistor, 50 capacitor, 51 resistor, and external power supply 56.

[0046] Among them, one end of the seventeenth capacitor 17 is connected to the input signal of the amplifier, and the other end is connected to the eighteenth inductor 18; the other end of the eighteenth inductor 18 is connected to one end of the twelfth port 12, and the other end of the twelfth port 12 is connected to the twenty-eighth resistor 28 and the gate of the fourteenth MOSFET 14; the other end of the twenty-eighth resistor 28 is connected to the twenty-sixth resistor 26 and one plate of the thirty-second capacitor 32; the drain of the fourteenth MOSFET 14 is connected to the source of the fifteenth MOSFET 15, and the source of the fourteenth MOSFET 14 is connected to the sixteenth inductor a 16a and the sixteenth inductor b 16b; the sixteenth inductor a 16a and the sixteenth inductor b 16b The other end is connected to the reference ground; the gate of the fifteenth MOSFET 15 is connected to one plate of the thirty-first capacitor 31, the thirtieth resistor 30, and the thirty-fourth resistor 34; the other plate of the thirty-first capacitor 31 is connected to the reference ground; the other end of the thirty-fourth resistor 34 is connected to one plate of the thirty-third capacitor 33; the other plate of the thirty-second capacitor 32, the twenty-ninth resistor 29a, the other plate of the thirty-third capacitor 33, and the forty-second resistor 42 are connected to the thirteenth port 13; the other end of the thirteenth port 13 is connected to the twentieth inductor 20, and the other end of the twentieth inductor 20 is connected to one end of the nineteenth inductor 19 and one plate of the twenty-first capacitor 21.

[0047] The other plate of the twenty-first capacitor 21 is connected to one end of the twenty-second load 22, and the other end of the twenty-second load 22 is connected to reference ground; the other end of the nineteenth inductor 19 is connected to the fifty-third resistor 53 and the external power supply 56, the other end of the fifty-third resistor 53 is connected to the fifty-fourth port 54, and the other end of the fifty-fourth port 54 is connected to the fifty-fifth resistor 55; the other end of the fifty-fifth resistor 55 is connected to the twenty-fourth resistor 24 and the drain of the twenty-third MOSFET 23; the source of the twenty-third MOSFET 23 is connected to reference ground, and the gate of the twenty-third MOSFET 23 is connected to the second... One end of resistor 25 is connected; the other ends of resistor 24, resistor 25, resistor 26, and capacitor 27 are connected together; the other end of capacitor 27 is connected to ground; the other end of resistor 30 is connected to the drain of MOSFET 41; the source of MOSFET 41 and one end of resistor 51 are connected to ground; the gate of MOSFET 41 is connected to one end of capacitor 40; the other end of capacitor 40 is connected to resistor 52 and capacitor 50. One plate of capacitor 50 is connected together; the other plate of capacitor 50 is connected to resistor 49, and the other end of resistor 49 and resistor 52 are connected together to the source of MOSFET 39; resistors 43, 44, 45, and the drain of MOSFET 39 are connected together to the other end of resistor 42; the gate of MOSFET 39 is connected to resistor 48, and the other end of resistor 48 is connected to the other end of resistor 44 and the drain of MOSFET 38. The gate of the thirty-eighth MOSFET 38 is connected to the other end of the forty-fifth resistor 45 along with the forty-seventh resistor 47; the source of the thirty-seventh MOSFET 37 and the source of the thirty-eighth MOSFET 38 are connected to one end of the forty-sixth resistor 46; the other end of the forty-sixth resistor 46 and the other end of the forty-seventh resistor 47 are connected to the reference ground; the drain of the thirty-seventh MOSFET 37 is connected to the other end of the forty-third resistor 43; the gate of the forty-third resistor 43 is connected to the thirty-sixth resistor 36; the other end of the thirty-sixth resistor 36 is connected to the thirty-fifth port 35, and the control signal is input from the other end of the thirty-fifth port 35.

[0048] exist Figure 3In the embodiment shown, the seventeenth capacitor 17 is a DC blocking capacitor, the fourteenth MOSFET 14 is a common-source MOSFET, the fifteenth MOSFET 15 is a common-gate MOSFET, the nineteenth inductor 19 is a power supply inductor, the twentieth inductor 20 is a wire bonding inductor, the thirteenth port 13 is a chip port, the twenty-first capacitor 21 is a DC blocking capacitor, and the thirty-sixth resistor 36 is an isolation protection resistor.

[0049] The amplifier signal is input through the seventeenth capacitor 17, enters the source of the common gate MOSFET 15 through the drain of the common source MOSFET 14, and is output at the drain of the common gate MOSFET 15. The external power supply 56 is connected to the inside of the chip through the feed inductor 19, and then reaches the chip port 13 through the wire bonding inductor 20.

[0050] The aforementioned thirteenth port 13 is also connected to the twenty-second load 22 through the twenty-first capacitor 21.

[0051] Furthermore, the thirteenth port 13 is also connected to the control circuit. The control circuit implementing the circuit structure of this embodiment is as follows: the control circuit includes: the thirty-fifth port 35, the thirty-sixth resistor 36, the thirty-seventh MOSFET 37, the nineteenth inductor 19, the forty-second resistor 42, the forty-third resistor 43, the forty-fourth resistor 44, the forty-sixth resistor 46, the thirty-eighth MOSFET 38, the forty-seventh resistor 47, the forty-eighth resistor 48, and the thirty-ninth MOSFET 39. The operation of the control circuit is as follows:

[0052] The control signal enters the control circuit through port 35 (35) and is connected to the 37th MOSFET (37) via the isolation protection resistor (36). If the control signal level is high, the high level controls the 37th MOSFET (37) to turn on. At this time, the external power supply forms a current path to the reference ground through the external feed inductor (19), resistors (42 and 43), MOSFET (37), and resistor (46). Similarly, the output power signal also goes directly to the reference ground through this path, and there is no output signal at the load end, thus realizing the shutdown function.

[0053] If the control signal input from port 35 is low, the 37th MOSFET 37 is turned off. At this time, the gate voltage of the 38th MOSFET 38 is the voltage divided by the power supply resistors. In this embodiment, a suitable resistor value can be selected to turn on the 38th MOSFET 38. When the output power increases, the voltage at port 13 increases, the current flowing through resistor 47 increases, and the gate voltage of the 38th MOSFET 38 rises, leading to an increase in the source-drain current of the 38th MOSFET 38. This increases the current flowing through resistors 44 and 46, and the voltage at the connection between resistors 42 and 44 rises, resulting in a decrease in the current flowing through resistor 42, forming negative feedback. Simultaneously, the voltage at the connection between resistors 44 and 48 rises, increasing the gate voltage of the 39th MOSFET 39. Even if more current is drawn from resistor 42, the current flowing through the 39th MOSFET 39 still increases. The 39th MOSFET 39 can be fine-tuned by adjusting the resistor ratio or the MOSFET size. Conversely, this structure can also ensure stable output power when the output power decreases.

[0054] Meanwhile, the 38th MOSFET 38 and the 39th MOSFET 39 are in the subthreshold region. Under normal operating conditions, the 38th MOSFET 38 and the 39th MOSFET 39 are weakly turned on and do not consume excessive current.

[0055] In the embodiments described above, a common-source cascode amplifier is provided. The common-source MOSFET amplifies the input signal and generates a leakage current proportional to the magnitude of the input signal. The common-source MOSFET uses source degradation technology to achieve impedance matching, and the source is grounded through a wire bonding inductor. The drain of the common-source MOSFET is connected to the source of the common-gate MOSFET, and the common-gate MOSFET transmits the leakage current to the output, i.e., the drain of the common-gate MOSFET.

[0056] The output section of the common-gate MOSFET is connected to the amplifier control circuit, which operates in different states depending on the control voltage. When the circuit control terminal input is high, the main transistor of the control circuit is turned on, and the output signal is connected to ground through the transistor channel. The chip has no power signal output, and the negative feedback circuit is in the off state. When the circuit control terminal input is low, the main transistor of the circuit is in a weakly conducting state, and the third-order terms of the output signal cancel each other out with the third-order terms of the circuit. At this time, the third-order intermodulation point performance of the entire circuit is greatly improved.

[0057] This embodiment utilizes the nonlinear characteristics of the transistor in the control circuit to both cancel out a portion of the third-order intermodulation terms and pull the entire output down to zero. Without increasing the main amplifier's path current, simply by adding a control circuit, the amplifier's output third-order intermodulation point can be significantly improved.

[0058] In addition, the control circuit can also shut down the entire circuit, thereby reducing power consumption without needing to disconnect the power supply.

[0059] The circuit complexity implemented in this application is significantly reduced compared to known third-order intermodulation point circuits, thereby enabling further reduction of the chip area and current loss of the RF amplifier.

[0060] Those skilled in the art will understand that the embodiments described in this specification can be provided as methods, systems, or computer program products. Therefore, those skilled in the art will realize that the functional modules / units or controllers and related method steps described in the above embodiments can be implemented in software, hardware, or a combination of both.

[0061] Unless explicitly stated otherwise, the actions or steps of the methods and procedures described in the embodiments of the present invention do not necessarily have to be performed in a specific order and can still achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0062] This document describes several embodiments of the present invention; however, for the sake of brevity, the descriptions of the embodiments are not exhaustive, and identical or similar features or parts between the embodiments may be omitted. In this document, "one embodiment," "some embodiments," "example," "specific example," or "some examples" refers to embodiments applicable to at least one, but not all, of the present invention. The above terms do not necessarily refer to the same embodiments or examples. Without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described herein, as well as the features of the different embodiments or examples.

[0063] The exemplary systems and methods of the present invention have been specifically shown and described with reference to the above embodiments, which are merely examples of the best mode for implementing the systems and methods. Those skilled in the art will understand that various changes can be made to the embodiments of the systems and methods described herein without departing from the spirit and scope of the invention as defined in the appended claims when implementing the systems and / or methods.

Claims

1. A circuit structure for use in a radio frequency amplifier, characterized in that, include: Common-source MOSFET, common-gate MOSFET, and control circuit; The common-source MOSFET is used to amplify the input signal and generate a leakage current proportional to the input signal; The drain of the common-source MOSFET is connected to the source of the common-gate MOSFET, and the common-gate MOSFET transmits the leakage current to the drain of the common-gate MOSFET for output. The output of the drain of the common-gate MOS transistor is connected to the control circuit. The control circuit is used to control the circuit structure to operate in different states; The control circuit includes: port 13, port 35, resistor 36, MOSFET 37, resistor 42, resistor 43, resistor 44, resistor 45, resistor 46, MOSFET 38, resistor 47, resistor 48, and MOSFET 39; The control signal is input from one end of the 35th port, one end of the 36th resistor is connected to the other end of the 35th port, the other end of the 36th resistor is connected to the gate of the 37th MOS transistor, the drain of the 37th MOS transistor is connected to one end of the 43rd resistor, and the 43rd resistor, the 44th resistor, the 45th resistor and the 42nd resistor are connected together. The source of the 37th MOS transistor and the source of the 38th MOS transistor are connected together with the 46th resistor. The drain of the 38th MOS transistor is connected to one end of the 44th resistor and one end of the 48th resistor. The gate of the 38th MOS transistor is connected to the 45th resistor and the 47th resistor. The other end of the forty-eighth resistor is connected to the gate of the thirty-ninth MOS transistor; The forty-sixth resistor and the forty-seventh resistor are connected to the reference ground; The forty-third resistor, forty-fourth resistor, and forty-fifth resistor are connected to one end of the forty-second resistor, and the other end of the forty-second resistor is connected to the thirteenth port; When the control terminal of the control circuit is input with a high level, the negative feedback circuit of the control circuit is in the off state. When the control terminal of the control circuit is input with a low level, the main transistor of the control circuit is in a weak conducting state.

2. The circuit structure applied to an RF amplifier according to claim 1, characterized in that, The input signal is input to the circuit structure via a DC blocking capacitor.

3. The circuit structure applied to an RF amplifier according to claim 1, characterized in that, The control signal controls the 37th MOSFET to turn on, and the external power supply forms a current path to the reference ground through the off-chip feed inductor, the 42nd resistor, the 43rd resistor, the 37th MOSFET, and the 46th resistor.

4. The circuit structure applied to an RF amplifier according to claim 1, characterized in that, The control signal controls the 37th MOSFET to turn on, and the output power signal is formed to the reference ground through the 42nd resistor, the 43rd resistor, the 37th MOSFET, and the 46th resistor. There is no output power signal at the load end.

5. The circuit structure applied to an RF amplifier according to claim 1, characterized in that, The control signal controls the 37th MOSFET to turn off and the 38th MOSFET to turn on.

6. The circuit structure applied to an RF amplifier according to claim 5, characterized in that, The gate voltage of the thirty-eighth MOS transistor is the voltage divider of the power supply resistor, and the resistor value is selected to turn on the thirty-eighth MOS transistor.

7. The circuit structure applied to an RF amplifier according to claim 5, characterized in that, Increasing the voltage at the thirteenth port increases the current in the forty-seventh resistor, raises the gate voltage of the thirty-eighth MOS transistor, increases the source-drain current of the thirty-eighth MOS transistor, increases the current in the forty-fourth and forty-sixth resistors, raises the voltage at the connection between the forty-second and forty-fourth resistors, and reduces the current in the forty-second resistor, thus forming negative feedback.

8. The circuit structure applied to a radio frequency amplifier according to claim 7, characterized in that, The thirty-ninth MOSFET adjusts the negative feedback by adjusting the resistance ratio or the MOSFET size.

9. A radio frequency amplifier circuit, characterized in that, The radio frequency amplifier circuit uses the circuit structure applied to a radio frequency amplifier as described in any one of claims 1-8.

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