High-definition multimedia connector, interface circuit control method and device thereof

Abstract

The present application discloses an interface circuit control method, a high-definition multimedia connector, an audio-video transmission system, and a computer-readable storage medium. The interface circuit control method is applied to an input interface of a high-definition multimedia connector, and the method includes: detecting a preset power supply voltage of the input interface and an input state of an audio-video signal; determining an adjustment signal based on the preset power supply voltage and the input state of the audio-video signal, so that the input interface adjusts its working mode based on the adjustment signal. By the above method, the present application can adjust the working mode of the input interface based on the input state of the audio-video signal and the preset power supply voltage input to the interface circuit of the high-definition multimedia connector, thereby reducing the power consumption of the output interface and saving energy.

Description

Technical Field

[0001] This application relates to the field of interface technologies, and particularly to an interface circuit control method, a high-definition multimedia connector, an audio-video transmission system, and a computer-readable storage medium. Background Art

[0002] A High Definition Multimedia Interface (HDMI) is a fully digital video and audio transmission interface that can transmit uncompressed audio and video signals, and is widely used in digital video recorders, set-top boxes, televisions, personal computers, etc.

[0003] Due to the advantages of long transmission distance and strong anti-interference ability of the high-definition multimedia connector, it has many usage scenarios. However, when a computer host is indirectly connected to multiple display devices through a high-definition multimedia connector and a splitter, when the computer host is turned off, since the splitter is not powered off, the display devices connected to the splitter will always be in a normal working state, consuming a large amount of power, which is not conducive to energy saving. Summary of the Invention

[0004] This application provides an interface circuit control method, a high-definition multimedia connector, an audio-video transmission system, and a computer-readable storage medium, which can adjust the working mode and reduce the power consumption of the display device.

[0005] To solve the above technical problems, one technical solution adopted in this application is: to provide an interface circuit control method, which is applied to the input interface of a high-definition multimedia connector. The method includes: detecting the preset power supply voltage of the input interface and the input state of the audio-video signal; determining an adjustment signal based on the preset power supply voltage and the input state of the audio-video signal, so that the input interface adjusts the working mode based on the adjustment signal.

[0006] Among them, determining an adjustment signal based on the preset power supply voltage and the input state of the audio-video signal, so that the input interface adjusts the working mode based on the adjustment signal, includes: detecting whether there is a preset power supply voltage input on the input interface; in response to the continuous input of the preset power supply voltage on the input interface within the first preset time, controlling the input interface to adjust the hot plug detection signal to a high level; judging whether there is a continuous input of the audio-video signal on the input interface within the second preset time; if not, controlling the input interface to enter the sleep mode and controlling the input interface to adjust the hot plug detection signal to a low level; if so, controlling the input interface to enter the normal working mode and controlling the input interface to keep the hot plug detection signal at a high level.

[0007] Among them, the input interface is connected to a receiving processor, and there is a register on the receiving processor. The steps for detecting whether there is a preset power supply voltage input on the input interface include: reading a first Boolean value of the power supply input bit of the register; in response to the first Boolean value being true, there is a preset power supply voltage input on the input interface; in response to the first Boolean value being false, there is no preset power supply voltage input on the input interface.

[0008] Among them, the steps for determining whether there is a continuous input of audio and video signals on the input interface within a second preset time include: reading a second Boolean value of the video input bit of the register; in response to the second Boolean value being true, there is an audio and video signal input on the input interface; in response to the second Boolean value being false, there is no audio and video signal input on the input interface.

[0009] Among them, the interface circuit control method further includes: in response to there being no continuous input of the preset power supply voltage on the input interface within a first preset time, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to a low level.

[0010] To solve the above technical problems, a technical solution adopted in this application is: to provide a high-definition multimedia connector, which includes an input interface and an output interface. The input interface is used to receive audio and video signals sent by the output interface; the output interface is used to provide a preset power supply voltage for the input interface; among them, the input interface is connected to a receiving processor, so that the receiving processor is used to generate an adjustment signal based on the input state of the preset power supply voltage and audio and video signals of the input interface, and the input interface adjusts the working mode based on the adjustment signal.

[0011] Among them, the output interface includes a preset power supply, a first interface socket, and an electrostatic protection component. The preset power supply is used to provide a preset power supply voltage for the input interface; the first interface socket is respectively connected to a signal driver and the preset power supply; the electrostatic protection component is arranged on the connection line between the first interface socket and the signal driver.

[0012] Among them, the output interface further includes a decoupling resistor. One end of the decoupling resistor is connected to the signal driver, and the other end is connected to the first interface socket, and is used to absorb the residual voltage after the electrostatic protection component is clamped.

[0013] Among them, the output interface further includes a bidirectional level conversion circuit, which is respectively arranged on the connection lines between the signal driver and the serial clock pin of the first interface socket, between the signal driver and the serial data line pin of the first interface socket, and between the signal driver and the hot plug detection pin of the first interface socket.

[0014] Among them, the input interface includes a second interface socket and an electrostatic protection component. The second interface socket is connected to the receiving processor; the electrostatic protection component is arranged on the connection line between the second interface socket and the receiving processor.

[0015] Among them, the input interface further includes a decoupling resistor. One end of the decoupling resistor is connected to the receiving processor, and the other end is connected to the second interface socket, for absorbing the residual voltage after the electrostatic protection component is clamped.

[0016] Among them, the input interface further includes a bidirectional level conversion circuit, which is respectively arranged on the connection lines between the receiving processor and the serial clock pins of the second interface socket, between the receiving processor and the serial data line pins of the second interface socket, and between the receiving processor and the hot plug detection pins of the second interface socket.

[0017] Among them, the input interface is further configured to send a hot plug detection signal to the output interface, so that the output interface determines whether the input interface is connected to the output interface based on the hot plug detection signal.

[0018] To solve the above technical problems, another technical solution adopted by this application is: to provide an audio and video transmission system, which includes the high-definition multimedia connector, signal driver, and receiving processor of any one of the above, and the processor is used to execute the interface circuit control method of any one of the above.

[0019] To solve the above technical problems, another technical solution adopted by this application is: to provide a computer-readable storage medium, which stores program instructions internally, and the program instructions are executed to implement the interface circuit control method of any one of the above.

[0020] The beneficial effects of this application are: different from the prior art, the interface circuit control method of this application first detects the preset power supply voltage of the input interface and the input state of the audio and video signal; and determines an adjustment signal based on the preset power supply voltage and the input state of the audio and video signal, so that the input interface adjusts the working mode based on the adjustment signal. In this process, this application can adjust the working mode of the input interface based on the input state of the audio and video signal and the preset power supply voltage input to the interface circuit of the high-definition multimedia connector, thereby reducing the power consumption of the output interface and saving energy. Secondly, it can also reduce the power consumption of the display device connected to the input interface and save energy. Description of the Drawings

[0021] Figure 1 It is a schematic diagram of the connection relationship between the output interface and the input interface of the high-definition multimedia connector;

[0022] Figure 2 It is a schematic block diagram of the host and the display device connected through the high-definition multimedia connector;

[0023] Figure 3 It is a schematic structural diagram of an embodiment of a teaching recording and broadcasting system;

[0024] Figure 4It is a schematic flowchart of an embodiment of the interface circuit control method provided by this application;

[0025] Figure 5 It is Figure 4 a schematic flowchart of a specific embodiment of step S102 in

[0026] Figure 6 It is Figure 5 a schematic flowchart of a specific embodiment of step S201 in

[0027] Figure 7 It is Figure 5 a schematic flowchart of a specific embodiment of step S203 in

[0028] Figure 8 It is a schematic block diagram of an embodiment of the high-definition multimedia connector provided by this application;

[0029] Figure 9 It is a schematic diagram of an embodiment of the output interface provided by this application;

[0030] Figure 10 It is a schematic diagram of an embodiment of the input interface provided by this application;

[0031] Figure 11 It is a schematic block diagram of an embodiment of the audio-visual transmission system provided by this application;

[0032] Figure 12 It is a schematic diagram of an embodiment of the computer-readable storage medium provided by this application. Specific Embodiments

[0033] Next, the technical solutions in the embodiments of this application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0034] Please refer to Figure 1 , Figure 1 It is a schematic diagram of the connection relationship between the output interface and the input interface of the high-definition multimedia connector. The high-definition multimedia connector (HDMI) is a fully digital video and audio transmission interface that can transmit uncompressed audio and video signals and is widely used in digital video recorders, set-top boxes, televisions, personal computers, etc.

[0035] Such as Figure 1As shown in the figure, the high-definition multimedia connector 100 includes an output interface 10 and an input interface 20. The output interface 10 is connected to the input interface 20, and CES signals are sent between the output interface 10 and the input interface 20. The transmission and reception capabilities between the two can be obtained by using DDC signals. However, the high-definition multimedia connector 100 only needs to unidirectionally know the reception capability of the input interface 20. The CES signal is used to send industrial-standard AV Link protocol signals.

[0036] The output interface 10 will also provide a preset power supply voltage for the input interface 20; the hot-plug signal is sent from the input interface 20 to the output interface 10 as a basis for determining whether the high-definition multimedia connector 100 has been connected to a display device.

[0037] Due to the advantages of the high-definition multimedia connector 100 such as long transmission distance and strong anti-interference ability, it has many usage scenarios. In the prior art, as Figure 2 shown, Figure 2 is a schematic block diagram of the connection between a host and a display device through a high-definition multimedia connector. If the display device is directly connected to the host through the high-definition multimedia connector 100, when the host is powered off, the display device will automatically enter the standby mode when it cannot receive power. When the host is restarted, the display device will automatically enter the normal working mode when it receives power. However, when the computer host is indirectly connected to multiple display devices through the high-definition multimedia connector 100 and a splitter, when the computer host is powered off, since the splitter is not powered off, the display devices connected to the splitter will always be in the normal working state, with relatively high power consumption, which is not conducive to energy saving.

[0038] Please refer to Figure 3 , Figure 3 is a schematic structural diagram of an embodiment of a teaching recording and broadcasting system. As Figure 3 shown, when the host for teaching operations needs to be connected to multiple display devices, it needs to be connected to devices such as a podium display, a projector, and a recording and broadcasting host through a high-definition multimedia splitter respectively.

[0039] As Figure 3 the recording and broadcasting host and the host are indirectly connected through a splitter in the figure. Since the splitter and the recording and broadcasting host are both installed in a relatively enclosed space, usually only the host will be powered off when the system is shut down, and the splitter and the recording and broadcasting host will not be powered off. When the host is powered off, since the splitter is not powered off, the preset power supply voltage of the output interface 3 of the splitter will always exist, and the input interface 3 of the recording and broadcasting host will always be in the normal working state after detecting the preset power supply voltage, wasting a large amount of electric energy.

[0040] To solve the above problems, the present application first proposes an interface circuit control method, which is applied to the input interface of the above-mentioned high-definition multimedia connector 100. Please refer to Figure 4 ,Figure 4 This is a schematic flowchart of an embodiment of the interface circuit control method provided by this application. As Figure 4 shown, the interface circuit control method of this embodiment specifically includes steps S101 to S102:

[0041] Step S101: Detect the input status of the preset power supply voltage and audio-video signals on the input interface.

[0042] The receiving processor detects the input status of the preset power supply voltage and audio-video signals on the input interface. First, it detects whether there is a continuous input of the preset power supply voltage on the input interface. On the basis of the existence of the preset power supply voltage, it then detects whether there is an input of audio-video signals on the input interface.

[0043] Step S102: Determine an adjustment signal based on the input status of the preset power supply voltage and audio-video signals, so that the input interface adjusts its working mode based on the adjustment signal.

[0044] The receiving processor, after obtaining the input status of the preset power supply voltage and audio-video signals on the input interface, can determine an adjustment signal based on the input status of the preset power supply voltage and audio-video signals, so that the input interface adjusts its working mode based on the adjustment signal.

[0045] For example, when it is detected that there is no input of the preset power supply voltage on the input interface, an adjustment signal is determined to make the input interface enter the sleep mode; when it is detected that there is an input of the preset power supply voltage on the input interface but no input of audio-video signals, an adjustment signal is determined to make the input interface enter the sleep mode; only when there is an input of the preset power supply voltage and no input of audio-video signals on the input interface, the input interface enters the normal working mode based on the adjustment signal.

[0046] Different from the prior art, the interface circuit control method of this application first detects the input status of the preset power supply voltage and audio-video signals on the input interface; and determines an adjustment signal based on the input status of the preset power supply voltage and audio-video signals, so that the input interface adjusts its working mode based on the adjustment signal. In this process, this application can adjust the working mode of the input interface based on the input status of the audio-video signals and the preset power supply voltage input to the interface circuit of the high-definition multimedia connector, thereby reducing the power consumption of the output interface and saving energy. Secondly, it can also reduce the power consumption of the display device connected to the input interface and save energy.

[0047] Optionally, the method of determining an adjustment signal based on the input status of the preset power supply voltage and audio-video signals, so that the input interface adjusts its working mode based on the adjustment signal is as Figure 5 shown. Please refer to Figure 5 , Figure 5 is Figure 4 a schematic flowchart of a specific embodiment of step S102 inFigure 5 The method shown implements step S102, and the specific implementation steps include steps S201 to S205:

[0048] Step S201: Detect whether there is a preset power supply voltage input on the input interface.

[0049] The receiving processor detects whether there is a preset power supply voltage input on the input interface. In this embodiment, this detection function is integrated inside the receiving processor, and corresponding registers can be set for reading and judgment.

[0050] Step S202: In response to the continuous input of the preset power supply voltage on the input interface within the first preset time, control the input interface to adjust the hot plug detection signal to a high level.

[0051] When the receiving processor detects the continuous input of the preset power supply voltage on the input interface within the first preset time, it controls the input interface to adjust the hot plug detection signal to a high level. Among them, the first preset time can be set according to actual needs. In this embodiment, the first preset time can be 3 seconds, and the preset power supply voltage is set to 5V. If it is detected that there is a +5v power supply voltage input on the input interface and it lasts for more than 3 seconds, then control the input interface to adjust the hot plug detection signal to a high level.

[0052] Step S203: Judge whether there is a continuous input of audio and video signals on the input interface within the second preset time.

[0053] After step S202, when it is detected that there is a continuous input of the preset power supply voltage, it is still necessary to continue to read the registers inside the receiving processor to judge whether there is a continuous input of audio and video signals on the input interface within the second preset time. Among them, the second preset time can be set according to actual needs. In this embodiment, the second preset time can be set to 5 seconds.

[0054] If it is not detected that there is a continuous input of the preset power supply voltage, then go to step S204. If it is detected that there is a continuous input of the preset power supply voltage, then go to step S205.

[0055] Step S204: Control the input interface to enter the sleep mode, and control the input interface to adjust the hot plug detection signal to a low level.

[0056] When the receiving processor detects that there is no continuous input of the preset power supply voltage, it controls the input interface to enter the sleep mode, and controls the input interface to adjust the hot plug detection signal to a low level. In this embodiment, the sleep mode means that the input interface sleeps for a period of time and then wakes up once. Among them, the sleep time can be set according to actual needs and is not limited here.

[0057] Step S205: Control the input interface to enter the normal working mode and control the input interface to keep the hot plug detection signal at a high level.

[0058] When the receiving processor detects that a preset power supply voltage is continuously input, it controls the input interface to enter the normal working mode and controls the input interface to keep the hot plug detection signal at a high level.

[0059] As Figure 5 shown, the interface circuit control method of this embodiment further includes step S206: In response to no continuous input of the preset power supply voltage on the input interface within the first preset time, control the input interface to enter the sleep mode and control the input interface to adjust the hot plug detection signal to a low level.

[0060] That is, after step S101, if the receiving processor detects that there is no continuous input of the preset power supply voltage on the input interface within the first preset time, it also controls the input interface to enter the sleep mode and controls the input interface to adjust the hot plug detection signal to a low level.

[0061] In this embodiment, the receiving processor is provided with a register. Please refer to the following table, which is a schematic table of the flag bit status values of an embodiment of the register provided by this application.

[0062]

[0063]

[0064] That is, in this embodiment, the register of this embodiment is set to 8 bits. In the above table, the type RO indicates that the register is a read-only register. Among them, in this embodiment, the 0th bit of the register is the power input bit, and the 7th bit is the video input bit. The interface circuit control method in this embodiment only applies to two bits of the above register.

[0065] Optionally, the method for detecting whether there is a preset power supply voltage on the input interface is as Figure 6 shown. Please refer to Figure 6 , Figure 6 which is Figure 5 a schematic flow chart of a specific embodiment of step S201 in Figure 6 . Among them, this embodiment can implement step S201 through the method as

[0066] shown, and the specific implementation steps include steps S301 to S303:

[0067] Step S301: Read the first Boolean value of the power input bit of the register.

[0068] The receiving processor reads the 0th bit of the above table register, that is, reads the first Boolean value of the power input bit.

[0068] Step S302: In response to the first Boolean value being true, there is a preset power supply voltage input on the input interface.

[0069] If the first Boolean value read from the power supply input bit on the register is true, that is, when the first Boolean value is 1, it indicates that there is a preset power supply voltage input on the input interface. If the read first Boolean value remains 1, it indicates that there is a continuous preset power supply voltage input on the input interface.

[0070] Step S303: In response to the first Boolean value being false, there is no preset power supply voltage input on the input interface.

[0071] If the first Boolean value read from the power supply input bit on the register is false, that is, when the first Boolean value is 0, it indicates that there is no preset power supply voltage input on the input interface.

[0072] Optionally, the method for determining whether there is a continuous input of audio - video signals on the input interface within a second preset time is as Figure 7 shown. Please refer to Figure 7 , Figure 7 which Figure 5 is a schematic flowchart of a specific embodiment of step S203 in Figure 7 . This embodiment can implement step S203 through the method shown in

[0073] Step S401: Read the second Boolean value of the video input bit of the register.

[0074] The receiving processor reads the 7th bit on the above - mentioned register, that is, reads the second Boolean value of the video input bit.

[0075] Step S402: In response to the second Boolean value being true, there is an audio - video signal input on the input interface.

[0076] If the second Boolean value read from the video input bit on the register is true, that is, when the second Boolean value is 1, it indicates that there is an audio - video signal input on the input interface. If the read first Boolean value remains 1, it indicates that there is a continuous audio - video signal input on the input interface.

[0077] Step S403: In response to the second Boolean value being false, there is no audio - video signal input on the input interface.

[0078] If the second Boolean value read from the video input bit on the register is false, that is, when the second Boolean value is 0, it indicates that there is no audio - video signal input on the input interface.

[0079] Optionally, the present application further proposes a high - definition multimedia connector 100. Please refer to Figure 8 , Figure 8It is a structural schematic block diagram of an embodiment of a high-definition multimedia connector provided by this application. As Figure 8 shown, the high-definition multimedia connector 100 of this embodiment includes an output interface 10 and an input interface 20. The input interface 20 is used to output the audio and video signals sent by the output interface. Among them, the input interface 20 is connected to a receiving processor 300, so that the receiving processor 300 is used to generate an adjustment signal based on the preset power supply voltage of the input interface 20 and the input state of the audio and video signals, and the input interface 20 adjusts the working mode based on the adjustment signal.

[0080] The working principle of the input interface 20 adjusting the working mode based on the audio and video signals and the preset power supply voltage is as described above.

[0081] The input interface 20 detects whether there is a preset power supply voltage input. If there is no continuous input of the preset power supply voltage, it enters the sleep mode. When continuously receiving the input of the preset power supply voltage, it adjusts the hot plug detection signal to a high level, and then detects whether there is an audio and video signal input. If there is a continuous input of the audio and video signal, it maintains the hot plug detection signal at a high level. If there is no audio and video signal input, it adjusts the hot plug detection signal to a low level and enters the sleep mode. In this embodiment, the sleep time of the sleep mode can be set based on actual needs.

[0082] Among them, in this embodiment, the receiving processor 300 can be a video format converter. After the audio and video signals are converted by the video format converter, they are sent to a display device 400 for playback.

[0083] Optionally, please refer to Figure 9 , Figure 9 It is a structural schematic diagram of an embodiment of the output interface provided by this application. As Figure 9 shown, the output interface 10 of this embodiment includes a preset power supply U1, a first interface socket J1, and an electrostatic protection component D. The preset power supply U1 is used to provide a preset power supply voltage for the input interface 20. The first interface socket J1 is respectively connected to a signal driver 200 and the preset power supply U1. The electrostatic protection component D is arranged on the connection line between the first interface socket J1 and the signal driver 200.

[0084] Among them, as Figure 9As shown in the figure, the first interface socket J1 has 19 pins in this embodiment. Among them, pins 1, 3, 4, 6, 7, 9, 10, 12, 15, 16, and 19 of the first interface socket J1 are respectively connected to the signal driver 200. Among them, the electrostatic protection component D includes 12 electrostatic anti-slip TVS tubes D1 to D12. Each of the pins 1, 3, 4, 6, 7, 9, 10, 12, 15, 16, 18, and 19 of the above first interface socket J1 is respectively connected to an electrostatic protection TVS tube and grounded. Pins 2, 5, 8, 11, and 17 of the first interface socket J1 are grounded. Pin 19 of the first interface socket J1 is connected to a pull-down resistor R18 and grounded.

[0085] The preset power supply U1 can be a +5v power output current limiter in this embodiment. The output end of the preset power supply U1 is connected to the power supply pin 18 of the first interface socket J1 to provide it with a power supply voltage. The circuit structure of the preset power supply U1 is as Figure 5 shown and will not be described again. The current limiting point of the +5v power output current limiter in this embodiment is about 200mA, which not only meets the 55mA requirement of the high-definition multimedia connector 100 specification, but also can avoid the influence of excessive current on the motherboard stability during short circuit. At the same time, the current limiter also has the function of preventing voltage backflow.

[0086] The output interface 10 of this embodiment further includes decoupling resistors. One end of the decoupling resistor is connected to the signal driver 200, and the other end is connected to the first interface socket J1, and is used to absorb the residual voltage after the electrostatic protection component D is clamped.

[0087] As Figure 9 shown, the decoupling resistors include resistors R1 to R11. Among them, resistors R1 to R8 are arranged on the connection lines between pins 1, 3, 4, 6, 7, 9, 10, and 12 of the first interface socket J1 and the signal driver 200. The resistance values of resistors R1 to R8 can be selected according to the highest HDMI output resolution. For example, 10 ohms are selected when the output resolution is lower than 4K, and 2.2 ohms are selected when the output resolution is equal to or higher than 4K; resistors R9 to R11 are arranged on the connection lines between pins 15, 16, and 19 of the first interface socket J1 and the signal driver 200. The resistance values of resistors R9 to R11 have nothing to do with the output resolution. In this embodiment, the resistance values of resistors R9 to R11 can be selected between 22 ohms and 51 ohms.

[0088] As Figure 9As shown in the figure, the output interface 10 of this embodiment further includes a bidirectional level conversion circuit. The bidirectional level conversion circuit includes three bidirectional level conversion circuits M1 to M3, which are respectively arranged on the connection line between the signal driver 200 and the serial clock pin 15 of the first interface socket J1, on the connection line between the signal driver 200 and the serial data line pin 16 of the first interface socket J1, and on the connection line between the signal driver 200 and the hot plug detection pin 19 of the first interface socket J1.

[0089] Among them, the circuit structure of the bidirectional level conversion circuit is as Figure 5 shown. The circuit of the bidirectional level conversion circuit can convert the voltage from 3.3V to 5V to meet the requirements of the signal driver 200 for input and output levels, and further improve the protection ability of the high-definition multimedia connector 100.

[0090] Optionally, please refer to Figure 10 , Figure 10 which is a schematic structural diagram of an embodiment of the input interface provided by this application. As Figure 10 shown, the input interface 20 of this embodiment includes a second interface socket J2 and an electrostatic protection component D. The second interface socket J2 is connected to the receiving processor 300; the electrostatic protection component D is arranged on the connection line between the second interface socket J2 and the receiving processor 300.

[0091] As Figure 10 shown, the input interface 20 further includes a decoupling resistor. One end of the decoupling resistor is connected to the receiving processor 300, and the other end is connected to the second interface socket J2, which is used to absorb the residual voltage after the electrostatic protection component D is clamped. The input interface 20 further includes a bidirectional level conversion circuit. The bidirectional level conversion circuits M1 to M3 are respectively arranged on the connection line between the receiving processor 300 and the serial clock pin of the second interface socket J2, on the connection line between the receiving processor 300 and the serial data line pin of the second interface socket J2, and on the connection line between the receiving processor 300 and the hot plug detection pin of the second interface socket J2.

[0092] Among them, compared with the circuit diagram of the output interface 10, the input interface 20 only lacks the preset power supply U1 and the pull-down resistor R18. The other circuit structures and principles of the input interface 20 are the same as those of the Figure 5 output interface 10 described above, and will not be elaborated here.

[0093] Optionally, this application further proposes an audio-video transmission system 500. Please refer to Figure 11 , Figure 11 which is a schematic block diagram of an embodiment of the audio-video transmission system provided by this application. The system includes the high-definition multimedia connector 100, the signal driver 200, and the receiving processor 300 described in any one of the above, and the processor is used to execute the interface circuit control method described in any one of the above.

[0094] In this embodiment, the signal driver 200 may be the host described above. The input interface 20 of the high-definition multimedia connector 100 sends the audio and video signals to the display device 400 for playback through the receiving processor 300.

[0095] In an application scenario, the audio and video transmission system 500 of the present application can be applied to the teaching recording and live broadcast system described above. Compared with the prior art, the high-definition multimedia connector 100 of the present application improves the protection capabilities of the input interface and the output interface, and reduces the failure rates of the signal driver and the receiving processor. The interface electronic control method of the present application can also reduce power consumption. In the application scenario of the teaching recording and live broadcast system described herein, when the host is powered off, display devices such as the recording and live broadcast host can automatically enter the sleep mode when they do not receive the preset power supply voltage and audio and video signals. When the host is powered on, the corresponding working modules can automatically resume the normal working mode, thereby reducing power consumption and saving energy. However, the technical solution of the present application is not limited to being only applied to the teaching recording and live broadcast system, and can also be applied to other scenarios and devices, which are not limited herein.

[0096] Optionally, the present application further proposes a computer-readable storage medium. Please refer to Figure 12 , Figure 12 which is a schematic structural diagram of an embodiment of the computer-readable storage medium of the present application.

[0097] The computer-readable storage medium 600 of the embodiment of the present application stores program instructions 610 internally, and the program instructions 610 are executed to implement the above interface circuit control method.

[0098] Among them, the program instructions 610 can form a program file and be stored in the above storage medium in the form of a software product, so that an electronic device (which can be a personal computer, a server, or a network device, etc.) or a processor can execute all or part of the steps of the methods of various embodiments of the present application. The foregoing storage medium includes: various media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk, or an optical disc, or a terminal device such as a computer, a server, a mobile phone, or a tablet.

[0099] The computer-readable storage medium 600 of this embodiment may be, but is not limited to, a USB flash drive, an SD card, a PD optical drive, a mobile hard disk, a large-capacity floppy drive, a flash memory, a multimedia memory card, a server, etc.

[0100] In one embodiment, a computer program product or a computer program is provided. The computer program product or the computer program includes computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions to cause the electronic device to perform the steps in the foregoing method embodiments.

[0101] In addition, if the above functions are implemented in the form of software functions and sold or used as an independent product, they can be stored in a storage medium readable by a mobile terminal. That is, the present application also provides a storage device storing program data, and the program data can be executed to implement the method of the foregoing embodiments. The storage device can be a USB flash drive, an optical disc, a server, etc. That is to say, the present application can be embodied in the form of a software product, which includes several instructions for causing an intelligent terminal to perform all or part of the steps of the methods described in the various embodiments.

[0102] In addition, the terms “first” and “second” are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with “first” and “second” may explicitly or implicitly include at least one of the features. In the description of the present application, “a plurality of” means at least two, such as two, three, etc., unless otherwise specifically defined.

[0103] Any process or method description shown in a flowchart or described in other ways herein can be understood as representing a mechanism, segment, or part of code including one or more executable instructions for implementing a specific logical function or process. The scope of the preferred embodiments of the present application includes additional implementations, where the functions may be executed in a substantially simultaneous manner or in a reverse order according to the involved functions, rather than in the order shown or discussed, and this should be understood by those skilled in the technical field to which the embodiments of the present application belong.

[0104] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definitional sequence list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device (which can be a personal computer, server, network device, or other system that can fetch instructions from the instruction execution system, apparatus, or device and execute the instructions). For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium include the following: an electrical connection portion with one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable medium on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpretation, or otherwise processing as appropriate, and then storing it in a computer memory.

[0105] The above are only embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. An interface circuit control method, characterized in that, An input interface applied to a high-definition multimedia connector, and the interface circuit control method includes: Detecting a preset power supply voltage of the input interface and an input state of an audio-video signal; Determining an adjustment signal based on the preset power supply voltage and the input state of the audio-video signal, so that the input interface adjusts a working mode based on the adjustment signal; Wherein, the determining the adjustment signal based on the preset power supply voltage and the input state of the audio-video signal, so that the input interface adjusts the working mode based on the adjustment signal includes: in response to the input interface having the preset power supply voltage continuously input within a first preset time, controlling the input interface to adjust a hot plug detection signal to a high level; determining whether there is an audio-video signal continuously input on the input interface within a second preset time; if not, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to a low level; if so, controlling the input interface to enter a normal working mode, and controlling the input interface to keep the hot plug detection signal at a high level.

2. The interface circuit control method according to claim 1, wherein The input interface is connected to a receiving processor, and a register is provided on the receiving processor. The step of detecting whether there is a preset power supply voltage input on the input interface includes: Reading a first Boolean value of a power supply input bit of the register; In response to the first Boolean value being true, there is the preset power supply voltage input on the input interface; In response to the first Boolean value being false, there is no preset power supply voltage input on the input interface.

3. The interface circuit control method according to claim 2, characterized in that The step of determining whether there is an audio-video signal continuously input on the input interface within a second preset time includes: Reading a second Boolean value of a video input bit of the register; In response to the second Boolean value being true, there is the audio-video signal input on the input interface; In response to the second Boolean value being false, there is no audio-video signal input on the input interface.

4. The interface circuit control method according to claim 1, wherein It further includes: In response to the input interface not having the preset power supply voltage continuously input within the first preset time, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to a low level.

5. A high-definition multimedia connector, characterized in that, It includes an input interface and an output interface. The input interface is used to receive an audio-video signal sent by the output interface; the output interface is used to provide a preset power supply voltage for the input interface; Among them, the input interface is connected to the receiving processor, so that the receiving processor is used to generate an adjustment signal based on the preset power supply voltage of the input interface and the input state of the audio-video signal, and the input interface adjusts the working mode based on the adjustment signal; among them, the step of the input interface adjusting the working mode based on the adjustment signal includes: in response to the continuous input of the preset power supply voltage by the input interface within the first preset time, the input interface adjusts the hot plug detection signal to a high level; the input interface determines whether there is continuous input of the audio-video signal within the second preset time; if not, the input interface enters the sleep mode, and the input interface adjusts the hot plug detection signal to a low level; if so, the input interface enters the normal working mode, and the input interface keeps the hot plug detection signal at a high level.

6. The high-definition multimedia connector according to claim 5, characterized in that, The output interface includes: A preset power supply for providing the preset power supply voltage to the input interface; A first interface socket, and the first interface socket is respectively connected to the signal driver and the preset power supply; An electrostatic protection component, and the electrostatic protection component is arranged on the connection line between the first interface socket and the signal driver.

7. The high-definition multimedia connector according to claim 6, characterized in that The output interface further includes: A decoupling resistor, one end of the decoupling resistor is connected to the signal driver, and the other end is connected to the first interface socket, and is used to absorb the residual voltage after the electrostatic protection component clamps the voltage.

8. The high-definition multimedia connector according to claim 7, characterized in that, The output interface further includes: A bidirectional level conversion circuit, and the bidirectional level conversion circuit is respectively arranged on the connection line between the signal driver and the serial clock pin of the first interface socket, on the connection line between the signal driver and the serial data line pin of the first interface socket, and on the connection line between the signal driver and the hot plug detection pin of the first interface socket.

9. The high-definition multimedia connector according to claim 5, wherein, The input interface includes: A second interface socket, and the second interface socket is connected to the receiving processor; An electrostatic protection component, and the electrostatic protection component is arranged on the connection line between the second interface socket and the receiving processor.

10. The high-definition multimedia connector according to claim 9, wherein, The input interface further includes: A decoupling resistor, one end of the decoupling resistor is connected to the receiving processor, and the other end is connected to the second interface socket, and is used to absorb the residual voltage after the electrostatic protection component clamps the voltage.

11. The high-definition multimedia connector according to claim 10, characterized in that, The input interface further includes: A bidirectional level conversion circuit, and the bidirectional level conversion circuit is respectively arranged on the connection line between the receiving processor and the serial clock pin of the second interface socket, on the connection line between the receiving processor and the serial data line pin of the second interface socket, and on the connection line between the receiving processor and the hot plug detection pin of the second interface socket.

12. The high-definition multimedia connector according to claim 5, wherein The input interface is further used to send the hot plug detection signal to the output interface, so that the output interface determines whether the input interface is connected to the output interface based on the hot plug detection signal.

13. An audio and video transmission system, characterized in that, Including the high-definition multimedia connector, signal driver, and receiving processor described in any one of claims 6-12, wherein the signal driver is connected to the output interface of the high-definition multimedia connector, and the receiving processor is configured to execute the interface circuit control method described in any one of claims 1-4.

14. A computer-readable storage medium, characterized in that, Internally stores program instructions, characterized in that the program instructions are executed to implement the interface circuit control method described in any one of claims 1-4.

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