A New Zener Reference Circuit

Abstract

The present invention provides a novel Zener reference circuit, comprising a first PMOS tube, a second PMOS tube, a first triode, a second triode, a first current source, a third PMOS tube, a fourth PMOS tube, a capacitor, a third triode, a fifth triode, a first resistor, a fourth triode, a second resistor, a third resistor, a variable resistor, a fifth PMOS tube, a sixth resistor, a ΔVBE unit, an operational amplifier, a fourth resistor, a fifth resistor, a Zener diode, and a second current source. The Zener reference circuit of the present invention can greatly improve the load modulation performance. By grounding the drain of the additional third PMOS tube, a large load current flowing from the outside is introduced into the ground, reducing the impact on the working state of the circuit, and realizing the Series Mode and Shunt Mode functions at the same time. The application scenario is more extensive than the existing solution, and the performance is very good in both working modes.

Description

Technical Field

[0001] The invention relates to the technical field of analog integrated circuits, and in particular to a novel Zener reference circuit. Background Art

[0002] The reference voltage source provides a voltage reference in the circuit and is extremely important in analog integrated circuits. As a core module used in circuits such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), low-dropout linear regulators (LDOs), and communication circuits, the performance of the reference voltage source affects the performance and accuracy of many modules, and its criticality is beyond doubt.

[0003] Among the common reference sources, the bandgap reference source is the mainstream reference source. The base-emitter voltage drop of the BJT tube is a voltage with a negative temperature coefficient, and when the currents of the two BJT tubes are in a fixed ratio, the difference between the base-emitter voltage drops of the two BJT tubes is a voltage with a positive temperature coefficient. At this time, the two bipolar junction transistors (BJTs) are used to form positive and negative temperature coefficient voltages that compensate each other in proportion to obtain a reference voltage with a zero temperature coefficient.

[0004] Zener reference design is also an important branch of reference design. Compared with bandgap reference, Zener reference has better long-term stability and durability, and is more practical in fields with such requirements. Zener diode is also called voltage regulator diode. This device has a very high resistance before reaching the critical reverse breakdown voltage, and generates a stable reference voltage after reaching the breakdown voltage. Its long-term stability has significant advantages. Usually, the Zener breakdown voltage has a positive temperature coefficient, and the V BE The negative temperature coefficient of the reference voltage can be compensated to achieve a zero temperature coefficient reference voltage.

[0005] Existing Zener reference source design schemes are as follows Figure 1 As shown, the base-emitter voltage V BE2 is a negative temperature coefficient voltage, while the breakdown voltage of Zener tube Z1 has a positive temperature coefficient. Among them, I1, I2, and I3 are current sources, V DD is the power supply voltage. By designing the resistance values ​​of resistors R1 and R2, using the V EB2 The negative temperature coefficient of the Zener tube Z1 and the positive temperature coefficient of the breakdown voltage are added together to achieve a reference output voltage V close to zero temperature coefficient. OUT .

[0006] The output voltage of this circuit is V OUT Both pull-up and pull-down have strong driving capability.

[0007] Disadvantages of existing solutions:

[0008] (1) The load regulation performance of this solution is poor. When a large current flows from the external load into V OUT When the node is reached, part of the current passes through diode D3 and enters the branch where BJT tube Q3 is located, which significantly affects the working state of the circuit and ultimately affects the reference voltage V OUT accuracy.

[0009] (2) It is difficult to achieve a small reference voltage V OUT For example, if you want to achieve a 5V reference voltage V OUT , then the Zener tube Z1 will not work properly. This is because the Zener tube Z1 and the current source I2 are controlled by V OUT Power supply (see Figure 1 ), where the supply voltage V OUT The voltage is 5V, while the normal voltage drop of Zener tube is 5.6V, which is greater than its supply voltage.

[0010] (3) This solution can only realize the Series Mode working mode, but not the Shunt Mode working mode, and its application scope is relatively narrow. The concepts of Series Mode and Shunt Mode are shown in Figure 2(a) and Figure 2(b). The classic bandgap reference circuit is the Series Mode working mode. In contrast, the Shunt Mode working mode is different. In the Shunt Mode mode, the reference circuit works as a two-port device, and its upper port (i.e., V DD port) is left floating, as shown in Figure 2(b). OUT Connect a resistor to the power supply voltage at the port to generate the required reference voltage V OUT .

[0011] (4) Zener breakdown voltage with positive temperature coefficient and V with negative temperature coefficient BE2 It is difficult to match exactly (see Figure 1 ), so this existing solution is difficult to achieve a zero temperature coefficient reference voltage, and it has a OUT There is no precise method for correcting the temperature coefficient. Summary of the invention

[0012] The key technical point of the present invention is to propose a Zener reference circuit that can greatly improve the load modulation performance. By grounding the drain of the additional PMOS tube M3, the large load current flowing in from the outside is introduced into the ground, thereby reducing the impact on the working state of the circuit. This innovation is different from the existing solution. In the existing solution, the large current enters the circuit through the diode D3, which greatly affects the working state of the circuit. In contrast, the improved structure of the present invention solves this problem and achieves a significant improvement in load modulation performance.

[0013] Another key technical point of the present invention is the addition of the Shunt Mode function, so that the Zener benchmark has both the Series Mode function and the Shunt Mode function to choose from. The proposed startup circuit of the Shunt Mode function ensures that the Zener benchmark can be started smoothly when powered on. In contrast, the existing solution can only realize the Series Mode function, but not the Shunt Mode function. The present invention realizes both the Series Mode and Shunt Mode functions, and the application scenarios are more extensive than the existing solutions, and the present invention has good performance in both working modes.

[0014] Definitions of Abbreviations and Key Terms:

[0015] (1) Zener: A type of diode in which a P-type semiconductor and an N-type semiconductor are fused together to form a PN junction. A depletion layer with reverse ions is formed around the PN junction.

[0016] (2) BJT (Bipolar Junction Transistor): A bipolar junction transistor is a device that combines two PN junctions through a certain process. It has two combination structures: PNP and NPN.

[0017] (3) MOS (Metal-Oxide-Semiconductor): Metal-Oxide-Semiconductor Field Effect Transistor, a field effect transistor that can be widely used in analog circuits and digital circuits.

[0018] (4) VDD (Power Supply Voltage): power supply voltage, operating voltage of the chip.

[0019] (5) GND (Ground Voltage): Ground voltage, ground voltage of the chip.

[0020] (6) ADC (Analog-to-Digital Converter): Analog-to-digital converter, a circuit that converts analog signals into digital signals.

[0021] (7)LDO (Low Dropout Regulator): A linear regulator that uses a transistor operating in its saturation region to subtract excess voltage from the applied input voltage to produce a regulated output voltage.

[0022] (8)Shunt Mode: bypass mode, bypass mode of the reference voltage source.

[0023] (9) Series Mode: Serial mode, serial mode of reference voltage source.

[0024] (10) Load Regulation: Load modulation. The absolute value of the reference voltage changes due to changes in the load. The smaller the load modulation, the better.

[0025] The present invention provides a novel Zener reference circuit, comprising a first PMOS tube, a second PMOS tube, a first triode, and a second triode connected to a power supply voltage, a first current source connected to a G pole and a D pole of the first PMOS tube, a third PMOS tube, a fourth PMOS tube, and a capacitor connected to a base of the first triode, a third triode, a fifth triode, and a first resistor connected to an emitter of the second PMOS tube, a fourth triode connected to an emitter of the third triode, a second resistor connected to the first resistor, a third resistor connected to the second resistor, and a variable resistor, a fifth PMOS tube connected to an S pole of the fourth PMOS tube, a sixth resistor connected to the capacitor, and a ΔV connected to the emitter of the fifth triode. BE unit, with the fifth PMOS tube G base, the sixth resistor, ΔV BE an operational amplifier connected to the unit, a fourth resistor and a fifth resistor connected to the positive input terminal of the operational amplifier, a Zener diode connected to the third resistor, the fourth resistor, the fifth resistor, the variable resistor, and the S pole of the fifth PMOS tube, and a second current source connected to the Zener diode; the G pole of the first PMOS tube is connected to the G pole of the second PMOS tube, the collector of the first triode is connected to the collector of the second triode, the emitter of the first triode is connected to the base of the second triode, the emitter of the third triode is connected to the base and collector of the fourth triode, the emitter of the fourth triode is connected to the S pole of the third PMOS tube, the D pole of the third PMOS tube is grounded, the S pole of the fourth PMOS tube is connected to the D pole of the fifth PMOS tube, and the output terminal of the operational amplifier is connected to the G pole of the fifth PMOS tube.

[0026] In the novel Zener reference circuit described in the present invention, as a preferred embodiment, the first triode and the second triode form a Darlington structure.

[0027] In the novel Zener reference circuit described in the present invention, as a preferred embodiment, the power supply voltage generating circuit includes a diode.

[0028] The novel Zener reference circuit described in the present invention, as a preferred embodiment, includes a bypass mode and a serial mode.

[0029] In the novel Zener reference circuit described in the present invention, as a preferred embodiment, the startup circuit in the bypass mode includes a seventh resistor, a BJT tube connected to the seventh resistor, and an eighth resistor connected to the BJT tube.

[0030] The novel Zener reference circuit described in the present invention is preferably configured such that ΔV BE The unit includes a fourth current source connected to the supply voltage, a first diode string connected to the fourth current source, a second diode string connected to the first diode string and a third current source connected to the second diode string.

[0031] In the novel Zener reference circuit described in the present invention, as a preferred embodiment, the first diode string and the second diode string have different sizes.

[0032] The present invention has the following advantages: OUT The Darlington BJT tubes Q1, Q2 and the third PMOS tube M3 are used to achieve better load modulation performance. By connecting the power supply of the second current source I2 to V DD , rather than connecting to V OUT , so that the Zener benchmark can produce a smaller V OUT (such as V OUT =5V). By adding an additional Shunt module, the Zener reference can work in Shunt Mode, allowing users to freely choose Series Mode and Shunt Mode functions. The additional Shunt Mode startup circuit ensures that the Zener reference can start smoothly when powered on in Shunt Mode. By introducing an additional ΔV BE The unit solves the problem of mismatch between the temperature coefficients of Zener tubes and BJT tubes. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a Zener reference source circuit diagram in the prior art;

[0034] Figure 2(a) is a schematic diagram of the Series operating mode of the Zener benchmark;

[0035] Figure 2(b) is a schematic diagram of the Shunt working mode of the Zener benchmark;

[0036] Figure 3 The circuit diagram of a new Zener reference circuit is shown in FIG.

[0037] Figure 4 A new Zener reference circuit with V in Shunt mode DD Generate a circuit schematic;

[0038] Figure 5 A new type of Zener reference circuit Shunt mode startup circuit;

[0039] Figure 6 A new Zener reference circuit ΔV BE Unit circuit diagram.

[0040] Reference numerals:

[0041] V DD , power supply voltage; M1, first PMOS tube; M2, second PMOS tube; M3, third PMOS tube; M4, fourth PMOS tube; M5, fifth PMOS tube; Q1, first triode; Q2, second triode; Q3, third triode; Q4, fourth triode; Q5, fifth triode; I1, first current source; I2, second current source; I3, third current source; I4, fourth current source; C C , capacitor; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; R7, seventh resistor; R8, eighth resistor; AMP, operational amplifier; Z1, Zener diode; D4, diode. DETAILED DESCRIPTION

[0042] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0043] Example 1

[0044] like Figure 3 As shown, a novel Zerner reference circuit includes a first PMOS tube M1 connected to a power supply voltage, a second PMOS tube M2, a first transistor Q1, a second transistor Q2, a first current source I1 connected to the G pole and the D pole of the first PMOS tube M1, a third PMOS tube M3 connected to the base of the first transistor Q1, a fourth PMOS tube M4, and a capacitor C C , a third transistor Q3 connected to the emitter of the second PMOS tube M2, a fifth transistor Q5, a first resistor R1, a fourth transistor Q4 connected to the emitter of the third transistor Q3, a second resistor R2 connected to the first resistor R1, a third resistor R3 connected to the second resistor R2, a variable resistor, a fifth PMOS tube M5 connected to the S pole of the fourth PMOS tube M4, and a capacitor C CThe sixth resistor R6 connected to the emitter of the fifth transistor Q3 is connected to the ΔV BE unit, and the fifth PMOS tube M5 G base, the sixth resistor R6, ΔV BE an operational amplifier AMP connected to the unit, a fourth resistor R4 and a fifth resistor R5 connected to the positive input terminal of the operational amplifier AMP, a Zener diode Z1 connected to the third resistor R3, the fourth resistor R4, the fifth resistor R5, the variable resistor and the S pole of the fifth PMOS tube M5, and a second current source I2 connected to the Zener diode Z1; the G pole of the first PMOS tube M1 is connected to the G pole of the second PMOS tube M2, the collector of the first triode Q1 is connected to the collector of the second triode Q2, the emitter of the first triode Q1 is connected to the base of the second triode Q2, the emitter of the third triode Q3 is connected to the base and collector of the fourth triode Q4, the emitter of the fourth triode Q4 is connected to the S pole of the third PMOS tube M3, the D pole of the third PMOS tube M3 is grounded, the S pole of the fourth PMOS tube M4 is connected to the D pole of the fifth PMOS tube M5, and the output terminal of the operational amplifier AMP is connected to the G pole of the fifth PMOS tube M5.

[0045] (1) In order to optimize the load modulation performance, Figure 1 The diode D3 in the circuit is replaced by a third PMOS tube M3 and a third diode Q3 and a fourth diode Q4 in series. When a large current flows from an external load into V OUT When the high current flows through the third diode Q3 and the fourth diode Q4, it flows into the third PMOS tube M3. The drain of the third PMOS tube M3 is connected to the ground, so that most of the current is conducted into the ground, thereby reducing the impact on the internal Zener reference when the high current load occurs, and achieving excellent load regulation performance.

[0046] (2) In order to optimize the load modulation performance, Figure 1 The first diode Q1 in the circuit is modified into a Darlington structure consisting of the first diode Q1 and the second diode Q2. The Darlington structure has a large current gain. When a large current flows from V OUT When flowing out to the external load, the large current gain of the Darlington transistor can reduce the base current of the first diode Q1, thereby effectively improving the load modulation performance.

[0047] (3) In order to solve the original circuit ( Figure 1 ) Medium voltage V OUT If the Zener tube does not work properly when the V OUT The node is separated from the second current source I2 (see Figure 3 ), avoiding the above problems. At the same time, in order to ensure the reference voltage V OUTWith a sufficiently good PSRR, the second current source I2 adopts a current generator with a high PSRR.

[0048] (4) In order to solve the original solution ( Figure 1 ) can only implement the Series Mode mode but not the Shunt Mode mode. This embodiment implements both the Series Mode and Shunt Mode working modes through new technologies.

[0049] The Shunt Mode function of the new solution is implemented as follows Figure 4 In the Shunt Mode mode, since the power node in Figure 2(b) is suspended, Figure 3 The first current source I1, the second current source I2 and ΔV BE Modules such as cells cannot work properly, so additional circuits must be used to generate V DD , the circuit structure is as follows Figure 4 Specifically, Figure 4 A fourth diode D4 is used to generate the required V DD When the fourth diode D4 is turned on, the generated V DD V OUT Smaller than a diode drop.

[0050] When the circuit operates in Shunt Mode, due to V DD Less than V OUT (one diode drop smaller), so Figure 3 The first diode Q1 and the second diode Q2 in the series mode are not working. Although the first diode Q1 and the second diode Q2 are important components of the output negative feedback loop in the series mode, they cannot work in the shunt mode. But there is no need to worry about the lack of the first diode Q1 and the second diode Q2 in the shunt mode. This is because in the shunt mode, the negative feedback function of the first diode Q1 and the second diode Q2 is replaced by the third PMOS tube M3 (see Figure 3 ), so the first diode Q1 and the second diode Q2 are no longer needed. Specifically, if V OUT If the voltage rises unexpectedly, V1 will rise, causing V X Rise, V Y Rise, V AMP At this time, due to the action of the third PMOS tube M3, V OUT Therefore, even in Shunt Mode, the new solution also realizes the clamping function of output negative feedback.

[0051] In addition, the fourth diode D4 (see Figure 4 ) While implementing the Shunt Mode function, it does not affect the normal operation of Series Mode. Specifically, in Series Mode, due to V DD The voltage is connected from outside the chip, and V DD Greater than the output voltage V OUT Therefore, the fourth diode D4 is turned off, and the fourth diode D4 does not affect the normal operation of the Series Mode.

[0052] (5) In order to ensure the normal operation of Shunt Mode, this embodiment proposes a corresponding startup circuit, such as Figure 5 Without this startup circuit, the Zener reference may operate in a zero current state, that is, V OUT Specifically, in Shunt Mode, if V OUT is 0, resulting in V DD 0(V DD By V OUT The voltage drop of Zener diode Z1 is 0, which further leads to V OUT 0(V OUT Proportional to the voltage drop of Zener diode Z1 and the voltage drop of BJT tube V BE5 This positive feedback (V OUT To further promote V OUT The present invention breaks this zero current state by determining whether the Zener reference is in a zero current state. If it is in a zero current state, the positive feedback loop is disconnected by an additional switch, thereby causing the Zener reference to jump out of the zero current state. Figure 5 As shown, the proposed startup circuit is composed of a BJT tube QSH, a seventh resistor R7, and an eighth resistor R8. SH The base is connected to Figure 3 The Zener tube output terminal V4 in the OUT When it is 0 (Zener reference is in zero current state), BJT tube Q SH Shutdown (its V BE Less than or equal to 0), so there is no current in the seventh resistor R7 and the eighth resistor R8, resulting in the output voltage V3 being 0 (see Figure 5 ). This voltage V3 is provided to Figure 3 This causes the fourth PMOS tube M4 to be turned off, thereby disconnecting the positive feedback loop mentioned above, causing the Zener reference to gradually jump out of the zero current state. Specifically, the current flowing from the chip to VOUT The current I SH Lead V OUT gradually increases (see Figure 2(b)), resulting in V DD gradually increases, causing the first current source I1 and the second current source I2 to start working (see Figure 3 ). The current of the first current source I1 is mirrored to the current mirror M2. At this time, since the fourth PMOS tube M4 has been turned off, the drain voltage V2 of the second PMOS tube M2 gradually increases, causing the third PMOS tube M3 to be turned off, so that the current from outside the chip flows into V OUT The current I SH It will not flow into GND through the third PMOS tube M3. Instead, I SH Will be in V OUT The charge accumulates at V OUT Continues to rise, causing the Zener reference to jump out of the zero current state.

[0053] When the Zener reference jumps out of the zero current state, V OUT Return to normal reference voltage. Figure 5 BJT tube Q in SH The seventh resistor R7 and the eighth resistor R8 are turned on, so that current flows through them, thereby making the output voltage V3 high. Figure 3 The fourth PMOS tube M4 in the switch is turned on, so the entire Zener reference enters a normal working state.

[0054] (6) In order to solve the problem of mismatch between the temperature coefficients of the Zener tube and the BJT tube, this embodiment introduces ΔV BE Unit, such as Figure 6 This circuit generates an additional ΔV BE Voltage, solved Figure 3 The Zener diode Z1 and the BJT tube V BE5 The temperature coefficient mismatch problem makes the Zener reference have a zero temperature coefficient reference voltage V OUT .

[0055] exist Figure 6 In the figure, the third current source I3 and the fourth current source I4 provide bias current for the diode strings (diode-connected PNP tube strings) on the left and right sides respectively. The three rows of diodes on the left and the three rows of diodes on the right are different in size, so X With V Y Achieved ΔV BE By programming the right diode size (controlled by the Trim signal), ΔV BE The temperature coefficient of

[0056] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A novel Zener reference circuit, characterized in that: Including bypass mode and serial mode; The invention comprises a first PMOS tube connected to a power supply voltage, a second PMOS tube, a first triode, a second triode, a first current source connected to the G pole and the D pole of the first PMOS tube, a third PMOS tube, a fourth PMOS tube, and a capacitor connected to the base of the first triode, a third triode, a fifth triode, and a first resistor connected to the emitter of the second PMOS tube, a fourth triode connected to the emitter of the third triode, a second resistor connected to the first resistor, a third resistor connected to the second resistor, a variable resistor, a fifth PMOS tube connected to the S pole of the fourth PMOS tube, a sixth resistor connected to the capacitor, and a ΔV connected to the emitter of the fifth triode. BE unit, and the fifth PMOS tube G base, the sixth resistor, the ΔV BE an operational amplifier connected to a unit, a fourth resistor and a fifth resistor connected to the positive input terminal of the operational amplifier, a Zener diode connected to the third resistor, the fourth resistor, the fifth resistor, the variable resistor, and the S pole of the fifth PMOS tube, and a second current source connected to the Zener diode; the G pole of the first PMOS tube is connected to the G pole of the second PMOS tube, the collector of the first triode is connected to the collector of the second triode, the emitter of the first triode is connected to the base of the second triode, the emitter of the third triode is connected to the base and collector of the fourth triode, the emitter of the fourth triode is connected to the S pole of the third PMOS tube, the D pole of the third PMOS tube is grounded, the S pole of the fourth PMOS tube is connected to the D pole of the fifth PMOS tube, and the output terminal of the operational amplifier is connected to the G pole of the fifth PMOS tube.

2. A novel Zener reference circuit according to claim 1, characterized in that: The first transistor and the second transistor form a Darlington structure.

3. A novel Zener reference circuit according to claim 1, characterized in that: The supply voltage generating circuit includes a diode.

4. A novel Zener reference circuit according to claim 1, characterized in that: The startup circuit of the bypass mode includes a seventh resistor, a BJT tube connected to the seventh resistor, and an eighth resistor connected to the BJT tube.

5. A novel Zener reference circuit according to claim 1, characterized in that: The ΔV BE The unit comprises a fourth current source connected to the supply voltage, a first diode string connected to the fourth current source, a second diode string connected to the first diode string and a third current source connected to the second diode string.

6. A novel Zener reference circuit according to claim 5, characterized in that: The first diode string and the second diode string have different sizes.

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