A method of feature map superposition optimization

By using banker's rounding and feature map overlay optimization, the problem of limited registers in the chip was solved, improving the computing speed and data storage efficiency, achieving a 50-fold speed improvement.

CN115904489BActive Publication Date: 2026-07-03INGENIC SEMICON CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
INGENIC SEMICON CO LTD
Filing Date
2021-08-12
Publication Date
2026-07-03

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Abstract

This invention provides a method for optimizing feature map overlay, comprising: in the calculation of low-bit feature maps, the banker's rounding method is used for calculation, assuming the input is a, b, and the output is res, the formula is as follows: using an instruction to calculate the average of two numbers, the input is two 8-bit data, the output is one 8-bit data, the average is calculated by rounding down, to achieve (a+b)>>1, and then using XOR and AND instructions to calculate formula (13); in terms of data loading, 128 data are loaded at a time, and 128 data are loaded for each of the two feature maps; since there are a total of 32 registers, no more than 32 can be used; first design the operation of the above formula (13), and then design the overall operation to achieve optimization. This method is the relatively best optimization method. After adopting this method, the operation speed can be increased by 50 times compared with the original method designed using C language.
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Description

Technical Field

[0001] This invention relates to the field of image processing technology, and in particular to a method for feature map overlay optimization. Background Technology

[0002] Integrated circuit technology is increasingly becoming a focus of technological development, and many chip manufacturers are developing their own chips. However, in chip applications, each chip design presents its own specific needs and challenges. Some chips produced by chip manufacturers have 128-bit registers, and the number of registers is limited to 32. Using more than 32 registers will cause previously loaded register data to be stored in memory. When this data is needed again later, it needs to be reloaded, resulting in low efficiency. Furthermore, the cache storage space is very small, typically only 512 bits, and is shared with the system. Loaded data is first loaded from DDR (DDR SDRAM = Double Data Rate Synchronous Dynamic Random Access Memory, commonly referred to as DDR) into the cache space, loading 512 bits at a time, and then loading from the cache into the registers. If less than 512 bits are used, other data will be overwritten by the system or other applications, and the data will need to be reloaded when needed again. Therefore, it is necessary to use as much data as possible loaded into the cache. The data transfer bottleneck arises from the transfer between DDR and the cache.

[0003] Therefore, the shortcomings of existing technology are:

[0004] 1. Using C programs directly on chips manufactured by Beijing Junzheng is very slow.

[0005] 2. There is still no optimized method for calculating the two means of feature maps based on the banker's rounding method (rounding without even rounding).

[0006] In addition, the following are commonly used terms in the prior art:

[0007] 1. SIMD instructions: Single Instruction Stream, Multiple Data Stream, meaning a single instruction can execute multiple data streams, thus improving program processing speed. In simpler terms, it's a vector-based computation. Different chips have different instruction sets.

[0008] 2. Feature Map: The result obtained after input data is processed by convolution is called a feature map (or output data). The result generated after data is processed by a fully connected layer is also called a feature map (or output data). The size of a feature map is generally expressed as length × width × depth, or 1 × depth. Depth is also called a channel. Summary of the Invention

[0009] To address the problems in the prior art, the purpose of this application is to achieve a significant increase in computational speed by employing this method. Specifically, it addresses the issue of chips with 128-bit registers and a limited number of registers, enabling optimization through a banker's intake-based computational method.

[0010] Specifically, this invention provides a method for feature map overlay optimization, the method comprising: in the calculation of low-bit feature maps, using the banker's rounding method, assuming the inputs are a, b, and the output result is res, as shown in the following formula:

[0011] Formula 13

[0012] This implementation uses an instruction to calculate the average of two numbers. The input consists of two 8-bit data points, and the output is a single 8-bit data point after the average is calculated. The average is calculated using a rounding method. Then, the XOR and AND instructions are used to calculate Formula 13. When loading data, 128 data points are loaded at a time, and 128 data points are loaded for each of the two feature maps. Since there are a total of 32 registers, no more than 32 can be used. First, the operation of Formula 13 above is designed, and then the overall operation is optimized.

[0013] The method further includes:

[0014] S1, the operation of formula 13:

[0015] Let the function of the formula be vrd = average_bank(vrs, vrt), the two input registers be vrs and vrt, and the output result be vrd; the temporary registers for intermediate calculations are ave_tmp and vorand_tmp;

[0016] S1.1, use the mean command to calculate the mean, input vrd and vrt, and store the output result in ave_tmp, thus implementing formula 3: The operation;

[0017] S1.2, using the XOR instruction, input vrd and vrt, and store the output result in vorand_tmp to implement formula 4: The operation;

[0018] S1.3 uses AND operations, taking `ave_tmp` and `vorand_tmp` as inputs, and storing the output in `vorand_tmp`, thus implementing... The operation;

[0019] S1.4 uses the AND instruction to perform operations. Inputting `vorand_tmp` and 1, the output is stored in `vorand_tmp`, thus implementing formula 12: The operation;

[0020] S1.5 uses the addition instruction to perform the operation. Inputs are `ave_tmp` and `vorand_tmp`, and the output is stored in `vrd`, thus implementing formula 13: The operation;

[0021] S2, the overall operation

[0022] Since there are 32 registers in total, the core processing part is made into a function, and the function vrd = average_bank(vrs, vrt) is called each time the online processing method is used;

[0023] S2.1, Load data. Each time, load 128 data inputs to be loaded, indata1 and indata2. The data is loaded into variables vrsv and vrtv. Let m correspond to 0, 16, 32, 48, 64, 80, 96, and 112 respectively. Load 128 bits of data starting from the positions m pointed to by data indata1 and indata2 in memory respectively. All data must be read continuously and cannot be read intermittently by indata1 and indata2. Let the register array used for loading data be vrsv[8] and vrtv[8]. Load data from data indata1. When m=0, start from the 0th data and load 16 8-bit data into vrsv[0]. When m=16, start from the 16th data and load 16 8-bit data into vrsv[1]. ... When m=112, start from the 112th data and load 16 8-bit data into vrsv[7]. After processing, indata1 = indata1 + 128. Data is loaded from data indata2. When m=0, 16 8-bit data are loaded into vrtv[0] starting from the 0th data; when m=16, 16 8-bit data are loaded into vrtv[1] starting from the 16th data; ...; when m=112, 16 8-bit data are loaded into vrtv[7] starting from the 112th data; after processing, indata2 = indata2 + 128.

[0024] S2.2, call vrd = average_bank(vrs, vrt) to process vrsv and vrtv, and save the processing result to vrsv:

[0025] S2.2.1, let each input vrsv[i] and vrtv[i] be processed, and the output result be saved to vrsv[i].

[0026] vrsv[i] = average_bank(vrsv[i], vrtv[i]);

[0027] S2.2.2, starting with i=0, substitute into step S2.2.1, then substitute i=1 to i=7 in sequence, calculate all results, and save them to vrsv;

[0028] S2.3, output the results to savedata, and the output results should also be output all at once:

[0029] The register variable `vrsv[i]` stores the data, where `i` = 0, ..., 7. The pointer `savedata` stores the data, and it represents the starting address of the memory space. Data is stored in batches sequentially by changing the pointer. After storing a batch of data, the `savedata` pointer is incremented by the number of data items stored (i.e., `savedata = savedata + 128`), storing 8 bits of data. Let `m` correspond to 0, 16, 32, 48, 64, 80, 96, and 112 respectively. The 128 bits of data stored in `vrsv[i]` are stored in `savedata`, starting from the location pointed to by `savedata` in memory. Store the data in savedata. When m=0, start storing 16 8-bit data in vrsv[0] from the position savedata+0; when m=16, start storing 16 8-bit data in vrsv[1] from the position savedata+16; ...; when m=112, start storing 16 8-bit data in vrsv[7] from the position savedata+112; after processing, savedata = savedata+128.

[0030] The banker's rounding method is as follows:

[0031] ab = a + b; Formula 2

[0032] res_0=ab >> 1; Formula 3

[0033] Calculation of whether to carry over the remainder:

[0034] Formula 4

[0035] Formula 5

[0036] Formula 6

[0037] Formula 7

[0038] From formula 2-7, we have:

[0039] Formula 8

[0040] Based on the rules of AND, OR, and XOR operations, simplify formula 8:

[0041] Formula 9

[0042] Calculation of positive and negative signs:

[0043] Formula 10

[0044] Calculate whether the data carries over using formulas 9 and 10:

[0045] Formula 11

[0046] Because there is a [missing information] in Formula 8 Therefore, the result can only be 0 or 1; according to the rules of AND, OR, and XOR operations, formula 11 is simplified as follows:

[0047] Formula 12

[0048] From formulas 2, 3, and 12, we get

[0049] Formula 13

[0050] Formula 13 is the final calculation formula.

[0051] Step S1 includes:

[0052] S1.1 uses the mean instruction. The output variable stores 16 int8_t data points, and the input variables vrs and vrt store 16 int8_t data points. The rounding method uses full rounding, as shown below:

[0053] ave_tmp = ingenic_aves_b(vrs, vrt);

[0054] S1.2 uses the XOR instruction. The output variable stores 16 int8_t data, and the input variables vrd and vrt store 16 int8_t data, represented as:

[0055] vorand_tmp = ingenic_xorv_b(vrd, vrt);

[0056] S1.3 uses the AND instruction. The output variable stores 16 int8_t data, and the input variables ave_tmp and vorand_tmp store 16 int8_t data, represented as:

[0057] vorand_tmp = ingenic_andv_b(ave_tmp, vorand_tmp);

[0058] S1.4 uses the AND instruction. The output variable stores 16 int8_t data, and the input variable vorand_tmp stores 16 int8_t data. 1 is a constant, represented as:

[0059] vorand_tmp = ingenic_andi_b(vorand_tmp, 1);

[0060] S1.5 uses an addition instruction. The output variable stores 16 int8_t data, and the input variables ave_tmp and vorand_tmp store 16 int8_t data, represented as:

[0061] vrd = ingenic_add_b(ave_tmp,vorand_tmp).

[0062] Step S2 further includes:

[0063] S2.1 uses a load instruction, with the input data to be loaded as indata1 and indata2. Let m be 0, 16, 32, 48, 64, 80, 96, and 112 respectively. The current pointer is the data pointer. Starting from the location pointed to by the data in memory, 128 bits of data are loaded. If it is 8-bit data, 16 bits are loaded; if it is 16-bit data, 8 bits are loaded. The data is loaded into the variable vrd. m is calculated in bytes, that is, 8 bits as a unit. Starting from the location m pointed to by the data indata1 and indata2 in memory, 128 bits of data are loaded. Data is loaded from data indata1. When m=0, starting from the 0th data, 16 8-bit data are loaded into vrsv[0]; when m=16, starting from the 16th data, 16 8-bit data are loaded into vrsv[1]; ...; when m=112, starting from the 112th data, 16 8-bit data are loaded into vrsv[7]; after processing, indata1 = indata1 + 128. Data is loaded from data indata2. When m=0, starting from the 0th data, 16 8-bit data are loaded into vrtv[0]; when m=16, starting from the 16th data, 16 8-bit data are loaded into vrtv[1]; ...; when m=112, starting from the 112th data, 16 8-bit data are loaded into vrtv[7]; after processing, indata2 = indata2 + 128. This is represented as:

[0064] vrsv[0] = ingenic_load(indata1,0);

[0065] vrsv[1] = ingenic_load(indata1,16);

[0066] vrsv[2] = ingenic_load(indata1,32);

[0067] vrsv[3] = ingenic_load(indata1,48);

[0068] vrsv[4] = ingenic_load(indata1,64);

[0069] vrsv[5] = ingenic_load(indata1,80);

[0070] vrsv[6] = ingenic_load(indata1,96);

[0071] vrsv[7] = ingenic_load(indata1,112);

[0072] vrtv[0] = ingenic_load(indata2,0);

[0073] vrtv[1] = ingenic_load(indata2,16);

[0074] vrtv[2] = ingenic_load(indata2,32);

[0075] vrtv[3] = ingenic_load(indata2,48);

[0076] vrtv[4] = ingenic_load(indata2,64);

[0077] vrtv[5] = ingenic_load(indata2,80);

[0078] vrtv[6] = ingenic_load(indata2,96);

[0079] vrtv[7] = ingenic_load(indata2,112).

[0080] Step S2.3 further includes: using a data saving instruction, a register variable vrsv[i] for saving data, i=0,……,7, a pointer savedata for storing data, storing data in the register starting from the pointer position, storing 128 bits of data in vrd into savedata, where m is calculated in bytes, i.e., 8 bits per unit, and saving 128 bits of data starting from the position m pointed to by savedata in memory. When storing data into savedata, when m=0, 16 8-bit data in vrsv[0] are stored starting from savedata+0; when m=16, 16 8-bit data in vrsv[1] are stored starting from savedata+16;……; when m=112, 16 8-bit data in vrsv[7] are stored starting from savedata+112; after processing, savedata = savedata+128. This is represented as:

[0081] ingenic_save(vrsv[0],savedata,0);

[0082] ingenic_save(vrsv[1],savedata,16);

[0083] ingenic_save(vrsv[2],savedata,32);

[0084] ingenic_save(vrsv[3],savedata,48);

[0085] ingenic_save(vrsv[4],savedata,64);

[0086] ingenic_save(vrsv[5],savedata,80);

[0087] ingenic_save(vrsv[6],savedata,96);

[0088] ingenic_save(vrsv[7],savedata,112);

[0089] savedata+=128.

[0090] In step S2.3, the register arrays vrsv[8] and vrtv[8] use 16 registers, and the call vrd =average_bank(vrs, vrt) uses 2 temporary registers, for a total of 18, which does not exceed 32.

[0091] The method is applicable to chips with the SIMD instruction set.

[0092] Therefore, the advantage of this application is that it provides a relatively optimal optimization method, which can improve the calculation speed by 50 times compared with the original method designed using C language. Attached Figure Description

[0093] The accompanying drawings, which are provided to further illustrate the invention and form part of this application, are not intended to limit the scope of the invention.

[0094] Figure 1 This is a flowchart of the method of the present invention.

[0095] Figure 2 This is a flowchart of step S1 of the method of the present invention.

[0096] Figure 3 This is a flowchart of step S2 of the method of the present invention. Detailed Implementation

[0097] To better understand the technical content and advantages of the present invention, the present invention will now be described in further detail with reference to the accompanying drawings.

[0098] like Figures 1-3 As shown, the method of the present invention relates to a method for feature map overlay optimization, the method further comprising:

[0099] S1, the calculation of the design formula 13:

[0100] Let the function of the formula be vrd = average_bank(vrs, vrt), the two input registers be vrs and vrt, and the output result be vrd; the temporary registers for intermediate calculations are ave_tmp and vorand_tmp;

[0101] S1.1, use the mean command to calculate the mean, input vrd and vrt, and store the output result in ave_tmp, thus implementing formula 3: The operation;

[0102] S1.2, using the XOR instruction, input vrd and vrt, and store the output result in vorand_tmp to implement formula 4: The operation;

[0103] S1.3 uses AND operations, taking `ave_tmp` and `vorand_tmp` as inputs, and storing the output in `vorand_tmp`, thus implementing... The operation;

[0104] S1.4 uses the AND instruction to perform operations. Inputting `vorand_tmp` and 1, the output is stored in `vorand_tmp`, thus implementing formula 12: The operation;

[0105] S1.5 uses the addition instruction to perform the operation. Inputs are `ave_tmp` and `vorand_tmp`, and the output is stored in `vrd`, thus implementing formula 13: The operation;

[0106] S2, the overall operation

[0107] Since there are 32 registers in total, the core processing part is made into a function, and the function vrd = average_bank(vrs, vrt) is called each time the online processing method is used;

[0108] S2.1, load data, load 128 data at a time; input the data to be loaded indata1 and indata2, load the data into variables vrsv and vrtv, set m to correspond to 0, 16, 32, 48, 64, 80, 96, 112 respectively, load 128 bits of data starting from the position m pointed to by data indata1 and indata2 in memory respectively; all data must be read continuously, and indata1 and indata2 cannot be read intermittently, set the register array used for loading data to vrsv[8] and vrtv[8]. Data is loaded from data indata1. When m=0, 16 8-bit data are loaded into vrsv[0] starting from the 0th data; when m=16, 16 8-bit data are loaded into vrsv[1] starting from the 16th data; ...; when m=112, 16 8-bit data are loaded into vrsv[7] starting from the 112th data; after processing, indata1 = indata1 + 128. Data is loaded from data indata2. When m=0, 16 8-bit data are loaded into vrtv[0] starting from the 0th data; when m=16, 16 8-bit data are loaded into vrtv[1] starting from the 16th data; ...; when m=112, 16 8-bit data are loaded into vrtv[7] starting from the 112th data; after processing, indata2 = indata2 + 128.

[0109] S2.2, call vrd = average_bank(vrs, vrt) to process vrsv and vrtv, and save the processing result to vrsv:

[0110] S2.2.1, let each input vrsv[i] and vrtv[i] be processed, and the output result be saved to vrsv[i].

[0111] vrsv[i] = average_bank(vrsv[i], vrtv[i]);

[0112] S2.2.2, starting with i=0, substitute into step S2.2.1, then substitute i=1 to i=7 in sequence, calculate all results, and save them to vrsv;

[0113] S2.3, output the results to savedata, and the output results should also be output all at once:

[0114] The register variable vrsv[i], i=0,……,7, is used to store data. The pointer savedata is used to store data. Let m correspond to 0, 16, 32, 48, 64, 80, 96, 112 respectively. The 128 bits of data in vrsv[i] are stored in savedata. The 128 bits of data are stored starting from the position pointed to by savedata in memory. When storing data in savedata, when m=0, 16 8-bit data in vrsv[0] are stored starting from savedata+0; when m=16, 16 8-bit data in vrsv[1] are stored starting from savedata+16;……; when m=112, 16 8-bit data in vrsv[7] are stored starting from savedata+112; after processing, savedata = savedata+128.

[0115] The specific implementation method of this application can also be described as follows:

[0116] 1. SIMD instruction algorithm.

[0117] 1) Introduction to SIMD Commands

[0118] The simd commands involved are as follows.

[0119] a) Mean value command: vrd = ingenic_aves_b (vrs, vrt);

[0120] The input variables are vrs and vrt, and the output variable is vrd. vrd stores 16 int8_t values, and vrs and vrt also store 16 int8_t values. Rounding is done using the full rounding method.

[0121] Equivalent operations: vrd0 := (vrs0+vrt0)>>1; vrd1 := (vrs1+vrt1)>>1; ... vrd15 :=(vrs15+vrt15)>>1;

[0122] b) XOR instruction: vrd = ingenic_xorv_b(vrd, vrt);

[0123] The input variables are vrs and vrt, and the output variable is vrd. vrd stores 16 int8_t data, and vrs and vrt store 16 int8_t data.

[0124] Equivalent operations: vrd0 := vrs0^vrt0; vrd1 := vrs1^vrt1; ... vrd15 := vrs15^vrt15;

[0125] c) Operations with instructions:

[0126] vrd = ingenic_andv_b (vrs, vrt);

[0127] The input variables are vrs and vrt, and the output variable is vrd. vrd stores 16 int8_t data, and vrs and vrt store 16 int8_t data.

[0128] Equivalent operations: vrd0 := vrs0 & vrt0; vrd1 := vrs1 & vrt1; ... vrd15 := vrs15 & vrt15;

[0129] vrd = ingenic_andi_b(vrs, i);

[0130] The input variables are vrs and i, and the output variable is vrd. vrd stores 16 int8_t data, vrs stores 16 int8_t data, and i is a constant.

[0131] Equivalent operations: vrd0 := vrs0 & i; vrd1 := vrs1 & i; ... vrd15 := vrs15 & i;

[0132] d) Addition instruction:

[0133] vrd = ingenic_add_b (vrs, vrt);

[0134] The input variables are vrs and vrt, and the output variable is vrd. vrd stores 16 int8_t data, and vrs and vrt store 16 int8_t data.

[0135] Equivalent operations: vrd0 := vrs0 + vrt0; vrd1 := vrs1 + vrt1; ... vrd15 := vrs15 + vrt15;

[0136] e) Load Data Instruction: The input is the data to be loaded. Currently, it's a pointer to the data. Load 128 bits of data starting from the location pointed to by the data in memory. If the data is 8 bits, load 16 bytes; if it's 16 bits, load 8 bytes. The data is loaded into the variable `vrd`. `m` is calculated in bytes, i.e., 8 bits per unit. Load 128 bits of data starting from the location `m` pointed to by the data `indata` in memory.

[0137] vrd = ingenic_load(indata,m)

[0138] f) Data saving command

[0139] ingenic_save (vrd, savedata,m)

[0140] The register variable vrd stores the data, and the pointer savedata stores the data. The data in the register is stored starting from the pointer position. The 128-bit data in vrd is stored into savedata. m is calculated in bytes, that is, 8 bits per unit. The 128-bit data is stored starting from the position pointed to by the data savedata in memory. When storing data into savedata, when m=0, the 16 8-bit data in vrsv[0] are stored starting from the savedata+0 position; when m=16, the 16 8-bit data in vrsv[1] are stored starting from the savedata+16 position; ...; when m=112, the 16 8-bit data in vrsv[7] are stored starting from the savedata+112 position; after processing, savedata = savedata+128.

[0141] 2. Calculation Formula

[0142] 1) Traditional calculation formula

[0143] Given inputs a and b, the output is res. The output is a rounding calculation. The calculation formula is as follows.

[0144] ………………………………Formula 1

[0145] 2) Calculation formula based on banker's rounding method

[0146] In the calculation of low-bit feature maps, rounding can introduce significant errors, so we use the banker's rounding method.

[0147] ab = a + b; Formula 2

[0148] res_0=ab >> 1; Formula 3

[0149] Calculation of whether to carry over the remainder:

[0150] Formula 4

[0151] Formula 5

[0152] Formula 6

[0153] Formula 7

[0154] From formula 2-7, we have:

[0155] Formula 8

[0156] Based on the rules of AND, OR, and XOR operations, simplify formula 8:

[0157] Formula 9

[0158] Calculation of positive and negative signs:

[0159] Formula 10

[0160] Calculate whether the data carries over using formulas 9 and 10:

[0161] Formula 11

[0162] Because there is a [missing information] in Formula 8 Therefore, the result can only be 0 or 1; according to the rules of AND, OR, and XOR operations, formula 11 is simplified as follows:

[0163] Formula 12

[0164] From formulas 2, 3, and 12, we get

[0165] Formula 13

[0166] Formula 13 is the final calculation formula.

[0167] 2. SIMD instruction optimization algorithm

[0168] Analyzing Formula 13, all calculations are aimed at finding the mean of a and b, using banker's rounding. Following the steps, the original 8-bit data needs to be converted to 16-bit data, then added together, and then the mean calculated. After the calculation, the 16-bit data needs to be converted back to 8 bits. This processing consumes a lot of time. The instruction for calculating the mean of two numbers described is applicable to Beijing Junzheng T30 and T31 chips. The instructions for the T30 and T31 chips include one that calculates the mean of two numbers, taking two 8-bit data points as input and outputting the averaged 8-bit data, using a rounding method. This is precisely the instruction needed. It can be implemented... Then, using the XOR and AND instructions, the calculation of the above formula can be achieved. For data loading, we load 128 data points at a time, 128 data points for each of the two feature maps. Since there are a total of 32 registers, the number used cannot exceed 32, otherwise efficiency will decrease. First, design the operation of formula 13, and then design the overall operation.

[0169] 1) Design of Formula 13

[0170] Let the function in Formula 13 be vrd = average_bank(vrs, vrt), with vrs and vrt as the two input registers and vrd as the output. The temporary registers used for intermediate calculations are ave_tmp and vorand_tmp.

[0171] a) Calculate the mean using the mean command. Input vrd and vrt, and store the output results in ave_tmp to perform the calculation of formula 3.

[0172] ave_tmp = ingenic_aves_b(vrs, vrt);

[0173] b) Use the XOR instruction to perform the operation. Input vrd and vrt, and store the output result in vorand_tmp to realize the operation of formula 4.

[0174] vorand_tmp = ingenic_xorv_b(vrd, vrt);

[0175] c) Using AND operations, take `ave_tmp` and `vorand_tmp` as inputs, and store the output in `vorand_tmp`. The operation.

[0176] vorand_tmp = ingenic_andv_b(ave_tmp, vorand_tmp);

[0177] d) Use the AND instruction to perform the operation. Input vorand_tmp, 1, and store the output result in vorand_tmp to perform the operation of formula 12.

[0178] vorand_tmp = ingenic_andi_b(vorand_tmp, 1);

[0179] e) Use the addition instruction to perform the operation. Input ave_tmp and vorand_tmp, and store the output result in vrd to perform the operation of formula 13.

[0180] vrd = ingenic_add_b(ave_tmp,vorand_tmp);

[0181] 2) Overall computation of the algorithm

[0182] Since using more than 32 registers would cause efficiency degradation and affect algorithm speed, we made the core processing part into a function, which is called each time online processing is used: vrd = average_bank(vrs, vrt).

[0183] a) Load data, loading 128 data items at a time. All data must be read continuously, and indata1 and indata2 cannot be read intermittently, otherwise it will cause low efficiency. Let the register array used for loading data be vrsv[8] and vrtv[8].

[0184] vrsv[0] = ingenic_load(indata1,0);

[0185] vrsv[1] = ingenic_load(indata1,16);

[0186] vrsv[2] = ingenic_load(indata1,32);

[0187] vrsv[3] = ingenic_load(indata1,48);

[0188] vrsv[4] = ingenic_load(indata1,64);

[0189] vrsv[5] = ingenic_load(indata1,80);

[0190] vrsv[6] = ingenic_load(indata1,96);

[0191] vrsv[7] = ingenic_load(indata1,112);

[0192] vrtv[0] = ingenic_load(indata2,0);

[0193] vrtv[1] = ingenic_load(indata2,16);

[0194] vrtv[2] = ingenic_load(indata2,32);

[0195] vrtv[3] = ingenic_load(indata2,48);

[0196] vrtv[4] = ingenic_load(indata2,64);

[0197] vrtv[5] = ingenic_load(indata2,80);

[0198] vrtv[6] = ingenic_load(indata2,96);

[0199] vrtv[7] = ingenic_load(indata2,112);

[0200] b) Call vrd = average_bank(vrs, vrt). Process vrsv and vrtv, and save the processing result to vrsv.

[0201] <1> Suppose that each input vrsv[i] and vrtv[i] are processed, and the output result is saved to vrsv[i], then...

[0202] vrsv[i] = average_bank(vrsv[i], vrtv[i]);

[0203] <2> Starting with i=0, substitute... <1> In the middle, substitute i=1 to i=7 in sequence, calculate all the results, and save them to vrsv.

[0204] c) Output the results to savedata. The output should also be done all at once; otherwise, it will reduce efficiency.

[0205] ingenic_save(vrsv[0],savedata,0);

[0206] ingenic_save(vrsv[1],savedata,16);

[0207] ingenic_save(vrsv[2],savedata,32);

[0208] ingenic_save(vrsv[3],savedata,48);

[0209] ingenic_save(vrsv[4],savedata,64);

[0210] ingenic_save(vrsv[5],savedata,80);

[0211] ingenic_save(vrsv[6],savedata,96);

[0212] ingenic_save(vrsv[7],savedata,112);

[0213] savedata += 128;

[0214] The register arrays vrsv[8] and vrtv[8] use 16 registers, and the call vrd = average_bank(vrs, vrt) uses 2 temporary registers, for a total of 18, which does not exceed 32. If more are added... <1> Using the initial number of registers in the initial design risks overflow and doesn't improve speed further. Therefore, the current design is a relatively optimal approach. This method is 50 times faster than the original C design.

[0215] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, various modifications and variations can be made to the embodiments of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for feature map overlay optimization, characterized in that, The method includes: in the calculation of the low-bit feature map, the banker's rounding method is used for calculation. Let the input be a, b, and the output result be res, as shown in the following formula: Official 13 This implementation uses an instruction to calculate the average of two numbers. It takes two 8-bit data points as input and outputs one 8-bit data point. The average is calculated using a rounding method. Then, the XOR and AND instructions are used to calculate Formula 13. When loading data, 128 data points are loaded at a time, and 128 data points are loaded for each of the two feature maps. Since there are a total of 32 registers, no more than 32 can be used. First, the operation of Formula 13 above is designed, and then the overall operation is optimized.

2. The method for feature map overlay optimization according to claim 1, characterized in that, The method further includes: S1, the operation of formula 13: Let the function of the formula be... The two input registers are vrs and vrt, and the output is vrd; the temporary register for intermediate calculations is... , ; S1.1, use the mean command to calculate the mean, input vrd and vrt, and store the output result in [location missing]. In the middle, implement formula 3: The operation; S1.2, using the XOR instruction, takes vrd and vrt as input and stores the output result in... Formula 4 is implemented in the middle: The operation; S1.3, using instruction operations, input , The output results are stored in In the middle, to achieve The operation; S1.4, using AND instruction operations, input 1. The output result is stored in In the middle, implement formula 12: The operation; S1.5, using the addition instruction, input... , The output result is stored in vrd to implement formula 13: The operation; S2, the overall operation Since there are 32 registers in total, the core processing part is made into a function, which is called in an online processing mode each time. ; S2.1, Load data, loading 128 data points at a time; the input data to be loaded are indata1 and indata2, and the data is loaded into variables vrsv and vrtv. Let m correspond to 0, 16, 32, 48, 64, 80, 96, and 112 respectively. Starting from the positions m pointed to by indata1 and indata2 in memory, 128 bits of data are loaded, and 128 bits of data are 16 8-bit data. All data must be read continuously, and cannot be read sequentially from indata1 and ind. ATA2 cross-read, let the register array used for loading data be vrsv[8], vrtv[8]; load data from data indata1, when m=0, start from the 0th data and load 16 8-bit data into vrsv[0]; when m=16, start from the 16th data and load 16 8-bit data into vrsv[1]; ...; when m=112, start from the 112th data and load 16 8-bit data into vrsv[7]; after processing, indata1= indata1+128; Load data from indata2. When m=0, start from the 0th data and load 16 8-bit data into vrtv[0]; When m=1, start from the 16th data and load 16 8-bit data into vrtv[1]; ...; When m=112, start from the 112th data and load 16 8-bit data into vrtv[7]; After processing, indata2= indata2+128; S2.2, call Process VRRSV and VRRTV, and save the processing results to VRRSV: S2.2.1, let each input vrsv[i] and vrtv[i] be processed, and the output result be saved to vrsv[i]. ; S2.2.2, starting with i=0, substitute into step S2.2.1, then substitute i=1 to i=7 in sequence, calculate all results, and save them to vrsv; S2.3, output the result to savedata. The output result should also be output at once: the register variable vrsv[i] for saving data, i=0,……,7, the pointer savedata for storing data, let m correspond to 0, 16, 32, 48, 64, 80, 96, 112 respectively, store the 128 bits of data in vrsv[i] to savedata, starting from the position pointed to by the data savedata in memory to store 128 bits of data; when m=0, store 16 8 bits of data in vrsv[0] starting from the position savedata+0; when m=16, store 16 8 bits of data in vrsv[1] starting from the position savedata+16;……; when m=112, store 16 8 bits of data in vrsv[7] starting from the position savedata+112; after processing, savedata=savedata+128.

3. The method for feature map overlay optimization according to claim 2, characterized in that, The banker's rounding method is expressed as follows: Official 2 Official 3 Calculation of whether to carry over the remainder: Official 4 Official 5 Official 6 Official 7 From formula 2-7, we have: Official 8 Based on the rules of AND, OR, and XOR operations, simplify formula 8: Official 9 Calculation of positive and negative signs: Official 10 Calculate whether the data carries over using formulas 9 and 10: Official 11 Since there is an &1 in Formula 8, the result can only be 0 or 1; according to the rules of AND, OR, and XOR operations, Formula 11 is simplified as follows: Official 12 From formulas 2, 3, and 12, we get Official 13 Formula 13 is the final calculation formula.

4. The method for feature map overlay optimization according to claim 3, characterized in that, S1 includes: S1.1 uses the mean instruction. The output variable stores 16 int8_t data points, and the input variables vrs and vrt store 16... Data; the rounding method uses full rounding, expressed as: ; S1.2 uses the XOR instruction. The output variable stores 16 int8_t data, and the input variables vrd and vrt store 16... The data is represented as: ; S1.3 uses the AND instruction; the output variable stores 16 int8_t data, and the input variable... and It stores 16 int8_t data, represented as: ; S1.4 uses the AND instruction; the output variable stores 16 int8_t data, and the input variable... It stores 16 int8_t data, where 1 is a constant, represented as: ; S1.5 uses an addition instruction. The output variable stores 16 int8_t data, and the input variable... and It stores 16 int8_t data, represented as: 。 5. The method for feature map overlay optimization according to claim 3, characterized in that, S2 further includes: S2.1, using the load instruction, the input data to be loaded, let m be 0, 16, 32, 48, 64, 80, 96, 112 respectively, the current is the data pointer, starting from the position pointed to by the data in memory, load 128 bits of data, if it is 8 bits of data, load 16, if it is 16 bits of data, load 8; the data is loaded into the variable vrd; m is calculated in bytes, that is, 8 bits as a unit, starting from the position m pointed to by the data indata1 and indata2 in memory respectively, load 128 bits of data; load data from data indata1, when m=0, starting from the 0th data, load 16 8 bits of data into vrsv[0]; when m=16, starting from the 16th data, load 16 8 bits of data into vrsv[1]; ...; when m=112, starting from the 112th data, load 16 8 bits of data into vrsv[7]; after processing, indata1= indata1+128, load data from indata2. When m=0, load 16 8-bit data into vrtv[0] starting from the 0th data; when m=16, load 16 8-bit data into vrtv[1] starting from the 16th data; ...; when m=112, load 16 8-bit data into vrtv[7] starting from the 112th data; after processing, indata2= indata2+128, which is represented as: vrsv[0] = ingenic_load(indata1,0); vrsv[1] = ingenic_load(indata1,16); vrsv[2] = ingenic_load(indata1,32); vrsv[3] = ingenic_load(indata1,48); vrsv[4] = ingenic_load(indata1,64); vrsv[5] = ingenic_load(indata1,80); vrsv[6] = ingenic_load(indata1,96); vrsv[7] = ingenic_load(indata1,112); vrtv[0] = ingenic_load(indata2,0); vrtv[1] = ingenic_load(indata2,16); vrtv[2] = ingenic_load(indata2,32); vrtv[3] = ingenic_load(indata2,48); vrtv[4] = ingenic_load(indata2,64); vrtv[5] = ingenic_load(indata2,80); vrtv[6] = ingenic_load(indata2,96); vrtv[7] = ingenic_load(indata2,112).

6. The method for feature map overlay optimization according to claim 3, characterized in that, S2.3 further includes: using a data saving instruction, a data saving register variable vrsv[i], i=0,……,7, a data storage pointer savedata, storing data in the register starting from the pointer position, storing 128 bits of data in vrd into savedata, m is calculated in bytes, i.e., 8 bits as a unit, saving 128 bits of data starting from the position pointed to by savedata in memory; storing data into savedata, when m=0, storing 16 8-bit data in vrsv[0] starting from savedata+0 position; when m=16, storing 16 8-bit data in vrsv[1] starting from savedata+16 position;……; when m=112, storing 16 8-bit data in vrsv[7] starting from savedata+112 position; after processing, savedata= savedata+128; expressed as: ingenic_save(vrsv[0],savedata,0); ingenic_save(vrsv[1],savedata,16); ingenic_save(vrsv[2],savedata,32); ingenic_save(vrsv[3],savedata,48); ingenic_save(vrsv[4],savedata,64); ingenic_save(vrsv[5],savedata,80); ingenic_save(vrsv[6],savedata,96); ingenic_save(vrsv[7],savedata,112); savedata+=128.

7. The method for feature map overlay optimization according to claim 6, characterized in that, In S2.3, the register arrays vrsv[8] and vrtv[8] use 16 registers, namely vrsv[i] or vrtv[i] (0<=i<8), and the call vrd= average_bank(vrs, vrt) uses 2 temporary registers, for a total of 18, which does not exceed 32.

8. The method for feature map overlay optimization according to claim 1, characterized in that, The method is applicable to chips with the SIMD instruction set.