A dielectric filter capable of reducing resonance frequency
By adding a coupling capacitor between the interlocking silver-plated wire and the ground plane on the dielectric filter circuit surface, the problem of the dielectric filter's inability to reduce the resonant frequency under a fixed design is solved, thus realizing a dielectric filter design with lower frequency and smaller size.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- JIANGSU CAI QIN TECH CO LTD
- Filing Date
- 2022-12-01
- Publication Date
- 2026-07-24
AI Technical Summary
With existing dielectric filters already designed to maximize dielectric constant, width dimensions, and the silver layer on the circuit surface, it is difficult to further reduce the resonant frequency.
Adding a coupling capacitor between the interlocking silver-plated wire and the ground plane on the circuit surface of the dielectric filter reduces the resonant frequency by forming a larger coupling capacitor.
This allows for a further reduction in resonant frequency without increasing the width of the dielectric filter, broadening the design methodology and meeting the requirements for smaller design sizes.
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Figure CN115911791B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of communication technology, and in particular relates to a dielectric filter that can reduce the resonant frequency. Background Technology
[0002] Conventional dielectric filter design requires consideration of dimensions. The width W is primarily related to the dielectric constant of the dielectric material and the filter's resonant frequency. The size of the silver layer on the circuit surface also has a certain impact on the frequency. When the circuit surface is completely open without a silver layer, the approximate formula for calculating the width W of the dielectric filter is as follows: When the circuit is printed on the circuit board, the frequency of the filter will decrease. The larger the area of the silver layer on the circuit board, the greater the frequency reduction. The principle is that the width W of the dielectric filter is also the depth of the resonant via. Each resonant via can be equivalent to an inductor L (the inductance is proportional to the depth of the resonant via), and the silver layer covering each resonant via on the circuit board can be equivalent to a capacitor C (the capacitance is proportional to the size of the silver layer on the circuit board). The formula for calculating the frequency of the resonant cavity is: As can be seen from the formula, the filter frequency can be reduced by increasing the values of inductor L and capacitor C, that is, by increasing the width W of the dielectric filter or the area of the silver layer covering the resonant via on the circuit surface.
[0003] For example, a dielectric filter with a center frequency of 725MHz and a passband of 10MHz, employing a 5-cavity structure and a dielectric constant of ER-36.4, is simulated. The simulation targets are in-band insertion loss of 2.0dB max, in-band echo of 15dB min, and out-of-band rejection of 20dB min@fo±25MHz. The simulation shows that, with the silver layer on the circuit surface maximized and the width W fixed at 13mm, the filter's resonant frequency meets the 725MHz requirement, and other specifications are also met. However, an additional condition is added: to meet the 13mm width requirement, the filter frequency needs to be reduced to around 650MHz or to meet the existing 725MHz resonant frequency, but the width of the dielectric filter needs to be reduced by a certain amount. This requirement cannot be met using existing conventional design methods. Summary of the Invention
[0004] The purpose of this invention is to provide a dielectric filter that can reduce the resonant frequency, overcoming the problem that conventional designs are difficult to further reduce the frequency when the dielectric constant ER, width W, and silver layer on the circuit surface are already nearly maximized.
[0005] To achieve the above objectives, the present invention provides the following technical solution:
[0006] This application discloses a dielectric filter that can reduce the resonant frequency, including a body made of solid dielectric material and a plurality of resonant cavities formed within the body. The outer surface of the body is coated with a ground conductive layer. The resonant cavities have resonant cavity conductive layers formed on the circuit surface of the body. The circuit surface is adjacent to the electrode surface. On the opposite sides of the two resonant cavity conductive layers, a first deconducting layer with interlocking teeth is formed between the resonant cavity conductive layers and the ground conductive layer. On the remaining resonant cavity conductive layers, on the side closer to the electrode surface, a second deconducting layer with interlocking teeth is formed between the resonant cavity conductive layers and the ground conductive layer.
[0007] Preferably, in the dielectric filter that can reduce the resonant frequency described above, the opposite sides of the two resonant cavity conductive layers form a first coupling capacitor with the ground conductive layer, and the remaining sides of the resonant cavity conductive layers near the electrode surface form a second coupling capacitor with the ground conductive layer.
[0008] Preferably, in the dielectric filter that can reduce the resonant frequency described above, electrode contact surfaces are formed at both ends of the electrode surface, and the two electrode contact surfaces extend to the circuit surface respectively. A third deconductive layer with interlocking teeth is formed between the bottom of the conductive layer of the resonant cavity on both sides and the two electrode contact surfaces respectively.
[0009] Preferably, in the dielectric filter that can reduce the resonant frequency described above, the two ends of the electrode surface are respectively formed into U-shaped exposed surfaces through a deconductive layer, and the U-shaped exposed surfaces and one edge of the electrode surface form the electrode contact surface.
[0010] Preferably, in the above-mentioned dielectric filter that can reduce the resonant frequency, the solid dielectric material is ceramic.
[0011] Compared with the prior art, the advantage of the present invention is that it achieves a further reduction in frequency under the design conditions where the dielectric constant ER, width dimension W and the silver layer on the circuit surface of the dielectric filter are fixed and are already nearly maximized. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0013] Figure 1 The image shown is a perspective view of the dielectric filter in Embodiment 1 of the present invention;
[0014] Figure 2The diagram shown is a circuit layout of the dielectric filter in Embodiment 2 of the present invention;
[0015] Figure 3 The image shown is a simulation diagram from Embodiment 1 of the present invention;
[0016] Figure 4 The image shown is another simulation diagram from Embodiment 1 of the present invention. Detailed Implementation
[0017] The technical solutions of the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0018] The improved design involves adding capacitance between the silver layer of each resonant cavity and the ground plane on the original circuit surface. Specifically, the resonant cavity frequency is reduced by coupling the silver layer of each resonant cavity to the interlocking silver lines on the ground plane using interlocking serrated silver lines. The principle can be explained by the formula...
[0019]
[0020] It is deduced that the addition of interlocking silver-plated wires to the silver layer of the resonant cavity generates a capacitance C1 for ground coupling. This can be understood as a capacitor C1 connected in parallel between the silver layer of each resonant cavity and the ground plane. This capacitor C1 and the ground coupling capacitance C of the original resonant via are superimposed to generate a larger coupling capacitance C2 (C2 = C + C1), thereby reducing the frequency of the dielectric filter.
[0021] The following simulation example illustrates this point. Figure 1 A dielectric filter that can reduce the resonant frequency includes a body 100 made of solid dielectric material and multiple resonant cavities 101 formed within the body 100. The outer surface of the body 100 is coated with a ground conductive layer 102. The resonant cavities 101 have resonant cavity conductive layers 104 formed on the circuit surface 103 of the body 100. The circuit surface 103 is adjacent to the electrode surface 105. On the opposite sides of the two resonant cavity conductive layers 104, a first deconducting layer 106 with interlocking teeth is formed between the ground conductive layer 102 and the other resonant cavity conductive layers 104. On the side of the other resonant cavity conductive layers 104 near the electrode surface 105, a second deconducting layer 107 with interlocking teeth is formed between the ground conductive layer 102 and the other resonant cavity conductive layers 104.
[0022] The opposite sides of the conductive layers 104 in the two resonant cavities form a first coupling capacitor with the ground conductive layer 102, and the remaining conductive layers 104 near the electrode surface 105 form a second coupling capacitor with the ground conductive layer 102. This is mainly achieved through mutual coupling between the conductive layers.
[0023] Electrode contact surfaces 110 are formed at both ends of the electrode surface 105. The two electrode contact surfaces 110 extend to the circuit surface 103. A third deconductive layer 111 with interlocking teeth is formed between the bottom of the resonant cavity conductive layer 104 on both sides and the two electrode contact surfaces 110.
[0024] In this embodiment, the third deconductive layer interlocking design has virtually no impact on the frequency; it mainly enhances the size of the filter's input and output taps, primarily to increase the tap capacitance and improve the filter's in-band echo performance.
[0025] Both ends of the electrode surface 105 are formed with U-shaped exposed surfaces 112 through a deconductive layer. The U-shaped exposed surfaces 112 and one edge of the electrode surface 105 form an electrode contact surface 110. The solid dielectric material is ceramic.
[0026] In Example 1, the center frequency of the dielectric filter is 650MHz, the passband is 10MHz, and the structure of the dielectric filter is the same as the conventional scheme, adopting a 5-cavity structure with a dielectric constant ER-36.4. The width dimension remains unchanged at 13mm, the same as the conventional scheme. Simulations were performed with in-band insertion loss of 2.0dB max, in-band echo of 15dB min, and out-of-band rejection of 20dB min@fo±25MHz. This example achieves a 75MHz frequency reduction based on the conventional scheme while maintaining the same dimensions.
[0027] Simulation results show that, while maintaining the same width dimension as in a conventional solution, the resonant frequency can be reduced by 75MHz, from 725MHz to 650MHz. Figure 3 .
[0028] Another way to implement the improved scheme is to reduce the width from 13mm to 11mm while still achieving a resonant frequency of 725MHz. This achieves the goal of further reducing the width while maintaining the resonant frequency of the dielectric filter. Figure 4 .
[0029] The key to the improved solution is that the design of the circuit surface can be modified based on the original dielectric filter structure to achieve the purpose of reducing the resonant frequency or reducing the width. By adding interlaced silver-plated lines in the silver layer of each resonant cavity on the circuit surface and coupling them with the interlaced silver-plated lines of the ground plane to form a capacitor, it can be equivalent to connecting a capacitor in parallel with ground for each resonant cavity, thus achieving the effect of frequency reduction. Theoretically, the more and longer the interlaced silver-plated lines, the larger the capacitance to ground formed, and the greater the frequency reduction.
[0030] It should be noted that interlaced silver-plated lines can be added between the silver layer on the upper part of the resonant cavity and the ground plane on the upper surface (parallel to the electrode surface) to achieve further frequency reduction, but it is not recommended to add them at this location for the convenience of performance tuning.
[0031] The improved approach achieves lower resonant frequencies without increasing costs or the width of the dielectric filter, thus broadening the design methodology. This method also allows for smaller designs, meaning the width of the dielectric filter can be reduced while achieving the same resonant frequency.
[0032] In Example 2, as Figure 2 As shown, a first patch capacitor 108 is installed between the opposite sides of the conductive layers 104 of the two resonant cavities and the ground conductive layer 102, respectively. A second patch capacitor 109 is installed between the remaining conductive layers 104 of the resonant cavities and the ground conductive layer 102, respectively. The initial values of the patch capacitors can be obtained through simulation.
[0033] The scheme uses the ground capacitance formed between each resonant cavity silver layer and the grounding silver layer to achieve frequency reduction. In addition to adding intersecting toothed silver-plated wires, frequency reduction can also be achieved by soldering chip capacitors between each resonant cavity silver layer and the grounding silver layer on the outer periphery of the circuit surface. The outer grounding silver layer is connected to the side or top surface or the electrode grounding ground.
[0034] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0035] The above description is only a specific embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.
Claims
1. A dielectric filter capable of reducing resonant frequency, comprising a body made of a solid dielectric material and a plurality of resonant cavities formed within the body, wherein the outer surface of the body is coated with a grounded conductive layer, and the resonant cavities have resonant cavity conductive layers formed on the circuit surface of the body, the circuit surface being adjacent to the electrode surface, characterized in that, On the opposite sides of the resonant cavity conductive layers, a first deconduction layer with interlocking teeth is formed between the ground conductive layer and the ground conductive layer. On the other sides of the resonant cavity conductive layers near the electrode surface, a second deconduction layer with interlocking teeth is formed between the ground conductive layer and the ground conductive layer. On the opposite sides of the resonant cavity conductive layers, a first coupling capacitor is formed between the ground conductive layer and the ground conductive layer. On the other sides of the resonant cavity conductive layers near the electrode surface, a second coupling capacitor is formed between the ground conductive layer and the ground conductive layer. The silver layer of the resonant cavity is enhanced with interlocking silver-plated wires to generate a ground coupling capacitance C1. This capacitance C1 is superimposed with the ground coupling capacitance C of the original resonant via to generate a larger coupling capacitance C2, C2 = C + C1, thereby reducing the frequency of the dielectric filter.
2. The dielectric filter capable of reducing resonant frequency according to claim 1, characterized in that, Electrode contact surfaces are formed at both ends of the electrode surface, and the two electrode contact surfaces extend to the circuit surface. A third deconductive layer with interlocking teeth is formed between the bottom of the resonant cavity conductive layer on both sides and the two electrode contact surfaces.
3. The dielectric filter capable of reducing resonant frequency according to claim 2, characterized in that, Both ends of the electrode surface are formed into U-shaped exposed surfaces through a deconductive layer, and the U-shaped exposed surfaces and one edge of the electrode surface form the electrode contact surface.
4. The dielectric filter capable of reducing resonant frequency according to claim 1, characterized in that, The solid dielectric material is ceramic.
Citation Information
Patent Citations
Dielectric filter
JP1993218704A
Monoblock dielectric filter with an attenuation pole
KR1020010047698A