Analog signal switching circuit

By using an optical MOS relay and a follower summation circuit to achieve analog signal switching, the problems of large size, short lifespan, and poor environmental adaptability of mechanical relays are solved, providing a small-sized, long-life, and highly reliable analog signal switching solution.

CN115913205BActive Publication Date: 2026-07-10SHAANXI BAOCHENG AVIATION INSTR
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHAANXI BAOCHENG AVIATION INSTR
Filing Date
2022-12-20
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

In the existing technology, mechanical relays are large in size, complex in structure, short in life and poor in environmental adaptability when switching analog signals, and cannot meet the needs of certain special occasions.

Method used

By employing an optical MOS relay and a follower summing circuit, the switching of analog signals is controlled by the level change of the selection control signal. The optical MOS relay is used for power selection control to achieve the switching of two analog signals.

Benefits of technology

It realizes analog signal switching in response to changes in the level of the selection control signal under the same port. It has the advantages of small size, long life, strong environmental adaptability and high reliability. It has a simple structure and the components can be domestically produced.

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Abstract

The application provides an analog signal switching circuit, belonging to the technical field of electronic circuits, which comprises a power supply control circuit and a following summing circuit, wherein the following summing circuit comprises two following circuits, namely an A1 following circuit and an A2 following circuit, an inverse proportional amplification circuit and an inverse proportional amplification circuit; the power supply control circuit can control the power supply on-off of the two following circuits of the following summing circuit according to the level change of the selection control signal; and the following summing circuit realizes the switching of two analog signals V in1 , V in2 . The application uses an optical MOS relay to control the power supply selection, when the selection control signal sent by the upper computer to the circuit is low, the circuit outputs the signal V in1 , and when the selection control signal sent by the upper computer to the circuit is high, the circuit outputs the signal V in2 . The application has the advantages of small size, long service life, strong environmental adaptability and high reliability.
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Description

Technical Field

[0001] This invention belongs to the field of electronic circuit technology, specifically relating to an analog signal switching circuit, which is suitable for switching between two different analog signals on the same port according to the level change of the selection control signal. Background Technology

[0002] In certain special applications, the system needs to respond to changes in the level of its selection control signal, switching between two different analog signals on the same port. Currently, this function is generally achieved using a mechanical relay, but this structure is bulky, occupies a lot of space, is complex, has a short lifespan, poor environmental adaptability, and results in unstable product performance. Therefore, it is necessary to propose an improvement. Summary of the Invention

[0003] The technical problem solved by this invention is to provide an analog signal switching circuit. This invention uses an optical MOS relay for power selection control. When the selection control signal sent by the host computer to the circuit is low, the circuit outputs V. in1 When the selection control signal sent by the host computer to the circuit is high, the circuit outputs V. in2 The signal has the advantages of small size, long life, strong environmental adaptability and high reliability.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] An analog signal switching circuit comprises two sub-circuits: a power supply control circuit and a follower summing circuit. The follower summing circuit includes two follower circuits, A1 and A2, an inverse addition amplifier circuit, and an inverse ratio amplifier circuit. The power supply control circuit controls the power supply to the two follower circuits of the follower summing circuit based on the level change of a selection control signal. The follower summing circuit realizes the switching of two analog signals V... in1 V in2 Switching.

[0006] When the selection control signal is low, A1 follows the circuit and is powered on, while A2 follows the circuit and is powered off. in1 The signal is transmitted normally, V in2 The signal is blocked, and the actual output of the inverse adder amplifier circuit is -V. in1 Performing an inverse ratio again will make V out =V in1 When the selection control signal is high, the A1 follower circuit is de-energized, and the A2 follower circuit is powered on. in1 The signal was blocked, V in2 The signal is transmitted normally, and the actual output of the inverse adder amplifier circuit is -V. in2 Performing an inverse ratio again will make Vout =V in2 .

[0007] The power supply control circuit includes resistors R1, R2, R3, and R4, as well as optical MOS relays P1, P2, P3, and P4.

[0008] The resistor R1 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P1. Port 2 of the opto-MOS relay P1 is connected to the power supply ground, port 3 is connected to the power supply +Vcc, and port 4 serves as the positive power supply and is connected to the power supply + of the A1 follower circuit in the follower summing circuit. The resistor R2 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P2. Port 2 of the opto-MOS relay P2 is connected to the power supply ground, port 3 is connected to the power supply -Vss, and port 4 serves as the negative power supply and is connected to the power supply - of the A1 follower circuit in the follower summing circuit. The resistor R3 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P3. Port 2 of the opto-MOS relay P3 is connected to the power supply ground, port 3 is connected to the power supply +Vcc, and port 4 serves as the positive power supply terminal and is connected to the power supply + of the A2 follower circuit in the follower summing circuit. The resistor R4 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P4. Port 2 of the opto-MOS relay P4 is connected to the power supply ground, port 3 is connected to the power supply -Vss, and port 4 serves as the negative power supply terminal and is connected to the power supply - of the A2 follower circuit in the follower summing circuit.

[0009] Furthermore, the optical MOS relays P1 and P2 are normally closed bidirectional optical MOS relays, and the optical MOS relays P3 and P4 are normally open bidirectional optical MOS relays.

[0010] The following summation circuit includes two follower circuits composed of operational amplifiers A1 and A2 respectively; an inverse addition amplifier circuit composed of resistors R5, R6, R7, R8 and operational amplifier A3; and an inverse amplifier circuit composed of resistors R9, R10, R11 and operational amplifier A4.

[0011] The positive input terminal of the operational amplifier A1 is connected to the signal V. in1 The inverting input terminal is connected to the output terminal; the non-inverting input terminal of the operational amplifier A2 is connected to the signal V. in2The following resistors are connected in series: the inverting input terminal is connected to the output terminal; resistor R5 is connected in series between the output terminal of operational amplifier A1 and the inverting input terminal of operational amplifier A3; resistor R6 is connected in series between the output terminal of operational amplifier A2 and the inverting input terminal of operational amplifier A3; resistor R7 is connected in series between the inverting input terminal and the output terminal of operational amplifier A3; resistor R8 is connected in series between the non-inverting input terminal of operational amplifier A3 and the power supply ground; resistor R9 is connected in series between the output terminal of operational amplifier A3 and the inverting input terminal of operational amplifier A4; resistor R10 is connected in series between the inverting input terminal and the output terminal of operational amplifier A4; and resistor R11 is connected in series between the non-inverting input terminal and the power supply ground of operational amplifier A4.

[0012] Furthermore, the operational amplifiers A3 and A4 are powered by power supplies +Vcc and -Vss, respectively.

[0013] Furthermore, resistors R5, R6, R7, R9, and R10 are all low-temperature drift resistors with a temperature drift coefficient of less than 30 ppm / ℃.

[0014] Advantages of this invention compared to existing technologies:

[0015] 1. This solution can meet the requirements of certain special application systems that need products to respond to changes in the level of their selection control signal and switch between two different analog signals on the same port, that is, output signal when the selection control signal is low or output signal when it is high; using optical MOS relays for power selection control has the advantages of small size, long life, strong environmental adaptability and high reliability compared to using mechanical relays to achieve the function.

[0016] 2. The overall design principle of this solution is simple and clear, the structure is simple, and all components can be domestically produced, thus eliminating the restriction of imported components and making it worthy of promotion. Attached Figure Description

[0017] Figure 1 This is a circuit diagram of the power supply control circuit in this invention;

[0018] Figure 2 This is a circuit diagram of the follower summation circuit in this invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Please see Figure 1-2 The embodiments of the present invention are described in detail below.

[0021] Example 1: An analog signal switching circuit, comprising a power supply control circuit and a follower summation circuit, wherein the follower summation circuit includes two follower circuits, namely A1 follower circuit and A2 follower circuit, an inverse addition amplifier circuit, and an inverse ratio amplifier circuit.

[0022] The power supply control circuit can control the power supply on / off of the two follower circuits in the follower summing circuit according to the level change of the selection control signal. When the selection control signal is low, follower circuit A1 is powered on and follower circuit A2 is powered off; when the selection control signal is high, follower circuit A1 is powered off and follower circuit A2 is powered on. The follower summing circuit realizes two analog signals V in1 V in2 When the A1 follower circuit is powered on and the A2 follower circuit is de-powered, V in1 The signal is transmitted normally, V in2 The signal is blocked, and the actual output of the inverse adder amplifier circuit is -V. in1 Performing an inverse ratio again will make V out =V in1 When circuit A1 is de-energized and circuit A2 is energized, V in1 The signal was blocked, V in2 The signal is transmitted normally, and the actual output of the inverse adder amplifier circuit is -V. in2 Performing an inverse ratio again will make V out =V in2 .

[0023] Example 2: See details Figure 1As shown, the power supply control circuit includes resistors R1, R2, R3, and R4, and optical MOS relays P1, P2, P3, and P4. Resistor R1 is connected in series between the selection control signal terminal Vp and port 1 of optical MOS relay P1. Port 2 of optical MOS relay P1 is connected to power ground, port 3 is connected to power supply +Vcc, and port 4 serves as the positive power supply and is connected to the power supply + of operational amplifier A1 in the follower summation circuit. Resistor R2 is connected in series between the selection control signal terminal Vp and port 1 of optical MOS relay P2. Port 2 of optical MOS relay P2 is connected to power ground, and port 3 is connected to power supply +Vcc. -Vss is connected, and port 4 is used as the negative power supply and connected to the power supply of operational amplifier A1 in the follower summing circuit; resistor R3 is connected in series between the selection control signal terminal Vp and port 1 of opto-MOS relay P3, port 2 of opto-MOS relay P3 is connected to power ground, port 3 is connected to power supply +Vcc, and port 4 is used as the positive power supply and connected to the power supply of operational amplifier A2 in the follower summing circuit; resistor R4 is connected in series between the selection control signal terminal Vp and port 1 of opto-MOS relay P4, port 2 of opto-MOS relay P4 is connected to power ground, port 3 is connected to power supply -Vss, and port 4 is used as the negative power supply and connected to the power supply of operational amplifier A2 in the follower summing circuit.

[0024] Preferably, the optical MOS relays P1 and P2 are normally closed bidirectional optical MOS relays, and the optical MOS relays P3 and P4 are normally open bidirectional optical MOS relays.

[0025] See details Figure 2 As shown, the follower summing circuit includes two follower circuits composed of operational amplifiers A1 and A2 respectively; an inverse addition amplifier circuit composed of resistors R5, R6, R7, R8 and operational amplifier A3; and an inverse amplifier circuit composed of resistors R9, R10, R11 and operational amplifier A4; the positive input terminal of operational amplifier A1 is connected to signal V. in1 The inverting input terminal is connected to the output terminal; the non-inverting input terminal of the operational amplifier A2 is connected to the signal V. in2The following resistors are connected in series: the inverting input terminal is connected to the output terminal; resistor R5 is connected in series between the output terminal of operational amplifier A1 and the inverting input terminal of operational amplifier A3; resistor R6 is connected in series between the output terminal of operational amplifier A2 and the inverting input terminal of operational amplifier A3; resistor R7 is connected in series between the inverting input terminal and the output terminal of operational amplifier A3; resistor R8 is connected in series between the non-inverting input terminal of operational amplifier A3 and the power supply ground; resistor R9 is connected in series between the output terminal of operational amplifier A3 and the inverting input terminal of operational amplifier A4; resistor R10 is connected in series between the inverting input terminal and the output terminal of operational amplifier A4; and resistor R11 is connected in series between the non-inverting input terminal and the power supply ground of operational amplifier A4.

[0026] Operational amplifiers A3 and A4 are powered by power supplies +Vcc and -Vss, respectively.

[0027] Resistors R5, R6, R7, R9, and R10 are all low-temperature drift resistors with a temperature drift coefficient of less than 30ppm / ℃, ensuring that the signal output remains basically stable when the ambient temperature changes.

[0028] The specific value calculations are as follows:

[0029] The on-state current of the opto-MOS relay P1 is 5mA to 20mA, with a typical engineering value of 10mA. The on-state voltage drop is 1.2V. Therefore, the value of R1 can be calculated using R1 = (Vp - 1.2) / 0.01. Meanwhile, the resistance values ​​of R1, R2, R3, and R4 are equal.

[0030] R5=R6=R7=R9=R10=20kΩ

[0031] R8 = R5∥R6∥R7 = 6.7kΩ

[0032] R11 = R9 || R10 = 10kΩ

[0033] This circuit structure can meet the requirements of certain special application systems that need the product to respond to changes in the level of its selection control signal, and to switch between two different analog signals on the same port, i.e., outputting a signal when the selection control signal is low or high. This invention uses an opto-MOS relay for power selection control, which has advantages over mechanical relays in terms of small size, long lifespan, strong environmental adaptability, and high reliability.

[0034] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention, and no reference numerals in the claims should be construed as limiting the scope of the claims.

[0035] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. An analog signal switching circuit, characterized in that: The circuit comprises two sub-circuits: a power supply control circuit and a follower summing circuit. The follower summing circuit includes two follower circuits, A1 and A2, an inverse addition amplifier circuit, and an inverse ratio amplifier circuit. The power supply control circuit controls the power supply to the two follower circuits of the follower summing circuit based on the level change of the selected control signal. The follower summing circuit realizes the connection between two analog signals V. in1 V in2 Switching; using optical MOS relays for power selection control; When the selection control signal is low, A1 follows the circuit and is powered on, while A2 follows the circuit and is powered off. in1 The signal is transmitted normally, V in2 The signal is blocked, and the actual output of the inverse adder amplifier circuit is -V. in1 Performing an inverse ratio again will make V out = V in1 When the selection control signal is high, the A1 follower circuit is de-energized, and the A2 follower circuit is powered on. in1 The signal was blocked, V in2 The signal is transmitted normally, and the actual output of the inverse adder amplifier circuit is -V. in2 Performing an inverse ratio again will make V out = V in2； The following summation circuit includes two follower circuits, A1 follower circuit and A2 follower circuit, which are respectively composed of operational amplifier A1 and operational amplifier A2; an inverse addition amplifier circuit composed of resistors R5, R6, R7, R8 and operational amplifier A3; and an inverse amplifier circuit composed of resistors R9, R10, R11 and operational amplifier A4. The positive input terminal of the operational amplifier A1 is connected to the signal V. in1 The operational amplifier A1 is connected to its output terminal; the operational amplifier A2 is connected to the signal V. in2 The following resistors are connected in series: the inverting input terminal of operational amplifier A2 is connected to its output terminal; resistor R5 is connected in series between the output terminal of operational amplifier A1 and the inverting input terminal of operational amplifier A3; resistor R6 is connected in series between the output terminal of operational amplifier A2 and the inverting input terminal of operational amplifier A3; resistor R7 is connected in series between the inverting input terminal and the output terminal of operational amplifier A3; resistor R8 is connected in series between the non-inverting input terminal and the power supply ground of operational amplifier A3; resistor R9 is connected in series between the output terminal of operational amplifier A3 and the inverting input terminal of operational amplifier A4; resistor R10 is connected in series between the inverting input terminal and the output terminal of operational amplifier A4; and resistor R11 is connected in series between the non-inverting input terminal and the power supply ground of operational amplifier A4.

2. The analog signal switching circuit according to claim 1, characterized in that: The power supply control circuit includes resistors R1, R2, R3, and R4, and optical MOS relays P1, P2, P3, and P4. The resistor R1 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P1. Port 2 of the opto-MOS relay P1 is connected to the power supply ground, and port 3 is connected to Vp. 1+ Port 4 is connected to the power supply +Vcc; resistor R2 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P2; port 2 of the opto-MOS relay P2 is connected to the power supply ground; and port 3 is connected to Vp. 1－ Port 4 is connected to the power supply -Vss; resistor R3 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P3; port 2 of the opto-MOS relay P3 is connected to the power supply ground, and port 3 is connected to V... 2+ Port 4 is connected to the power supply +Vcc; resistor R4 is connected in series between the selection control signal terminal Vp and port 1 of the opto-MOS relay P4; port 2 of the opto-MOS relay P4 is connected to the power supply ground, and port 3 is connected to Vp. 2－ The 4-port is connected to the power supply -Vss.

3. The analog signal switching circuit according to claim 2, characterized in that: The optical MOS relays P1 and P2 are normally closed bidirectional optical MOS relays, and the optical MOS relays P3 and P4 are normally open bidirectional optical MOS relays.

4. The analog signal switching circuit according to claim 1, characterized in that: The operational amplifiers A3 and A4 are powered by power supplies +Vcc and -Vss, respectively.

5. The analog signal switching circuit according to claim 1, characterized in that: The resistors R5, R6, R7, R9, and R10 are all low-temperature drift resistors with a temperature drift coefficient of less than 30 ppm / ℃.