Method and apparatus for wireless communication

Abstract

The present disclosure relates to an error vector magnitude detector for a wireless transmitter. An amplifier of a transmitter includes an input that receives an input signal and generates an amplified signal at an output. A digital power meter coupled to the input of the amplifier generates an estimated amplified signal and determines a peak power and an average power of the estimated amplified signal. An output power detector coupled to the output of the amplifier determines a peak power and an average power of the amplified signal. A controller coupled to the digital power meter and the output power detector determines an estimated crest factor based on the peak power and the average power of the estimated amplified signal, determines an amplified crest factor based on the peak power and the average power of the amplified signal, and determines an error vector magnitude based on the estimated crest factor and the amplified crest factor. The controller, which is also coupled to the amplifier, then adjusts operation of the amplifier based on the error vector magnitude.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 247,025, filed September 22, 2021, entitled “ERROR VALUE MAGNITUDE DETECTOR FOR WIRELESS TRANSMITTER,” the disclosure of which is incorporated by reference in its entirety for all purposes. BACKGROUND

[0003] The present disclosure relates generally to wireless communications, and more specifically to efficiently transmitting wireless signals.

[0004] In electronic devices (e.g., wireless communication devices), a transmitter can include one or more amplifiers (e.g., power amplifiers) that increase the power of a transmit signal sent on a frequency channel to ensure that the transmit signal is received by a destination or receiving device with sufficient signal quality and power. To prevent the transmit signal from interfering with other signals on other frequency channels, the electronic device can reduce the power obtained from the one or more amplifiers by causing the one or more amplifiers to apply a power backoff. However, in some cases, the power backoff can be too large, and thus, the transmit signal can be sent at a reduced power. SUMMARY

[0005] A summary of certain implementations disclosed herein is set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of these certain implementations and that

[0006] In one implementation, a transmitter includes an amplifier, a digital power meter coupled to an input of the amplifier, and an output power detector coupled to an output of the amplifier. The output power detector includes an attenuator, a wideband detector coupled to the attenuator, and a peak hold detector coupled to the wideband detector in parallel with a low pass filter. The transmitter further includes a control circuit coupled to the digital power meter, the output power detector, and the amplifier.

[0007] In another implementation, a method includes determining an estimated crest factor based on an input signal received at an amplifier of a transmitter, determining an amplified crest factor based on an output signal output by the amplifier, determining a ratio between the estimated crest factor and the amplified crest factor, and adjusting operation of the amplifier based on the ratio.

[0008] In yet another embodiment, an electronic device includes one or more antennas and a transmitter. The transmitter includes an amplifier that receives an input signal and amplifies the input signal by an amplification factor to output an output signal. The transmitter also includes a digital power meter that determines an estimated crest factor based on the input signal, an output power detector that determines an amplified crest factor based on the output signal, and a control circuit that adjusts the amplification factor based on the estimated crest factor and the amplified crest factor.

[0009] Various modifications can be made to the above described features to various aspects of the present invention. Other features can also be added to these various aspects. These modifications and additional features can exist individually, or in any combination. For example, various features discussed below in relation to one or more illustrated embodiments can be incorporated into any of the above described aspects of the present invention, either individually or in any combination. The brief summary presented above is intended only to familiarize the reader with certain aspects and contexts of implementations of the disclosure, and does not limit the claimed subject matter. BRIEF DESCRIPTION OF DRAWINGS

[0010] Various aspects of the disclosure can be better understood when read in conjunction with the following detailed description and with reference to the following drawings, in which like numerals represent similar parts.

[0011] Figure 1 is a block diagram of an electronic device in accordance with an embodiment of the present disclosure;

[0012] Figure 2 is a block diagram of an electronic device in accordance with an embodiment of the present disclosure Figure 1 is a functional diagram of the electronic device of

[0013] Figure 3 is a block diagram of an electronic device in accordance with an embodiment of the present disclosure Figure 1 is a schematic diagram of a transmitter of the electronic device of

[0014] Figure 4 is a plot showing a power curve or amplification factor illustrating operation of a power amplifier of the transmitter of Figure 3

[0015] Figure 5 is a schematic diagram of a portion of the transmitter of Figure 3 having a digital power meter, an output power detector, and a power amplifier controller in accordance with an embodiment of the present disclosure;

[0016] Figure 6 is a schematic diagram of an output power detector of the transmitter of Figure 3

[0017] Figure 7 ​​is a peak hold detector of an output power detector according to embodiments of the present disclosure Figure 6 an example of the operation of the peak hold detector of the output power detector of

[0018] Figure 8 is a digital power meter of a transmitter according to embodiments of the present disclosure Figure 3 a schematic diagram of a digital power meter of a transmitter according to embodiments of the present disclosure

[0019] Figure 9 is a series of plots comparing the peak power of an estimated amplified signal as determined by the digital power meter of Figure 8 the peak power of an amplified signal as determined by the output power detector of Figure 6

[0020] Figure 10 shows a comparison between the estimated amplified signal output and the amplified signal as plotted on a complex plane with an error vector magnitude of 4% according to embodiments of the present disclosure;

[0021] Figure 11 shows a comparison between the estimated amplified signal output and the amplified signal as plotted on a complex plane with an error vector magnitude of 6% according to embodiments of the present disclosure;

[0022] Figure 12 is a plot showing the correlation between normalized crest factor compression and compression error vector magnitude for different amplitude modulation to amplitude modulation curves according to embodiments of the present disclosure; and

[0023] Figure 13 is a flowchart of a method for efficiently transmitting wireless signals at increased transmit power while reducing interference to signals outside of a desired frequency channel according to embodiments of the present disclosure. DETAILED DESCRIPTION

[0024] One or more specific embodiments will be described below. In an effort to provide a concise description of these embodiments, not all features of an actual implementation are described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which can vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure.

[0025] ​When introducing elements of various embodiments of the present disclosure, the articles "a," "an," and "the" are intended to mean that there are one or more of the elements. The terms "comprising," "including," and "having" are intended to be inclusive and allow for additional elements. Additionally, it should be understood that references to "one embodiment" or "an embodiment” of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate those features. Furthermore, various features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. The use of the terms "about," "almost," "approximately," "close to," and / or "substantially” should be understood to allow for deviations that are within a suitable or acceptable range of error for the given value, number, measurement, etc. In addition, it should be understood that any exact value, number, measurement, etc. provided herein can include approximations thereof (e.g., within a suitable or acceptable range of error for the given value, number, measurement, etc.).

[0026] In electronic devices (e.g., wireless communication devices), a transmitter can include one or more amplifiers (e.g., power amplifiers) that increase the power of a transmit signal sent on a frequency channel to ensure that the transmit signal is received by a receiver with sufficient signal quality and power. The one or more amplifiers can include at least a linear amplifier that can produce an output signal that is an accurate copy of an input signal at an increased power level. That is, for a particular input power range of the input signal, the amplifier can produce an output signal that is an accurate copy of the input signal with an output power that is greater than the input signal. However, outside of this linear region (e.g., in a non-linear region), the amplifier can produce an output signal that is not an accurate copy of the input signal. When operating outside of this linear region, the output signal that is not an accurate copy of the input signal can result in emissions outside of the frequency channel (e.g., spurious emissions) and an increase in the error vector magnitude of the amplifier. These emissions can interfere with other signals outside of the frequency channel. To prevent the transmit signal from interfering with these other signals on other frequency channels and to keep the error vector magnitude low enough to maintain a high throughput of the amplifier, the electronic device can reduce the power obtained from the amplifier by causing the one or more amplifiers to apply a power backoff. However, in some cases, the power backoff can be too large and, as a result, the transmit signal can be sent at a reduced power.

[0027] Embodiments herein provide various apparatuses and techniques for efficiently transmitting wireless signals at increased transmit power while reducing interference to signals outside of a desired frequency channel. To this end, embodiments disclosed herein include an amplifier of a transmitter of a wireless communication device having an input to receive an input signal and generating an amplified signal at an output. A digital power meter is coupled to the input of the amplifier and generates an estimated amplified signal that the amplifier can desirably output, and determines a peak power and an average power of the estimated amplified signal. An output power detector coupled to the output of the amplifier determines a peak power and an average power of the amplified signal. A controller coupled to the digital power meter and the output power detector determines an estimated crest factor based on the peak power and the average power of the estimated amplified signal, determines an amplified crest factor based on the peak power and the average power of the amplified signal, and determines an error vector magnitude based on the estimated crest factor and the amplified crest factor. The controller, also coupled to the amplifier, then adjusts operation of the amplifier based on the error vector magnitude. Because the error vector magnitude indicates an amount of amplification headroom that can still be obtained before the amplifier reaches a non-linear region, the controller can use the error vector magnitude to accurately increase an amplification factor of the amplifier within the amplification headroom without causing excessive emissions in other frequency channels. Thus, transmit power can be increased without negatively impacting other communications.

[0028] Figure 1 is a block diagram of an electronic device 10 in accordance with embodiments of the present disclosure. Among other things, the electronic device 10 can include one or more processors 12 (collectively referred to herein as a single processor for convenience, which can be implemented in any suitable form of processing circuitry), a memory 14, a non-volatile storage device 16, a display 18, an input structure 22, an input / output (I / O) interface 24, a network interface 26, and a power supply 29. Figure 1 The various functional blocks shown can comprise hardware elements (including circuitry), software elements (including machine-executable instructions), or a combination of hardware and software elements (which can be referred to as logic), The processor 12, the memory 14, the non-volatile storage device 16, the display 18, the input structure 22, the input / output (I / O) interface 24, the network interface 26, and / or the power supply 29 can each be in communication with, or be directly or indirectly coupled to, one another (e.g., through or via another component, a communication bus, a network), to transmit and / or receive data therebetween. It should be noted that, Figure 1 is merely one example of a particular implementation, and is intended to illustrate the types of components that can be present in the electronic device 10.

[0029] For example, electronic device 10 may include any suitable computing device, including desktop computers or laptops (e.g., those available from Apple Inc., Cupertino, California). Pro, MacBook mini or Mac (in the form of) portable electronic devices or handheld electronic devices such as wireless electronic devices or smartphones (e.g., available from Apple Inc. in Cupertino, California). (Model form), tablet computers (for example, those available from Apple in Cupertino, California) (in the form of a model), wearable electronic devices (e.g., Apple products available from Apple Inc. in Cupertino, California) (in the form of) and other similar devices. It should be noted that, Figure 1 The processor 12 and other related items herein may be generally referred to as "data processing circuitry". This data processing circuitry may be embodied wholly or partially in software, hardware, or both. Furthermore, the processor 12 and... Figure 1 Other related items may be a single, independent processing module, or may be incorporated, wholly or partially, into any of the other elements within the electronic device 10. Processor 12 may be implemented using a combination of a general-purpose microprocessor, microcontroller, digital signal processor (DSP), field-programmable gate array (FPGA), programmable logic device (PLD), controller, state machine, gated logic, discrete hardware components, dedicated hardware finite state machine, or any other suitable entity capable of performing computation or other manipulations of information. Processor 12 may include one or more application processors, one or more baseband processors, or both, and performs the various functions described herein.

[0030] exist Figure 1 In the electronic device 10, a processor 12 may be operatively coupled to a memory 14 and a non-volatile storage device 16 to execute various algorithms. Such programs or instructions executed by the processor 12 may be stored in any suitable article of writing comprising one or more tangible computer-readable media. The tangible computer-readable media may include the memory 14 and / or the non-volatile storage device 16, individually or jointly, to store instructions or routines. The memory 14 and the non-volatile storage device 16 may include any suitable article of writing for storing data and executable instructions, such as random access memory, read-only memory, rewritable flash memory, hard disk drive, and optical disk. Furthermore, programs (e.g., operating systems) encoded on such computer program products may also include instructions executable by the processor 12 to enable the electronic device 10 to provide various functions.

[0031] In some embodiments, display 18 may facilitate a user's viewing of images generated on electronic device 10. In some embodiments, display 18 may include a touchscreen that facilitates user interaction with the user interface of electronic device 10. Furthermore, it should be understood that in some embodiments, display 18 may include one or more liquid crystal displays (LCDs), light-emitting diode (LED) displays, organic light-emitting diode (OLED) displays, active-matrix organic light-emitting diode (AMOLED) displays, or some combination of these and / or other display technologies.

[0032] The input structure 22 of electronic device 10 allows a user to interact with electronic device 10 (e.g., press a button to increase or decrease the volume level). Like network interface 26, I / O interface 24 enables electronic device 10 to interact with a variety of other electronic devices. In some embodiments, I / O interface 24 may include I / O ports for hardwired connections for charging and / or content manipulation using standard connectors and protocols such as the Lightning connector supplied by Apple Inc. of Cupertino, California, Universal Serial Bus (USB), or other similar connectors and protocols. Network interface 26 may include, for example, one or more interfaces for personal area networks (PANs) such as Ultra Wideband (UWB) or... Networks, local area networks (LANs), or wireless local area networks (WLANs) such as those employing a protocol from the IEEE 802.11x family of protocols (e.g., Networks and / or wide area networks (WANs) such as any standards related to the 3rd Generation Partnership Project (3GPP), including, for example, 3rd generation (3G) cellular networks, Universal Mobile Telecommunications System (UMTS), 4th generation (4G) cellular networks, Long Term Evolution (LTE) Cellular networks, Long Term Evolution License Assisted Access (LTE-LAA) cellular networks, 5G cellular networks, New Radio (NR) cellular networks, 6G cellular networks and higher, satellite networks, etc. Specifically, network interface 26 may include, for example, one or more interfaces for using the 5G specification version 15 cellular communication standard, which includes millimeter-wave (mmWave) frequency ranges (e.g., 24.25-300 GHz), and / or any other cellular communication standard version (e.g., version 16, version 17, any future version) that defines and / or implements frequency ranges for wireless communication. Network interface 26 of electronic device 10 may allow communication via the aforementioned networks (e.g., 5G, Wi-Fi, LTE-LAA, etc.).

[0033] Network interface 26 may also include one or more interfaces for, for example, a broadband fixed wireless access network (e.g., Mobile broadband wireless network (mobile) Asynchronous digital subscriber lines (e.g., ADSL, VDSL) and digital video terrestrial broadcasting Network and its extensions DVB handheld Networks, ultra-wideband (UWB) networks, AC power lines, etc.

[0034] As shown, network interface 26 may include transceiver 30. In some embodiments, all or part of transceiver 30 may be located within processor 12. Transceiver 30 may support the transmission and reception of various wireless signals via one or more antennas, and therefore may include transmitters and receivers. Power supply 29 of electronic device 10 may include any suitable power source, such as a rechargeable lithium polymer (Li-poly) battery and / or an alternating current (AC) power converter.

[0035] Figure 2 It is based on the implementation scheme of this disclosure. Figure 1 Functional diagram of electronic device 10. As shown, processor 12, memory 14, transceiver 30, transmitter 52, receiver 54 and / or antenna 55 (shown as 55A-55N, collectively referred to as antenna 55) may be directly or indirectly communicatively coupled to each other (e.g., through or via another component, communication bus, network) to transmit and / or receive data between each other.

[0036] Electronic device 10 may include transmitter 52 and / or receiver 54, which respectively enable the transmission and reception of data between electronic device 10 and external devices via, for example, a network (e.g., including a base station) or a direct connection. As shown, transmitter 52 and receiver 54 may be combined into transceiver 30. Electronic device 10 may also have one or more antennas 55A to 55N electrically coupled to transceiver 30. Antennas 55A-55N may be configured in omnidirectional or directional configurations, single-beam, dual-beam, or multi-beam arrangements, etc. Each antenna 55 may be associated with one or more beams and various configurations. In some embodiments, multiple antennas in antennas 55A-55N of an antenna group or module may be communicatively coupled to a respective transceiver 30 and each transmits radio frequency signals that can be advantageously and / or destructively combined to form a beam. Applicable to various communication standards, electronic device 10 may include multiple transmitters, multiple receivers, multiple transceivers, and / or multiple antennas. In some implementations, transmitter 52 and receiver 54 may transmit and receive information via other wired or wired systems or devices.

[0037] As shown, various components of the electronic device 10 can be coupled together by a bus system 56. The bus system 56 can include, for example, a data bus and, in some implementations, a power bus, a control signal bus, and a status signal bus. The components of the electronic device 10 can be coupled together or accept or provide input to each other using some other mechanism, rather than buses.

[0038] Figure 3 is a schematic diagram of a transmitter 52 (e.g., transmit circuitry) in accordance with embodiments of the present disclosure. As shown, the transmitter 52 can receive outgoing data 60 in the form of digital signals to be transmitted via one or more antennas 55. A digital-to-analog converter (DAC) 62 of the transmitter 52 can convert the digital signals to analog signals, and a modulator 64 can combine the converted analog signals with a carrier signal to generate radio waves. A power amplifier (PA) 66 receives the modulated signals from the modulator 64. The power amplifier 66 can amplify the modulated signals to a suitable level to drive transmission of the signals via the one or more antennas 55. A filter 68 (e.g., filter circuitry and / or software) of the transmitter 52 can then remove undesired noise from the amplified signals to generate transmit data 70 to be transmitted via the one or more antennas 55. The filter 68 can include one or more any suitable filters for removing undesired noise from the amplified signals, such as a bandpass filter, a bandstop filter, a lowpass filter, a highpass filter, and / or an

[0039] As discussed above, the power amplifier 66, or any other amplifier that can be included in the transmitter 52, can increase the power of a transmitted signal sent on a frequency channel to ensure that a receiving party receives the transmitted signal with sufficient signal quality and power. In some embodiments, the power amplifier 66 can include a linear amplifier that can produce an output signal that is an accurate copy of an input signal at an increased power level for a linear region. Figure 4 is a plot showing a power curve or amplification factor 80 (e.g., P out / P in ) that describes the operation of the power amplifier 66 in accordance with embodiments of the present disclosure. The horizontal or x-axis of the plot represents the input power (P in ) of an input signal of the power amplifier 66, and the vertical or y-axis of the plot represents the output power (Pout The power of the output signal has been amplified by power amplifier 66. As shown in the figure, for a specific input power range of the input signal (referred to as the linear region 82), P in and P out The relationship between them is approximately linear (making the output signal an exact copy of the input signal with greater output power than the input signal). However, outside the linear region 82, where P... in and P out In the nonlinear region 84, where the relationship between the input and output signals is no longer approximately linear, power amplifier 66 may no longer produce an output signal that is an exact copy of the input signal. In fact, the amplification factor 80 of power amplifier 66 can be reduced. Furthermore, when operating in the nonlinear region 84, the output signal may cause emissions (e.g., spurious emissions) outside the frequency channel through which transmitter 52 transmits the signal. These emissions may interfere with other signals outside the frequency channel.

[0040] To meet the error vector magnitude target (e.g., measures for quantizing the performance of transmitter 52) (which prevents the transmitted signal from interfering with these other signals on other frequency channels), processor 12 can reduce the power drawn from power amplifier 66 by applying power back-off. For example, processor 12 can reduce the input power of the input signal to power amplifier 66, adjust the bias voltage or current of power amplifier 66 to reduce the amplification factor 80, etc. However, in some cases, the power back-off may be excessive, and therefore, the transmitted signal may be transmitted at reduced power. For example, as... Figure 4 As shown, processor 12 can cause power amplifier 66 to apply power back-off, resulting in an input power P in_0 The input signal is received by power amplifier 66, which amplifies the input signal and generates an output power P. out_0 The output signal. However, if the applied power back-off is less, the signal received by the power amplifier 66 with input power P will be less. in_1 The input signal will be amplified by power amplifier 66 to generate an output power P out_1 The output signal, if higher, can achieve greater transmit power. This difference (or input power P) from the amplification factor of 80 in_1 –P in_0 This can be referred to as margin 86 (e.g., the first input power, such as P, that allows the power amplifier 66 to enter the nonlinear region 84). in_0 Second input power such as P in_1(Buffer between). In some cases, a margin 86 is provided to account for factors that may affect (e.g., increase) the amplification factor 80 such that the amplification factor will cause the power amplifier 66 to operate undesirably in the nonlinear region 84, such as temperature variations, voltage standing wave ratio, manufacturing, process variations, real-world defects, different beam configurations, etc.

[0041] To determine whether and by how much the amplification factor 80 can be increased, according to embodiments of this disclosure, portion 90 of transmitter 52 may include a digital power meter 92, an output power detector 94, and a power amplifier controller 96, such as Figure 5 As shown. A digital power meter 92 can be coupled to input 98 of power amplifier 66, and can generate (e.g., estimate and / or simulate) an estimated amplified signal that power amplifier 66 can ideally output, and can determine the peak power and average power of the estimated amplified signal, as described in further detail below. The digital power meter 92 can send a signal 100 indicating the peak power and average power of the estimated amplified signal to power controller 96. An output power detector 94 can be coupled to output 102 of power amplifier 66 and determines the peak power and average power of the amplified signal, and sends a signal 104 indicating the peak power and average power of the amplified signal to power controller 96. A power amplifier controller 96, coupled to a digital power meter 92 and an output power detector 94, determines an estimated crest factor (e.g., the ratio between the estimated peak power and average power of the amplified signal) based on the estimated peak power and average power of the amplified signal, determines an amplified crest factor (e.g., the ratio between the peak power and average power of the amplified signal) based on the peak power and average power of the amplified signal, and determines an error vector magnitude (e.g., the ratio between the estimated crest factor and the amplified crest factor) based on the estimated crest factor and the amplified crest factor. The power amplifier controller 96, also coupled to a power amplifier 66, can then adjust the operation of the power amplifier 66 based on the error vector magnitude. Because the error vector magnitude indicates the amount of amplification margin (e.g., 86) that may still be available before the power amplifier 66 reaches or operates in the nonlinear region 84, the power amplifier controller 96 can accurately increase the amplification factor of the power amplifier 66 within the amplification margin 86 using the error vector magnitude without causing over-transmission in other frequency channels. This allows for increased transmit power without negatively impacting other communications. It should be understood that the power amplifier controller 96 may include any suitable processing circuitry, and therefore may be part of the processor 12 or external to the processor.

[0042] Figure 6is a schematic diagram of an output power detector 94 according to embodiments of the present disclosure. The output power detector 94 can be coupled (e.g., via a coupler) to an output 102 of the power amplifier 66 and receive an amplified output signal 110 (e.g., a radio frequency (RF) signal) from the output 102. The output power detector 94 can have a relatively large bandwidth (e.g., 50 (MHz) megahertz or more, 80 MHz or more, 100 MHz or more, etc.), such as 80 MHz. The output power detector 94 can include a programmable attenuator 112 having one or more variable resistors 113 coupled in any suitable configuration, such as the configuration shown in Figure 6 The programmable attenuator 112 can attenuate the signal 110 by reducing its power without significantly distorting the waveform of the signal 110 to generate an attenuated signal 114. The output power detector 94 can also include a wideband detector or rectifier 116 that converts the attenuated signal (which can have a frequency within a radio frequency range (e.g., 1 hertz (Hz) to 3000 gigahertz (GHz))) to a baseband signal (having a baseband frequency (e.g., 1 Hz to 20 kilohertz (kHz)), and output an envelope 118 (e.g., representing a boundary or extreme value) of the baseband signal. Thus, the wideband detector 116 can function as an envelope detector. As shown, the wideband detector 116 can include at least a diode 117.

[0043] The output power detector 94 can include a peak hold detector 120 and a low pass filter 122 coupled in parallel to the wideband detector 116. The peak hold detector 120 can include at least a diode 124 and a capacitor 126, and determine a peak power 128 (e.g., a maximum power value) of the baseband or envelope signal 118 (e.g., within an observation window). Figure 7 is an example of the operation of the peak hold detector 120 according to embodiments of the present disclosure. For the baseband or envelope signal 118 (where the horizontal or x-axis of the plot shown represents time, and the vertical or y-axis of the plot represents the power of the baseband or envelope signal 118), the peak hold detector 120 can store or “hold” the peak or maximum power 128 of the baseband or envelope signal 118 within an observation window 150. Over time, if the power of the signal increases, the peak hold detector 120 can store or hold the increased power value. At the end of the observation window 150, the peak hold detector 120 can be storing the peak or maximum power 128 of the baseband or envelope signal 118.

[0044] Referring back to Figure 6At 306, the peak hold detector 120 can include a reset function 130 (e.g., to reset the peak hold detector 120 to determine a next peak power 128 of the signal) and detect the peak power 128 and hold the peak power for a hold time corresponding to an observation window 150 (e.g., 5 microseconds (ps)). The observation window 150 can be based on a symbol duration and / or a subcarrier spacing. For example, for a large subcarrier spacing of 120 kHz, the symbol duration can be approximately 8 ps. Thus, a reduced observation window 150 that can be used is approximately 5 ps.

[0045] The low pass filter 122 can filter a relatively narrow bandwidth (e.g., less than the bandwidth of the output power detector 94), such as 1 MHz. The low pass filter 122 can include at least a resistor 132 and a capacitor 134, have one pole, and have a start / reset function 136 and a stop / hold function 138. At the start of the observation window 150, the peak hold detector 120 and the low pass filter 122 can be reset using respective reset functions 130, 136. Referring back to Figure 7 The low pass filter 122 can determine an average power 152 of the baseband or envelope signal 118.

[0046] The power amplifier controller 96 can receive the peak power 128 and the average power 152 from the output power detector 94 (e.g., via the signal 104). The power amplifier controller 96 can then determine an amplified crest factor of the amplified signal output by the power amplifier 66 (e.g., a ratio of the peak power 128 to the average power 152). In some embodiments, the electronic device 10 can include multiple transmitters 52 each having an amplifier (e.g., 66), and thus each having a respective output power detector 94. In some cases, a first output power detector 94 of a first transmitter 52 can receive leakage of a transmit signal transmitter by a second transmitter 52. It should be appreciated that because such leakage can be a portion of the transmit signal transmitted by the first transmitter 52, the leakage can not be compensated for.

[0047] Because the error vector magnitude of the power amplifier 66 depends not only on the power and the crest factor of the amplified signal, but also on the modulation content of the input signal to the power amplifier 66, the digital power meter 92 can facilitate providing a reference crest factor. Figure 8is a schematic diagram of a digital power meter 92 according to embodiments of the present disclosure. The digital power meter 92 can be coupled to an input 98 of the power amplifier 66 and receive an input signal 160 (e.g., a quadrature or “IQ” signal having in-phase and quadrature components) from the input 98. The digital power meter 92 can low-pass filter an amplitude of an estimated or simulated transmit signal (e.g., an estimated or simulated amplified signal that the power amplifier 66 can ideally output or output without considering real-world factors such as environmental factors (including temperature, humidity, etc.), process variations, manufacturing defects, channel frequencies, beamforming parameters, etc.) to facilitate generating a reference crest factor for comparison with an amplified crest factor.

[0048] The digital power meter 92 can include digital components such as a vector CORDIC (Coordinate Rotation Digital Computer) 162 that performs one or more vector rotation vectorization algorithms on the input signal 160 to determine (e.g., measure, estimate, and / or simulate) an amplitude 164 of the input signal 160 (e.g., in the form of an estimated amplified signal) that is ideally amplified or amplified without considering real-world factors (e.g., by the power amplifier 66). The digital power meter 92 can also include a wideband low-pass filter 166 that can include an infinite impulse response filter that can mimic or simulate characteristics of a radio frequency envelope detector (e.g., the wideband detector 116 of the output power detector 94). The wideband low-pass filter 166 can have a relatively large bandwidth (e.g., 50 (MHz) megahertz or more, 80 MHz or more, 100 MHz or more, etc.), such as 80 MHz.

[0049] The digital power meter 92 can include a maximum hold register 168 and a digital low-pass filter 170 coupled in parallel to the wideband low-pass filter 166. The maximum hold register 168 can capture a maximum or highest modulation peak (e.g., a peak power 172) of the low-pass filtered amplitude 169 of the estimated amplified signal in an observation window (e.g., that can match the observation window 150 of the peak hold detector 120). In particular, the maximum hold register 168 can perform a maximum operation on the low-pass filtered amplitude 169 of the estimated amplified signal in the observation window. Figure 7Similar techniques are shown to determine the peak power 172 of the low pass filtered amplitude 169 signal. As shown, the maximum hold register 168 can include a reset function 174 and a stop / hold function 176. The digital low pass filter 170 can also include an infinite impulse response filter that can mimic or simulate the behavior of an analog low pass filter (e.g., the low pass filter 122 of the output power detector 94). Thus, the digital low pass filter 170 can have a dominant pole (e.g., at 1 MHz). The digital low pass filter 170 can determine a filtered amplitude or average power 178 of the estimated amplified signal in the observation window. Thus, the digital power meter 92 can be used to generate the estimated amplified signal (e.g., 164) by the power amplifier 66 and simulate the operations performed by the output power detector 94 on the estimated amplified signal 164. The digital low pass filter 170 can also include a start / reset function 180 and a stop / hold function 182.

[0050] The power amplifier controller 96 can receive the peak power 172 and the average power 178 from the digital power meter 92 (e.g., via the signal 100). The power amplifier controller 96 can then determine an estimated crest factor (e.g., a ratio of the peak power 172 to the average power 178) of the estimated amplified signal 164 generated by the digital power meter 92. Figure 9 A series of plots comparing the peak power 172 of the estimated amplified signal 164 as determined by the digital power meter 92 and the peak power of the amplified signal 110 output by the power amplifier 66 as determined by the output power detector 94 in accordance with embodiments of the present disclosure. A first plot 190 shows the digital low pass output 192 and the peak power 172 of the estimated amplified signal 164 (e.g., the reference amplitude signal). A second plot 193 shows the analog low pass output 194A and the peak power 128A of the amplified signal 110A output by the first power amplifier 66. A third plot 196 shows the analog low pass output 194B and the peak power 128B of the amplified signal 110B output by the second power amplifier 66. The estimated amplified signal 164 is superimposed on both of the amplified signals 110A, 110B. As shown, the amplified signals 110A, 110B are compressed or have a smaller amplitude than the estimated amplified signal 164. Thus, the second plot 193 and the third plot 196 demonstrate that the first and second power amplifiers 66 can increase their respective amplification factors due to this difference in amplitude, which is reflected in larger error vector magnitude values.

[0051] Figure 10 A comparison between the amplified signal 110 output by the power amplifier 66 and the estimated amplified signal 164 as caused by 4% error vector magnitude from amplitude modulation to amplitude modulation (AMAM) compression as plotted on a complex plane is shown in accordance with embodiments of the present disclosure.Figure 11 A comparison between the amplified signal 110 output by the power amplifier 66 and the estimated amplified signal 164 as plotted on a complex plane with an error vector magnitude of 6% as caused by AMAM compression is shown in accordance with an embodiment of the present disclosure. In Figure 10 and Figure 11 In each of Figure 11 , the solid line, which is more concentrated in the more central portion, represents the amplified signal 110, and the dashed line, which is less concentrated in the more central portion and spreads beyond the more central portion in the more peripherally disposed portion, represents the estimated amplified signal 164. As shown, the peaks of the estimated amplified signal 164 are compressed (as compared to the peaks of the amplified signal 110), where Figure 10 the greater error vector magnitude in

[0052] Comparing the ratio between the crest factor of the estimated amplified signal 164 and the amplified signal 110 enables an indirect measurement or estimation of the error vector magnitude. In fact, the crest factor compression (CFC), which is the ratio of the estimated crest factor to the crest factor measured at the output of the power amplifier 66 (e.g., the amplified crest factor), is related to the error vector magnitude (EVM) and, thus, can be used as an indirect EVM measurement. Greater correlation can be achieved when the CFC is scaled by the square root of the peak 128 of the amplified signal 110 in the observation window 150, as this can reduce statistical spread caused by the modulation content of the amplified signal 110 in the observation window 150. Figure 12 is a plot showing the correlation between the normalized CFC 200 (e.g., normalized based on the square root of the peak 128 of the amplified signal 110 in the observation window 150) and the compression EVM 202 (e.g., the EVM generated by compression) for different AMAM curves 204 in accordance with an embodiment of the present disclosure. As shown, there is a strong correlation (e.g., indicative of a direct relationship) between the CFC 200 and the EVM 202.

[0053] Accordingly, the power amplifier controller 96 can estimate or determine the error vector magnitude based on the measured or estimated crest factor and the amplified crest factor. Figure 13is a flowchart of a method 210 for efficiently transmitting wireless signals at an increased transmit power while reducing interference with signals outside of a desired frequency channel according to embodiments of the present disclosure. Any suitable device (e.g., a controller) that can control components of the electronic device 10, such as the processor 12, the power amplifier controller 96, can perform the method 210. In some embodiments, the method 210 can be implemented by executing instructions stored in a tangible, non-transitory computer-readable medium, such as the memory 14 or the storage 16, using the processor 12. For example, the method 210 can be performed, at least in part, by one or more software components, such as an operating system of the electronic device 10, one or more software applications of the electronic device 10, and the like. Although the method 210 is described using a particular order of steps, it should be understood that the present disclosure contemplates that the described steps can be performed in an order different than shown, and that certain described steps can be skipped or not performed at all.

[0054] In process block 212, the power amplifier controller 96 and / or the processor 12 can control the digital power meter 92 to receive an input signal of the power amplifier 66 (e.g., at the input 98 of the power amplifier 66). In process block 214, the power amplifier controller 96 and / or the processor 12 can control the digital power meter 92 to generate an estimated amplified signal based on the input signal. Specifically, the vector CORDIC 162 can perform a vectoring algorithm that rotates one or more vectors of the input signal 160 to determine (e.g., estimate and / or simulate) an amplitude 164 of the input signal that is ideally amplified or amplified without considering real-world factors such as environmental factors (including temperature, humidity, etc.), process variations, manufacturing defects, channel frequency, beamforming parameters, and the like) by the power amplifier 66. In process block 216, the power amplifier controller 96 and / or the processor 12 can receive or control the digital power meter 92 to determine a peak and average power of the estimated amplified signal. Specifically, the wideband low-pass filter 166 can filter the amplitude 164 output by the vector CORDIC 162, and the maximum holding register 168 can determine a peak power 172 of the estimated amplified signal, and the digital low-pass filter 170 can determine an average power 178 of the estimated amplified signal. In process block 218, the power amplifier controller 96 can then determine an estimated crest factor based on the peak power 172 and the average power 178 of the estimated amplified signal. The power amplifier controller 96 can determine the estimated crest factor by determining a ratio of the peak power 172 to the average power 178 of the estimated amplified signal.

[0055] In process block 220, the power amplifier controller 96 and / or the processor 12 can control the output power detector 94 to receive the amplified output signal 110 of the power amplifier 66 (e.g., at the output 102 of the power amplifier 66). In process block 222, the power amplifier controller 96 and / or the processor 12 can receive or control the output power detector 94 to determine the peak and average power of the amplified signal 110. Specifically, the attenuator 112 can attenuate the amplified signal 110, and the wideband detector 116 can output the envelope 118 of the attenuated signal. The peak hold detector 120 can determine the peak power 128 of the attenuated signal, and the low pass filter 122 can determine the average power 152 of the attenuated signal. In process block 224, the power amplifier controller 96 can then determine or receive the amplified crest factor based on the peak power 128 and the average power 152 of the amplified signal. The power amplifier controller 96 can determine the amplified crest factor by determining the ratio of the peak power 128 to the average power 152 of the estimated amplified signal.

[0056] In process block 226, the power amplifier controller 96 determines or receives the ratio between the amplified crest factor and the estimated crest factor (e.g., crest factor compression). In process block 228, the power amplifier controller 96 determines or receives the error vector magnitude based on the ratio, as the error vector magnitude is related to the crest factor compression. In process block 230, the power amplifier controller 96 adjusts the operation of the power amplifier 66 based on the error vector magnitude. For example, if the error vector magnitude is greater than a threshold, the power amplifier controller 96 can increase the amplification factor 80 of the power amplifier 66. For example, the power amplifier controller 96 can increase the input power to the input signal of the power amplifier 66, adjust the bias voltage or current of the power amplifier 66 to increase the amplification factor 80, etc. In the case where the error vector magnitude is not greater than the threshold, the power amplifier controller 96 can then maintain the amplification factor 80 of the power amplifier 66. The threshold can include any error vector magnitude that indicates that there is sufficient margin to increase the amplification factor 80 without entering the non-linear region 84 of the amplifier 66, such as 1% or greater, 4% or greater, 6% or greater, 8% or greater, 10% or greater, 12% or greater, etc. In this way, the method 210 can enable the power amplifier controller 96 to facilitate efficiently transmitting wireless signals at increased transmit power, while reducing interference to signals outside of the desired frequency channel.

[0057] For purposes of this disclosure, it should be understood that preventing a transmit signal from interfering with other signals outside of a desired frequency channel can refer to reduced or minimal interference of the transmit signal such that the other signals can be received at a corresponding receiver with sufficient signal power and quality to properly process the other signals (e.g., received signal power of the other signals within an error threshold as compared to when power backoff is applied, received signal quality of the other signals within an error threshold as compared to when power backoff is applied, data can be extracted from the other signals within the error threshold, etc.).

[0058] The specific embodiments discussed above have been shown by way of example, and it should be understood that these embodiments can be susceptible to various modifications and alternative forms. It should be further understood that the claims are not intended to be limited to the particular forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the disclosure.

[0059] The technology described and claimed herein is to be understood fully as being directed to the specific examples set forth herein, which examples are illustrative of the general inventive concepts and therefore are not to be construed as limiting of the scope of the technology. Further, if any claims recite a "means" or "step-plus-function" claim, it will be understood that any data used in the steps or functions are of a type found in nature as physical signals, which signals comprise physical things. The apparatuses of the preceding claims are not directed to a signal per se, but rather to an apparatus that manipulates physical signals.

[0060] It is well understood that the use of personally identifiable information should follow privacy policies and practices that are generally recognized as meeting or exceeding industry or governmental requirements for maintaining the privacy of users. In particular, personally identifiable information data should be managed and handled in a way to minimize risk of unintentional or unauthorized access or use of the data, and every individual interacting with the system should be made aware of the nature of the use of the data.

Claims

1. A transmitter comprising: an amplifier; a digital power meter coupled to an input of the amplifier, the digital power meter configured to determine an estimated crest factor based on an input signal received at the input of the amplifier; an output power detector coupled to an output of the amplifier, the output power detector comprising an attenuator, a wideband detector coupled to the attenuator, and a peak hold detector coupled to the wideband detector in parallel with a low pass filter, the output power detector configured to determine an amplified crest factor based on an output signal received at the output of the amplifier; and a control circuit coupled to the digital power meter, the output power detector, and the amplifier, the control circuit configured to adjust an amplification factor provided by the amplifier based on the estimated crest factor and the amplified crest factor.

2. The transmitter of claim 1, wherein the digital power meter is configured to determine the estimated crest factor by generating an estimated amplified signal and determining the estimated crest factor based on the estimated amplified signal.

3. The transmitter of claim 1, wherein the control circuit is configured to determine a ratio between the estimated crest factor and the amplified crest factor.

4. The transmitter of claim 3, wherein the control circuit is configured to adjust an amplification factor provided by the amplifier based on the ratio between the estimated crest factor and the amplified crest factor.

5. The transmitter of claim 1, wherein the digital power meter is configured to execute a vectorization algorithm that rotates one or more vectors of an input signal received at the input of the amplifier and determine an amplitude.

6. The transmitter of claim 1, wherein the digital power meter comprises a first digital low pass filter coupled to a second digital low pass filter.

7. A method for communication comprising: receiving, at processing circuitry of an electronic device, an estimated crest factor based on an input signal received at an amplifier of a transmitter of the electronic device; receiving, at the processing circuitry, an amplified crest factor based on an output signal output by the amplifier; determining, by the processing circuitry, a ratio between the estimated crest factor and the amplified crest factor; and adjusting, by the processing circuitry, operation of the amplifier based on the ratio.

8. The method of claim 7, comprising: generating, by the processing circuitry, an estimated amplified signal based on the input signal.

9. The method of claim 8, wherein generating, by the processing circuit, the estimated amplified signal comprises: executing, at the processing circuitry, a vectorization algorithm that rotates one or more vectors of the input signal to determine the estimated amplified signal.

10. The method of claim 8, comprising: receiving, at the processing circuitry, a peak power and an average power of the estimated amplified signal, wherein receiving the estimated crest factor is based on the peak power and the average power of the estimated amplified signal.

11. The method of claim 7, comprising: receiving, at the processing circuit, a peak power and an average power of the output signal, wherein receiving the amplified crest factor is based on the peak power and the average power of the output signal.

12. The method of claim 7, comprising: receiving, at the processing circuit, an error vector magnitude based on the ratio between the estimated crest factor and the amplified crest factor, wherein adjusting the operation of the amplifier is based on the error vector magnitude.

13. An electronic device, comprising: one or more antennas; and a transmitter, the transmitter comprising: an amplifier configured to receive an input signal and amplify the input signal by an amplification factor to output an output signal; a digital power meter configured to determine an estimated crest factor based on the input signal; an output power detector configured to determine an amplified crest factor based on the output signal; and a control circuit configured to adjust the amplification factor based on the estimated crest factor and the amplified crest factor.

14. The electronic device of claim 13, wherein the control circuit is configured to determine a ratio between the estimated crest factor and the amplified crest factor.

15. The electronic device of claim 14, wherein the control circuit is configured to adjust the amplification factor provided based on the ratio between the estimated crest factor and the amplified crest factor.

16. The electronic device of claim 14, wherein the control circuit is configured to determine an error vector magnitude based on the ratio between the estimated crest factor and the amplified crest factor.

17. The electronic device of claim 16, wherein the control circuit is configured to increase the amplification factor based on the error vector magnitude exceeding a threshold value.

18. The electronic device of claim 16, wherein the control circuit is configured to maintain the amplification factor based on the error vector magnitude not exceeding a threshold value.

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