Backplane interconnection method, apparatus, board, distributed rack device and storage medium

By acquiring the SerDes interface capability parameters of the board, the port mode and connection relationship are dynamically determined, which solves the problems of SerDes interface waste and scalability, and realizes efficient utilization and compatibility of backplane interconnection.

CN115934602BActive Publication Date: 2026-04-24MAIPU COMM TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
MAIPU COMM TECH CO LTD
Filing Date
2022-12-30
Publication Date
2026-04-24

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Abstract

The application relates to the technical field of communication, and provides a backboard interconnection method and device, a board card, a distributed rack device and a storage medium. When a local board card is connected with a counter board card, a first capability parameter of a first target SerDes interface having a connection relationship with the counter board card in the local board card and a second capability parameter of a second target SerDes interface having a connection relationship with the local board card in the counter board card are acquired; then, according to the first capability parameter and the second capability parameter, a common port mode of the local board card and the counter board card is determined; then, according to the common port mode, a backboard port connection relationship of the local board card and the counter board card is determined, and backboard interconnection of the local board card and the counter board card is realized according to the backboard port connection relationship. The backboard port is dynamically formed by acquiring the connection relationship and the capability parameter of the SerDes interfaces of two ends, so that the backboard interconnection of the two board cards is realized, the waste of the SerDes interfaces is avoided, and the expansibility of the port is ensured.
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Description

Technical Field

[0001] This invention relates to the field of communication technology, and more specifically, to a backplane interconnection method, apparatus, board, distributed rack equipment, and storage medium. Background Technology

[0002] Within a distributed rack system, regardless of whether it's an orthogonal architecture, a fully connected architecture, or any other architecture, there will always be multiple network cards, and these cards will be interconnected via data channels. Backplane interconnection refers to the connection between two network cards through several backplane ports. The port modes of these backplane ports vary depending on the capabilities of the network chip; for example, 40G-R4, 50G-R2, 100G-R4, and 800G-R8 port modes have different speeds, and the number of SerDes interfaces within a single port also differs. SerDes is short for SERializer / DESerializer. Some port modes are compatible, such as 50G-R2 and 100G-R4, while others are not, such as 40G-R4 and 50G-R2.

[0003] The hardware connection of the backplane ports should be planned according to the number of SerDes interfaces per port. This determines the future expandable bandwidth of the backplane ports and is also related to the maximum speed of the front panel ports. For example, if the maximum speed of the front panel ports is 400G, then a single backplane port must reach at least 400G to meet the requirement of one traffic per port for ordered cross-card transmission. This means that the bandwidth of a single backplane port determines the maximum speed that a single front panel port can support.

[0004] Existing backplane interconnect methods often lead to a waste of SerDes interface resources. Although there are network chips that support cell switching as interconnect chips for the boards, most network chips do not support cell switching, and replacing the chips will increase costs in various aspects. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a backplane interconnection method, apparatus, board, distributed rack equipment and storage medium.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] In a first aspect, the present invention provides a backplane interconnection method, the method comprising:

[0008] When the local board and the peer board are connected, the first capability parameters of each first target SerDes interface in the local board that has a connection relationship with the peer board and the second capability parameters of each second target SerDes interface in the peer board that has a connection relationship with the local board are obtained.

[0009] Based on the first capability parameter and the second capability parameter, determine the common port mode of the local board and the remote board;

[0010] The backplane port connection relationship between the local board and the peer board is determined according to the public port mode.

[0011] According to the backplane port connection relationship, the backplane interconnection between the local board and the remote board is realized.

[0012] In an optional implementation, the step of determining the common port mode of the local board and the peer board based on the first capability parameter and the second capability parameter includes:

[0013] Based on the first capability parameter, determine the multiple first port modes supported by the local board;

[0014] Based on the second capability parameter, determine the multiple second port modes supported by the peer board;

[0015] The common port mode of the local board and the remote board is obtained by the intersection of all first port modes and all second port modes.

[0016] In an optional implementation, the first SerDes interface in the local board is connected to the corresponding channel of the connector in the local board, and all first SerDes interfaces are aligned with powers of 2 and form a single port with the same power of 2. The first capability parameter includes the rate supported by each first target SerDes interface.

[0017] The step of determining the multiple first port modes supported by the local board based on the first capability parameter includes:

[0018] Obtain each first value corresponding to the local board, where the first value is a power of 2;

[0019] Take any one of the first values ​​as the first target value;

[0020] According to the first target value, all first target SerDes interfaces are divided into multiple groups, and the total rate supported by the first target SerDes interface in each group is calculated according to the first capability parameter to obtain the first port mode corresponding to the first target value.

[0021] Wherein, the total number of first target SerDes interfaces in each group is equal to the first target value; the first port mode includes the total number of first target SerDes interfaces in each group and the total supported rate;

[0022] Iterate through each of the first values ​​to obtain the first port mode corresponding to each first value.

[0023] In an optional implementation, the second SerDes interface in the peer board is connected to the corresponding channel of the connector in the peer board, and all the second SerDes interfaces are aligned to powers of 2 and form a single port with the same power of 2. The second capability parameter includes the rate supported by each second target SerDes interface.

[0024] The step of determining the multiple second port modes supported by the peer board based on the second capability parameter includes:

[0025] Obtain each second value corresponding to the peer board, wherein the second value is a power of 2;

[0026] Take any one of the second values ​​as the second target value;

[0027] According to the second target value, all second target SerDes interfaces are divided into multiple groups, and the total rate supported by the second target SerDes interface in each group is calculated according to the second capability parameter to obtain the second port mode corresponding to the second target value.

[0028] Wherein, the total number of second target SerDes interfaces in each group is equal to the second target value; the second port mode includes the total number of second target SerDes interfaces in each group and the total supported rate;

[0029] Iterate through each of the second values ​​to obtain the second port mode corresponding to each second value.

[0030] In an optional implementation, the step of obtaining the common port mode of the local board and the peer board based on the intersection of all first port modes and all second port modes includes:

[0031] From all first port modes and all second port modes, select each candidate port mode that is supported by both the local board and the peer board to obtain the intersection;

[0032] If there is only one candidate port pattern in the intersection, then the candidate port pattern is taken as the common port pattern.

[0033] If there are multiple candidate port modes in the intersection, then the rate of each candidate port mode is obtained, and the candidate port mode corresponding to the highest rate is taken as the common port mode.

[0034] In an optional implementation, the step of determining the backplane port connection relationship between the local board and the peer board based on the common port mode includes:

[0035] Based on the common port mode and all first target SerDes interfaces, determine the first backplane port of the local board;

[0036] Based on the common port mode and all second target SerDes interfaces, determine the second backplane port of the peer board;

[0037] Based on the connection relationship between the first target SerDes interface and the second target SerDes interface, the backplane port connection relationship between the first backplane port and the second backplane port is obtained.

[0038] In a second aspect, the present invention provides a backplane interconnect device, the device comprising:

[0039] The acquisition module is used to acquire, when the local board and the peer board are connected, the first capability parameters of each first target SerDes interface in the local board that has a connection relationship with the peer board and the second capability parameters of each second target SerDes interface in the peer board that has a connection relationship with the local board.

[0040] The determining module is used to determine the common port mode of the local board and the remote board based on the first capability parameter and the second capability parameter;

[0041] The backplane port connection relationship between the local board and the peer board is determined according to the public port mode.

[0042] The connection module is used to realize backplane interconnection between the local board and the remote board according to the backplane port connection relationship.

[0043] Thirdly, the present invention provides a board card, the board card including a processor and a memory, the memory storing a computer program, and the processor executing the computer program to implement the method described in any one of the foregoing embodiments.

[0044] Fourthly, the present invention provides a distributed rack device, the distributed rack device including the boards described in the foregoing embodiments.

[0045] Fifthly, the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in any one of the foregoing embodiments.

[0046] The backplane interconnection method, apparatus, board, distributed rack equipment, and storage medium provided by this invention, when a local board interfaces with a peer board, acquires the first capability parameters of a first target SerDes interface on the local board that has a connection relationship with the peer board, and the second capability parameters of a second target SerDes interface on the peer board that has a connection relationship with the local board. Then, based on the first and second capability parameters, the common port mode of the local and peer boards is determined. Next, the backplane port connection relationship between the local and peer boards is determined based on the common port mode, and backplane interconnection between the local and peer boards is achieved according to the backplane port connection relationship. By acquiring the connection relationship and capability parameters of the SerDes interfaces at both ends, backplane ports are dynamically formed to achieve backplane interconnection between the two boards. This avoids SerDes interface waste while ensuring port scalability.

[0047] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0048] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0049] Figure 1 An example diagram of a backplane interconnection method in the prior art is shown;

[0050] Figure 2 A schematic diagram of the board frame provided in this embodiment of the invention;

[0051] Figure 3 This diagram illustrates a flow chart of a backplane interconnection method provided in an embodiment of the present invention.

[0052] Figure 4 An example diagram of a backplane interconnection method provided in an embodiment of the present invention is shown;

[0053] Figure 5 This diagram illustrates yet another example of the backplane interconnection method provided in an embodiment of the present invention;

[0054] Figure 6This diagram illustrates yet another example of the backplane interconnection method provided in an embodiment of the present invention;

[0055] Figure 7 A functional block diagram of a backplane interconnect device provided in an embodiment of the present invention is shown.

[0056] Icons: 100 - Board; 110 - Bus; 120 - Processor; 130 - Memory; 170 - Communication Interface; 300 - Backplane Interconnect Device; 310 - Acquisition Module; 330 - Determining Module; 350 - Connection Module. Detailed Implementation

[0057] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0058] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0059] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0060] Please see Figure 1 This is an example diagram of an existing backplane interconnection method. Figure 1 (a) Connector A to the board A has only 4 wires that can form a maximum 50G-R2 SerDes interface; Figure 1(b) Connector B connects to board B, which has 8 SerDes interfaces that can be configured into a maximum of 100G-R4. Considering that a backplane port supports a maximum of 4 SerDes interfaces, each backplane port must reserve 4 SerDes interface slots. Therefore, board B has 2 100G-R4 ports. To maximize bandwidth by interfacing with board B's two ports, board A must use two 50G-R2 ports, each occupying one of the 4 SerDes interface channels. That is, when board A and board B are interfacing, only two 50G-R2 ports can be used to connect to board B's two 100G-R4 ports. Figure 1 As shown in (c). Since each port on board B has 4 SerDes interfaces, but when it interfaces with board A, each port actually only uses 2 SerDes interfaces, resulting in wasted SerDes interfaces on board B. Furthermore, assuming board A has 8 SerDes interfaces that can form a maximum 50G-R2 configuration, only 4 of its SerDes interfaces will interface with the two 50G-R2 ports of board B's two 100G-R4 ports, also resulting in wasted SerDes interfaces on board A.

[0061] It can be seen that existing backplane interconnect methods waste SerDes interface resources and fail to meet scalability requirements. Although some network chips that support cell switching are used as interconnect chips for boards, most network chips do not support cell switching, and replacing chips increases costs in various aspects. Other approaches attempt to balance scalability and avoid SerDes interface waste, but these often ultimately result in a lack of scalability. Therefore, this invention provides a backplane interconnect method to solve the above problems.

[0062] Please refer to Figure 2 This is a block diagram of a board 100 provided in an embodiment of the present invention. The board 100 includes a bus 110, a processor 120, a memory 130, and a communication interface 170.

[0063] Bus 110 may be a circuit that connects the above-mentioned components to each other and transmits information between the components.

[0064] The processor 120 can receive commands from the other components (such as memory 130 and communication interface 170) via bus 110, interpret the received commands, and perform calculations or data processing according to the interpreted commands.

[0065] The processor 120 can be an integrated circuit chip with signal processing capabilities. The processor 120 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0066] The memory 130 may store commands or data received from the processor 120 or other components (e.g., the communication interface 170) or generated by the processor 120 or other components.

[0067] The memory 130 may be, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), or electrically erasable programmable read-only memory (EEPROM).

[0068] Communication interface 170 can be used to communicate with other node devices for signaling or data.

[0069] Understandable Figure 2 The structure shown is only a schematic diagram of board 100. Board 100 may also include components such as... Figure 2 The more or fewer components shown, or having the same Figure 2 The different configurations shown. Figure 2 The components shown can be implemented using hardware, software, or a combination thereof.

[0070] The above-mentioned board 100 will be used as the execution subject to execute the various steps in the various methods provided in the embodiments of the present invention and achieve the corresponding technical effects.

[0071] Please see Figure 3 , Figure 3 This is a schematic flowchart of a backplane interconnection method provided in an embodiment of the present invention.

[0072] Step S202: When the local board and the peer board are connected, obtain the first capability parameters of each first target SerDes interface in the local board that has a connection relationship with the peer board, and the second capability parameters of each second target SerDes interface in the peer board that has a connection relationship with the local board.

[0073] It is understood that for a board in a distributed rack device, it can be connected to one other board or multiple other boards, and the connection methods between boards are similar. Therefore, in this embodiment of the invention, any board is taken as the local board and the board to be connected to the local board is taken as the peer board for example illustration.

[0074] Both the local and remote boards record information about their respective SerDes interfaces, including their capability parameters. To differentiate between the different boards, "First SerDes Interface" and "Second SerDes Interface" are used to describe the SerDes interfaces on the local and remote boards, respectively. The first target SerDes interface is the first SerDes interface that is connected to the remote board, and the second target SerDes interface is the second SerDes interface that is connected to the local board.

[0075] In existing technologies, boards are connected based on pre-defined backplane ports. However, pre-defining backplane ports often leads to wasted SerDes interfaces and affects scalability. Therefore, this invention, in its embodiments, no longer uses backplane ports as the unit of hardware connection, but rather SerDes interfaces. Thus, when the local board interfaces with the remote board, it obtains the first capability parameters of all first target SerDes interfaces on the local board and the second capability parameters of all second target SerDes interfaces on the remote board, and establishes a connection based on the SerDes interfaces of both ends.

[0076] Step S204: Determine the common port mode of the local board and the remote board based on the first capability parameter and the second capability parameter;

[0077] Step S206: Determine the backplane port connection relationship between the local board and the remote board according to the common port mode;

[0078] Step S208: According to the backplane port connection relationship, realize the backplane interconnection between the local board and the remote board.

[0079] It is understandable that the SerDes interface capability parameters differ between different boards, which leads to different port modes that the boards can support. At the same time, the port mode will also affect the transmission bandwidth, i.e., the maximum transmission rate.

[0080] Therefore, in this embodiment, the common port mode of the local board and the peer board can be determined according to the capability parameters of the SerDes interfaces at both ends; then, the backplane ports at both ends are formed according to the common port mode and the connection relationship between the backplane ports is determined; and then, based on the backplane port connection relationship, the backplane interconnection between the local board and the peer board is realized.

[0081] It can be understood that, since the embodiments of the present invention do not pre-define backplane ports, there are no backplane ports before the two boards are connected. Instead, when they are connected, backplane ports are dynamically formed based on the connection relationship and capability parameters of the SerDes interfaces at both ends to connect the boards and achieve backplane interconnection. This avoids the waste of SerDes interfaces and ensures the scalability of the ports.

[0082] As can be seen from the above steps, when the local board and the remote board interface, the first capability parameters of the first target SerDes interface in the local board that has a connection relationship with the remote board, and the second capability parameters of the second target SerDes interface in the remote board that has a connection relationship with the local board, are obtained. Then, based on the first and second capability parameters, the common port mode of the local board and the remote board is determined. Next, the backplane port connection relationship between the local board and the remote board is determined based on the common port mode, and the backplane interconnection between the local board and the remote board is achieved according to the backplane port connection relationship. By obtaining the connection relationship and capability parameters of the SerDes interfaces at both ends, backplane ports are dynamically formed to achieve backplane interconnection of the two boards. This avoids SerDes interface waste while ensuring port scalability.

[0083] Optionally, for step S204 above, the present invention provides a possible implementation method.

[0084] Step S204-1: Determine the multiple first port modes supported by the local board based on the first capability parameters;

[0085] Step S204-3: Determine the multiple second port modes supported by the peer board based on the second capability parameters;

[0086] Step S204-5: Based on the intersection of all first port modes and all second port modes, obtain the common port mode of the local board and the remote board.

[0087] In this embodiment, the port modes supported by the two end boards can be determined based on the capability parameters of the SerDes interfaces at both ends. For example, the multiple port modes supported by the local board can be determined first based on the first capability parameter, i.e., the first port mode; and then the multiple port modes supported by the remote board can be determined second based on the second capability parameter.

[0088] It should be understood that the embodiments of the present invention do not limit the order in which the port mode of the local board and the port mode of the remote board are determined. That is, step S204-1 can be executed first and then step S204-3, or step S204-3 can be executed first and then step S204-1, or steps S204-1 and S204-3 can be executed simultaneously.

[0089] Based on the first port mode supported by the local board and the second port mode supported by the remote board, the intersection of the two can be obtained, and the common port mode of the local board and the remote board can be obtained from the intersection.

[0090] Optionally, for step S204-1 above, the present invention provides a possible implementation method.

[0091] Step S204-1-1: Obtain each first value corresponding to the local board, where the first value is a power of 2;

[0092] Step S204-1-3: Take any first value as the first target value;

[0093] Step S204-1-5: According to the first target value, divide all the first target SerDes interfaces into multiple groups, and calculate the total rate supported by the first target SerDes interfaces in each group according to the first capability parameter to obtain the first port mode corresponding to the first target value.

[0094] In each group, the total number of first target SerDes interfaces is equal to the first target value; the first port mode includes the total number of first target SerDes interfaces in each group and the total supported rate.

[0095] Step S204-1-7: Iterate through each first value to obtain the first port mode corresponding to each first value.

[0096] The first SerDes interface in the local board is connected to the corresponding channel of the connector in the local board, and all the first SerDes interfaces are aligned with powers of 2 and form a single port with the same power of 2. The first capability parameter includes the rate supported by each first target SerDes interface.

[0097] It is understandable that since the number of SerDes interfaces contained in each port mode is a power of 2, such as 1, 2, 4, 8, etc., this embodiment of the invention sets constraints on the hardware connection relationship. That is, from the perspective of a connector, all SerDes are aligned in a power of 2 and form a single port with the same power of 2.

[0098] An example diagram is provided to facilitate understanding of the implementation of this invention. Please refer to [link / reference]. Figure 4For example, connector 1 connects to board 1, which has 8 SerDes interfaces that can be configured to form a maximum of 400G-R8. These 8 SerDes interfaces correspond one-to-one with the 8 channels of connector 1, and the SerDes interfaces and channels are connected according to the corresponding relationship. At the same time, all SerDes interfaces are aligned in powers of 2 and form a single port with the same power of 2. That is, if 2 SerDes interfaces are combined to form one port, then these 8 SerDes interfaces can form 4 ports in 100G-R2 mode; if 4 SerDes interfaces are combined to form one port, then these 8 SerDes interfaces can form 2 ports in 200G-R4 mode; if 8 SerDes interfaces are combined to form one port, then these 8 SerDes interfaces can form 1 port in 400G-R8 mode.

[0099] It can be understood that, in this embodiment of the invention, the SerDes interface is aligned with a power of 2 and a single port is formed with the same power of 2, so as to dynamically adjust the number of SerDes interfaces required to form the backplane port, thereby facilitating the dynamic formation of matching backplane ports when the board is connected.

[0100] In this embodiment, a first value corresponding to the local board can be preset according to the capabilities of the SerDes interface in the local board. Assuming the above... Figure 1 The board B connected to the middle connector B is the local board. It has 8 SerDes interfaces that can be combined to form a 100G-R4 interface. The corresponding first value includes 1, 2 and 4.

[0101] It should be understood that the method of obtaining the corresponding first port mode based on each first value is similar, so the embodiments of the present invention use any first value as the first target value for illustrative purposes.

[0102] For example, according to the first target value such as 4, all first target SerDes interfaces are divided into multiple groups, that is, each group has 4 first target SerDes interfaces. Based on the first capability parameter, that is, the rate supported by each first target SerDes interface is 25, the total rate supported by the first target SerDes interfaces in each group is calculated to be 100, and the first port mode corresponding to the first target value 4 is 100G-R4.

[0103] In a similar manner, the first port modes corresponding to the first values ​​1 and 2, namely 25G-R1 and 50G-R2, can be obtained respectively, thus obtaining all the first port modes supported by this board, namely 25G-R1, 50G-R2 and 100G-R4.

[0104] Optionally, for the above steps S204-3, the present invention provides a possible implementation method.

[0105] Step S204-3-1: Obtain each second value corresponding to the peer board, where the second value is a power of 2;

[0106] Step S204-3-3: Take any second value as the second target value;

[0107] Step S204-3-5: According to the second target value, divide all the second target SerDes interfaces into multiple groups, and calculate the total rate supported by the second target SerDes interfaces in each group according to the second capability parameter to obtain the second port mode corresponding to the second target value.

[0108] In this context, the total number of second target SerDes interfaces in each group is equal to the second target value; the second port mode includes the total number of second target SerDes interfaces in each group and the total supported rate.

[0109] Step S204-3-7: Iterate through each second value to obtain the second port mode corresponding to each second value.

[0110] The second SerDes interface in the peer board is connected to the corresponding channel of the connector in the peer board, and all the second SerDes interfaces are aligned with powers of 2 and form a single port with the same power of 2. The second capability parameter includes the rate supported by each second target SerDes interface.

[0111] In this embodiment, a second value corresponding to the peer board can be pre-set based on the capabilities of the SerDes interface in the peer board. Assuming the above... Figure 1 Connector A connects to board A, which is the peer board. It has 4 SerDes interfaces that can be combined to form a 50G-R2 interface. Therefore, its corresponding second value is 1 and 2.

[0112] It should be understood that the method of obtaining the corresponding second port mode based on each second value is similar, so the embodiments of the present invention use any second value as the second target value for illustrative purposes.

[0113] For example, according to the second target value of 2, all second target SerDes interfaces are divided into multiple groups, that is, each group has 2 second target SerDes interfaces. Based on the second capability parameter, that is, the rate supported by each second target SerDes interface is 25, the total rate supported by the second target SerDes interfaces in each group is calculated to be 50, and the second port mode corresponding to the first target value of 2 is 50G-R2.

[0114] In a similar manner, the second port mode corresponding to the second value 1, namely 25G-R1, can be obtained, which means that all the second port modes supported by the peer board, namely 25G-R1 and 50G-R2, can be obtained.

[0115] Optionally, for the above steps S204-5, this embodiment of the invention provides a possible implementation method.

[0116] Step S204-5-1: From all first port modes and all second port modes, select each candidate port mode that is supported by both the local board and the peer board to obtain the intersection;

[0117] Step S204-5-3A: If there is only one candidate port pattern in the intersection, then the candidate port pattern is taken as the common port pattern.

[0118] In step S204-5-3B, if there are multiple candidate port modes in the intersection, the rate of each candidate port mode is obtained, and the candidate port mode corresponding to the maximum rate is taken as the common port mode.

[0119] In this embodiment, based on all first port modes and all second port modes, each candidate port mode commonly supported by both the local and remote boards is selected, thus obtaining their intersection. If there is only one candidate port mode in the intersection, this candidate port mode is used as the common port mode. If there are multiple candidate port modes in the intersection, the rate of each candidate port mode is obtained and compared, and the candidate port mode corresponding to the highest rate is used as the common port mode to maximize bandwidth.

[0120] For example, the first port modes supported by the aforementioned local board include 25G-R1, 50G-R2, and 100G-R4, while the second port modes supported by the remote board include 25G-R1 and 50G-R2. The intersection of the two includes two candidate port modes, namely 25G-R1 and 50G-R2. Then, the rates of these two candidate port modes are obtained, namely 25 and 50 respectively. The candidate port mode corresponding to the maximum rate of 50, namely 50G-R2, is then used as the common port mode.

[0121] Optionally, for step S206 above, the present invention provides a possible implementation method.

[0122] Step S206-1: Determine the first backplane port of the local board based on the common port mode and all first target SerDes interfaces;

[0123] Step S206-3: Determine the second backplane port of the peer board based on the common port mode and all second target SerDes interfaces;

[0124] Step S206-5: Based on the connection relationship between the first target SerDes interface and the second target SerDes interface, obtain the backplane port connection relationship between the first backplane port and the second backplane port.

[0125] In this embodiment, based on the common port mode such as 50G-R2 and all the first target SerDes interfaces in the local board, the first backplane ports of the local board are determined, namely, backplane ports B1 and B2 from left to right; then, based on the common port mode such as 50G-R2 and all the second target SerDes interfaces in the peer board, the second backplane ports of the peer board are determined, namely, backplane ports A1 and A2 from left to right; and then, based on the connection relationship between the first target SerDes interfaces and the second target SerDes interfaces, it is determined that backplane port A1 is connected to backplane port B1, and backplane port A2 is connected to backplane port B2, thus obtaining the backplane port connection relationship.

[0126] Based on the backplane port connection relationship, the backplane interconnection between the local and remote boards is achieved, i.e., the connection method of the two boards is shown in Figure 5. Figure 1 and Figure 5 As can be seen, using the method provided in this embodiment of the invention, even if board B only provides 4 SerDes interfaces, it can still interface with the two 50G-R2 ports of board A, with no wasted SerDes interfaces. Similarly, if board B interfaces with board C, which has 8 SerDes interfaces that can be configured to form a maximum of 100G-R4, the common port mode is 100G-R4, meaning that both boards will form two backplane ports and the connection method is as follows. Figure 6 As shown.

[0127] In other words, the backplane interconnection method provided by the embodiments of the present invention can maximize the use of the SerDes interface while not limiting the port scalability at all. As long as the chip supports it, it can be expanded to high-speed ports of any number of SerDes interfaces, which can avoid the waste of SerDes interfaces and is also compatible with various high-end and low-end network chips.

[0128] To perform the corresponding steps in the above embodiments and various possible methods, an implementation of a backplane interconnect device is given below. Please refer to... Figure 7 , Figure 7 This is a functional block diagram of a backplane interconnect device 300 provided in an embodiment of the present invention. It should be noted that the backplane interconnect device 300 provided in this embodiment has the same basic principle and technical effects as those in the above embodiments. For the sake of brevity, any parts not mentioned in this embodiment can be referred to the corresponding content in the above embodiments. The backplane interconnect device 300 includes:

[0129] The acquisition module 310 is used to acquire, when the local board and the remote board are connected, the first capability parameters of each first target SerDes interface in the local board that has a connection relationship with the remote board and the second capability parameters of each second target SerDes interface in the remote board that has a connection relationship with the local board.

[0130] The determination module 330 is used to determine the common port mode of the local board and the remote board based on the first capability parameter and the second capability parameter;

[0131] Determine the backplane port connection relationship between the local board and the remote board based on the common port mode;

[0132] The connection module 350 is used to realize backplane interconnection between the local board and the remote board according to the backplane port connection relationship.

[0133] Optionally, the determining module 330 is further configured to determine, based on a capability parameter, multiple first port modes supported by the local board; determine, based on a second capability parameter, multiple second port modes supported by the peer board; and obtain the common port mode of the local board and the peer board based on the intersection of all first port modes and all second port modes.

[0134] Optionally, the determining module 330 is further configured to obtain each first value corresponding to the local board, wherein the first value is a power of 2; take any first value as the first target value; divide all first target SerDes interfaces into multiple groups according to the first target value, and calculate the total rate supported by the first target SerDes interfaces in each group according to the first capability parameter to obtain the first port mode corresponding to the first target value; wherein the total number of first target SerDes interfaces in each group is equal to the first target value; the first port mode includes the total number of first target SerDes interfaces in each group and the total rate supported; traverse each first value to obtain the first port mode corresponding to each first value.

[0135] Optionally, the determining module 330 is further configured to obtain each second value corresponding to the peer board, wherein the second value is a power of 2; take any second value as the second target value; divide all second target SerDes interfaces into multiple groups according to the second target value, and calculate the total rate supported by the second target SerDes interfaces in each group according to the second capability parameter to obtain the second port mode corresponding to the second target value; wherein the total number of second target SerDes interfaces in each group is equal to the second target value; the second port mode includes the total number of second target SerDes interfaces in each group and the total rate supported; traverse each second value to obtain the second port mode corresponding to each second value.

[0136] Optionally, the determining module 330 is further configured to select each candidate port mode commonly supported by the local board and the remote board from all first port modes and all second port modes, and obtain the intersection; if there is only one candidate port mode in the intersection, then the candidate port mode is taken as the common port mode; if there are multiple candidate port modes in the intersection, then the rate of each candidate port mode is obtained, and the candidate port mode corresponding to the maximum rate is taken as the common port mode.

[0137] Optionally, the connection module 350 is further configured to determine the first backplane port of the local board based on the common port mode and all first target SerDes interfaces; determine the second backplane port of the peer board based on the common port mode and all second target SerDes interfaces; and obtain the backplane port connection relationship between the first backplane port and the second backplane port based on the connection relationship between the first target SerDes interface and the second target SerDes interface.

[0138] This invention also provides a board that includes a processor and a memory. The memory stores a computer program, and when the processor executes the computer program, it implements the backplane interconnection method disclosed in this invention.

[0139] This invention also provides a distributed rack device, which includes the board provided in this invention.

[0140] This invention also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the backplane interconnect method disclosed in this invention.

[0141] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0142] In addition, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0143] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0144] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A backplane interconnection method, characterized in that, The method includes: When the local board and the peer board are connected, the first capability parameters of each first target SerDes interface in the local board that has a connection relationship with the peer board and the second capability parameters of each second target SerDes interface in the peer board that has a connection relationship with the local board are obtained. Based on the first capability parameter and the second capability parameter, determine the common port mode of the local board and the remote board; Based on the common port mode and all first target SerDes interfaces, determine the first backplane port of the local board; Based on the common port mode and all second target SerDes interfaces, determine the second backplane port of the peer board; Based on the connection relationship between the first target SerDes interface and the second target SerDes interface, the backplane port connection relationship between the first backplane port and the second backplane port is obtained. According to the backplane port connection relationship, the backplane interconnection between the local board and the remote board is realized.

2. The method according to claim 1, characterized in that, The step of determining the common port mode of the local board and the remote board based on the first capability parameter and the second capability parameter includes: Based on the first capability parameter, determine the multiple first port modes supported by the local board; Based on the second capability parameter, determine the multiple second port modes supported by the peer board; The common port mode of the local board and the remote board is obtained by the intersection of all first port modes and all second port modes.

3. The method according to claim 2, characterized in that, The first SerDes interface in the local board is connected to the corresponding channel of the connector in the local board, and all the first SerDes interfaces are aligned with powers of 2 and form a single port with the same power of 2. The first capability parameter includes the rate supported by each first target SerDes interface. The step of determining the multiple first port modes supported by the local board based on the first capability parameter includes: Obtain each first value corresponding to the local board, where the first value is a power of 2; Take any one of the first values ​​as the first target value; According to the first target value, all first target SerDes interfaces are divided into multiple groups, and the total rate supported by the first target SerDes interface in each group is calculated according to the first capability parameter to obtain the first port mode corresponding to the first target value. Wherein, the total number of first target SerDes interfaces in each group is equal to the first target value; the first port mode includes the total number of first target SerDes interfaces in each group and the total supported rate; Iterate through each of the first values ​​to obtain the first port mode corresponding to each first value.

4. The method according to claim 2, characterized in that, The second SerDes interface in the peer board is connected to the corresponding channel of the connector in the peer board, and all the second SerDes interfaces are aligned with powers of 2 and form a single port with the same power of 2. The second capability parameter includes the rate supported by each second target SerDes interface. The step of determining the multiple second port modes supported by the peer board based on the second capability parameter includes: Obtain each second value corresponding to the peer board, wherein the second value is a power of 2; Take any one of the second values ​​as the second target value; According to the second target value, all second target SerDes interfaces are divided into multiple groups, and the total rate supported by the second target SerDes interface in each group is calculated according to the second capability parameter to obtain the second port mode corresponding to the second target value. Wherein, the total number of second target SerDes interfaces in each group is equal to the second target value; the second port mode includes the total number of second target SerDes interfaces in each group and the total supported rate; Iterate through each of the second values ​​to obtain the second port mode corresponding to each second value.

5. The method according to claim 2, characterized in that, The step of obtaining the common port mode of the local board and the remote board based on the intersection of all first port modes and all second port modes includes: From all first port modes and all second port modes, select each candidate port mode that is supported by both the local board and the peer board to obtain the intersection; If there is only one candidate port pattern in the intersection, then the candidate port pattern is taken as the common port pattern. If there are multiple candidate port modes in the intersection, then the rate of each candidate port mode is obtained, and the candidate port mode corresponding to the highest rate is taken as the common port mode.

6. A backplane interconnect device, characterized in that, The device includes: The acquisition module is used to acquire, when the local board and the peer board are connected, the first capability parameters of each first target SerDes interface in the local board that has a connection relationship with the peer board and the second capability parameters of each second target SerDes interface in the peer board that has a connection relationship with the local board. The determining module is configured to: determine the common port mode of the local board and the peer board based on the first capability parameter and the second capability parameter; determine the first backplane port of the local board based on the common port mode and all first target SerDes interfaces; determine the second backplane port of the peer board based on the common port mode and all second target SerDes interfaces; and obtain the backplane port connection relationship between the first backplane port and the second backplane port based on the connection relationship between the first target SerDes interface and the second target SerDes interface. The connection module is used to realize backplane interconnection between the local board and the remote board according to the backplane port connection relationship.

7. A circuit board, characterized in that, The board includes a processor and a memory, the memory storing a computer program, and when the processor executes the computer program, it implements the method of any one of claims 1 to 5.

8. A distributed rack equipment, characterized in that, The distributed rack equipment includes the board as described in claim 7.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method of any one of claims 1 to 5.

Citation Information

Patent Citations

  • High speed interconnection method among multi-controllers

    CN103136141A

  • Port interconnection adaptation method, board cards, and system

    CN108023777A