A simulation method for total dose and single event gate breakdown synergy effect of power vdmos device

By establishing electrical and radiation models of power VDMOS devices, and using the TCAD simulation platform to simulate the combined effects of total dose and single-event gate breakdown, the problem of difficulty in simulating the combined effects of single-event gate breakdown and total dose in space radiation environments in existing technologies is solved, achieving efficient and economical simulation analysis.

CN115935766BActive Publication Date: 2026-03-24CHINA ACADEMY OF SPACE TECHNOLOGY
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-04
Publication Date
2026-03-24

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Abstract

The application discloses a kind of power VDMOS device total dose and single particle grid breakdown harmony effect simulation method, based on TCAD simulation platform establishes power VDMOS device total dose effect and single particle grid breakdown harmony effect simulation model, the simulation model of total dose effect and single particle effect is simulated on the same power device, the influence of multiple radiation effects on device in space application is analyzed using simulation model;The application establishes electrical model, radiation total dose model, single particle model by power VDMOS device, simulates the total dose effect of different irradiation dose on device, and in the transient process of power VDMOS device occurs harmony, the evolution process of important electrical physical parameter is tracked, comparative analysis is made, effectively sensitivity evaluation and protection design of power device under integrated radiation field provide theoretical support.The method has the characteristics of convenient, economic, efficient, provides technical support for protection design of power VDMOS device in space application.
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Description

TECHNICAL FIELD

[0001] The present application relates to the radiation protection technology of power device space application, and belongs to the satellite anti-radiation reinforcement technical field. BACKGROUND

[0002] The power VDMOS device is often used in the DC / DC converter in the power supply system, as the core component of the power supply system, various high-energy particles and cosmic rays in the space radiation environment have great influence on the normal work of the power device, such as: in space application, this kind of device is easily affected by heavy ion irradiation, so that the electric field of the insulating gate oxide layer of the device increases instantaneously and exceeds the critical breakdown electric field of itself, single event gate breakdown occurs, and permanent damage to the equipment is caused; at the same time, the space radiation environment also causes the total dose effect of the device, causing threshold voltage drift, leakage current increase and other performance degradation. Although a large number of researches have been carried out on single event gate breakdown and total dose effect respectively, the research on the coordination of single event gate breakdown and total dose effect is relatively less, such as in 2007, Scheick L Z et al. reported that proton radiation damage would affect the single event gate breakdown of power SiVDMOS; in 2013, G.Busatto et al. found that the power Si VDMOS device would also cause the threshold voltage to decrease after being irradiated by 155MeV Br after being irradiated by γ. But there are few reports on the third generation of semiconductor power devices, and the influence law and mechanism of the coordination of single event gate breakdown and total dose effect are not clear, therefore, it is particularly important to study the radiation law and protection of the coordination of the device. But at present, although the ground irradiation test can accurately evaluate the anti-radiation ability of the device, it is difficult to carry out heavy ion irradiation after the total dose test, there is a long time interval between the two kinds of irradiation tests, which causes annealing effect of the device, affects the research on the coordination of total dose and single particle, and it is difficult to master the change of the micro parameters in the device, which is not conducive to reveal the damage mechanism, and the irradiation conditions, time cost, economic cost and other factors of the instrument used restrict the related research. SUMMARY

[0003] The technical problem solved by the present application is to overcome the shortcomings of the prior art and provide a total dose effect and single event gate breakdown coordination simulation method based on power VDMOS device, which simulates the total dose effect of the device under different irradiation doses by establishing an electrical model, a radiation total dose model and a single particle model of the power VDMOS device.

[0004] The technical scheme of the present application is: a total dose and single event gate breakdown coordination effect simulation method of power VDMOS device, comprising:

[0005] According to the design and process parameters of the power device to be simulated, a two-dimensional model of the power device to be simulated is established by using a two-dimensional modeling tool for semiconductor devices, and a two-dimensional model of the power device to be simulated is obtained, and then the established two-dimensional model is meshed to generate a meshed device structure, and the mesh structure matches the structure of the device;

[0006] The obtained device structure model is simulated by TCAD device simulation to obtain the electrical simulation results of the power device to be simulated; the electrical simulation results of the power device to be simulated are compared with the corresponding electrical parameters or curves in the device product manual, and the process parameters of the device are optimized and calibrated, so that the electrical simulation results of the power device to be simulated are consistent with the device product manual, thereby obtaining the electrical simulation model of the power device to be simulated;

[0007] According to the obtained electrical simulation model of the power device to be simulated, oxide trap charge and interface state trap charge are applied in TCAD to replace total dose effect;

[0008] Different irradiation doses are set, and the device characteristic curves under different irradiation doses are simulated respectively to obtain the total dose simulation model of the power device to be simulated;

[0009] According to the obtained total dose model of the power device, the heavy ion irradiation conditions, incident positions and bias conditions are fixed and unchanged, and the single event effect simulation of the power device to be simulated under different total doses is performed respectively to obtain the total dose and single event gate breakdown synergy effect simulation model of the device;

[0010] Based on the total dose and single event gate breakdown synergy effect simulation model of the device, the maximum electric field in the gate oxide layer when the synergy effect occurs is obtained, and the threshold voltage of the device when the single event gate breakdown occurs under different doses is obtained, thereby forming the threshold voltage curve of the device when the single event gate breakdown occurs with the dose change, and realizing the simulation of the total dose effect and single event effect synergy radiation sensitivity of the power device.

[0011] The specific process of the meshing is that the device gate oxide layer structure region near which is greatly affected by electrical parameters and radiation effects is finely meshed with a step of 0.02 nm or even a lower step, and the remaining regions are meshed with a step of 0.1-0.5 nm.

[0012] The electrical simulation results of the power device to be simulated include transfer characteristic curves, output characteristic curves and breakdown voltage.

[0013] The process parameters include substrate, drift region, body region and source region size, concentration.

[0014] In order to simulate the influence of radiation-induced charges in insulating materials on device performance, the insulating layer material is specified as a wide-bandgap semiconductor to directly reproduce the state of the device after irradiation.

[0015] The single particle gate breakdown threshold voltage of the device under different doses is obtained, comprising: firstly obtaining the maximum electric field E in the gate oxide layer of the simulated VDMOS device ox , by comparing whether E ox is greater than the critical breakdown electric field 10 MV / cm of the gate oxide layer material SiO2, judging whether single particle gate breakdown occurs; if greater, reducing the device voltage by a step of 1-5 V until the maximum electric field E ox in the gate oxide layer of the device is less than the critical breakdown electric field of SiO2, at which time the device voltage is the single particle gate breakdown threshold voltage.

[0016] Compared with the prior art, the application has the advantages that: the application innovatively proposes a total dose and single particle gate breakdown synergy effect simulation method of a power VDMOS device, a total dose effect and single particle gate breakdown synergy effect simulation model of the power VDMOS device is established based on a TCAD simulation platform, simulation of the total dose effect and the single particle gate breakdown effect is comprehensively carried out on the basis of the end of optimization of the same power device electrical model, and the influence of various radiation effects on the device in space application is analyzed by using the simulation model; the method has the characteristics of convenience, economy and high efficiency, and provides technical support for protection design of the power VDMOS device in aerospace type engineering. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 is the implementation flowchart of the application;

[0018] Figure 2 is a SiC MOSFET device structure schematic diagram of the application;

[0019] Figure 3 is an electrical characteristic curve diagram obtained after electrical optimization of the application; wherein 3(a) is a device transfer characteristic curve diagram, and 3(b) is a device output characteristic curve diagram;

[0020] Figure 4 is a device transfer characteristic curve diagram of the SiC MOSFET device of the application under the bias condition of V GS = 10 V, V DS = 0.05 V, the dose rate is 50 rad (Si) / s, and the irradiation dose is 0 krad (Si), 200 krad (Si), 500 krad (Si) and 800 krad (Si);

[0021] Figure 5 is a device transfer characteristic curve diagram of the SiC MOSFET device of the application under the bias condition of V GS = -5 V, V DS = 55 V, and LET = 75 MeV.cm2 / mg, sensitive incident position X = 7.5 μm, the device occurs single event gate breakdown, along the incident track to produce electron-hole pair schematic diagram;

[0022] Figure 6 is the SiC MOSFET device of the present application under the bias condition of V GS = -5 V, V DS = 55 V, LET = 75 MeV.cm 2 / mg, sensitive incident position X = 7.5 μm, t ≈ 10 ps, under the joint action of total dose effect and single event effect, the maximum electric field in the gate oxide layer of the device changes with time curve diagram;

[0023] Figure 7 is the SiC MOSFET device of the present application under the bias condition of V GS = -5 V, V DS = 55 V, LET = 75 MeV.cm 2 / mg, sensitive incident position X = 7.5 μm, t ≈ 10 ps, under the joint action of total dose effect and single event effect, the device occurs single event gate breakdown threshold voltage changes with irradiation dose curve. DETAILED DESCRIPTION

[0024] As shown in Figure 1 , the present application proposes a simulation method based on the total dose and single event gate breakdown of SiC MOSFET device, which comprises the following steps:

[0025] (1) As shown in Figure 2 , it is a structure diagram of SiC MOSFET device, the process structure of SiC MOSFET device is vertical structure, its gate and source electrode are located at the top of the device, and its drain electrode is located at the bottom of the device. According to the design and process parameters of SiC MOSFET device, the two-dimensional modeling tool of semiconductor device is used to carry out two-dimensional modeling of the SiC MOSFET device, and the two-dimensional model of SiC MOSFET device is obtained, and then the grid division is carried out, and the device gate oxide layer structure area near the device gate oxide layer structure area which is greatly affected by the change of electrical parameters and radiation effect is finely divided with a step of 0.02 nm. The grid device structure is generated, and the grid structure is matched with the structure of the device.

[0026] (2) TCAD device simulation is carried out on step (1), and the transfer characteristic curve and output characteristic curve of SiC MOSFET device are obtained, and then the corresponding electrical parameters or curves in the device product manual are compared, and the process parameters such as the size, concentration and the like of the substrate, drift region, body region and source region of the device are optimized and calibrated, so that the electrical simulation results are consistent with the device product manual; as shown in Figure 3The electrical characteristic curve diagram obtained after electrical optimization is shown, Figure 3 (a) is a transfer characteristic curve diagram obtained after optimization of the electrical characteristics of a SiC MOSFET device, and the threshold voltage V TH is about 6V; as Figure 3 (b) is an output characteristic curve obtained after optimization of a SiC MOSFET device, and the gate bias V GS is 8V, 10V, and 12V, respectively. The specific optimization method steps are as follows: the size and doping concentration of each region of the device are changed in a variable manner, the influence of the parameters on the characteristics of the device is judged by the amplitude of the simulation curve, and the parameters that have a significant influence are selected as the preferred variables for optimization, and then the simulation results are conveniently and efficiently optimized and calibrated by adjusting these variables.

[0027] (3) According to the device electrical simulation model obtained after optimization in step (2), a radiation total dose model is established for the SiC MOSFET device, and a radiation total dose simulation is performed on the device;

[0028] (3.1) In TCAD, oxide trap charge and interface state trap charge are applied to replace the total dose effect, and the insulating layer material is specified as a wide bandgap semiconductor, to simulate the influence of radiation-induced charges in the insulating material on the performance of the device;

[0029] (3.2) The most severe irradiation bias is considered, i.e. a positive bias is applied between the gate and the source to make the device in an open state, and the specific bias conditions are V GS = 10V, V DS = 0.05V;

[0030] (3.3) As shown in Figure 4 , the irradiation dose rate is 50 rad(Si) / s, and the device transfer characteristic curves under four different irradiation doses of 0krad(Si), 200krad(Si), 500krad(Si), and 800krad(Si) are simulated.

[0031] (4) According to the device under different irradiation doses obtained in step (3), a single particle effect model is established for the device under different total doses, and a single particle gate breakdown simulation is performed on the device;

[0032] (4.1) As shown in Figure 5 , the device bias is V GS = -5V, V DS = 55V, and the heavy ion irradiation condition is LET = 75 MeV·cm 2 / mg, and in the simulation, the heavy ion is selected to impact the sensitive region JEFT (X = 7.5μm) from the top surface of the device in the arrow direction, and penetrates through the entire device.

[0033] (5) Figure 6 As shown, the maximum electric field E in the gate oxide layer of the SiC MOSFET device after concordance simulation in step (4) is obtained. ox E ox Whether a single-particle gate breakdown occurs is determined by whether the electric field exceeds the critical breakdown electric field of the gate oxide material SiO2, which is 10 MV / cm.

[0034] (6) Based on the simulation model of total device dose and single-event gate breakdown co-effect, determine the following after the co-effect occurs: Figure 7 As shown, the threshold voltage of the SiC MOSFET device is the single-event gate breakdown after the co-occurrence effect. The sensitivity analysis of the total dose effect and single-event effect co-simulation of the SiC MOSFET device is summarized.

[0035] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention based on the above-disclosed technical content without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.

Claims

1. A simulation method for total dose and single-event gate breakdown concordance effect in power VDMOS devices, characterized in that, include: Based on the design and process parameters of the power device to be simulated, a two-dimensional model of the device is created using a semiconductor device two-dimensional modeling tool. Then, the established two-dimensional model is meshed to generate a meshed device structure, and the mesh structure matches the device structure. The obtained device structure model is used for TCAD device simulation to obtain the electrical simulation results of the power device to be simulated; The electrical simulation results of the power device to be simulated are then compared with the corresponding electrical parameters or curves in the device's product manual. The process parameters of the device are then optimized and calibrated to ensure that the electrical simulation results of the power device to be simulated are consistent with the device's product manual, thereby obtaining the electrical simulation model of the power device to be simulated. Based on the obtained electrical simulation model of the power device to be simulated, oxide trap charge and interface state trap charge are applied in TCAD to replace the total dose effect; By setting different irradiation doses, the device characteristic curves under different irradiation doses are simulated to obtain the total dose simulation model of the power device to be simulated. Based on the obtained total dose model of the power device, with the heavy ion irradiation conditions, incident position and bias conditions fixed, single-event effect simulations were performed on the power device to be simulated under different total dose conditions to obtain the simulation models of the total dose of the device and the single-event gate breakdown concordant effect. Based on the simulation model of the total dose and single-event gate breakdown concordance effect of the device, the curve of the maximum electric field in the gate oxide layer changing with time when the concordance effect occurs is obtained, as well as the threshold voltage of single-event gate breakdown of the device under different doses. Thus, the curve of the threshold voltage of single-event gate breakdown of the device changing with dose is formed, realizing the simulation of the radiation sensitivity of the total dose effect and single-event effect concordance effect of power devices.

2. The simulation method for total dose and single-event gate breakdown concordance effect of a power VDMOS device according to claim 1, characterized in that, The specific process of mesh division is as follows: fine mesh division is performed near the gate oxide structure region of the device that has a significant impact on electrical parameters and radiation effects with a step size of 0.02 nm, and mesh division is performed in the remaining regions with a step size of 0.1-0.5 nm.

3. The simulation method for total dose and single-event gate breakdown concordance effect of a power VDMOS device according to claim 1, characterized in that, The electrical simulation results of the power device to be simulated include the transfer characteristic curve, output characteristic curve, and breakdown voltage.

4. The simulation method for total dose and single-event gate breakdown concordance effect of a power VDMOS device according to claim 1, characterized in that, The process parameters include the size and concentration of the substrate, drift region, bulk region, and source region.

5. The simulation method for total dose and single-event gate breakdown concordance effect of a power VDMOS device according to claim 1, characterized in that, To simulate the effect of radiation-induced charges in insulating materials on device performance, the insulating layer material is specified as a wide bandgap semiconductor to directly reproduce the state of the device after irradiation.

6. The simulation method for total dose and single-event gate breakdown concordance effect of a power VDMOS device according to claim 1, characterized in that, The process of obtaining the single-event gate breakdown threshold voltage of the device under different doses includes: firstly, obtaining the maximum electric field E in the gate oxide layer of the VDMOS device after concordance simulation. ox By comparing E ox To determine if single-particle gate breakdown has occurred, check if the electric field exceeds the critical breakdown electric field of the gate oxide material SiO2, which is 10 MV / cm. If it does, reduce the device voltage in steps of 1-5 V until the maximum electric field E in the gate oxide layer is reached. ox The voltage is less than the critical breakdown electric field of SiO2, and the device voltage at this point is the single-particle gate breakdown threshold voltage.

Citation Information

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