A Deep Learning-Based Method for Predicting PIN Limiter Performance and HPM Effect

By using a deep learning-based approach, a sample set was established and a prediction model was constructed using TCAD simulation. This solved the problems of inefficiency and time consumption in simulating the limiting performance of PIN limiters and the HPM effect, achieving fast and accurate prediction results.

CN115935806BActive Publication Date: 2026-03-06XIDIAN UNIV
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Patent Information

Application Number
CN202211482474.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-24
Publication Date
2026-03-06
Estimated Expiration
2042-11-24

AI Technical Summary

Technical Problem

Existing simulation methods for the limiting performance and HPM effect of PIN limiters are inefficient, time-consuming, and non-convergent, making it difficult to meet computational requirements.

Method used

A deep learning-based approach was adopted, a sample set was established through TCAD simulation, a deep learning network prediction model was constructed, and the network was trained using the features and labels of the sample set to predict the limiting performance and HPM effect of the PIN limiter.

Benefits of technology

It enables rapid and accurate prediction of the limiting performance and HPM effect of PIN limiters, reducing labor and time costs and improving prediction efficiency and accuracy.

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Abstract

This invention presents a deep learning-based method for predicting the performance and HPM effect of a PIN limiter. Using TCAD simulation software, a numerical physical model of the PIN limiter is first established. Then, based on the numerical physical model of the PIN diode, a simulation circuit for the HPM effect of the PIN limiter is built. Device parameters and HPM parameters are set according to the required features of the sample set, and transient response simulation is performed to obtain the labels corresponding to the features of the sample set. A deep learning network prediction model is constructed and trained and validated to obtain a model that meets the requirements. This model is then used to predict the performance and HPM effect of the PIN limiter under different parameters and operating conditions. This invention solves the problems of large computational load, long time consumption, and non-convergence in existing traditional methods for obtaining the limiting performance and HPM effect of PIN limiters, reducing the human and time costs of obtaining limiter performance and improving prediction efficiency and accuracy.
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Description

Technical Field

[0001] This invention belongs to the field of PIN limiter technology, and specifically relates to a deep learning-based method for predicting the performance and HPM effect of PIN limiters. Background Technology

[0002] High-power microwaves (HPMs) can reach peak powers of 100MW, with frequencies ranging from 300MHz to 30GHz. They are characterized by high power, high frequency, concentrated bandwidth, and short pulses, and can couple into the RF receiver through various pathways, causing damage to the electronic system. Currently, PIN limiters are the mainstream protective components for RF front-ends, and research on the limiting performance of PIN limiters and the HPM effect has attracted considerable attention.

[0003] Traditional simulation methods for obtaining the clipping performance and HPM effect of PIN diodes mainly rely on circuit simulation based on circuit-level models and hybrid simulation based on device numerical simulation tools like TCAD. Existing PIN diode circuit models are based on experimental data and are almost unusable for large-signal simulations. Circuit-level simulation methods struggle to determine the relationship between PIN diode parameters and the clipping performance and HPM effect of PIN diodes. Conversely, building a device model using TCAD requires software to create a structural model, set doping parameters, and mesh the device. A physical model is then configured according to the simulation requirements, creating a hybrid simulation circuit combining the device and circuit models. Finally, a solver is used to solve the differential equations corresponding to the physical model, such as the carrier continuity equation, Poisson equation, and lattice temperature equation.

[0004] Circuit-level simulation methods struggle to determine the relationship between PIN diode parameters and the limiting performance and HPM effect of PIN limiters. Hybrid simulation based on TCAD is time-consuming, involves massive amounts of data, and requires a physical model that accurately reflects the actual device parameters and operating environment for the simulation results to be meaningful. In conclusion, existing simulation methods for PIN limiter limiting performance and HPM effect fall short of requirements in terms of efficiency and accuracy. Summary of the Invention

[0005] In order to overcome the shortcomings of the prior art, the present invention aims to provide a deep learning-based method for predicting the performance and HPM effect of a PIN limiter, so as to solve at least one or all of the problems of large computational load, long time consumption and non-convergence in the traditional methods for obtaining the limiting performance and HPM effect of a PIN limiter, thereby reducing the human and time costs of obtaining the limiter performance and improving the prediction efficiency and accuracy.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] A deep learning-based method for predicting the performance and HPM effect of a PIN limiter includes:

[0008] Step 1: Establish a sample set based on TCAD simulation

[0009] Using TCAD simulation software, a numerical physical model of the PIN limiter is first established. Then, a simulation circuit of the HPM effect of the PIN limiter is built based on the numerical physical model of the PIN diode. The device parameters and HPM parameters are set according to the characteristics required by the sample set, and transient response simulation is performed to obtain the labels corresponding to the characteristics of the sample set.

[0010] The required features for the sample set are:

[0011] PIN diode I layer thickness W I PIN diode I layer doped with N I HPM frequency f, HPM rise time t r and HPM input power P in Each set of features requires a corresponding set of labels to be obtained from the simulation experiment;

[0012] The labels corresponding to the features of the sample set are:

[0013] The simulation yielded limiting power threshold, insertion loss, maximum isolation, and PIN diode junction temperature curves. The limiting power threshold, insertion loss, and maximum isolation are used to characterize the limiting performance of the limiter; the PIN diode junction temperature curves are used to characterize the HPM effect.

[0014] Step 2: Divide the sample set into a training set, a cross-validation set, and a test set;

[0015] Step 3: Construct a deep learning network prediction model and train and validate it to obtain a model that meets the requirements. Use this model to predict the performance of the PIN limiter and the HPM effect under different parameters and operating conditions. The deep learning network prediction model includes Network 1 and Network 2. Network 1 is used to predict the limiting performance of the PIN limiter, and Network 2 is used to predict the HPM effect of the PIN limiter.

[0016] In one embodiment, step 1 involves obtaining the electrical and thermal responses of multiple PIN limiters under different HPM injection conditions using TCAD simulation software. Limiting performance characterization parameters, HPM effect characterization parameters, and corresponding device parameters and HPM parameters are extracted as a sample set. The limiting performance characterization parameters are the limiting power threshold, insertion loss, and maximum isolation. The HPM effect characterization parameters are the time and temperature reflected in the PIN diode junction temperature curve. The device parameters are the PIN diode I-layer thickness W. IPIN diode I layer doped with N I The HPM parameters are the HPM frequency f and the HPM rise time t. r and HPM input power P in .

[0017] In one embodiment, in step 1, the numerical physical model of the PIN limiter is a carrier thermodynamic transport model that takes into account the device self-heating and high electric field effect under the action of high-power microwaves.

[0018] Subsequently, a simulation circuit for the HPM effect of the PIN limiter was built based on the numerical physical model of the PIN diode. The device parameters and high-power microwave parameters were set according to the features and labels required by the sample set, and the transient response simulation was performed to obtain the feature parameters corresponding to the sample set labels.

[0019] In one embodiment, considering device self-heating, the electron-hole transport equation of the numerical physical model of the PIN limiter is:

[0020]

[0021] In the formula: and ρ represents the electron current density and hole current density, respectively; n and p represent the electron and hole concentrations, respectively; q represents the electron charge; μ n and μ p φ represents the mobility of electrons and holes, respectively. n and φ p P represents the quasi-electrostatic potential of electrons and holes, respectively; n and P P These represent the absolute thermoelectric power of holes and electrons, respectively.

[0022] Considering the high electric field, a high-field velocity saturation model is introduced, and the carrier mobility formula after model correction is as follows:

[0023]

[0024] Where: μ low v represents the migration rate before correction. sat β represents the saturation drift velocity of charge carriers. β is a constant that is process-dependent and given by the model.

[0025] Meanwhile, avalanche breakdown of PIN diodes under high electric fields is considered, and an avalanche ionization model is introduced, with the avalanche generation model being:

[0026] G = a n nv n +a p pv p (3)

[0027] In the formula: v n and v p Let a be the saturation velocity of electrons and holes, respectively. n With a p These are the collisional ionization coefficients of electrons and holes, respectively.

[0028] In one embodiment, step 1 employs Sentarurs TCAD's hybrid mode to simulate the HPM coupling to the PIN limiter through the front door, performing transient simulation of the PIN limiter HPM effect.

[0029] The simulation circuit includes a sinusoidal pulse voltage source, a PIN, resistor one, resistor two, DC blocking capacitor one, DC blocking capacitor two, and an RF choke inductor. The sinusoidal pulse voltage source, PIN, resistor one, and capacitor one are connected in series. The PIN is connected in parallel with the inductor, and in parallel with capacitor two and resistor two. The sinusoidal pulse voltage source is used to generate front-gate coupled HPM voltages with different frequencies, rise times, and powers.

[0030] In one embodiment, step 1 involves obtaining two sample sets, namely sample set one and sample set two.

[0031] Sample set one is used for network one to train the PIN limiter's limiting performance prediction, and sample set two is used for network two to train the PIN limiter's HPM effect prediction.

[0032] The sample set one uses PIN device parameters and HPM parameters as inputs to network one, including the PIN diode I-layer thickness (W). I ), PIN diode I layer doped (N I HPM frequency (f) and HPM rise time (t) r The limiting performance of the PIN limiter is used as the output of network one, including the limiting power threshold, insertion loss, and maximum isolation.

[0033] The second sample set uses PIN device parameters and HPM parameters as inputs to the second network, including the PIN diode I-layer thickness (W). I ), PIN diode I layer doped (N I HPM frequency (f) and HPM input power (P) in The PIN diode junction temperature change trend curve is used as the output of network two, and the PIN diode junction temperature change trend curve is the curve characterizing the HPM effect.

[0034] In one embodiment, step 1 involves obtaining tag data for sample set one. Simulation parameters are set based on the characteristic data of sample set one, and simulation experiments are conducted. Under each set of parameters, the HPM input power is further set to a value ranging from -10dBm to 80dBm in 10dBm intervals. Simulation experiment parameter conditions are set, and a total of 10800 simulation experiments are performed. Based on the input power-output power correspondence obtained from the simulation under each sample parameter condition, the corresponding limiting start-up threshold, insertion loss, and maximum isolation are obtained, resulting in 1080 sets of data for sample set one's tags. To obtain tag data for sample set two, simulation parameters are set based on the characteristic data of sample set two, and simulation experiments are conducted. A total of 1080 simulation experiments are performed, and the PIN junction temperature curve is obtained. The junction temperature curve data is then fitted to a 5th-order polynomial to obtain a frequency-independent PIN diode junction temperature change trend curve to characterize the HPM effect, resulting in 1080 sets of data for sample set two's tags.

[0035] In one embodiment, the network one includes, in sequence: input layer one, fully connected layer one, convolutional layer one, convolutional layer two, convolutional layer three, fully connected layer two, fully connected layer three, fully connected layer four, and output layer one;

[0036] The second network comprises, in sequence: input layer 2, fully connected layer 5, fully connected layer 6, fully connected layer 7, convolutional layer 4, convolutional layer 5, convolutional layer 6, convolutional layer 7, fully connected layer 8, fully connected layer 9, fully connected layer 10, and output layer 2;

[0037] The fully connected layers 1 to 9 are 1×80, 1×640, 1×256, 1×50, 1×80, 1×160, 1×640, 1×2048, and 1×1024, respectively; the convolutional layers 1 to 7 are 16×40, 32×20, 64×10, 64×80, 128×40, 256×20, and 64×10, respectively.

[0038] In one embodiment, each fully connected layer includes a fully connected (Linear) unit, a batch normalization (BN) unit, and a ReLU activation function unit. Each convolutional layer includes a convolutional (Conv) unit with a kernel of 5 and padding of 2, a batch normalization unit, a ReLU activation function unit, and a pooling unit with a kernel of 2. The pooling unit uses max pooling.

[0039] In one embodiment, the output of the second network is a fitting curve of the maximum junction temperature transient change of the PIN diode, with an average of 20 points taken in the range of 0ns to 50ns.

[0040] Compared with existing technologies, this invention can accurately and quickly predict the limiting performance and HPM effect of PIN limiters, solving the problems of long time consumption and non-convergence in traditional simulation software-based research methods for PIN limiter limiting simulation and HPM effect, and improving the efficiency of PIN limiter HPM effect research. Attached Figure Description

[0041] Figure 1 This is a diagram showing the structure and doping distribution of a PIN diode device.

[0042] Figure 2 It is a PIN limiter HPM coupling simulation circuit.

[0043] Figure 3 It is the fitting curve of the maximum junction temperature transient change.

[0044] Figure 4 It is a network structure diagram.

[0045] Figure 5 It is a network structure diagram.

[0046] Figure 6 These are comparison charts of network prediction and simulation values, where (a) is a comparison chart of the prediction and simulation values ​​of insertion loss; (b) is a comparison chart of the prediction and simulation values ​​of maximum isolation; and (c) is a comparison chart of the prediction and simulation values ​​of the limiting power threshold.

[0047] Figure 7 Let be the mean square error of the network prediction, where (a) is the mean square error between the predicted and simulated values ​​of the insertion loss; (b) is the mean square error between the predicted and simulated values ​​of the maximum isolation; and (c) is the mean square error between the predicted and simulated values ​​of the limiting power threshold.

[0048] Figure 8 A comparison chart of the maximum junction temperature transient curve and the corresponding simulation curve.

[0049] Figure 9 The mean square error is the difference between the predicted maximum junction temperature transient curve of the PIN diode obtained by Network 2 and the simulated maximum junction temperature transient curve of the PIN diode. Detailed Implementation

[0050] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings and examples.

[0051] Simulation of positive intrinsic-negative (PIN) limiters based on circuit models struggles to capture their limiting performance under large-signal conditions, while simulation using TCAD software is often time-consuming and requires engineers to master complex numerical physics modeling tools for semiconductor devices. Therefore, this invention provides a deep learning-based method for predicting the performance and HPM effect of PIN limiters. This method can quickly obtain the limiting performance and HPM characteristics of PIN limiters, and its data-driven nature eliminates the need for engineers to design algorithm rules or complex equations and fitting model parameters, thus reducing the human cost of obtaining limiter performance and HPM effect data.

[0052] In this invention, the limiting performance of the limiter mainly includes the limiting start threshold, maximum isolation, and small signal insertion loss, while the HPM effect of the limiter mainly focuses on the junction temperature change curve of the device under high electric field conditions.

[0053] Step 1: Establish a sample set based on TCAD simulation.

[0054] First, a numerical physical model of the PIN limiter is established. The model takes into account the device's self-heating and high electric field effects under the action of high-power microwaves, and combines the thermodynamic transport model of charge carriers.

[0055] Specifically, considering the electrothermal power caused by lattice thermal accumulation and temperature gradient, a thermodynamic transport model of charge carriers is selected as the basis for the numerical physical model of the PIN limiter. This model couples the solution of the lattice temperature equation and the charge carrier transport equation. The electron-hole transport equation of the model is as follows:

[0056]

[0057] In the formula: and ρ represents the electron current density and hole current density, respectively; n and p represent the electron and hole concentrations, respectively; q represents the electron charge; μ n and μ p φ represents the mobility of electrons and holes, respectively. n and φ p P represents the quasi-electrostatic potential of electrons and holes, respectively; n and P P These represent the absolute thermoelectric power of holes and electrons, respectively.

[0058] Considering the high electric field, a high-field velocity saturation model is introduced, and the carrier mobility formula after model correction is as follows:

[0059]

[0060] Where: μ low v represents the migration rate before correction.sat β represents the saturation drift velocity of charge carriers. β is a constant that is process-dependent and given by the model.

[0061] Meanwhile, avalanche breakdown of PIN diodes under high electric fields is considered, and an avalanche ionization model is introduced, with the avalanche generation model being:

[0062] G = a n nv n +a p pv p (3)

[0063] In the formula: v n and v p Let a be the saturation velocity of electrons and holes, respectively. n With a p These are the collisional ionization coefficients of electrons and holes, respectively.

[0064] Subsequently, a simulation circuit for the HPM effect of the PIN limiter was built based on the numerical physical model of the PIN diode. The device parameters and HPM parameters were set according to the feature data required by the sample set, and the transient response simulation was performed to obtain the feature parameters corresponding to the label data of the sample set.

[0065] This invention utilizes TCAD simulation software to acquire the electrical and thermal responses of multiple limiters under different HPM injection parameters, extracting the limiting performance characterization parameters, HPM effect characterization parameters, device parameters, and HPM parameters of the limiters as a sample set. In other words, this invention obtains the HPM parameters and device parameters of multiple HPM devices coupled to a PIN limiter, along with the corresponding limiting performance and HPM effect characterization parameters.

[0066] Step 2: Divide the sample set into a training set, a cross-validation set, and a test set.

[0067] Step 3: Initially construct a deep learning network prediction model.

[0068] Step 4: Input the training set data into the deep learning network prediction model, use the loss function to measure the degree of matching between the predicted value and the expected result, and update the network weights to obtain the optimized model. Input the cross-validation set data into the optimized model to finally obtain the trained model.

[0069] Step 5: Input the test set data into the trained model and evaluate its prediction accuracy and generalization ability. Models that meet the requirements can be used to predict the limiting performance of PIN limiters and its HPM effect under different parameters and operating conditions, that is, to predict the limiting performance of PIN limiters under different PIN limiter parameters and HPM coupling conditions and the prediction of the maximum junction temperature curve of PIN caused by HPM effect.

[0070] In one embodiment of the present invention, to achieve better prediction results, the deep learning network prediction model includes Network 1 and Network 2. Network 1 is used to predict the limiting performance of the PIN limiter, which in this invention mainly refers to insertion loss, limiting start threshold, and maximum isolation. Network 2 is used to predict the HPM effect of the PIN limiter, which in this invention refers to the trend curve of PIN junction temperature change caused by the HPM effect under different HPM parameter conditions. Accordingly, two sets of sample sets are obtained in step 1 and used for training the two networks respectively. Sample set 1 is used for Network 1 to train the limiting performance prediction of the PIN limiter, and sample set 2 is used for Network 2 to train the HPM effect prediction of the PIN limiter.

[0071] Specifically, sample set one uses PIN device parameters and HPM parameters as inputs to network one, including the PIN diode I-layer thickness (W). I ), PIN diode I layer doped (N I HPM frequency (f) and HPM rise time (t) r The limiting performance, as the output of Network 1, includes the limiting power threshold, insertion loss, and maximum isolation.

[0072] Sample set two uses PIN device parameters and HPM parameters as inputs to network two, including the PIN diode I layer thickness (W). I ), PIN diode I layer doped (N I HPM frequency (f) and HPM input power (P) in The junction temperature curve of the PIN diode is used as the output of network two, and the junction temperature curve of the PIN diode is the curve that characterizes the HPM effect.

[0073] In one embodiment of the present invention, the PIN diode device structure and its doping distribution are as follows: Figure 1 As shown. The P-layer thickness is 2 μm, the I-layer thickness is selected from 1 μm to 3.5 μm based on sample parameters, and the N-layer thickness is 100 μm. The I-layer doping concentration is selected as 1 × 10⁻⁶ based on sample parameters. 15 cm -3 ~5×10 15 cm -3 This embodiment selects a parameter range that is close to that of an actual PIN limiter, which is more in line with reality.

[0074] In one embodiment of the present invention, based on the hybrid mode of Sentarurs TCAD, the present invention simulates the transient simulation of the HPM effect of the PIN limiter by simulating the coupling of HPM to the PIN limiter circuit through the front gate. The PIN limiter HPM coupling simulation circuit is constructed using a PIN diode model and basic circuit units as follows: Figure 2As shown. A sinusoidal pulse voltage source is used to generate front-gate coupled HPM voltages with different frequencies, rise times, and powers, with an internal resistance of 50Ω. The DC blocking capacitor is 100pF. F The RF choke inductance is 100nH. The PIN diode is connected in parallel with a 50Ω load. This embodiment selects an equivalent circuit that reflects the actual operating conditions of the PIN limiter, so that the simulation results can reflect reality.

[0075] In one embodiment of the present invention, the thickness of the PIN diode I layer of the PIN limiter in sample set one is 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, and 3.5 μm, and the doping value of the PIN diode I layer is 1 × 10⁻⁶. 15 cm -3 2×10 15 cm -3 3×10 15 cm -3 4×10 15 cm -3 5×10 15 cm -3 The HPM frequencies are 0.6GHz, 0.8GHz, 1.0GHz, 1.2GHz, 1.4GHz, and 1.6GHz, and the HPM rise times are 0.5ns, 1.0ns, 1.5ns, 2.0ns, 2.5ns, and 3.0ns. In sample set two, the PIN diode I-layer thickness of the PIN limiter is 1μm, 1.5μm, 2μm, 2.5μm, 3μm, and 3.5μm, and the PIN diode I-layer doping value is 1×10⁻⁶. 15 cm -3 2×10 15 cm -3 3×10 15 cm -3 4×10 15 cm -3 5×10 15 cm -3 The HPM frequency values ​​are 0.6GHz, 0.8GHz, 1.0GHz, 1.2GHz, 1.4GHz, and 1.6GHz, and the HPM input power values ​​are 55dBm, 60dBm, 65dBm, 70dBm, 75dBm, and 80dBm.

[0076] The PIN limiter parameters selected in this embodiment are similar to those of the actual device, and the selected HPM parameters reflect the power and frequency range of the actual PIN limiter operating conditions, so that the simulation results can reflect reality.

[0077] Based on the required feature data of the sample set, the PIN device parameters and HPM parameters are set. The feature data and label data of the sample set are the input and output of the training network, respectively. Transient simulation experiments are conducted based on the PIN device model and the HPM coupled simulation circuit to obtain the sample set label data. Simulation experiments are performed with the parameters set for sample set one. Under each set of parameters, the HPM input power is further set to values ​​ranging from -10dBm to 80dBm in 10dBm increments, for a total of 10800 simulation experiments. Based on the input power-output power correspondence obtained from the simulation under each sample parameter condition, the corresponding limiting start-up threshold, insertion loss, and maximum isolation are obtained, resulting in 1080 sets of data for sample set one labels. Simulation experiments are performed with the parameters set for sample set two, for a total of 1080 simulation experiments. The PIN junction temperature curve is obtained, and then the junction temperature curve data is fitted to a 5th-order polynomial, as shown below. Figure 3 A frequency-independent junction temperature trend curve was obtained to characterize the HPM effect, resulting in a two-labeled sample set of 1080 data sets. A PIN limiter performance prediction and a PIN junction temperature curve sample set reflecting the HPM effect were obtained through hybrid simulation using TCAD device models. Furthermore, by fitting the junction temperature curves, a sample set suitable for neural network training could be obtained.

[0078] The sample set input data selected in this invention can reflect the actual working conditions and device parameters of the PIN limiter, and has generalization significance, so that the trained model can be extended to the application requirements of actual prediction.

[0079] In one embodiment of the present invention, step 2 involves randomly dividing the data in the sample set into a training set, a cross-validation set, and a test set in a ratio of 6:2:2.

[0080] In one embodiment of the present invention, the structure of network one is as follows: Figure 4 It consists of, in sequence: input layer 1, fully connected layer 1, convolutional layer 1, convolutional layer 2, convolutional layer 3, fully connected layer 2, fully connected layer 3, fully connected layer 4, and output layer 1.

[0081] In this embodiment, the network structure is based on the LeNet convolutional neural network design, and the specific number of layers is the best network structure obtained through multiple training and testing.

[0082] In one embodiment of the present invention, the structure of network two is as follows: Figure 5 The layers consist of, in order: input layer 2, fully connected layer 5, fully connected layer 6, fully connected layer 7, convolutional layer 4, convolutional layer 5, convolutional layer 6, convolutional layer 7, fully connected layer 8, fully connected layer 9, fully connected layer 10, and output layer 2.

[0083] The network structure in this embodiment is based on the LeNet convolutional neural network design, and the specific number of layers is the best network structure obtained through multiple training and testing.

[0084] In one embodiment, each fully connected layer includes a fully connected (Linear) unit, a batch normalization (BN) unit, and a ReLU activation function unit. Each convolutional layer includes a convolutional (Conv) unit with a kernel of 5 and padding of 2, a batch normalization unit, a ReLU activation function unit, and a pooling unit with a kernel of 2. The pooling unit uses max pooling.

[0085] In this embodiment, the network layer is designed based on the LeNet convolutional neural network, and the Batch Normalization (BN) layer can effectively prevent overfitting.

[0086] In one embodiment, the fully connected layers one through nine are 1×80, 1×640, 1×256, 1×50, 1×80, 1×160, 1×640, 1×2048, and 1×1024 fully connected layers, respectively; and the convolutional layers one through seven are 16×40, 32×20, 64×10, 64×80, 128×40, 256×20, and 64×10 convolutional layers, respectively.

[0087] In this embodiment, the network parameters are optimized to achieve a sufficiently low MSE and a sufficiently good curve prediction effect.

[0088] In one embodiment, the output of the second network is a fitting curve of the maximum junction temperature transient change of the PIN diode, with an average of 20 points taken in the range of 0ns to 50ns.

[0089] In this embodiment, since the prediction of HPM effect focuses on threshold and trend, in order to filter out periodic information that is not related to the overall trend of PIN junction temperature curve in transient simulation, the maximum junction temperature transient change curve data of PIN diode is first used to obtain the fitting polynomial curve, and then the fitting polynomial curve is sampled at equal intervals, here 20 points are taken.

[0090] In one embodiment, step 4 uses MSE as the loss function and Adam optimization algorithm to update network weights.

[0091] In one embodiment, step 4 utilizes early stopping to prevent overfitting. Specifically, during network training, when the training loss value stops decreasing for a set number of consecutive times (e.g., 30 times), training is terminated early to prevent overfitting and achieve better training results.

[0092] In this embodiment, the network structure is optimized to better obtain the nonlinear relationship between PIN structure parameters, HPM parameters, PIN limiter performance, and HPM effect, thereby achieving the expected prediction effect.

[0093] Figure 6 This is a comparison chart of the predicted and simulated values ​​for Network 1. Figure 6 In the figure, (a) is a comparison between the predicted and simulated values ​​of the insertion loss of the test set, (b) is a comparison between the predicted and simulated values ​​of the maximum isolation of the test set, and (c) is a comparison between the predicted and simulated values ​​of the limiting power threshold of the test set. As can be seen from the figures, the predicted values ​​fluctuate within a very small range around the simulated values, and the predicted values ​​are in good agreement with the sample label values.

[0094] Figure 7 Let be the mean square error of the network's predicted value. The mean square error (MSE) function calculates the sum of squares of the differences between the predicted and target values, and its formula is shown in equation (4):

[0095]

[0096] Figure 7 In the table, (a) represents the mean square error (MSE) of insertion loss in the test set, (b) represents the mean square error (MSE) of maximum isolation in the test set, and (c) represents the mean square error (MSE) of the limiting power threshold in the test set. It can be seen that the MSE values ​​of insertion loss are generally less than 0.000013, the MSE values ​​of maximum isolation are generally less than 0.008, and the MSE values ​​of limiting power threshold are generally less than 0.03. Figure 7 It can be seen that the mean square error of the network's prediction of insertion loss, amplitude limiting threshold, and maximum isolation is quite low.

[0097] Figure 8 The chart shows a comparison between the predicted maximum junction temperature transient curves and the corresponding simulated curves of four randomly selected sets from the 264 test set data. It can be seen that the two curves have a high degree of fit, good prediction performance, and the predicted curves closely match the sample label curves.

[0098] Figure 9 The mean square error of the predictions by Network 2 is less than 0.003 for all samples in the test set, indicating that Network 2 has a very low mean square error in predicting the PIN junction temperature curve and has a good prediction effect.

Claims

1. A deep learning based PIN limiter performance and HPM effect prediction method, characterized in that, The method comprises the following steps: Step 1, establishing a sample set based on TCAD simulation First, a numerical physical model of the PIN limiter is established by using TCAD simulation software, then a PIN limiter HPM effect simulation circuit is built based on the PIN diode numerical physical model, device parameters and HPM parameters are set according to the required characteristics of the sample set, and transient response simulation is performed to obtain the label corresponding to the characteristics of the sample set; The required characteristics of the sample set are: PIN diode I layer thickness W I PIN diode I layer doping N I HPM frequency f, HPM rise time t r and HPM input power P in Each set of features requires a corresponding set of labels obtained from corresponding simulation experiments; The label corresponding to the characteristics of the sample set is: The simulation obtained amplitude limiting power threshold, insertion loss, maximum isolation and PIN diode junction temperature curve, the amplitude limiting power threshold, insertion loss, maximum isolation are used to characterize the amplitude limiting performance of the limiter; the PIN diode junction temperature curve is used to characterize the HPM effect; Step 2, dividing the sample set into a training set, a cross-validation set and a test set; Step 3, constructing a deep learning network prediction model and training and verifying it to obtain a model meeting the requirements, and using the model to predict the performance of the PIN limiter and the HPM effect under different parameters and working conditions, wherein the deep learning network prediction model comprises network one and network two, the network one is used to predict the amplitude limiting performance of the PIN limiter, and the network two is used to predict the HPM effect of the PIN limiter.

2. The PIN limiter performance and HPM effect prediction method based on deep learning according to claim 1, wherein, The step 1, through the TCAD simulation software, obtains the electric and thermal responses of multiple groups of PIN limiters under different HPM injections, extracts limiter limiting performance characteristic parameters, HPM effect characteristic parameters and corresponding device parameters and HPM parameters as a sample set, the limiter limiting performance characteristic parameters are the limiting power threshold, the insertion loss and the maximum isolation, the HPM effect characteristic parameters are the time and temperature embodied in the PIN diode junction temperature curve, and the device parameters are the PIN diode I layer thickness W I , PIN diode I layer doping N I ; the HPM parameters are the HPM frequency f, the HPM rise time t r and the HPM input power P in .

3. The PIN-amplifier performance and HPM-effect prediction method based on deep learning according to claim 1, characterized in that, In step 1, the numerical physical model of the PIN limiter is a carrier thermodynamic transport model considering the self-heating and high electric field effect of the device under high-power microwave action; Then, a PIN limiter HPM effect simulation circuit is built based on the PIN diode numerical physical model, device parameters and high-power microwave parameters are set according to the required characteristics and labels of the sample set, and transient response simulation is performed to obtain the characteristic parameters corresponding to the labels of the sample set.

4. The PIN limiter performance and HPM effect prediction method based on deep learning according to claim 3, characterized in that, Considering the self-heating of the device, the electron-hole transport equation of the numerical physical model of the PIN limiter is: where: and are the electron and hole current densities, respectively; n and p are the electron and hole concentrations, respectively; q is the electronic charge; μ n and μ p are the electron and hole mobilities, respectively; φ n and φ p are the electron and hole quasi-Fermi potentials, respectively; P n and P P represent the absolute thermoelectric power of holes and electrons, respectively. Considering the high electric field, a high-field velocity saturation model is introduced, and the corrected carrier mobility formula is where: μ low represents the mobility before correction, v sat represents the saturation drift velocity of the carriers, β is a constant, which is related to the process and is given by the model; At the same time, the avalanche breakdown of the PIN diode under high electric field is considered, and an avalanche ionization model is introduced, and the avalanche generation model is G = a n nv n +a p pv p (3) where v n and v p are the saturation velocities of electrons and holes, respectively, a n and a p are the impact ionization coefficients of electrons and holes, respectively.

5. The PIN limiter performance and HPM effect prediction method based on deep learning according to claim 1, wherein, In step 1, the mixed mode of Sentarurs TCAD is used to simulate the coupling of HPM to the PIN limiter through the front door, and the transient simulation of the HPM effect of the PIN limiter is performed; The simulation circuit comprises a sinusoidal pulse voltage source, a PIN, a resistor one, a resistor two, a direct current blocking capacitor one, a direct current blocking capacitor two and a radio frequency choke inductor, the sinusoidal pulse voltage source, the PIN, the resistor one and the capacitor one are connected in series, the PIN is connected in parallel with the inductor, and the capacitor two and the resistor two are connected in parallel; The sinusoidal pulse voltage source is used to generate HPM voltage with different frequencies, rise times and powers.

6. The deep learning based PIN limiter performance and HPM effect prediction method according to claim 1, wherein, In step 1, two groups of sample sets are obtained, which are sample set one and sample set two respectively; The sample set one is used for network one to predict the amplitude limiting performance of the PIN limiter, and the sample set two is used for network two to predict the HPM effect of the PIN limiter; The sample set one takes PIN device parameters and HPM parameters as the input of network one, contains PIN diode I layer thickness (W I ), PIN diode I layer doping (N I ), HPM frequency (f) and HPM rise time (t r ), takes the limiting performance of the PIN limiter as the output of network one, contains limiting power threshold, insertion loss and maximum isolation; The sample set two takes PIN device parameters and HPM parameters as the inputs of network two, contains PIN diode I layer thickness (W I ), PIN diode I layer doping (N I ), HPM frequency (f) and HPM input power (P in ), takes PIN diode junction temperature change trend curve as the output of network two, and the PIN diode junction temperature change trend curve is the curve representing HPM effect.

7. The deep learning based PIN limiter performance and HPM effect prediction method according to claim 1, wherein, The step 1 is to obtain label data of the sample set one, simulate experiments according to feature data of the sample set one to set simulation parameters, further set HPM input power as-10dBm to 80dBm at intervals of 10dBm under each group of parameters, set simulation experiment parameter conditions, and perform 10800 simulation experiments; obtain corresponding clipping start threshold, insertion loss and maximum isolation according to input power-output power corresponding relationship obtained by simulation under each sample parameter condition, and obtain 1080 groups of sample set one labels; to obtain label data of the sample set two, simulate experiments according to feature data of the sample set two to set simulation parameters, perform 1080 simulation experiments, obtain PIN junction temperature curves, and fit the junction temperature curve data into a 5th order polynomial to obtain a PIN diode junction temperature change trend curve independent of frequency to represent HPM effect, and obtain 1080 groups of sample set two labels.

8. The deep learning based PIN limiter performance and HPM effect prediction method of claim 1, wherein, The network one comprises, in sequence, an input layer one, a fully connected layer one, a convolutional layer one, a convolutional layer two, a convolutional layer three, a fully connected layer two, a fully connected layer three, a fully connected layer four and an output layer one. The network two comprises, in sequence, an input layer two, a fully connected layer five, a fully connected layer six, a fully connected layer seven, a convolutional layer four, a convolutional layer five, a convolutional layer six, a convolutional layer seven, a fully connected layer eight, a fully connected layer nine, a fully connected layer ten and an output layer two. The fully connected layer one to the fully connected layer nine are fully connected layers with 1×80, 1×640, 1×256, 1×50, 1×80, 1×160, 1×640, 1×2048 and 1×1024 respectively; and the convolutional layer one to the convolutional layer seven are convolutional layers with 16×40, 32×20, 64×10, 64×80, 128×40, 256×20 and 64×10 respectively.

9. The deep learning based PIN limiter performance and HPM effect prediction method according to claim 1, wherein, Each fully connected layer comprises a linear unit, a batch normalization (BN) unit and a ReLU activation function unit; and each convolutional layer comprises a convolution (Conv) unit with a kernel of 5 and padding of 2, a batch normalization unit, a ReLU activation function unit and a pooling unit with a kernel of 2 (Maxpool).

10. The deep learning based PIN limiter performance and HPM effect prediction method of claim 1, wherein, The output of the network two is an average of 20 points of the PIN diode maximum junction temperature transient change fitting curve in the 0ns-50ns interval.

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