Valley lock control method for flyback switching power supply and related charger and device

Abstract

The embodiment of the present application provides a valley bottom locking control method of a flyback switching power supply and related chargers and devices, wherein the control device comprises a valley bottom detection module, a valley bottom quantity counting module, a peak current control module and a PWM logic module; the valley bottom detection module detects the valley bottom in the working process of the converter; the valley bottom quantity counting module compares and counts the peak current reference signal to obtain a reference valley value; the peak current control module obtains the peak current reference signal according to the feedback voltage and the reference valley value; specifically, after the reference valley value changes, the corresponding relationship between the peak current reference signal and the feedback voltage is adjusted; and the PWM logic module generates a PWM pulse for driving the main power switch tube. The embodiment of the present application realizes the valley bottom locking function of the converter, so that the working power of the converter at the valley switching point is approximately equal, and the dynamic performance of the converter is improved.

Description

Technical Field

[0001] This application relates to the field of electronic technology, specifically to a valley-locking control method for a flyback switching power supply and related chargers and devices. Background Technology

[0002] Flyback switching power supplies, also known as flyback converters, have large parasitic capacitances in their switching transistors. When the operating voltage of the switching transistors is high, the converter exhibits significant switching losses. Therefore, to improve the converter's efficiency, flyback converters are generally turned on at the resonant valley of the DCM mode. At this point, the voltage across the drain and source of the switching transistor is minimized, and the switching losses are also reduced to the lowest level. Flyback converters operating in this mode are called quasi-resonant (QR) flyback converters.

[0003] In practical applications, the operating frequency of a switching power supply operating in QR mode is inversely proportional to the load. Therefore, existing technologies typically use maximum frequency clamping to limit the operating frequency range of the switching power supply. However, when the number of valleys in the converter changes, the relationship between the peak current reference signal and the feedback voltage remains unchanged. Therefore, at the point where the number of valleys switches, the peak current reference signal of the converter does not change, but the operating frequency abruptly changes, leading to a sudden change in the converter's output power and affecting the system's dynamic performance. Simultaneously, this causes discontinuous operating power of the flyback converter, with the converter jumping between two or more valleys, resulting in drastic fluctuations in the converter's operating frequency, affecting the system's EMI performance and generating audible noise. Therefore, the problem of how to achieve valley locking functionality in flyback converters urgently needs to be solved. Summary of the Invention

[0004] This application provides a valley-locking control method for a flyback switching power supply, as well as related chargers and devices, which can realize the valley-locking function of the flyback converter.

[0005] In a first aspect, embodiments of this application provide a valley locking control device for a flyback switching power supply. The control device includes: a PWM logic module, and a valley detection module, a valley number counting module, and a peak current control module connected to the PWM logic module. The peak current control module is also connected to the valley number counting module. The valley detection module is connected to a first pin of the control device. The PWM logic module is connected to a second pin and a third pin of the control device. The peak current control module is connected to a fourth pin of the control device.

[0006] The valley detection module is used to detect valleys during the operation of the converter;

[0007] The valley count module is used to compare and count the peak current reference signal to obtain the reference valley value when the main power switch is turned on.

[0008] The peak current control module is used to obtain the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley number. Specifically, after the reference valley number changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset.

[0009] The PWM logic module is used to generate PWM pulses to drive the main power switch transistor based on the valley signal, the reference valley number, the peak current reference signal, and the pin voltage signal of the third pin.

[0010] Secondly, embodiments of this application provide a valley-locking control method for a flyback switching power supply, applied to the valley-locking control device for a flyback switching power supply as described in the first aspect, the method comprising:

[0011] The valley detection module detects valleys during the converter's operation.

[0012] The valley count module compares and counts the peak current reference signal to obtain the reference valley count when the main power switch is turned on.

[0013] The peak current control module obtains the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley number. Specifically, after the reference valley number changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset.

[0014] The PWM logic module is used to generate PWM pulses to drive the main power switch transistor based on the valley signal, the reference valley number, the peak current reference signal, and the pin voltage signal of the third pin.

[0015] Thirdly, embodiments of this application provide a charger that includes a control device as described in the first aspect.

[0016] Implementing the embodiments of this application has the following beneficial effects:

[0017] As can be seen, the valley locking control method and related devices for the flyback switching power supply described in this application embodiment include: a valley detection module that detects valleys during the converter's operation; a valley count module that compares and counts the peak current reference signal to obtain the reference valley value when the main power switch is turned on; and a peak current control module that obtains the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley value. Specifically, after the reference valley value changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted: the peak current reference signal decreases by an offset when the reference valley value decreases, or increases by an offset when the reference valley value increases. The PWM logic module generates PWM pulses to drive the main power switch based on the valley signal, the reference valley value, the peak current reference signal, and the pin voltage signal of the third pin. Therefore, implementing this application embodiment not only ensures that the power transmission between adjacent valleys of the converter overlaps, achieving valley locking, but also prevents drastic fluctuations in the output power of the converter during valley switching, improving the dynamic performance of the system. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the operating frequency of a frequency clamping control method in a related art provided in an embodiment of this application;

[0020] Figure 2 This is a graph showing the relationship between the peak current signal and the feedback voltage signal in a frequency clamping control method provided in this application embodiment.

[0021] Figure 3 This is a schematic diagram of the operating power of a frequency clamping control method in a related art provided in an embodiment of this application;

[0022] Figure 4 This is a schematic diagram of a valley-locking control device for a flyback switching power supply provided in an embodiment of this application;

[0023] Figure 5 This is a schematic diagram of a system circuit for another flyback switching power supply provided in an embodiment of this application;

[0024] Figure 6 This is a schematic diagram of a system circuit for another flyback switching power supply provided in an embodiment of this application;

[0025] Figure 7 This is a schematic diagram of the valley quantity counting module structure provided in an embodiment of this application;

[0026] Figure 8 This is a graph showing the relationship between the valley quantity signal and the feedback voltage signal provided in an embodiment of this application.

[0027] Figure 9 This is a schematic diagram of the peak current control module structure provided in an embodiment of this application;

[0028] Figure 10 This is a graph showing the relationship between the peak current signal and the feedback voltage signal provided in an embodiment of this application.

[0029] Figure 11 This is a schematic diagram of the PWM logic module structure provided in an embodiment of this application;

[0030] Figure 12 This is a schematic diagram of the operating power provided in the embodiments of this application;

[0031] Figure 13 This is a schematic flowchart of the valley-locking control method for a flyback switching power supply provided in the embodiments of this application. Detailed Implementation

[0032] To help those skilled in the art better understand the technical solutions of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the description of the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0033] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, software, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but also includes steps or units not listed, or other steps or units inherent to such processes, methods, products, or apparatus.

[0034] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0035] The embodiments of this application are described below with reference to the accompanying drawings. In the drawings, the intersection of intersecting wires is indicated by dots, and the absence of dots indicates that the wires are not connected.

[0036] To better understand the solutions of the embodiments of this application, the relevant terms and concepts that may be involved in the embodiments of this application will be introduced below.

[0037] In related technologies, such as Figure 1 This is a schematic diagram of the operating frequency of a traditional frequency clamping control method, such as... Figure 2 The graph shows the relationship between the peak current reference signal and the feedback voltage signal in the traditional control method, such as... Figure 3 This diagram illustrates the operating power of a traditional frequency clamping control method. Near the valley switching point of the flyback converter, its operating power undergoes a sudden change, becoming discontinuous. This leads to frequent valley switching when the load power is at the point of discontinuous operating power. The specific reason is as follows: If, under stable load conditions, the load power happens to be at the point of power discontinuity, for example… Figure 3 At the power point corresponding to P1, the converter's operating power is greater than the load power at the first valley and less than the load power at the second valley. Therefore, the converter will repeatedly switch between the first valley and the second valley operating states to make the average output power equal to the load power.

[0038] To address the shortcomings in the relevant technology, please refer to Figure 4 , Figure 4 This is a schematic diagram of a valley locking control device for a flyback switching power supply provided in an embodiment of this application. The control device includes: a PWM logic module, and a valley detection module, a valley number counting module, and a peak current control module connected to the PWM logic module. The peak current control module is also connected to the valley number counting module. The valley detection module is connected to the first pin VS of the control device. The PWM logic module is connected to the second pin VG and the third pin CS of the control device. The peak current control module is connected to the fourth pin FB of the control device.

[0039] The valley detection module is used to detect valleys during the operation of the converter;

[0040] The valley count module is used to compare and count the peak current reference signal to obtain the reference valley value when the main power switch is turned on.

[0041] The peak current control module is used to obtain the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley number. Specifically, after the reference valley number changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset.

[0042] The PWM logic module is used to generate PWM pulses to drive the main power switch transistor based on the valley signal, the reference valley number, the peak current reference signal, and the pin voltage signal of the third pin.

[0043] In a specific implementation, the control device may include a valley detection module, a valley count module, a peak current control module, and a PWM logic module. The valley detection module detects valleys during the converter's operation. The valley count module compares and counts the peak current reference signal to obtain the reference valley number when the main power switch is turned on. The peak current control module obtains the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley number. Specifically, after the reference valley number changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset. The PWM logic module generates PWM pulses to drive the main power switch based on the valley signal, the reference valley number, the peak current reference signal, and the CS pin voltage signal.

[0044] Specifically, the comparison values ​​of the peak current reference signal, namely the valley addition and valley subtraction reference voltages, should be set with a large hysteresis to ensure that the power between two adjacent valleys overlaps, thereby achieving valley locking of the converter. The increase or decrease of the offset should make the working power of the converter approximately equal at the valley number switching point, that is, the difference between the working power of the two is less than a preset threshold. The preset threshold can be preset or defaulted to by the system. The preset threshold can be close to 0, for example, the preset threshold is 0.1, or for example, the preset threshold is 0.01, that is, to ensure that the difference between the working power of the two is as small as possible, so as to improve the dynamic performance of the converter.

[0045] In this embodiment, the valley number counting module may include a selector. The selector selects the corresponding valley addition and valley subtraction reference voltages according to the reference valley number. The reference voltages are input to the comparator. The peak current reference signal is compared with the valley addition and valley subtraction reference voltages. After the switching transistor is turned on, the comparison result is counted. After counting, the reference valley number when the main power switching transistor is turned on in the next cycle is obtained.

[0046] The reference valley number can refer to the valley number when the main power switch is turned on. In the specific implementation, the converter counts the valleys after the main power switch is turned off. The switch will be turned on only when the counted valley number is equal to the reference valley number.

[0047] Optionally, the first pin VS is used to connect to a converter, which includes an auxiliary winding, a primary winding, and a secondary winding. One end of the auxiliary winding is connected to the first pin VS and the other end is grounded. One end of the primary winding is connected to an external power supply and the other end is connected to the first terminal of the main power switch Q1. One end of the secondary winding is connected to one end of a diode and the other end is grounded. The other end of the diode D1 is connected to the fourth pin FB through a feedback and isolation module.

[0048] The PWM logic module is connected to the second terminal of the main power switch Q1 via the second pin VG, and the PWM logic module is connected to the third terminal of the main power switch Q1 via the third pin CS and the sampling resistor R. sense Grounding.

[0049] Among them, such as Figure 5 As shown, the first pin VS is used to connect to the converter, which includes an auxiliary winding, a primary winding, and a secondary winding. One end of the auxiliary winding is connected to the first pin VS and the other end is grounded. One end of the primary winding is connected to an external power supply and the other end is connected to the first terminal of the main power switch Q1. One end of the secondary winding is connected to one end of diode D1 and the other end is grounded. The other end of diode D1 is connected to the fourth pin FB through a feedback and isolation module. The PWM logic module is connected to the second terminal of the main power switch Q1 through the second pin VG, and the PWM logic module is connected to the third terminal of the main power switch Q1 through the third pin CS and the sampling resistor R. sense Grounding.

[0050] In practice, the current magnitude can be sampled by measuring the voltage across the sampling resistor.

[0051] One end of the primary winding can also be connected to a capacitor (C). in The diode D1 is grounded, and its output can also be connected to a capacitor (C). o Grounding.

[0052] Optionally, the first pin VS is used to connect to the converter, which includes an auxiliary winding, a primary winding, and a secondary winding;

[0053] One end of the auxiliary winding is connected to the first pin VS and the other end is grounded; one end of the primary winding is connected to an external power supply and the other end is connected to a MOS integrated system; one end of the secondary winding is connected to one end of diode D1 and the other end is grounded; the other end of the diode is connected to the fourth pin FB through a feedback and isolation module.

[0054] The PWM logic module is connected to the MOS integrated system through the second pin VG and the third pin CS. The MOS integrated system includes a main power switch.

[0055] In specific implementation, such as Figure 6 As shown, the first pin VS is used to connect to the converter, which includes an auxiliary winding, a primary winding, and a secondary winding; one end of the auxiliary winding is connected to the first pin VS and the other end is grounded; one end of the primary winding is connected to an external power supply (V). in The other end is connected to the MOS integrated system; one end of the secondary winding is connected to one end of diode D1 and the other end is grounded; the other end of the diode is connected to the fourth pin FB through the feedback and isolation module; the PWM logic module is connected to the MOS integrated system through the second pin VG and the third pin CS. The MOS integrated system includes the main power switch.

[0056] One end of the primary winding can also be connected to a capacitor (C). in The diode D1 is grounded, and its output can also be connected to a capacitor (C). o Grounding.

[0057] In practice, the MOS can be integrated into a small system, namely the MOS integrated system, which can directly output a voltage signal that reflects the magnitude of the current without the need for a sampling resistor.

[0058] In this embodiment, the reference valley number when the main power switch is turned on is obtained by comparing and counting the peak current reference signal. The peak current reference signal when the main power switch is turned off is obtained based on the feedback voltage and the reference valley number. That is, the relationship between the peak current reference signal and the feedback voltage is adjusted under different reference valley numbers. This not only makes the transmission power between adjacent valleys of the converter overlap, achieving the purpose of valley locking, but also prevents the output power of the converter from fluctuating drastically when valley switching occurs, thus improving the dynamic performance of the system.

[0059] Optionally, the valley detection module is used to sample the pin voltage of the first pin VS, detect the valley during the operation of the converter and generate a valley signal Valley, and transmit the generated valley signal Valley to the PWM logic module.

[0060] The valley number counting module is used for the peak current reference signal V cs_ref After comparison and counting, the reference valley number Valley_N when the main power switch is turned on is obtained, and the reference valley number Valley_N is passed to the peak current control module and the PWM logic module.

[0061] The peak current control module is used to control the peak current based on the feedback voltage signal V from the fourth pin FB. FB The peak current reference signal V when the main power switch is turned off is obtained by combining the reference valley number Valley_N. cs_ref Specifically, after the reference valley number Valley_N changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number Valley_N decreases, the peak current reference voltage... cs_ref When the signal decreases by an offset, or when the number of reference valleys (Valley_N) increases, the peak current reference signal V... cs_ref Add an offset to the peak current reference signal V cs_ref The data is transmitted to the valley bottom quantity counting module and the PWM logic module;

[0062] The PWM logic module is used to determine the valley signal, the reference valley number Valley_N when the main power switch is turned on, and the peak current reference signal V. cs_ref and the pin voltage signal V of the third pin CS cs The PWM pulse that drives the main power switch is generated as follows: when the number of valley signals counted is equal to the reference valley value, the PWM logic module outputs a high level; when the pin voltage signal is greater than the peak current reference signal, the PWM logic module outputs a low level, and the PWM pulse signal is output through the second pin.

[0063] In the specific implementation, the valley count module is used to count the peak current reference signal V. cs_ref After comparison and counting, the reference valley value Valley_N when the main power switch is turned on is obtained. This reference valley value Valley_N is then passed to the peak current control module and the PWM logic module. The peak current control module uses the feedback voltage signal V from the FB pin. FBThe peak current reference signal V when the main power switch is turned off is obtained by combining the reference valley number Valley_N. cs_ref Specifically, after the number of reference valleys changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the number of reference valleys decreases, the peak current reference signal decreases by an offset, or when the number of reference valleys increases, the peak current reference signal increases by an offset. This adjusts the peak current reference signal V... cs_ref The data is passed to the valley bottom quantity counting module and the PWM logic module.

[0064] The PWM logic module is used to determine the valley signal (Valley), the reference valley number (Valley_N) when the main power switch is turned on, and the peak current reference signal (V). cs_ref and CS pin voltage signal V cs The PWM pulses that drive the main power switch are generated. Specifically, when the number of valley signals counted equals the reference valley value, the PWM logic module outputs a high level; when the voltage signal on the CS pin is greater than the peak current reference signal, the PWM logic module outputs a low level, and the PWM pulse signal is output through the VG pin.

[0065] Optionally, the valley number counting module includes a first selector, a second selector, a first comparator, a second comparator, an XOR gate, and a counter;

[0066] The data input terminals of the first selector are respectively connected to P valley reference voltages, and the data input terminals of the second selector are respectively connected to P valley reference voltages, where P is an integer greater than 1;

[0067] The reference valley value is connected to the data selection terminals of the first selector and the second selector. The data output terminals of the first selector and the second selector are respectively connected to the positive input terminal of the first comparator and the negative input terminal of the second comparator. The peak current reference signal is connected to the negative input terminal of the first comparator and the positive input terminal of the second comparator. The output terminal of the first comparator is connected to one input terminal of the XOR gate and the Add terminal of the counter. The output terminal of the second comparator is connected to the other input terminal of the XOR gate and the Sub terminal of the counter. The output terminal of the XOR gate is connected to the enable terminal of the counter. The clock input terminal of the counter is connected to the turn-on signal of the main power switch. The output terminal of the counter outputs the reference valley value.

[0068] The selector selects the corresponding valley addition and valley subtraction reference voltages based on the number of reference valleys. The reference voltages are input to the comparator, and the peak current reference signal is compared with the valley addition and valley subtraction reference voltages to obtain the peak current reference signal comparison value, i.e., the comparison result. After the main power switch is turned on, the comparison result is counted, and the number of reference valleys when the main power switch is turned on in the next cycle is obtained.

[0069] In specific implementation, such as Figure 7 As shown, the valley count module may include a first selector, a second selector, a first comparator, a second comparator, an XOR gate, and a counter. The data inputs of the first selector are connected to the valley reference voltages a, b, c, d, and e, respectively. The data inputs of the second selector are connected to the valley reference voltages A, B, C, D, and E, respectively. The reference valley value, Valley_N, is connected to the data selection terminals of the first and second selectors. The data outputs of the first and second selectors are connected to the positive input of the first comparator and the negative input of the second comparator, respectively. The peak current reference signal V... cs_ref The negative input terminal of the first comparator and the positive input terminal of the second comparator are connected. The output terminal of the first comparator is connected to one input terminal of the XOR gate and the Add terminal of the counter. The output terminal of the second comparator is connected to the other input terminal of the XOR gate and the Sub terminal of the counter. The output terminal of the XOR gate is connected to the enable terminal EN of the counter. The clock input terminal of the counter is connected to the main power switch transistor turn-on signal (Drive_on). The output terminal of the counter outputs the reference valley value (Valley_N).

[0070] In specific implementation, such as Figure 8 As shown, the specific working process of the valley number counting module is as follows: the selector selects the corresponding valley addition and subtraction reference voltages according to the reference valley value, inputs the reference voltages to the comparator, and the peak current reference signal V... cs_ref The comparison results are compared with the valley addition and valley subtraction reference voltages. After the main power switch is turned on, the comparison results are counted. After counting, the reference valley value Valley_N when the main power switch is turned on in the next cycle is obtained.

[0071] Optionally, the peak current control module includes a third selector and a subtractor; the data input terminal of the third selector is connected to Q reference signals, where Q is an integer greater than 1.

[0072] The data selection terminal of the third selector is connected to the reference valley number, and the output terminal of the third selector is connected to the negative input terminal of the subtractor. The third selector selects the corresponding reference signal according to the reference valley number and outputs the selected reference signal to the negative input terminal of the subtractor. The feedback voltage signal is connected to the positive input terminal of the subtractor, and the subtractor outputs the peak current reference signal through a preset proportional circuit.

[0073] Among them, such as Figure 9 As shown, the peak current control module includes a third selector, a subtractor, and a proportional circuit; the data input terminals of the third selector are respectively connected to the reference signal V. ref1 V ref2 V ref3 Vref4 V ref5 and V ref6 The selector's data selection terminal is connected to the reference valley number, Valley_N, and the selector's output terminal is connected to the negative input terminal of the subtractor. The selector selects the corresponding reference signal based on the reference valley number, Valley_N, and outputs the selected reference signal to the negative input terminal of the subtractor; feedback voltage signal V FB Connect the positive input terminal and the output terminal of the subtractor to a proportional element (1 / K). v The input terminal of the proportional circuit is connected to the output terminal of the input circuit, and the output terminal of the proportional circuit outputs the peak current reference signal V. cs_ref .

[0074] In specific implementation, such as Figure 10 As shown, the specific working process of the peak current control module is as follows: The selector selects the corresponding reference signal according to the reference valley number Valley_N. Based on the selected reference signal and the preset proportional coefficient, the peak current reference signal V can be obtained. cs_ref This allows for adjustment of the relationship between the peak current reference signal and the feedback voltage after a change in the reference valley number. cs_ref It can be obtained from the following formula:

[0075] Where V ref The reference voltage selected for the selector.

[0076] Optionally, the PWM logic module includes a digital counter, a digital comparator, an AND gate, a third comparator, an R / S flip-flop, and a single-pulse flip-flop;

[0077] The data input terminal of the digital counter is connected to the valley signal, and the reset input terminal of the digital counter is connected to the main power switch turn-on signal. The digital counter counts the number of valleys in the current cycle according to the valley signal. When the main power switch is turned on, the digital counter is reset.

[0078] The first input terminal of the digital comparator is connected to the output terminal of the digital counter;

[0079] The second input of the digital comparator is connected to the valley quantity signal. The digital comparator outputs a high level when the first input is greater than or equal to the second input. The first input of the AND gate is connected to the valley signal, and the second input of the AND gate is connected to the output of the digital comparator. The positive input of the third comparator is connected to the pin voltage signal of the third pin, and the negative input of the third comparator is connected to the peak current reference signal. The set input of the R / S flip-flop is connected to the output of the AND gate, and the reset input of the R / S flip-flop is connected to the output of the third comparator. The output of the R / S flip-flop outputs a drive signal and is connected to the input of the single-pulse flip-flop. The output of the single-pulse flip-flop outputs the main power switch turn-on signal. When the pin voltage signal of the third pin is greater than the peak current reference signal, the third comparator outputs a high level, the R / S flip-flop is reset, and the drive signal becomes low. When the digital comparator outputs a high level and the valley signal is also high, the AND gate outputs a high level, the R / S flip-flop is set, and the drive signal becomes high.

[0080] Among them, such as Figure 11 As shown, the PWM logic module includes a digital counter, a digital comparator, an AND gate, a third comparator, an R / S flip-flop, and a single-pulse flip-flop. The data input of the digital counter is connected to the valley signal (Valley), and the reset input is connected to the switch turn-on signal (Drive_on). The digital counter counts the number of valleys in the current cycle based on the valley signal and is reset when the switch is turned on. The first input of the digital comparator is connected to the output of the digital counter, and the second input is connected to the valley count signal (Valley_N). The digital comparator outputs a high level when the first input is greater than or equal to the second input. The first input of the AND gate is connected to the valley signal (Valley), and the second input is connected to the output of the digital comparator. The positive input of the third comparator is connected to the CS pin voltage signal (V). cs The negative input of the third comparator is connected to the peak current reference signal V. cs_ref The set terminal of the R / S flip-flop is connected to the output of the AND gate, the reset terminal of the R / S flip-flop is connected to the output of the comparator, the output of the R / S flip-flop outputs a drive signal Drive and connects to the input of a single-pulse flip-flop, and the output of the single-pulse flip-flop outputs a switch-on signal Drive_on. The voltage signal V at the CS pin... cs Greater than the peak current reference signal V cs_ref When the third comparator outputs a high level, the R / S flip-flop is reset, and the drive signal Drive becomes low. When the digital comparator outputs a high level and the valley signal Valley is also high, the AND gate outputs a high level, the R / S flip-flop is set, and the drive signal Drive becomes high.

[0081] In the specific implementation, the PWM logic module works as follows: The digital counter counts the number of valleys in the current cycle based on the valley signal. The digital counter is reset when the switching transistor is turned on. When the number of valleys counted by the digital counter, Count_N, is greater than or equal to the reference valley value, Valley_N, the digital comparator outputs a high level. The voltage signal V on the CS pin is then activated. cs Greater than the peak current reference signal V cs_ref When the third comparator outputs a high level, the R / S flip-flop is reset, and the drive signal Drive becomes low. When the digital comparator outputs a high level and the valley signal Valley is also high, the AND gate outputs a high level, the R / S flip-flop is set, and the drive signal Drive becomes high.

[0082] Optionally, the voltage signal of the third pin is a voltage signal reflecting the magnitude of the power circuit current. This voltage signal is obtained by sampling the voltage across an external sampling resistor, or by directly sampling a voltage signal reflecting the magnitude of the power circuit current.

[0083] In the specific implementation, Figure 5 , Figure 6 In the circuit shown, after the switching transistor is turned on, the current flowing through the switching transistor will gradually increase. This current is the power loop current, and the third pin CS samples the magnitude of this current.

[0084] Furthermore, such as Figure 12 As shown, compared with the control methods in related technologies, the reference valley number when the converter is turned on is obtained by comparing and counting the peak current reference signal. The comparison value of the peak current reference signal, i.e., the valley addition and valley subtraction reference voltage, can be set with a large hysteresis, so that the power between two adjacent valleys overlaps, thus achieving valley locking. At the same time, after the reference valley number changes, the relationship between the peak current reference signal and the feedback voltage is adjusted. Specifically, when the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset. This makes the working power of the converter approximately equal at the valley number switching point, improving the dynamic performance of the converter.

[0085] In this embodiment, the reference valley number when the main power switch is turned on is obtained by comparing and counting the peak current reference signal. Furthermore, the correspondence between the peak current reference signal and the feedback voltage can be adjusted after the reference valley number changes. Specifically, when the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset. That is, adjusting the relationship between the peak current reference signal and the feedback voltage under different reference valley numbers not only ensures that the transmission power between adjacent valleys of the converter overlaps, achieving valley locking, but also prevents drastic fluctuations in the output power of the converter during valley switching, thus improving the dynamic performance of the system.

[0086] Please participate Figure 13 , Figure 13 The flowchart illustrates a valley-lock control method for a flyback switching power supply provided in this application embodiment. Applied to the valley-lock control device for the flyback switching power supply provided in this application embodiment, it includes the following steps:

[0087] S1. The valley detection module detects the valley during the operation of the converter;

[0088] S2. The valley number counting module compares and counts the peak current reference signal to obtain the reference valley number when the main power switch is turned on.

[0089] S3. The peak current control module obtains the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley number. Specifically, after the reference valley number changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset.

[0090] S4. The PWM logic module is used to generate PWM pulses to drive the main power switch transistor based on the valley signal, the reference valley number, the peak current reference signal, and the pin voltage signal of the third pin.

[0091] The specific descriptions of steps S1-S4 above can be found in the corresponding descriptions above, and will not be repeated here.

[0092] In this embodiment of the application, a charger is also provided, which includes the above-mentioned control device. The control device realizes valley locking and limits the maximum operating frequency of the switching power supply, thereby ensuring the stability of the charger.

[0093] The above are the implementation methods of the embodiments of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the embodiments of this application, and these improvements and modifications are also considered to be within the protection scope of this application.

Claims

1. A valley-locking control device for a flyback switching power supply, characterized in that, The control device includes: a PWM logic circuit, and a valley detection circuit, a valley number counting circuit, and a peak current control circuit connected to the PWM logic circuit. The peak current control circuit is also connected to the valley number counting circuit. The valley detection circuit is connected to a first pin of the control device, which is used to connect to the converter. The PWM logic circuit is connected to a third pin of the control device. The PWM logic circuit is connected to the third terminal of the main power switch through the third pin and grounded through a sampling resistor. in, The valley detection circuit is used to detect valleys during the operation of the converter; The valley count circuit is used to compare and count the peak current reference signal to obtain the reference valley value when the main power switch is turned on. The peak current control circuit is used to obtain the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley number. Specifically, it includes: adjusting the correspondence between the peak current reference signal and the feedback voltage after the reference valley number changes. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset. The PWM logic circuit is used to generate PWM pulses to drive the main power switch transistor based on the valley signal, the reference valley number, the peak current reference signal, and the pin voltage signal of the third pin.

2. The apparatus according to claim 1, characterized in that, The PWM logic circuit is also connected to the second pin of the control device, and the peak current control circuit is connected to the fourth pin of the control device; the converter includes an auxiliary winding, a primary winding, and a secondary winding, one end of the auxiliary winding is connected to the first pin and the other end is grounded; one end of the primary winding is connected to an external power supply and the other end is connected to the first terminal of the main power switch; one end of the secondary winding is connected to one end of a diode and the other end is grounded; the other end of the diode is connected to the fourth pin through a feedback and isolation circuit; The PWM logic circuit is connected to the second terminal of the main power switch transistor via the second pin.

3. The apparatus according to claim 1, characterized in that, The PWM logic circuit is also connected to the second pin of the control device, the peak current control circuit is connected to the fourth pin of the control device, and the converter includes an auxiliary winding, a primary winding, and a secondary winding. One end of the auxiliary winding is connected to the first pin and the other end is grounded; one end of the primary winding is connected to an external power supply and the other end is connected to a MOS integrated system; one end of the secondary winding is connected to one end of a diode and the other end is grounded; the other end of the diode is connected to the fourth pin through a feedback and isolation circuit. The PWM logic circuit is connected to the MOS integrated system through the second pin and the third pin. The MOS integrated system includes a main power switch.

4. The apparatus according to any one of claims 2-3, characterized in that, The valley detection circuit is used to sample the pin voltage of the first pin, detect the valley during the operation of the converter and generate a valley signal, and transmit the generated valley signal to the PWM logic circuit. The valley count circuit is used to compare and count the peak current reference signal to obtain the reference valley number when the main power switch is turned on, and then transmit the reference valley number to the peak current control circuit and the PWM logic circuit. The peak current control circuit is used to obtain the peak current reference signal when the main power switch is turned off based on the feedback voltage signal of the fourth pin and the reference valley number. Specifically, after the reference valley number changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset. The peak current reference signal is then transmitted to the valley number counting circuit and the PWM logic circuit. The PWM logic circuit is used to generate PWM pulses to drive the main power switch based on the valley signal, the reference valley number when the main power switch is turned on, the peak current reference signal, and the pin voltage signal of the third pin. Specifically, when the number of valley signals counted is equal to the reference valley number, the PWM logic circuit outputs a high level; when the pin voltage signal is greater than the peak current reference signal, the PWM logic circuit outputs a low level, and the PWM pulse signal is output through the second pin.

5. The apparatus according to claim 4, characterized in that, The valley quantity counting circuit includes a first selector, a second selector, a first comparator, a second comparator, an XOR gate, and a counter; The data input terminals of the first selector are connected to P valley reference voltages respectively, and the data input terminals of the second selector are connected to P valley reference voltages respectively, where P is an integer greater than 1; The reference valley value is connected to the data selection terminals of the first selector and the second selector. The data output terminals of the first selector and the second selector are respectively connected to the positive input terminal of the first comparator and the negative input terminal of the second comparator. The peak current reference signal is connected to the negative input terminal of the first comparator and the positive input terminal of the second comparator. The output terminal of the first comparator is connected to one input terminal of the XOR gate and the Add terminal of the counter. The output terminal of the second comparator is connected to the other input terminal of the XOR gate and the Sub terminal of the counter. The output terminal of the XOR gate is connected to the enable terminal of the counter. The clock input terminal of the counter is connected to the turn-on signal of the main power switch. The output terminal of the counter outputs the reference valley value.

6. The apparatus according to claim 4, characterized in that, The peak current control circuit includes a third selector and a subtractor; the data input terminal of the third selector is connected to Q reference signals, where Q is an integer greater than 1. The data selection terminal of the third selector is connected to the reference valley number, and the output terminal of the third selector is connected to the negative input terminal of the subtractor. The third selector selects the corresponding reference signal according to the reference valley number and outputs the selected reference signal to the negative input terminal of the subtractor. The feedback voltage signal is connected to the positive input terminal of the subtractor, and the subtractor outputs the peak current reference signal through a preset proportional circuit.

7. The apparatus according to claim 4, characterized in that, The PWM logic circuit includes a digital counter, a digital comparator, an AND gate, a third comparator, an R / S flip-flop, and a single-pulse flip-flop; The data input terminal of the digital counter is connected to the valley signal, and the reset input terminal of the digital counter is connected to the turn-on signal of the main power switch. The digital counter counts the number of valleys in the current cycle according to the valley signal. When the main power switch is turned on, the digital counter is reset. The first input terminal of the digital comparator is connected to the output terminal of the digital counter; The second input of the digital comparator is connected to the reference valley value. The digital comparator outputs a high level when the first input is greater than or equal to the second input. The first input of the AND gate is connected to the valley signal, and the second input of the AND gate is connected to the output of the digital comparator. The positive input of the third comparator is connected to the pin voltage signal of the third pin, and the negative input of the third comparator is connected to the peak current reference signal. The set input of the R / S flip-flop is connected to the output of the AND gate, and the reset input of the R / S flip-flop is connected to the output of the third comparator. The output of the R / S flip-flop outputs a drive signal and is connected to the input of the single-pulse flip-flop. The output of the single-pulse flip-flop outputs the main power switch turn-on signal. When the pin voltage signal of the third pin is greater than the peak current reference signal, the third comparator outputs a high level, the R / S flip-flop is reset, and the drive signal becomes low. When the digital comparator outputs a high level and the valley signal is also high, the AND gate outputs a high level, the R / S flip-flop is set, and the drive signal becomes high.

8. The apparatus according to claim 4, characterized in that, The pin voltage signal of the third pin includes a voltage signal reflecting the magnitude of the power circuit current. The voltage signal is obtained by sampling the voltage across an external sampling resistor, or by directly sampling a voltage signal reflecting the magnitude of the power circuit current.

9. A valley-locking control method for a flyback switching power supply, characterized in that, Applied to the apparatus of any one of claims 1-8, the method comprises: The valley detection circuit detects valleys during the converter's operation. The valley count circuit compares and counts the peak current reference signal to obtain the reference valley value when the main power switch is turned on. The peak current control circuit obtains the peak current reference signal when the main power switch is turned off based on the feedback voltage and the reference valley number. Specifically, after the reference valley number changes, the correspondence between the peak current reference signal and the feedback voltage is adjusted. When the reference valley number decreases, the peak current reference signal decreases by an offset, or when the reference valley number increases, the peak current reference signal increases by an offset. The PWM logic circuit is used to generate PWM pulses to drive the main power switch transistor based on the valley signal, the reference valley number, the peak current reference signal, and the pin voltage signal of the third pin.

10. A charger, characterized in that, The charger includes the control device as described in any one of claims 1-8.

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