An epitaxial method for improving the quality of epitaxial crystallization
By forming an AlN layer on a sapphire or silicon carbide substrate and then cleaning and annealing it, the lattice mismatch between the substrate and the epitaxial layer is solved, the crystal quality of the epitaxial layer is improved, and the performance of the LED chip is enhanced.
Patent Information
- Application Number
- CN202211578289.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-09
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2042-12-09
AI Technical Summary
In existing technologies, lattice mismatch between the substrate and the epitaxial layer leads to poor epitaxial layer quality, which affects the performance of LED chips.
Using sapphire or silicon carbide as a substrate, an AIN layer is formed on its surface. The AIN layer is then cleaned with 511 solvent and annealed to eliminate polycrystalline particles and impurities, thereby reducing the degree of lattice mismatch.
It improves the crystal quality of the epitaxial layer, reduces dislocation density, enhances the brightness and antistatic properties of LED chips, and extends chip lifespan.
Smart Images

Figure BDA0003989818100000051
Abstract
Description
Technical Field
[0001] This invention relates to the field of LED chip technology, and more specifically to an epitaxial method for improving the quality of epitaxial crystallization. Background Technology
[0002] GaN, as a third-generation semiconductor material, has the characteristics of high bandgap, high critical breakdown electric field, high carrier saturation migration velocity, high thermal conductivity and direct bandgap, and has great application prospects in high temperature, high frequency, high power microelectronic devices and high performance optoelectronic devices.
[0003] LED chips mainly consist of a substrate and an epitaxial layer grown on the substrate. However, in the existing technology, the lattice mismatch between the substrate and the epitaxial layer reaches 13%, which causes dislocations to occur during the growth of the epitaxial layer, affecting the quality of the epitaxial layer and thus affecting the quality of the device (brightness, leakage current, ESD, etc.).
[0004] In existing published patents (such as Chinese patent CN103811354B), the problem of lattice mismatch between the epitaxial layer and the substrate is usually solved by doping Mg between the substrate and the epitaxial layer. However, this method is still not ideal for improving the quality of LED chips. Summary of the Invention
[0005] The technical problem to be solved by the present invention is to provide an epitaxial method to improve the quality of epitaxial crystallization, solve the problem of lattice mismatch between the substrate and the epitaxial layer, and improve the quality of LED chips.
[0006] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: an epitaxial method for improving the quality of epitaxial crystallization, comprising the following steps:
[0007] S1: Choose sapphire or silicon carbide as the substrate;
[0008] S2: An AlN layer is formed on the substrate surface;
[0009] S3: Clean the AIN layer with 511 solvent, wherein the 511 solvent is a mixture of sulfuric acid, hydrogen peroxide and pure water in a molar ratio of 5:1:1;
[0010] S4: Place the structure obtained in the above steps into a cleaning machine and clean it with deionized water;
[0011] S5: Place the structure obtained in the above steps into a spin dryer to dry;
[0012] S6: Anneal the structure obtained from the above steps;
[0013] S7: An epitaxial layer is grown on the surface of the structure obtained in the above steps to complete the fabrication of the LED chip.
[0014] The application has the advantages that in the epitaxial method for improving epitaxial crystallization quality provided by the application, an AIN layer is formed on a sapphire or silicon carbide substrate, which serves as a buffer between the substrate and the epitaxial layer with a serious lattice mismatch. The 511 solution can wash away AIN particles in the AIN layer in a polycrystalline state with poor crystallization quality and remove impurity atoms on the surface of the AIN layer. The S4 and S5 steps make the surface of the AIN layer clean. The S6 annealing process can eliminate the stress between the AIN and the substrate and reduce the lattice mismatch between the substrate and the epitaxial layer. Therefore, the epitaxial method for improving epitaxial crystallization quality provided by the application can solve the problem of lattice mismatch between the substrate and the epitaxial layer and improve the quality of LED chips. DETAILED DESCRIPTION
[0015] To make the technical contents, purposes and effects of the application clear, the following describes the application in combination with embodiments.
[0016] The application provides an epitaxial method for improving epitaxial crystallization quality, which comprises the following steps.
[0017] S1: selecting sapphire or silicon carbide as a substrate;
[0018] S2: forming an AIN layer on the surface of the substrate;
[0019] S3: cleaning the AIN layer with a 511 solution, which is a mixture of sulfuric acid, hydrogen peroxide and pure water in a molar ratio of 5:1:1;
[0020] S4: placing the structure obtained in the above step into a cleaning machine and cleaning with deionized water;
[0021] S5: placing the structure obtained in the above step into a spin dryer and spin-drying;
[0022] S6: annealing the structure obtained in the above step;
[0023] S7: growing an epitaxial layer on the surface of the structure obtained in the above step to complete the preparation of an LED chip.
[0024] The beneficial effects of the present application are as follows: in the epitaxial method for improving epitaxial crystallization quality provided by the present application, an AIN layer is formed on the substrate of sapphire or silicon carbide, which serves as a buffer between the substrate and the epitaxial layer with a more serious lattice mismatch. The 511 solution can wash away the AIN particles in the AIN layer in a polycrystalline state with poor crystallization quality, and can also remove the impurity atoms on the surface of the AIN layer. The S4 and S5 steps make the surface of the AIN layer clean. The S6 annealing process can eliminate the stress between the AIN and the substrate, and reduce the lattice mismatch degree between the substrate and the epitaxial layer. Therefore, the epitaxial method for improving epitaxial crystallization quality provided by the present application can solve the problem of lattice mismatch between the substrate and the epitaxial layer, and improve the quality of the LED chip.
[0025] Further, the S1 is specifically: selecting a patterned sapphire as the substrate.
[0026] As can be known from the above description, the patterned sapphire can effectively reduce the dislocation density of the GaN epitaxial material, thereby reducing the non-radiative recombination of the active region, reducing the reverse leakage current, and improving the service life of the LED.
[0027] Further, the S2 is specifically: placing the substrate into a reaction chamber, purging the reaction chamber with a mixed gas of argon and nitrogen, and using one of a magnetron sputtering, a radio frequency sputtering or an electron beam evaporation process to form an AIN layer on the surface of the substrate.
[0028] As can be known from the above description, the above arrangement provides a simple and efficient method for generating an AIN layer.
[0029] Further, the S2 is specifically: placing the substrate into a reaction chamber, setting the temperature of the reaction chamber to 500-700 degrees, and forming an AIN layer with a thickness of 10-100 nm on the surface of the substrate.
[0030] As can be known from the above description, the above arrangement provides a simple and efficient method for generating an AIN layer. The AIN layer with a thickness of 10-100 nm is a reasonable AIN layer structure. If the thickness of the AIN layer is too thick, the film formation quality will be low. If the thickness of the AIN layer is too thin, the cleaning process will damage the AIN layer, it will not be easy to form a continuous film, and the quality of the subsequent epitaxial layer will be affected.
[0031] Further, the S3 is specifically: using a 511 solvent to clean the AIN layer, the cleaning time is 7-9 minutes, and the cleaning temperature is 50-70 degrees; the 511 solvent is a mixture of sulfuric acid, hydrogen peroxide and pure water in a molar ratio of 5:1:1.
[0032] As can be known from the above description, the above arrangement provides a simple and efficient method for using a 511 solvent to clean the AIN layer.
[0033] Further, the S4 is specifically: placing the structure obtained in the above step into a cleaning machine, setting the deionized water flow of the cleaning machine to 4-6 L / min, the temperature to 55-75 degrees, and the duration to 7-9 minutes.
[0034] From the above description, it can be seen that the above setting provides a simple and efficient method for cleaning the AIN layer using a cleaning machine, so that the AIN layer can be cleaned more thoroughly.
[0035] Further, the S5 is specifically: placing the structure obtained in the above step into a spin dryer, and setting the rotation speed of the spin dryer to 1000-1400 r / min.
[0036] From the above description, it can be seen that the above setting provides a simple and efficient method for drying the AIN layer using a spin dryer.
[0037] Further, the S6 is specifically: placing the structure obtained in the above step into an annealing cavity, purging the annealing cavity with nitrogen, setting the temperature of the annealing cavity to 740-780 degrees, and the duration to 25-35 min.
[0038] From the above description, it can be seen that the above setting provides a simple and efficient method for annealing the AIN layer and the substrate.
[0039] Embodiment One
[0040] The epitaxial method for improving epitaxial crystalline quality provided in this embodiment includes the following steps:
[0041] S1: Selecting sapphire or silicon carbide as a substrate;
[0042] S2: Placing the substrate into a reaction cavity, purging the reaction cavity with a mixed gas of argon and nitrogen, setting the temperature of the reaction cavity to 500-700 degrees, and forming an AIN layer with a thickness of 25 nm on the surface of the substrate by using one of the following processes: magnetron sputtering, radio frequency sputtering, or electron beam evaporation;
[0043] S3: Cleaning the AIN layer using 511 solvent, the cleaning time being 8 minutes and the cleaning temperature being 60 degrees; the 511 solvent being a mixture of sulfuric acid, hydrogen peroxide, and pure water in a molar ratio of 5:1:1;
[0044] S4: Placing the structure obtained in the above step into a cleaning machine, setting the deionized water flow of the cleaning machine to 5 L / min, the temperature to 65 degrees, and the duration to 8 minutes;
[0045] S5: Placing the structure obtained in the above step into a spin dryer, and setting the rotation speed of the spin dryer to 1200 r / min;
[0046] S6: Placing the structure obtained in the above step into an annealing cavity, purging the annealing cavity with nitrogen, setting the temperature of the annealing cavity to 760 degrees, and the duration to 30 min;
[0047] S7: growing an epitaxial layer on the structure obtained in the above steps to complete the preparation of the LED chip.
[0048] Embodiment Two
[0049] The epitaxial method for improving epitaxial crystalline quality provided in this embodiment comprises the following steps:
[0050] S1: selecting sapphire or silicon carbide as a substrate;
[0051] S2: placing the substrate into a reaction chamber, using a mixed gas of argon and nitrogen to purge the reaction chamber, setting the temperature of the reaction chamber to 500 degrees, and using one of a magnetron sputtering, a radio frequency sputtering or an electron beam evaporation process to form an AIN layer with a thickness of 10 nm on the surface of the substrate;
[0052] S3: using 511 solvent to clean the AIN layer, the cleaning time being 7 minutes and the cleaning temperature being 50 degrees; the 511 solvent is a mixture of sulfuric acid, hydrogen peroxide and pure water in a molar ratio of 5:1:1;
[0053] S4: placing the structure obtained in the above steps into a cleaning machine, setting the deionized water flow of the cleaning machine to 4 L / min and the temperature to 55 degrees, and maintaining for 7 minutes;
[0054] S5: placing the structure obtained in the above steps into a spin dryer, and setting the rotation speed of the spin dryer to 1000 r / min;
[0055] S6: placing the structure obtained in the above steps into an annealing chamber, using nitrogen to purge the annealing chamber, setting the temperature of the annealing chamber to 740 degrees, and maintaining for 25 min;
[0056] S7: growing an epitaxial layer on the structure obtained in the above steps to complete the preparation of the LED chip.
[0057] Embodiment Three
[0058] The epitaxial method for improving epitaxial crystalline quality provided in this embodiment comprises the following steps:
[0059] S1: selecting sapphire or silicon carbide as a substrate;
[0060] S2: placing the substrate into a reaction chamber, using a mixed gas of argon and nitrogen to purge the reaction chamber, setting the temperature of the reaction chamber to 700 degrees, and using one of a magnetron sputtering, a radio frequency sputtering or an electron beam evaporation process to form an AIN layer with a thickness of 100 nm on the surface of the substrate;
[0061] S3: using 511 solvent to clean the AIN layer, the cleaning time being 9 minutes and the cleaning temperature being 70 degrees; the 511 solvent is a mixture of sulfuric acid, hydrogen peroxide and pure water in a molar ratio of 5:1:1;
[0062] S4: Put the structure obtained in the above step into a cleaning machine, set the deionized water flow of the cleaning machine to 6 L / min, the temperature to 75 degrees, and the duration to 9 minutes;
[0063] S5: Put the structure obtained in the above step into a spin-dryer, and set the spin-dryer speed to 1400 r / min;
[0064] S6: Put the structure obtained in the above step into an annealing cavity, use nitrogen to purge the annealing cavity, set the annealing cavity temperature to 780 degrees, and the duration to 35 min;
[0065] S7: Grow an epitaxial layer on the surface of the structure obtained in the above step, and complete the preparation of the LED chip.
[0066] Comparative Example
[0067] Table 1
[0068]
[0069] In Table 1, the meanings of "002" and "102" are as follows: the half-widths of the 002 / 102 directions are detected by a high-resolution X-ray diffractometer (HRXRD), and the two half-width values of the two different crystal face directions of the crystal are related to the dislocation density, that is, the greater the values are, the more dislocations there are, and the worse the crystal quality is. Generally, the half-width value of the 002 direction represents screw dislocations, and the half-width value of the 102 direction represents edge dislocations.
[0070] "Leakage %" represents the leakage yield: the yield of the chips with a leakage current less than 0.01 uA is tested by a reverse-10V voltage test.
[0071] "ESD %" represents the ESD yield: the yield of the chips passing the reverse-4KV ESD test.
[0072] The test group is the LED chip generated by using the epitaxial method for improving the epitaxial crystalline quality provided in the application, and the three control groups are the LED chips not generated by using the epitaxial method for improving the epitaxial crystalline quality provided in the application.
[0073] As can be seen from Table 1, the leakage rate of the test group is obviously reduced, and the brightness and the anti-static effect are obviously improved.
[0074] The above description is only an embodiment of the application, and does not limit the patent scope of the application, and any equivalent transformation or direct or indirect application in the related technical field by using the content of the application is also included in the patent protection scope of the application.
Claims
1. An epitaxial method for improving the quality of epitaxial crystallization, characterized by, The method comprises the following steps: S1: selecting sapphire or silicon carbide as a substrate; S2: forming an AIN layer on the surface of the substrate; S3: cleaning the AIN layer by using 511 solvent, the cleaning time is 7-9 minutes, and the cleaning temperature is 50-70 degrees; the 511 solvent is a mixture of sulfuric acid, hydrogen peroxide and pure water in a molar ratio of 5:1:1; S4: placing the structure obtained in the above step into a cleaning machine and cleaning by using deionized water; S5: placing the structure obtained in the above step into a spin dryer; S6: annealing the structure obtained in the above step; S7: growing an epitaxial layer on the surface of the structure obtained in the above step to complete the preparation of an LED chip.
2. The epitaxial method for improving the quality of epitaxial crystallization according to claim 1, wherein The S1 is specifically selecting a patterned sapphire as a substrate.
3. The epitaxial method for improving quality of epitaxial crystallization according to Claim 1, wherein The S2 is specifically placing the substrate into a reaction cavity, blowing the reaction cavity by using a mixed gas of argon and nitrogen, and forming an AIN layer on the surface of the substrate by using one of the following processes: a magnetic control sputtering process, a radio frequency sputtering process or an electron beam evaporation process.
4. The epitaxial method for improving quality of epitaxial crystallization according to Claim 1, wherein The S2 is specifically placing the substrate into a reaction cavity, setting the temperature of the reaction cavity to 500-700 degrees, and forming an AIN layer with a thickness of 10-100 nm on the surface of the substrate.
5. The epitaxial method of improving quality of epitaxial crystallization according to Claim 1, wherein The S4 is specifically placing the structure obtained in the above step into a cleaning machine, setting the deionized water flow of the cleaning machine to 4-6 L / min, setting the temperature of the cleaning machine to 55-75 degrees, and continuing for 7-9 minutes.
6. The epitaxial method of improving quality of epitaxial crystallization according to Claim 1, wherein The S5 is specifically placing the structure obtained in the above step into a spin dryer, and setting the rotation speed of the spin dryer to 1000-1400 r / min.
7. The epitaxial method of improving quality of epitaxial crystallization according to Claim 1, wherein The S6 is specifically placing the structure obtained in the above step into an annealing cavity, blowing the annealing cavity by using nitrogen, setting the temperature of the annealing cavity to 740-780 degrees, and continuing for 25-35 min.
Citation Information
Patent Citations
A Method for Improving the Crystal Quality of Heteroepitaxial Layers
CN103811354B
Growth method of compound semiconductor epitaxial layer on silicon substrate and device structure with epitaxial layer
CN103915537A
Vertical LED (light-emitting diode) chip preparation method capable of realizing repeated utilization of sapphire substrate
CN106252481A