Method for manufacturing a display device

Abstract

A method for manufacturing a display device is provided to improve the manufacturing efficiency of an LED display device. The method includes: a pressing step, in which a plurality of inorganic light-emitting elements are pressed against an array substrate to electrically connect a plurality of terminals of the array substrate to each of the plurality of inorganic light-emitting elements via a conductive bonding material; an electrical testing step, in which a pair of inspection terminals included in the plurality of terminals is connected to an inspection circuit to measure the electrical connection state of the inorganic light-emitting elements disposed on the pair of inspection terminals; and a bonding step, in which, while pressing each of the plurality of inorganic light-emitting elements against the array substrate, heat energy is applied to the conductive bonding material in contact with the plurality of terminals, thereby bonding the conductive bonding material to the electrodes of the plurality of inorganic light-emitting elements and at least one of the plurality of terminals. In the bonding step, the amount of pressure applied to each of the plurality of inorganic light-emitting elements against the array substrate is controlled based on the results measured in the electrical testing step.

Description

Technical Field

[0001] The present invention relates to a manufacturing technology for a display device. Background Art

[0002] As a display device, there is an LED (Light Emitting Diode) display device in which inorganic light-emitting diode elements, which are self-luminous elements, are arranged in rows and columns on a substrate (for example, see Patent Document 1 (Japanese Patent Application Publication No. 2019-36719)). In addition, Patent Document 2 (Japanese Patent Application Publication No. 2021-18386) describes a method for performing a lighting test of LED elements after a semiconductor layer is mounted on an array substrate.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2019-36719

[0006] Patent Document 2: Japanese Patent Application Laid-Open No. 2021-18386 Summary of the Invention

[0007] In the case of an LED display device, a large number of LED elements are mounted on an array substrate. Depending on the installation status of the numerous LED elements, malfunction may occur. Therefore, it is preferable to test the electrical connection between the LED elements and the array substrate. However, when performing electrical testing after mounting the LED elements on the array substrate, it is difficult to perform repairs if the LED elements are judged to be defective. In addition, when discarding work-in-progress (semi-finished products) that are judged to be defective, product production is reduced.

[0008] An object of the present invention is to provide a technology for improving the manufacturing efficiency of an LED display device.

[0009] A method for manufacturing a display device as one embodiment of the present invention includes: (a) preparing a first substrate on which a plurality of first inorganic light-emitting elements are arranged in rows and columns and an array substrate on which a plurality of first terminals are formed; (b) pressing each of the plurality of first inorganic light-emitting elements and the array substrate while the first substrate held on a first carrier is opposed to the array substrate held on a second carrier, thereby electrically connecting the plurality of first terminals of the array substrate to the plurality of first inorganic light-emitting elements via a first conductive bonding material; and (c) bonding the plurality of first terminals to the plurality of first inorganic light-emitting elements in the first carrier. b) after step (c), connecting a pair of first inspection terminals included in the plurality of first terminals to an inspection circuit and measuring the electrical connection state with the first inorganic light-emitting element arranged on the pair of first inspection terminals; and (d) after step (c), applying heat energy to the first conductive bonding material in contact with the plurality of first terminals while pressing each of the plurality of first inorganic light-emitting elements and the array substrate, thereby bonding the first conductive bonding material to the electrodes of the plurality of first inorganic light-emitting elements and at least one of the plurality of first terminals. In step (d), the amount of pressure applied when pressing each of the plurality of first inorganic light-emitting elements and the array substrate is controlled based on the result measured in step (c). BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a plan view showing a structural example of a display device as one embodiment.

[0011] Figure 2 Yes Figure 1 A circuit diagram showing an example of the configuration of a circuit around a pixel shown.

[0012] Figure 3 Yes Figure 1 FIG. 1 is an enlarged cross-sectional view of an example of a peripheral structure of LED elements arranged in each of a plurality of pixels of a display device shown.

[0013] Figure 4 It means targeting Figure 3 An enlarged cross-sectional view of a modified example of the LED element shown.

[0014] Figure 5 Yes Figure 1 1 is an explanatory diagram of the flow of manufacturing steps of the display device shown.

[0015] Figure 6 It means in Figure 5 The diagram shows a schematic plan view of a substrate prepared in the LED holding substrate preparation step.

[0016] Figure 7It means in Figure 5 FIG. 1 is a schematic cross-sectional view of an array substrate prepared in the array substrate preparation step.

[0017] Figure 8 Yes Figure 7 FIG. 1 is a plan view showing an example of a layout of a plurality of inspection terminals included in the array substrate.

[0018] Figure 9 It is schematically indicated in Figure 5 The figure shows a cross-sectional view of a state where the substrate on which the first inorganic light emitting elements are arranged and the array substrate are pressed in the first pressing step.

[0019] Figure 10 It will Figure 9 The enlarged cross-sectional view shows an enlarged state of the connection interface between the LED element and the array substrate.

[0020] Figure 11 It means in Figure 5 1 and 2 are explanatory diagrams of an example of the connection state of the inspection circuit and the inspection terminal used in each of the first electrical test step, the second electrical test step, and the third electrical test step.

[0021] Figure 12 It is schematically indicated in Figure 5 The figure shows a cross-sectional view of a state where the holding substrate is peeled off from the plurality of first inorganic light emitting elements in the first holding substrate peeling step.

[0022] Figure 13 It is schematically indicated in Figure 5 FIG. 1 is a cross-sectional view showing a state in which the substrate on which the second inorganic light emitting elements are arranged and the array substrate are pressed in the second pressing step.

[0023] Figure 14 It will Figure 13 The enlarged cross-sectional view shows an enlarged state of the connection interface between the LED element and the array substrate.

[0024] Figure 15 It is schematically indicated in Figure 5 The figure shows a cross-sectional view of a state where the holding substrate is peeled off from the plurality of second inorganic light emitting elements in the second holding substrate peeling step.

[0025] Figure 16 It is schematically indicated in Figure 5 FIG. 1 is a cross-sectional view showing a state where the substrate on which the third inorganic light emitting elements are arranged and the array substrate are pressed in the third pressing step.

[0026] Figure 17 It will Figure 16 The enlarged cross-sectional view shows an enlarged state of the connection interface between the LED element and the array substrate.

[0027] Figure 18 It is schematically indicated in Figure 5 The figure shows a cross-sectional view of a state where the holding substrate is peeled off from the plurality of third inorganic light emitting elements in the third holding substrate peeling step.

[0028] Figure 19 It is aimed at Figure 6 A modified example of FIG. 1 is a cross-sectional view schematically showing a state before a holding substrate holding a plurality of LED elements is mounted on an array substrate.

[0029] Figure 20 It means targeting Figure 8 A top view of a modified example of .

[0030] Description of Reference Numerals

[0031] 5 Control circuit

[0032] 6. Drive Circuit

[0033] 10. SS1, SS2, SS3, SS4 base board

[0034] 10b, 10f, 20b, 20f surfaces

[0035] 11 Inorganic insulating layer

[0036] 12, 13 organic insulating layer

[0037] 20, 20M1 LED components (inorganic light-emitting components)

[0038] 20E electrode

[0039] 20EA anode electrode

[0040] 20EK cathode electrode

[0041] 21. First Inorganic Light-Emitting Element

[0042] 21ET, 22ET, 23ET test components (inorganic light emitting components, LED components)

[0043] 22. Second inorganic light emitting element

[0044] 23. Third Inorganic Light Emitting Element

[0045] 30, 30H, 30L, 31, 32, 33 terminals

[0046] 30T, 30S, 31T, 31S, 32T, 32S, 33T, 33S Check terminals

[0047] 40, 41, 42, 43 Conductive bonding materials

[0048] 50 Check the circuit

[0049] 51, 51T, 51S external terminals for inspection

[0050] 52, 53 Wiring

[0051] 61, 62 stages

[0052] 61h, 62h keep surface

[0053] BCT output switch

[0054] Cad compensation capacitor

[0055] Cs holding capacitor

[0056] DA display area

[0057] DAs1, DAs2, DAs3, DAs4 edges

[0058] DAc1, DAc2, DAc3, DAc4 corners

[0059] DRT Driver Transistor

[0060] DSP1 display device

[0061] GL, GLA, GLB scan signal lines

[0062] GLR reset wiring

[0063] Gsb, Gsr, Gss control signals

[0064] PFA surrounding areas

[0065] PIX

[0066] PVD, PVS potential

[0067] RST reset switch

[0068] SS1b, SS2b, SS3b, SS4b bottom surface

[0069] SS1t, SS2t, SS3t, SS4t top surface

[0070] SST pixel switch

[0071] SUB1, SUB2 array substrate

[0072] SUBb side (side 2)

[0073] SUBt side (side 1)

[0074] VL Video Signal Cable

[0075] Vsg video signal DETAILED DESCRIPTION

[0076] Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the disclosed content is merely an example, and for those skilled in the art, solutions that can be easily thought of while maintaining the spirit of the invention are of course also included in the scope of the present invention. In addition, in order to make the description clearer, there are cases where the width, thickness, shape, etc. of each part are schematically represented compared to the actual state in the drawings, but this is merely an example and does not limit the interpretation of the present invention. In addition, in this specification and the drawings, the same or related reference numerals are sometimes marked for the elements that are the same as the elements described above with respect to the drawings that have appeared, and the detailed description is appropriately omitted.

[0077] In the following embodiments, a micro-LED display device including multiple micro-LED elements is described as an example of a display device using multiple inorganic light-emitting elements. Micro-LED elements have the advantage of being able to display high-definition images due to their smaller element size (outer diameter) compared to conventional LED elements. However, due to their small size, the margin required to control the pressing force during the LED element mounting process described later is small.

[0078] In addition, as a self-luminous light-emitting diode element, there is an organic light-emitting diode element (OLED). The inorganic light-emitting diode element (micro LED element) described in the following embodiments is distinguished from the organic light-emitting diode element.

[0079] <Display device>

[0080] First, a configuration example of a micro LED display device as a display device according to this embodiment will be described. Figure 1 1 is a top view showing a structural example of a display device as one embodiment. Figure 1 In FIG. 1 , a boundary between the display area DA and the peripheral area PFA, the control circuit 5 , the drive circuit 6 , and each of the plurality of pixels PIX are indicated by a two-dot chain line. Figure 2 Yes Figure 1 A circuit diagram showing an example of the configuration of a circuit around a pixel shown.

[0081] like Figure 1As shown, the display device DSP1 of this embodiment includes a display area DA, a peripheral area PFA surrounding the display area DA in a frame-like manner, and a plurality of pixels PIX arranged in rows and columns within the display area DA. Furthermore, the display device DSP1 includes a substrate 10, a control circuit 5 formed on the substrate 10, and a drive circuit 6 formed on the substrate 10.

[0082] The control circuit 5 is a control circuit for controlling the driving of the display function of the display device DSP1. For example, the control circuit 5 is a driver IC (Integrated Circuit) mounted on the substrate 10. Figure 1 In the example shown, the control circuit 5 is arranged along one of the four sides of the substrate 10. In the example of this embodiment, the control circuit 5 includes a circuit for driving the video signal line VL (see FIG. 1 ) connected to the plurality of pixels PIX. Figure 2 However, the position and structure of the control circuit 5 are not limited to Figure 1 The examples shown in the figure may be modified in various ways. For example, there are cases where Figure 1 In the figure, a circuit board such as a flexible board is connected to the position shown as the control circuit 5, and the driver IC is mounted on the circuit board. In addition, for example, a signal line driving circuit that drives the video signal line VL may be formed separately from the control circuit 5.

[0083] The driving circuit 6 is a circuit for driving the scanning signal lines GL in the plurality of pixels PIX. The driving circuit 6 drives the plurality of scanning signal lines GL based on the control signal from the control circuit 5. Figure 1 In the example shown, the drive circuit 6 is arranged along each of the two long sides of the four sides of the substrate 10. However, the position and configuration of the drive circuit 6 are not limited to the following. Figure 1 The examples shown in the figure may be modified in various ways. For example, there are cases where Figure 1 In FIG, a circuit substrate such as a flexible substrate is connected to a position shown as the control circuit 5, and the above-mentioned drive circuit 6 is mounted on the circuit substrate.

[0084] Next, use Figure 2 An example of a circuit structure of a pixel PIX is described. Figure 2 In the figure, a representative pixel PIX is shown, but Figure 1 The plurality of pixels PIX shown each have Figure 2 The same circuit as the pixel PIX shown in FIG. Hereinafter, the circuit including the switch, capacitor and LED element 20 of the pixel PIX is sometimes referred to as a pixel circuit. The pixel circuit is based on the control circuit 5 (refer to FIG. Figure 1) is a circuit that uses a voltage signal method to control the light-emitting state of the LED element 20 based on the image signal Vsg supplied.

[0085] like Figure 2 As shown, the pixel PIX includes an LED element 20. The LED element 20 is the micro light emitting diode described above. The LED element 20 has an anode electrode 20EA (see the following). Figure 3 ) and cathode electrode 20EK (see below) Figure 3 ). The anode electrode 20EA and the cathode electrode 20EK of the LED element 20 are each electrically connected to the terminal 30 of the pixel PIX. Figure 2 In the example shown, the cathode electrode 20EK of the LED element 20 is connected to the terminal 30L, and the anode electrode 20EA of the LED element 20 is connected to the terminal 30H. A relatively low fixed potential (low potential) of potential PVS is supplied to the terminal 30L, and a fixed potential (high potential) of potential PVD higher than the potential supplied to the terminal 30L of potential is supplied to the terminal 30H.

[0086] The pixel PIX includes an output switch BCT, a drive transistor DRT, and a pixel switch SST. The output switch BCT is a transistor that controls the light-emitting time of the LED element 20 in response to the control signal Gsb supplied from the drive circuit 6. The drive transistor DRT is a transistor that controls the amount of drive current supplied to the anode electrode of the LED element 20 based on the image signal Vsg. The pixel switch SST is a transistor that controls the connection state (ON or OFF state) between the pixel circuit and the image signal line VL in response to the control signal Gss. In addition, the drive circuit 6 includes a reset switch RST that controls the input of a reset potential. The output switch BCT, the drive transistor DRT, the pixel switch SST, and the reset switch RST are each, for example, thin-film transistors. When the pixel switch SST is in the ON state, the image signal Vsg is input to the pixel circuit from the image signal line VL.

[0087] The driving circuit 6 includes a shift register circuit, an output buffer circuit, etc. (not shown). The driving circuit 6 is based on the control circuit 5 (see Figure 1 ) transmits a horizontal scan start pulse and outputs a pulse, outputting a control signal Gss, a control signal Gsb and a control signal Gsr.

[0088] The plurality of scanning signal lines GL include scanning signal lines GLA and GLB, and a reset wiring GLR. Each of the plurality of scanning signal lines GL extends in the X direction. The scanning signal line GLA is connected to the gate electrode of the output switch BCT. When the control signal Gsb is supplied to the scanning signal line GLA, the output switch BCT is turned on. The scanning signal line GLB is connected to the gate electrode of the pixel switch SST. When the control signal Gss is supplied to the scanning signal line GLB, the pixel switch SST is turned on. The reset wiring GLR is connected between the output switch BCT and the drive transistor DRT, and to the drain electrode of the reset switch RST. When the control signal Gsr, which serves as a reset signal, is supplied to the gate electrode of the reset switch RST, a reset potential is supplied to the reset wiring GLR.

[0089] The pixel PIX includes a holding capacitor Cs and a compensation capacitor Cad. Each of the holding capacitors Cs and Cad is a capacitor. Holding capacitor Cs is connected between the gate electrode of the drive transistor DRT and terminal 30H. Compensation capacitor Cad is connected between the source electrode of the output switch BCT and terminal 30H. Compensation capacitor Cad is a capacitive element used to adjust the amount of light-emitting current. As a variation, there is also a case where compensation capacitor Cad is not provided.

[0090] LED element peripheral structure

[0091] Next, the configuration is described in Figure 1 The peripheral structure of the LED element of the pixel PIX is shown. Figure 3 It means in Figure 1 FIG. 1 is an enlarged cross-sectional view of an example of a peripheral structure of LED elements arranged in each of a plurality of pixels of a display device shown. Figure 4 It means targeting Figure 3 An enlarged cross-sectional view of a modified example of the LED element shown.

[0092] Figure 3 The array substrate SUB1 shown is a substrate comprising a substrate 10 and a plurality of insulating layers stacked on the substrate 10. The plurality of insulating layers of the array substrate SUB1 include an inorganic insulating layer 11, an organic insulating layer 12, and an organic insulating layer 13. Figure 2 The various circuits included in the pixel PIX are described. The substrate 10 has a surface 10 f and a surface 10 b opposite to the surface 10 f. The inorganic insulating layer 11 , the organic insulating layer 12 , and the organic insulating layer 13 are each stacked on the surface 10 f of the substrate 10 .

[0093] There is a case where each of the inorganic insulating layer 11, the organic insulating layer 12, and the organic insulating layer 13 is a laminated film composed of a plurality of laminated insulating films. Figure 2The semiconductor layers of the thin film transistors of the output switch BCT, the drive transistor DRT, and the pixel switch SST are formed in the inorganic insulating layer 11 and covered by the organic insulating layer 12. The terminal 30H and the terminal 30L are connected to the organic insulating layer 12 through contact holes (not shown) formed in the organic insulating layer 12. Figure 2 The various circuits and wirings (eg, wiring supplied with potential PVS) of the pixel PIX are connected. Some of the inorganic insulating films constituting the inorganic insulating layer 11 serve as base layers for forming thin film transistors, and others serve as gate insulating films of the thin film transistors.

[0094] like Figure 3 As shown, an LED element 20 is mounted on the array substrate SUB1. The LED element 20 includes a surface 20f and a surface 20b opposite to the surface 20f. In addition, the LED element 20 includes a plurality of LED elements (in the array substrate SUB1) arranged on the surface 20b. Figure 3 The plurality of electrodes 20E include an anode electrode 20EA and a cathode electrode 20EK. The anode electrode 20EA is connected to the terminal 30H via a conductive bonding material 40. The cathode electrode 20EK is connected to the terminal 30L via a conductive bonding material 40. The conductive bonding material 40 is made of solder, for example. Figure 3 Although one LED element is shown, multiple LED elements are mounted in rows and columns on the array substrate SUB1. The display device DSP1 displays an image by driving the multiple LED elements 20 mounted on the array substrate SUB1. Light emitted from the LED element 20 is emitted from the surface 20f side, for example.

[0095] In addition, Figure 3 As an example of the LED element 20, an example is shown in which both the anode electrode 20EA and the cathode electrode 20EK are arranged on the surface 20b. However, there are various modifications in the structure of the LED element 20. For example, Figure 4 In the case of the LED element 20M1 shown in FIG. 1 , a cathode electrode 20EK is provided on the surface 20f, and an anode electrode 20EA is provided on the surface 20b. Figure 3 The LED element 20 shown is replaced with Figure 4 In the case of the LED element 20M1 shown in FIG. 1 , the terminal 30L (see FIG. 1 ) connected to the cathode electrode 20EK Figure 3 ) is provided on the surface 20f of the LED element 20M1.

[0096] <Method for Manufacturing LED Display Device>

[0097] Next, explain Figure 1 The manufacturing method of the display device DSP1 is shown. Figure 5 Yes Figure 1 The flowchart of the manufacturing process of the display device shown in FIG. Figure 5 In the illustrated process, a method of sequentially mounting three LED elements, red, green, and blue, on an array substrate is used as an example. However, as described later as a modified example, there is also a method of mounting multiple LED elements on the array substrate using a holding substrate on which multiple LED elements 20 are arranged in rows and columns.

[0098] In the manufacturing method of the LED display device of this embodiment, three types of LED elements 20 (see Figure 3 ) are mounted on the array substrate SUB1 in order of type (refer to Figure 3 ) on. At this time, in order to make the electrical connection between the LED element 20 and the array substrate SUB1 good, it is necessary to properly set the amount of pressure when pressing the LED element 20 and the array substrate SUB1. In the manufacturing method of the LED display device described below, when the electrode 20E of the LED element 20 (refer to Figure 3 ) and the terminal 30 of the array substrate SUB1 (refer to Figure 3 ) through the conductive bonding material 40 (refer to Figure 3 ) before joining, an electrical test is performed to evaluate the appropriateness of the above-mentioned pressing amount. Based on the results of the electrical test, the pressing amount is changed if necessary. Alternatively, based on the results of the electrical test, even without changing the pressing amount, the amount of thermal energy applied when joining the LED element 20 and the terminal of the array substrate SUB1 is adjusted. Through these controls, it is possible to improve the electrical connection reliability of the joining portion where the electrode 20E of the LED element 20 and the terminal 30 of the array substrate SUB1 are joined via the conductive bonding material 40. Below, a method for manufacturing a display device of this embodiment is described, which includes the process of performing an electrical test before joining the electrode 20E of the LED element 20 and the terminal 30 of the array substrate SUB1 via the conductive bonding material 40.

[0099] LED Holder Substrate Preparation Process and Array Substrate Preparation Process

[0100] exist Figure 5 In the LED holding substrate preparation process shown, prepare Figure 6 The substrates SS1, SS2 and SS3 are shown. Figure 6 It means in Figure 5 The schematic top view of the substrate prepared in the LED holding substrate preparation process shown in FIG. The substrate SS1, the substrate SS2 and the substrate SS3 each have an upper surface and a lower surface. In addition, the substrate SS1, the substrate SS2 and the substrate SS3 each have one of the upper surface and the lower surface (in Figure 6 In the example shown, a plurality of LED elements are arranged in rows and columns on the upper surface.

[0101] Specifically, different types of LED elements are arranged on substrates SS1, SS2, and SS3, respectively. In other words, substrates SS1, SS2, and SS3 are each LED holding substrates that hold multiple LED elements. For example, a first inorganic light-emitting element 21, which is one of a red LED element, a green LED element, and a blue LED element, is arranged on the upper surface SS1t of substrate SS1. A second inorganic light-emitting element 22, which is a different LED element from the first inorganic light-emitting element 21 among the red LED elements, the green LED elements, and the blue LED elements, is arranged on the upper surface SS2t of substrate SS2. A third inorganic light-emitting element 23, which is a different LED element from the first inorganic light-emitting element 21 and the second inorganic light-emitting element 22 among the red LED elements, the green LED elements, and the blue LED elements, is arranged on the upper surface SS3t of substrate SS3.

[0102] In this step, for example, the electrodes 20E of the first inorganic light emitting element 21, the second inorganic light emitting element 22, and the third inorganic light emitting element 23 are previously bonded to the electrodes 20E. Figure 3 However, as a modification, there is a case where the terminal 30 is pre-joined with a conductive bonding material 40. Figure 3 The case of the conductive bonding material 40 shown.

[0103] On the upper surface SS1t of the substrate SS1, a plurality of first inorganic light-emitting elements 21 are arranged in rows and columns. On the upper surface SS1t of the substrate SS1, the second inorganic light-emitting elements 22 and the third inorganic light-emitting elements 23 are not arranged. On the upper surface SS2t of the substrate SS2, a plurality of second inorganic light-emitting elements 22 are arranged in rows and columns. On the upper surface SS2t of the substrate SS2, the first inorganic light-emitting elements 21 and the third inorganic light-emitting elements 23 are not arranged. On the upper surface SS3t of the substrate SS3, a plurality of third inorganic light-emitting elements 23 are arranged in rows and columns. On the upper surface SS3t of the substrate SS3, the first inorganic light-emitting elements 21 and the second inorganic light-emitting elements 22 are not arranged. The substrate SS1, the substrate SS2, and the substrate SS3 are each, for example, a sapphire substrate. Each of the first inorganic light emitting element 21 , the second inorganic light emitting element 22 , and the third inorganic light emitting element 23 is formed by stacking a metal film, an insulating film, a semiconductor film, and the like on a sapphire substrate, for example.

[0104] In addition, in the case of this embodiment, an inorganic light emitting element for testing is arranged on each of the substrate SS1, the substrate SS2 and the substrate SS3. Figure 6 The inorganic light emitting element for testing is a test element 21ET, a test element 22ET and a test element 23ET shown in FIG. Figure 5The LED element for electrical test used in any one of the first electrical test, the second electrical test and the third electrical test shown in FIG. Figure 6 The test elements 21ET are formed together with the first inorganic light emitting elements 21 of the plurality of first inorganic light emitting elements 21 by the same process. Therefore, when comparing their functions as LED elements, the test elements 21ET and the first inorganic light emitting elements 21 have the same functions. Similarly, a plurality of (in the upper surface SS2t of the substrate SS2) Figure 6 The test elements 22ET are formed together with the second inorganic light emitting elements 22 of the plurality of second inorganic light emitting elements 22 by the same process. Therefore, when comparing their functions as LED elements, the test elements 22ET and the second inorganic light emitting elements 22 have the same functions. In addition, a plurality of (in the upper surface SS3t of the substrate SS3) Figure 6 The test elements 23ET are formed together with each of the plurality of third inorganic light-emitting elements 23 using the same process. Therefore, when comparing their functions as LED elements, the test elements 23ET and the third inorganic light-emitting elements 23 have the same functions.

[0105] Figure 5 The first, second, and third electrical tests shown may each be performed using LED elements, such as the first inorganic light-emitting element 21, the second inorganic light-emitting element 22, and the third inorganic light-emitting element 23, used in the display function of the display device. However, by using test LED elements as in this embodiment, the circuits used for electrical testing can be electrically separated from the drive circuits used to implement the display function. This prevents the circuits used for electrical testing from affecting the drive circuits.

[0106] In addition, Figure 6 In the figure, the planar shapes of the substrates SS1, SS2, and SS3 are shown as circles, but the planar shapes of the substrates SS1, SS2, and SS3 are not limited to circles, and there are various modifications such as quadrilaterals.

[0107] In this embodiment, all of substrates SS1, SS2, and SS3 are prepared before the first pressing step. However, as a variation, some of substrates SS1, SS2, and SS3 may not be prepared before the first pressing step. For example, substrate SS2 only needs to be prepared before at least the second pressing step. Furthermore, substrate SS3 only needs to be prepared before at least the third pressing step.

[0108] In addition, in the array substrate preparation process, Figure 7 The array substrate shown. Figure 7 It means in Figure 5 FIG. 1 is a schematic cross-sectional view of an array substrate SUB1 prepared in the array substrate preparation step. Figure 8 Yes Figure 7 FIG. 1 is a top view of an example of a layout of a plurality of inspection terminals provided on an array substrate. In the display area DA of the array substrate SUB1, a large number of terminals 30 are arranged in rows and columns. Figure 7 and Figure 8 In FIG, a part thereof is shown representatively. Figure 8 In order to facilitate observation, the following is omitted Figure 11 The diagram shows a plurality of external terminals 51S for inspection and wiring 53. Figure 8 The inspection circuit 50 shown in FIG. Figure 5 Since connection is sufficient in each of the first electrical test step, the second electrical test step, and the third electrical test step, there is a case where connection is not required in the array substrate preparation step.

[0109] like Figure 7 As shown, the array substrate SUB1 includes a surface SUBt and a surface SUBb on the opposite side of the surface SUBt. The surface SUBt is intended to be mounted Figure 6 The array substrate SUB1 has a plurality of terminals 30. The plurality of terminals 30 include a first inorganic light emitting element 21 (see Figure 6 ) is electrically connected to the terminal (first terminal) 31. The plurality of terminals 30 include a terminal that is predetermined to be connected to the second inorganic light emitting element 22 (refer to Figure 6 ) is electrically connected to the terminal (second terminal) 32. In addition, the plurality of terminals 30 include a terminal that is predetermined to be connected to the third inorganic light emitting element 23 (refer to Figure 6 ) is electrically connected to the terminal (third terminal) 33. The terminal 31, the terminal 32 and the terminal 33 each correspond to Figure 1 The pixels PIX are arranged in rows and columns according to the positions of the pixels PIX shown.

[0110] In addition, the plurality of terminals 30 provided on the array substrate SUB1 are included in Figure 5The plurality of inspection terminals 30T used in any one of the first electrical test process, the second electrical test process, and the third electrical test process are shown in FIG. Figure 8 As shown, multiple terminals include the first electrical test process (refer to Figure 5 ) inspection terminal 31T, the second electrical test process (see Figure 5 ) and the third electrical test process (see Figure 5 ) Inspection terminal 33T used in.

[0111] exist Figure 8 In the example shown, a plurality of inspection terminals 30T are respectively arranged around the four corners of the display area DA. The display area DA is a quadrilateral, having a side DAs1 extending along the X direction, a side DAs2 on the opposite side of the side DAs1, a side DAs3 crossing the side DAs1, and a side DAs4 on the opposite side of the side DAs3. In addition, the display area DA has a corner DAc1 as the intersection of the side DAs1 and the side DAs3, a corner DAc2 as the intersection of the side DAs1 and the side DAs4, a corner DAc3 as the intersection of the side DAs2 and the side DAs3, and a corner DAc4 as the intersection of the side DAs2 and the side DAs4. As Figure 8 As shown, the inspection terminals 31T, 32T, and 33T are arranged around corners DAc1, DAc2, DAc3, and DAc4, respectively. Placing the inspection terminals 30T around each of the four corners of the display area DA is preferable because electrical tests using each inspection terminal 30T can estimate the connection status of each of the multiple terminals 30 arranged in the display area DA.

[0112] Furthermore, the “corner periphery” of the display area DA refers to an area within a range of 10 mm around each of the corners DAc1, DAc2, DAc3, and DAc4. Preferably, the “corner periphery” of the display area DA refers to an area within a range of 5 mm around each of the corners DAc1, DAc2, DAc3, and DAc4. Figure 8 In the example shown, each of the multiple inspection terminals 30T does not function as a display terminal 30. Therefore, each of the multiple inspection terminals 30T is not located within the display area DA, but rather outside the display area DA. However, as a variation of this embodiment, some of the multiple terminals 30 that function as display terminals can also serve as inspection terminals 30T for electrical testing, as described later. In this variation, the multiple inspection terminals 30T are located within the display area DA.

[0113] In the peripheral area PFA of the array substrate SUB1 (refer to Figure 1 ), a plurality of external terminals 51 for inspection are formed. The plurality of inspection terminals 30T are each connected via Figure 8 The wiring (inspection wiring) 52 shown by the dotted line is electrically connected to the inspection external terminal 51. Figure 5 In each of the first electrical test step, the second electrical test step, and the third electrical test step shown, by electrically connecting each of the external terminals 51 for inspection to the inspection circuit 50 , the inspection terminals 30T and the inspection circuit 50 can be electrically connected.

[0114] <First Pressing Step>

[0115] Next, explain Figure 5 The first pressing step is shown. Figure 9 It is schematically indicated in Figure 5 The figure shows a cross-sectional view of a state where the substrate on which the first inorganic light emitting elements are arranged and the array substrate are pressed in the first pressing step. Figure 10 It will Figure 9 The enlarged cross-sectional view shows an enlarged state of the connection interface between the LED element and the array substrate.

[0116] In the first pressing step, the plurality of first inorganic light emitting elements 21 and the array substrate SUB1 are pressed against each other while the substrate SS1 held on the stage 61 and the array substrate SUB1 held on the stage 62 are opposed to each other, thereby pressing the plurality of terminals 31 (see FIG. Figure 10 ) is electrically connected to the plurality of first inorganic light emitting elements 21. In other words, in the first pressing step, the substrate SS1 held on the stage 61 and the array substrate SUB1 held on the stage 62 are pressed against each other, thereby connecting the plurality of terminals 31 (refer to Figure 10 ) is electrically connected to multiple first inorganic light-emitting elements 21.

[0117] The carrier 61 is a component capable of holding the substrate SS1. The lower surface SS1b of the substrate SS1 is held by the holding surface 61h of the carrier 61. The carrier 62 is a component capable of holding the array substrate SUB1. The surface SUBb of the array substrate SUB1 is held by the holding surface 62h of the carrier 62. Examples of methods for holding the substrate SS1 by the carrier 61 and for holding the array substrate SUB1 by the carrier 62 include methods such as adsorption holding and methods for securing the peripheral edge of the substrate SS1 or the array substrate SUB1 using a fixing fixture (not shown).

[0118] The holding surface 61h of the stage 61 and the holding surface 62h of the stage 62 are opposite to each other. Therefore, when the lower surface SS1b of the substrate SS1 is held on the holding surface 61h and the surface SUBb of the array substrate SUB1 is held on the holding surface 62h, as shown in FIG. Figure 9 As shown, the upper surface SS1t of the substrate SS1 and the surface SUBt of the array substrate SUB1 are opposite to each other. In addition, each of the carrier 61 and the carrier 62 has a mechanism that can move the carrier 61 and the carrier 62 independently in the plane direction (XY plane direction). In this process, at least one of the carrier 61 and the carrier 62 is moved in the XY plane direction to move the electrodes 20E (refer to Figure 3 ) are connected to the terminals 31 of the array substrate SUB1 (refer to Figure 3 ) relative to each other, and perform precise alignment. Figure 10 When alignment along the XY plane is performed with the conductive bonding material 41 already bonded to the electrode 20E shown, the terminal 31 faces the conductive bonding material 41 bonded to the electrode 20E of the first inorganic light-emitting element 21. Alternatively, when alignment along the XY plane is performed with the conductive bonding material 41 already bonded to the terminal 31, the conductive bonding material 41 bonded to the terminal 31 faces the electrode 20E of the first inorganic light-emitting element 21.

[0119] After the above-mentioned alignment along the XY plane is performed, if the distance between the stage 61 and the stage 62 is shortened, the plurality of first inorganic light-emitting elements 21 arranged on the upper surface SS1t of the substrate SS1 are each close to the array substrate SUB1. Figure 10 As shown, when the terminal 31 is in contact with the conductive bonding material 41, or when the electrode 20E is in contact with the conductive bonding material 41, the electrode 20E of the first inorganic light-emitting element 21 and the terminal 31 are electrically connected via the conductive bonding material 41. In this state, either the interface between the terminal 31 and the conductive bonding material 41 or the interface between the electrode 20E and the conductive bonding material 41 is not bonded, but is merely in contact.

[0120] By performing the next first electrical test step while bonding at either the interface between the terminal 31 and the conductive bonding material 41 or the interface between the electrode 20E and the conductive bonding material 41 is not completed, the pressing amount can be easily corrected based on the test results.

[0121] In this step, the plurality of inspection terminals 31T (see Figure 8) are electrically connected to the test element 21ET as an LED element having the same structure as the first inorganic light emitting element 21. Figure 9 The upper surface SS1t of the substrate SS1 shown in the figure is pressed in a manner parallel to the surface SUBt of the array substrate SUB1, so that Figure 10 The connection state between the inspection terminal 31T and the test element 21ET shown is the same as the connection state between the terminal 31 and the first inorganic light emitting element 21 .

[0122] In addition, Figure 9 In the example shown, the pressing force is applied by pressing stage 61 toward stage 62. However, various modifications are possible in the method of applying the pressing force. For example, there are methods of pushing stage 62 toward stage 61, or methods of moving each of stages 61 and 62 in the Z direction.

[0123] <First electrical test step>

[0124] Next, explain Figure 5 The first electrical test process is shown. Figure 11 It means in Figure 5 FIG1 is an explanatory diagram of an example of the connection state of the inspection circuit and the inspection terminal used in the first electrical test process, the second electrical test process and the third electrical test process. Figure 11 As shown, a pair of inspection terminals 30T and 30S included in the plurality of terminals 30 are connected to the inspection circuit 50 , and the electrical connection state with the first inorganic light emitting element 21 disposed on the inspection terminals 30T and 30S is measured.

[0125] like Figure 11 As shown, test terminal 31T of the pair of test terminals is connected to anode electrode 20EA of test element 21ET. Furthermore, test terminal 31S of the pair of test terminals is connected to cathode electrode 20EK of test element 21ET. Furthermore, test terminal 31T is connected to external test terminal 51T via wiring 52. Test terminal 31S is connected to external test terminal 51S via wiring 53. Test terminal 31T and test terminal 31S are electrically connected via test element 21ET, which is an LED element. However, each of the multiple test elements 21ET is electrically isolated.

[0126] In this process, the inspection circuit 50 can be used to perform a continuity test between the inspection terminal 31T and the inspection terminal 31S. If the continuity test result shows that the continuity cannot be confirmed, Figure 5As shown by the dotted arrow in the middle, the first pressing process is performed again to increase the amount of pressure when pressing each of the plurality of first inorganic light emitting elements 21 and the array substrate SUB1. On the other hand, if the result of the conduction test is that conduction is confirmed, the process proceeds to the next first bonding process. In addition, in this process, by Figure 8 The plurality of inspection terminals 30T (and Figure 11 The test terminals 30S shown in FIG. 1 are each tested for continuity, and it can be inferred that the terminals 31 arranged in the display area DA and the first inorganic light emitting element 21 (see FIG. 1 ) are connected. Figure 10 For example, if conduction is confirmed in each of the four corners, it can be inferred that the terminal 31 arranged in the display area DA is electrically connected to the first inorganic light-emitting element 21. For another example, if conduction is not confirmed in some of the four corners, it is assumed that Figure 9 The upper surface SS1t of the substrate SS1 shown is tilted relative to the upper surface SUBt of the array substrate SUB1. In this case, the pressing amount around the corner where no conduction is confirmed is adjusted so as to be greater than around other corners, and the first pressing step is performed again, thereby correcting the poor connection state.

[0127] As described above, in this process, simply by performing a continuity test between the inspection terminal 31T and the inspection terminal 31S using the inspection circuit 50, the amount of pressure applied to each of the plurality of first inorganic light-emitting elements 21 and the array substrate SUB1 can be controlled based on the measurement results of the continuity test. However, to achieve higher precision control, the electrical test performed in this process preferably includes a resistance measurement test to measure the resistance between the pair of inspection terminals 31T and 31S.

[0128] As described above, in this step, the conductive bonding material 41 is not bonded to the terminal 31 and the electrode 20E (see Figure 10 ) is not connected to the terminal 31 and the electrode 20E. Therefore, compared to a case where the conductive bonding material 41 is bonded to both the terminal 31 and the electrode 20E, the resistance value tends to be larger. Therefore, by comparing the measured resistance value with a preset threshold, the amount of pressure applied to each of the plurality of first inorganic light-emitting elements 21 and the array substrate SUB1, as well as the heat energy applied to the conductive bonding material 41, can be controlled.

[0129] For example, when the measured resistance value is large, it is assumed that the amount of press-in is insufficient. In this case, the amount of press-in near the corner where the large resistance is measured is increased and the first pressing process is implemented again, thereby repairing the connection state. On the other hand, when the resistance value measured at each of the four corners is within the range of the threshold value considered to be qualified, no repair is required, so it is possible to directly transfer to the next process. In addition, when the resistance value in some or all of the four corners is lower than the insufficient amount of press-in but higher than the threshold value considered to be qualified, in the next first bonding process, it is set so that the heat energy applied to the conductive bonding material 41 becomes higher. By increasing the heat energy applied to the conductive bonding material 41, the bonding characteristics of the conductive bonding material 41 are improved, thereby improving the electrical connection reliability between the conductive bonding material 41 and the terminal 31 or the conductive bonding material 41 and the electrode 20E.

[0130] <First joining step>

[0131] Next, explain Figure 5 In the first bonding step, after the first electrical test step, a plurality of first inorganic light emitting elements 21 (see Figure 9 ) of each first inorganic light emitting element 21 and the array substrate SUB1 (refer to Figure 9 ) state, the conductive bonding material 41 (refer to Figure 10 ) applies heat energy, thereby bonding the conductive bonding material 41 to at least one of the electrode 20E and the terminal 31 of the first inorganic light-emitting element 21. The heat energy applied to the conductive bonding material 41 can be, for example, a bonding method based on laser irradiation or a reflow process in which the atmosphere surrounding the conductive bonding material 41 is heated. In the case of a bonding method based on laser irradiation, the amount of heat energy applied to each of the plurality of conductive bonding materials 41 can be adjusted.

[0132] In such Figure 8 Even when the plurality of inspection terminals 30T are arranged outside the display area DA, there is Figure 10 The example shown here shows a case where the inspection terminals 30T and the electrodes 20E of the test element 21ET are not electrically bonded via the conductive bonding material 41. For example, when using a bonding method based on laser irradiation, this can be accomplished by simply not irradiating the periphery of the test element 21ET with laser light. However, since the plurality of inspection terminals 30T are positioned near the display area DA, they ultimately remain on the product. Therefore, to prevent the inspection terminals 30T from remaining exposed on the array substrate SUB1, in this process, it is preferred that the electrodes 20E of the test element 21ET be bonded to the inspection terminals 30T via the conductive bonding material 41.

[0133] Here, in order to connect the multiple conductive bonding materials 41 and the multiple terminals 31, it is necessary to apply heat energy to the contact surface between the conductive bonding materials 41 and the terminals 31 while applying an appropriate load. For example, if the pressing force between the first inorganic light-emitting element 21 and the array substrate SUB1 is insufficient, the conductive bonding material 40 and the terminals 31 will not be smoothly bonded, which will cause a decrease in electrical connection reliability. On the other hand, if the pressing force between the first inorganic light-emitting element 21 and the array substrate SUB1 is too great, the first inorganic light-emitting element 21 itself or components surrounding the conductive bonding material 41 may be damaged.

[0134] In the case of this embodiment, before the first bonding process, a first electrical test process is performed, and based on the measurement results, the pressing amount when pressing each of the plurality of first inorganic light emitting elements 21 and the array substrate SUB1 and / or the conditions of the heat energy applied to the conductive bonding material 41 are controlled. Figure 10 The reflow process is performed with an appropriate load applied to the contact surface of the conductive bonding material 41 and the terminal 31. As a result, the reliability of the electrical connection between the electrode 20E of the first inorganic light emitting element 21 and the terminal 31 via the conductive bonding material 41 can be improved.

[0135] <First holding substrate peeling step>

[0136] Next, explain Figure 5 The first holding substrate peeling step is shown. Figure 12 It is schematically indicated in Figure 5 The cross-sectional view of the state after the holding substrate is peeled off from the plurality of first inorganic light emitting elements in the first holding substrate peeling step shown in FIG. Figure 12 As shown, after the first pressing step, the substrate SS1 and the plurality of first inorganic light-emitting elements 21 are peeled off.

[0137] The method for peeling off the close contact interface between the upper surface SS1t of the substrate SS1 serving as the holding substrate and the plurality of first inorganic light emitting elements 21 can use a technique called laser lift-off, for example. When the technique called laser lift-off is used, ultraviolet laser light, for example, is irradiated from the lower surface SS1b side of the substrate SS1 toward the close contact interface between the upper surface SS1t of the substrate SS1 and the plurality of first inorganic light emitting elements 21. On the surface 20b (refer to Figure 10 ) A gallium nitride layer is formed on the substrate SS1. If the surface 20b of the first inorganic light-emitting element 21 is irradiated with ultraviolet laser light, the surface layer of the gallium nitride layer (a portion on the surface 20b side) is modified, making it possible to peel the substrate SS1 and the first inorganic light-emitting element 21.

[0138] Through this process, a structure in which a plurality of first inorganic light-emitting elements 21 are mounted on the array substrate SUB1 is obtained.

[0139] <Second Pressing Step>

[0140] Next, explain Figure 5 The second pressing step is shown. Figure 13 It is schematically indicated in Figure 5 FIG. 1 is a cross-sectional view showing a state in which the substrate on which the second inorganic light emitting elements are arranged and the array substrate are pressed in the second pressing step. Figure 14 It will Figure 13 The enlarged cross-sectional view shows an enlarged state of the connection interface between the second inorganic light emitting element and the array substrate.

[0141] In the second pressing step, the plurality of second inorganic light emitting elements 22 and the array substrate SUB1 are pressed against each other while the substrate SS2 held on the stage 61 and the array substrate SUB1 held on the stage 62 are opposed to each other, thereby pressing the plurality of terminals 32 (see FIG. Figure 14 ) is electrically connected to the plurality of second inorganic light emitting elements 22. In other words, in the second pressing step, the substrate SS2 held on the stage 61 and the array substrate SUB1 held on the stage 62 are pressed against each other, thereby connecting the plurality of terminals 32 (refer to Figure 14 ) is electrically connected to multiple second inorganic light-emitting elements 22.

[0142] The stage 61 is a component capable of holding the substrate SS2. The lower surface SS2b of the substrate SS2 is held by the holding surface 61h of the stage 61. The stage 62 is a component capable of holding the array substrate SUB1. The surface SUBb of the array substrate SUB1 is held by the holding surface 62h of the stage 62. As already described, there are various methods for the stage 61 to hold the substrate SS2 and the stage 62 to hold the array substrate SUB1.

[0143] The holding surface 61h of the stage 61 and the holding surface 62h of the stage 62 are opposite to each other. Therefore, when the lower surface SS2b of the substrate SS2 is held on the holding surface 61h and the surface SUBb of the array substrate SUB1 is held on the holding surface 62h, as shown in FIG. Figure 13 As shown, the upper surface SS2t of the substrate SS2 and the surface SUBt of the array substrate SUB1 are opposite to each other. In addition, each of the carrier 61 and the carrier 62 has a mechanism that can move the carrier 61 and the carrier 62 independently in the plane direction (XY plane direction). In this process, at least one of the carrier 61 and the carrier 62 is moved in the XY plane direction to move the electrodes 20E (refer to Figure 3 ) are connected to the terminals 32 of the array substrate SUB1 (refer to Figure 3 ) relative to each other for precise alignment. Figure 14 When alignment along the XY plane is performed with the conductive bonding material 42 already bonded to the electrode 20E shown in the figure, the terminal 32 faces the conductive bonding material 42 bonded to the electrode 20E of the second inorganic light emitting element 22. Alternatively, when alignment along the XY plane is performed with the conductive bonding material 42 already bonded to the terminal 32, the conductive bonding material 42 bonded to the terminal 32 faces the electrode 20E of the second inorganic light emitting element 22.

[0144] After the above alignment along the XY plane is performed, if the distance between the stage 61 and the stage 62 is shortened, the plurality of second inorganic light emitting elements 22 arranged on the upper surface SS2t of the substrate SS2 are each close to the array substrate SUB1. Figure 14 As shown, when the terminal 32 is in contact with the conductive bonding material 42, or when the electrode 20E is in contact with the conductive bonding material 42, the electrode 20E of the second inorganic light-emitting element 22 and the terminal 32 are electrically connected via the conductive bonding material 42. In this state, either the interface between the terminal 32 and the conductive bonding material 42 or the interface between the electrode 20E and the conductive bonding material 42 is not bonded, but is merely in contact.

[0145] By performing the subsequent second electrical test step while bonding at either the interface between the terminal 32 and the conductive bonding material 42 or the interface between the electrode 20E and the conductive bonding material 42 is not completed, the pressing amount can be easily corrected based on the test results.

[0146] In this step, the plurality of inspection terminals 32T (see Figure 8 ) are electrically connected to a test element 22ET as an LED element having the same structure as the second inorganic light emitting element 22. Figure 13 The upper surface SS2t of the substrate SS2 shown in the figure is pressed in a manner parallel to the upper surface SUBt of the array substrate SUB1, so that Figure 14 The connection state between the inspection terminal 32T and the test element 22ET shown is the same as the connection state between the terminal 32 and the second inorganic light emitting element 22 .

[0147] <Second electrical test step>

[0148] Next, use Figure 11 illustrate Figure 5In the second electrical test process, as shown in FIG. Figure 11 As shown, a pair of inspection terminals 30T and 30S included in the plurality of terminals 30 are connected to the inspection circuit 50 , and the electrical connection state with the second inorganic light emitting element 22 disposed on the inspection terminals 30T and 30S is measured.

[0149] like Figure 11 As shown, test terminal 32T of the pair of test terminals is connected to anode electrode 20EA of test element 22ET. Test terminal 32S of the pair of test terminals is connected to cathode electrode 20EK of test element 22ET. Furthermore, test terminal 32T is connected to external test terminal 51T via wiring 52. Test terminal 32S is connected to external test terminal 51S via wiring 53. Test terminal 32T and test terminal 32S are electrically connected via test element 22ET, which is an LED element. However, each of the multiple test elements 22ET is electrically isolated.

[0150] In the same manner as the first electrical test step already described, in this step, a continuity test between the inspection terminal 32T and the inspection terminal 32S can be performed using the inspection circuit 50. If the continuity test results in no continuity being confirmed, Figure 5 As shown by the dotted arrows, the second pressing step is performed again to increase the amount of pressing when pressing each of the plurality of second inorganic light emitting elements 22 and the array substrate SUB1. On the other hand, if the result of the conduction test confirms that conduction is achieved, the process proceeds to the next second bonding step. In this step, it is preferred that Figure 8 The four corners of the display area DA are respectively configured with Figure 11 The test terminal 32T and the test terminal 32S shown are a pair. The reason for this is the same as that already explained in the first electrical test step, so repeated explanation is omitted.

[0151] As described above, in this process, simply by performing a continuity test between the inspection terminal 32T and the inspection terminal 32S using the inspection circuit 50, the amount of pressure applied to each of the plurality of second inorganic light-emitting elements 22 and the array substrate SUB1 can be controlled based on the measurement results of the continuity test. However, for greater control precision, the electrical test performed in this process preferably includes a resistance measurement test to measure the resistance between the pair of inspection terminals 32T and 32S. The details and effects of the resistance measurement test performed in the second electrical test process are the same as those already described in the first electrical test process, and therefore, repeated description will be omitted.

[0152] <Second joining step>

[0153] Next, explain Figure 5 In the second bonding step, after the second electrical test step, a plurality of second inorganic light emitting elements 22 (see Figure 13 ) of each second inorganic light emitting element 22 and the array substrate SUB1 (refer to Figure 13 ) state, the conductive bonding material 42 (refer to Figure 14 ) applies heat energy, thereby bonding the conductive bonding material 42 to at least one of the electrode 20E and the terminal 32 of the second inorganic light-emitting element 22. An example of a method of applying heat energy to the conductive bonding material 42 is the same as that in the first bonding step already described, and therefore repeated description is omitted.

[0154] <Second holding substrate peeling step>

[0155] Next, explain Figure 5 The second holding substrate peeling step is shown. Figure 15 It is schematically represented in Figure 5 The cross-sectional view of the state after the holding substrate is peeled off from the plurality of second inorganic light emitting elements in the second holding substrate peeling step shown in FIG. Figure 15 As shown, after the second bonding step, the substrate SS2 and the plurality of second inorganic light emitting elements 22 are peeled off. The method for peeling off the close contact interface between the upper surface SS2t of the substrate SS2 serving as the holding substrate and the plurality of second inorganic light emitting elements 22 is similar to the first holding substrate peeling step described above, for example, a technique known as laser lift-off can be used. Through this step, a structure in which the plurality of first inorganic light emitting elements 21 and the plurality of second inorganic light emitting elements 22 are mounted on the array substrate SUB1 is obtained.

[0156] <Third Pressing Step>

[0157] Next, explain Figure 5 The third pressing step is shown. Figure 16 It means in Figure 5 FIG. 1 is a cross-sectional view showing a state where the substrate on which the third inorganic light emitting elements are arranged and the array substrate are pressed in the third pressing step. Figure 17 It will Figure 16 The enlarged cross-sectional view shows an enlarged state of the connection interface between the third inorganic light emitting element and the array substrate.

[0158] In the third pressing step, the plurality of third inorganic light emitting elements 23 and the array substrate SUB1 are pressed against each other while the substrate SS3 held on the stage 61 and the array substrate SUB1 held on the stage 62 are opposed to each other, thereby pressing the plurality of terminals 33 (see FIG. Figure 17 ) is electrically connected to the plurality of third inorganic light emitting elements 23. In other words, in the third pressing step, the substrate SS3 held on the stage 61 and the array substrate SUB1 held on the stage 62 are pressed against each other, thereby connecting the plurality of terminals 33 (see Figure 17 ) is electrically connected to multiple third inorganic light-emitting elements 23.

[0159] The stage 61 is a component capable of holding the substrate SS3. The lower surface SS3b of the substrate SS3 is held by the holding surface 61h of the stage 61. The stage 62 is a component capable of holding the array substrate SUB1. The surface SUBb of the array substrate SUB1 is held by the holding surface 62h of the stage 62. As already described, there are various methods for holding the substrate SS3 by the stage 61 and for holding the array substrate SUB1 by the stage 62.

[0160] The holding surface 61h of the stage 61 and the holding surface 62h of the stage 62 are opposite to each other. Therefore, when the lower surface SS3b of the substrate SS3 is held on the holding surface 61h and the surface SUBb of the array substrate SUB1 is held on the holding surface 62h, as shown in FIG. Figure 16 As shown, the upper surface SS3t of the substrate SS3 and the surface SUBt of the array substrate SUB1 are opposite to each other. In addition, each of the carrier 61 and the carrier 62 has a mechanism that can move the carrier 61 and the carrier 62 independently in the plane direction (XY plane direction). In this process, at least one of the carrier 61 and the carrier 62 is moved in the XY plane direction so that the electrodes 20E (refer to Figure 3 ) are connected to the terminals 33 of the array substrate SUB1 (refer to Figure 3 ) relative to each other for precise alignment. Figure 17 When alignment along the XY plane is performed with the conductive bonding material 43 already bonded to the electrode 20E shown in the figure, the terminal 33 and the conductive bonding material 43 bonded to the electrode 20E of the third inorganic light-emitting element 23 face each other. Alternatively, when alignment along the XY plane is performed with the conductive bonding material 43 already bonded to the terminal 33, the conductive bonding material 43 bonded to the terminal 33 and the electrode 20E of the third inorganic light-emitting element 23 face each other.

[0161] After the above alignment along the XY plane is performed, if the distance between the stage 61 and the stage 62 is shortened, the plurality of third inorganic light emitting elements 23 arranged on the upper surface SS3t of the substrate SS3 are each close to the array substrate SUB1. Figure 17 As shown, when the terminal 33 is in contact with the conductive bonding material 43, or when the electrode 20E is in contact with the conductive bonding material 43, the electrode 20E of the third inorganic light-emitting element 23 and the terminal 33 are electrically connected via the conductive bonding material 43. In this state, either the interface between the terminal 33 and the conductive bonding material 43 or the interface between the electrode 20E and the conductive bonding material 43 is not bonded, but is merely in contact.

[0162] By performing the subsequent second electrical test step while bonding at either the interface between the terminal 33 and the conductive bonding material 43 or the interface between the electrode 20E and the conductive bonding material 43 is not completed, the pressing amount can be easily corrected based on the test results.

[0163] In this step, the plurality of inspection terminals 33T (see Figure 8 ) are electrically connected to the test element 23ET as an LED element having the same structure as the third inorganic light emitting element 23. Figure 16 The upper surface SS3t of the substrate SS3 shown in the figure is pressed in a parallel manner to the upper surface SUBt of the array substrate SUB1, so that Figure 17 The connection state between the inspection terminal 33T and the test element 23ET shown is the same as the connection state between the terminal 33 and the third inorganic light emitting element 23 .

[0164] <Third electrical test step>

[0165] Next, use Figure 11 illustrate Figure 5 In the third electrical test process, as shown in Figure 11 As shown, a pair of inspection terminals 30T and 30S included in the plurality of terminals 30 are connected to the inspection circuit 50 , and the electrical connection state with the third inorganic light emitting element 23 disposed on the inspection terminals 30T and 30S is measured.

[0166] like Figure 11As shown, test terminal 33T of the pair of test terminals is connected to anode electrode 20EA of test element 23ET. Furthermore, test terminal 33S of the pair of test terminals is connected to cathode electrode 20EK of test element 23ET. Furthermore, test terminal 33T is connected to external test terminal 51T via wiring 52. Test terminal 33S is connected to external test terminal 51S via wiring 53. Test terminal 33T and test terminal 33S are electrically connected via test element 23ET, which is an LED element. However, each of the multiple test elements 23ET is electrically isolated.

[0167] As in the first electrical test process already described, in this process, a continuity test between the inspection terminal 33T and the inspection terminal 33S can be performed using the inspection circuit 50. If the continuity test results in failure to confirm the continuity, Figure 5 As shown by the dotted arrows, the third pressing step is performed again to increase the amount of pressing when pressing each of the plurality of third inorganic light emitting elements 23 and the array substrate SUB1. On the other hand, if the result of the conduction test confirms that conduction is achieved, the process proceeds to the next third bonding step. In this step, it is preferred that Figure 8 The four corners of the display area DA are respectively configured with Figure 11 The reason for this is the same as that already explained in the first electrical test process, so the repeated explanation is omitted.

[0168] As described above, in this process, simply by performing a continuity test between the inspection terminals 33T and 33S using the inspection circuit 50, the amount of pressure applied to each of the plurality of third inorganic light-emitting elements 23 and the array substrate SUB1 can be controlled based on the measurement results of the continuity test. However, for greater precision, the electrical test performed in this process preferably includes a resistance measurement test to measure the resistance between the pair of inspection terminals 33T and 33S. The details and effects of the resistance measurement test performed in the third electrical test process are the same as those already described in the first electrical test process, and therefore, repeated description will be omitted.

[0169] In addition, when the first electrical test process, the second electrical test process, and the third electrical test process are sequentially performed as in the present embodiment, as a modification of the present embodiment, it is possible to adopt Figure 11 The inspection terminal 31T, the inspection terminal 32T and the inspection terminal 33T shown in FIG are each electrically connected. Figure 11The inspection terminal 31S, the inspection terminal 32S, and the inspection terminal 33S are shown as being electrically connected to each other. In this case, since the number of the external inspection terminals 51 is reduced, it is advantageous in terms of securing space in the surrounding area.

[0170] On the other hand, in the case of this embodiment, if Figure 8 As shown, the multiple pairs of inspection terminals 31T, the multiple pairs of inspection terminals 32T and the multiple pairs of inspection terminals 33T of the array substrate SUB1 are electrically separated from each other. Figure 8 About Figure 11 Although the inspection terminals 30S are not shown, the multiple inspection terminals 31S, multiple inspection terminals 32S, and multiple pairs of inspection terminals 33S on the array substrate SUB1 are electrically isolated from each other. As described as a modified example, when the inspection terminals 31T, 32T, and 33T are electrically connected, the results of the electrical tests may be affected by the electrical connection of the inspection terminals 30T that are not the subject of inspection during the first, second, and third electrical test steps. In this embodiment, since the inspection terminals 31T, 32T, and 33T are electrically isolated from each other, the mutual influence of the multiple inspection terminals 30T can be eliminated, and accurate test results can be obtained, which is preferable in this respect.

[0171] <Third joining step>

[0172] Next, explain Figure 5 In the third bonding step, after the third electrical test step, a plurality of third inorganic light emitting elements 23 (see Figure 16 ) of each third inorganic light emitting element 23 and the array substrate SUB1 (refer to Figure 16 ) state, the conductive bonding material 43 (refer to Figure 17 ) applies heat energy, thereby bonding the conductive bonding material 43 to at least one of the electrode 20E and the terminal 33 of the third inorganic light-emitting element 23. An example of a method of applying heat energy to the conductive bonding material 43 is the same as that in the first bonding step already described, and therefore repeated description is omitted.

[0173] <Third holding substrate peeling step>

[0174] Next, explain Figure 5 The third holding substrate peeling step is shown. Figure 18 It is schematically indicated in Figure 5 The sectional view of the state after the holding substrate is peeled off from the plurality of third inorganic light emitting elements in the third holding substrate peeling process shown in FIG. Figure 18 As shown, after the third bonding step, the substrate SS3 and the plurality of third inorganic light emitting elements 23 are peeled off. As for the method for peeling off the close contact interface between the upper surface SS3t of the substrate SS3 serving as the holding substrate and the plurality of third inorganic light emitting elements 23, similarly to the first holding substrate peeling step described above, a technique such as laser lift-off can be used. Through this step, a structure in which the plurality of first inorganic light emitting elements 21, the second inorganic light emitting elements 22, and the plurality of third inorganic light emitting elements 23 are mounted on the array substrate SUB1 is obtained.

[0175] As described above, according to this embodiment, an electrical test is performed before bonding the plurality of LED elements (inorganic light-emitting elements) 20 to the array substrate SUB1. Furthermore, based on the results of the electrical test, the amount of pressure applied to the plurality of LED elements 20 when they are pressed against the array substrate SUB1 and / or the conditions for applying heat energy during bonding are controlled. This improves the reliability of the electrical connection between the LED elements 20 and the array substrate SUB1.

[0176] In addition, Figure 5 In the example shown, the embodiment of mounting three types of LED elements in sequence is described, but the types of LED elements to be mounted are not limited to three. For example, if only one type of LED element is to be mounted, the LED elements can be omitted. Figure 5 The second pressing step to the third holding substrate peeling step are shown. In addition, for example, in the case of a manufacturing method of a display device of a type in which two types of LED elements are mounted, the second pressing step to the third holding substrate peeling step can be omitted. Figure 5 In the case of a method for manufacturing a display device in which four or more types of LED elements are mounted, Figure 5 After the third holding substrate peeling step shown, the LED element mounting step (from the pressing step to the bonding step) of mounting an LED element different from the first to third types of LED elements and the holding substrate peeling step are repeated to obtain a display device.

[0177] <Modification of the holding substrate>

[0178] As a target Figure 5 Another modification example is to mount multiple (for example, three) LED elements on the array substrate SUB1 at once. This modification example will be described below. Figure 19 It is aimed at Figure 6 A modified example of FIG. 1 is a cross-sectional view schematically showing a state before a holding substrate holding a plurality of LED elements is mounted on an array substrate.

[0179] Figure 19The illustrated substrate SS4 has an upper surface SS4t and a lower surface SS4b. On the upper surface SS4t of the substrate SS4, a plurality of LED elements 20, including a plurality of first inorganic light-emitting elements 21, a plurality of second inorganic light-emitting elements 22, and a plurality of third inorganic light-emitting elements 23, are arranged in rows and columns. Since the substrate SS4 is not a substrate for manufacturing the LED elements 20 but merely a supporting substrate, it does not need to be a sapphire substrate. For example, a glass substrate or other substrate can be used. The plurality of LED elements 20 are bonded and fixed to the upper surface SS4t of the substrate SS4 via an adhesive layer (not shown).

[0180] Regarding the method of arranging a plurality of LED elements 20 on the upper surface SS4t of the substrate SS4, for example, it is applicable and suitable for Figure 8 The method of sequentially mounting the first inorganic light-emitting element 21, the second inorganic light-emitting element 22, and the third inorganic light-emitting element 23 on the array substrate SUB1 is shown. When the LED elements 20 are bonded and fixed to the substrate SS4, no electrical connection is required, so the first electrical test step, the second electrical test step, and the third electrical test step can be omitted. However, the electrical test step is required before the LED mounting step of pressing the substrate SS4 onto the array substrate SUB1.

[0181] In the case of this modification, since a plurality of LED elements 20 are mounted on the array substrate SUB1 at once, the time required for the entire process of mounting the LED elements can be shortened to 100%. Figure 5 However, the thickness of the LED element 20 varies depending on the type, and in order to improve the thickness of the LED element 20 and the terminal 30 (see Figure 3 ) from the perspective of electrical connection reliability, it is more preferable Figure 5 The manufacturing method is illustrated.

[0182] <Modification of Array Substrate>

[0183] As a target Figure 8 As another modified example, an embodiment will be described in which a part of the terminals 30 arranged in the display area DA is also used as a test terminal 30T for the electrical test in the electrical test process. Figure 20 It means targeting Figure 8 A top view of a modified example of . Figure 20 The array substrate SUB2 shown is different from the array substrate SUB2 in that the plurality of inspection terminals 30T are each arranged in the display area DA. Figure 8 The array substrate SUB1 shown is different. That is, Figure 20 The plurality of inspection terminals 30T shown are connected to the inspection external terminal 51 via wiring 52, and are connected to the inspection external terminal 51 via wiring 52. Figure 2 The image signal line VL shown is Figure 1The control circuit 5 is shown connected.

[0184] By using a portion of the plurality of terminals 30 for display as inspection terminals as in the array substrate SUB2, the area of ​​the display region DA can be increased. Figure 8 As described above, when the plurality of inspection terminals 30T are arranged outside the display area DA, the inspection terminals 30T and the display area DA are connected. Figure 1 The control circuit 5 shown is electrically isolated. By making the inspection terminal 30T and the inspection wiring 52 relative to the image signal Vsg (see Figure 2 ) transmission path is electrically separated, and when using the display device DSP1 (refer to Figure 1 ), it is possible to suppress the intrusion of noise into the transmission path of the image signal via the wiring 52. From this viewpoint, the structure of the array substrate SUB1 is more preferable. Figure 20 The array substrate SUB2 shown in FIG. 1 is different from the array substrate SUB2 shown in FIG. Figure 8 The array substrates SUB1 shown are the same, so repeated descriptions are omitted.

[0185] While the embodiments and representative modifications have been described above, the above-described technology can be applied to various modifications other than the modifications described above. For example, the above-described modifications can be combined with each other.

[0186] Within the scope of the present invention, those skilled in the art will be able to conceive of various variations and modifications, and will understand that these variations and modifications also fall within the scope of the present invention. For example, for each of the aforementioned embodiments, embodiments obtained by those skilled in the art by appropriately adding, deleting, or changing the design of structural elements, or by adding, omitting, or changing the conditions of processes, as long as they contain the gist of the present invention, are also included in the scope of the present invention.

[0187] Industrial Applicability

[0188] The present invention can be utilized in a display device and an electronic device incorporating the display device.

Claims

1. A method for manufacturing a display device, characterized in that: include: (a) Step: preparing a first substrate on which a plurality of first inorganic light-emitting elements are arranged in rows and columns and an array substrate on which a plurality of first terminals are formed; (b) step of pressing each of the plurality of first inorganic light-emitting elements and the array substrate with the first substrate held on the first stage facing each other, thereby electrically connecting the plurality of first terminals of the array substrate and the plurality of first inorganic light-emitting elements via the first conductive bonding material; (c) a step of connecting a pair of first inspection terminals included in the plurality of first terminals to an inspection circuit after step (b), and measuring an electrical connection state with the first inorganic light-emitting element disposed on the pair of first inspection terminals; and (d) step, after step (c), applying heat to the first conductive bonding material in contact with the first terminals while pressing each of the first inorganic light emitting elements and the array substrate, thereby bonding the first conductive bonding material to at least one of the electrodes of the first inorganic light emitting elements and the first terminals. In the step (d), the amount of pressing of each of the plurality of first inorganic light emitting elements and the array substrate is controlled based on the result measured in the step (c).

2. The method for manufacturing a display device according to claim 1, wherein: A plurality of second terminals are further formed on the array substrate prepared in the step (a). The manufacturing method of the display device further includes: (e) step of preparing a second substrate on which a plurality of second inorganic light-emitting elements are arranged in rows and columns; (f) step, after step (d) and step (e), pressing each of the plurality of second inorganic light-emitting elements and the array substrate with the second substrate held on the first stage facing the array substrate held on the second stage, thereby electrically connecting the plurality of second terminals of the array substrate and the plurality of second inorganic light-emitting elements via the second conductive bonding material; (g) a step of connecting a pair of second inspection terminals included in the plurality of second terminals to the inspection circuit after step (f), and measuring an electrical connection state with the second inorganic light-emitting element disposed on the pair of second inspection terminals; and (h) step, after step (g), applying heat to the second conductive bonding material in contact with the plurality of second terminals while pressing each of the plurality of second inorganic light emitting elements and the array substrate, thereby bonding the second conductive bonding material to at least one of the electrodes of the plurality of second inorganic light emitting elements and the plurality of second terminals; In the step (h), the amount of pressing of each of the plurality of second inorganic light emitting elements and the array substrate is controlled based on the result measured in the step (g).

3. The method for manufacturing a display device according to claim 2, wherein: A plurality of third terminals are further formed on the array substrate prepared in the step (a). The manufacturing method of the display device further includes: (i) Step of preparing a third substrate having a plurality of third inorganic light-emitting elements arranged in rows and columns; (k) step, after step (h) and step (i), pressing each of the plurality of third inorganic light-emitting elements and the array substrate with the third substrate held on the first stage facing the array substrate held on the second stage, thereby electrically connecting the plurality of third terminals of the array substrate and the plurality of third inorganic light-emitting elements via a third conductive bonding material; (m) a step of connecting a pair of third inspection terminals included in the plurality of third terminals to the inspection circuit after the step (k), and measuring an electrical connection state with a third inorganic light-emitting element disposed on the pair of third inspection terminals; and (n) step, after the above-mentioned step (m), applying heat energy to the third conductive bonding material in contact with the plurality of third terminals while pressing each of the plurality of third inorganic light-emitting elements and the array substrate, thereby bonding the third conductive bonding material to the electrodes of the plurality of third inorganic light-emitting elements and at least one of the plurality of third terminals, In the step (n), the amount of pressing of each of the plurality of third inorganic light emitting elements and the array substrate and the conditions for applying heat energy are controlled based on the result measured in the step (m).

4. The method for manufacturing a display device according to claim 3, wherein: The pair of first inspection terminals, the pair of second inspection terminals, and the pair of third inspection terminals of the array substrate prepared in the step (a) are electrically isolated from each other.

5. The method for manufacturing a display device according to claim 1, wherein: The array substrate includes a display area and a peripheral area. The display area is a quadrilateral with four corners when viewed from above. The peripheral area surrounds the display area in a frame shape. The array substrate includes a plurality of pairs of the first inspection terminals arranged around each of the four corners of the display region.

6. The method for manufacturing a display device according to claim 5, wherein: Each of the plurality of pairs of first inspection terminals is an inspection terminal that is arranged outside the display area and is electrically isolated from the plurality of first terminals arranged within the display area.

7. The method for manufacturing a display device according to claim 4, wherein: The array substrate includes a display area and a peripheral area. The display area is a quadrilateral with four corners when viewed from above. The peripheral area surrounds the display area in a frame shape. The array substrate includes a plurality of pairs of the first inspection terminals, a plurality of pairs of the second inspection terminals, and a plurality of pairs of the third inspection terminals, which are arranged around each of the four corners of the display region.

8. The method for manufacturing a display device according to claim 7, wherein: The multiple pairs of the first inspection terminals, the multiple pairs of the second inspection terminals, and the multiple pairs of the third inspection terminals are each an inspection terminal arranged outside the display area and electrically separated from the multiple first terminals, the multiple second terminals, and the multiple third terminals arranged in the display area.

9. The method for manufacturing a display device according to claim 1, wherein: The electrical test performed in the step (c) includes a resistance measurement test for measuring the resistance value between the pair of first inspection terminals.

10. The method for manufacturing a display device according to claim 1, wherein: In the (d) process, based on the measurement results of the resistance value between the pair of first inspection terminals, the pressing amount of each of the multiple first inorganic light-emitting elements and the array substrate, as well as the conditions of the thermal energy applied to the first conductive bonding material are controlled.

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