Inter-chip communication method and storage medium
By pulling the slave device's active data upload pin low and adding exception handling at the data link layer and communication protocol layer, the problem of data transmission delay between chips was solved, achieving timeliness and stability of data transmission.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN XINGUODU TECH
- Filing Date
- 2022-12-20
- Publication Date
- 2026-05-05
AI Technical Summary
In existing technologies, there is a delay in data transmission between chips, which leads to problems with the timeliness of data transmission, especially when the slave device needs to wait for the master to wake up after the master enters a sleep state.
By pulling the slave's active data transmission pin low, the master detects the low level and actively reads the slave's data. This hardware passive triggering method shortens the time for the master to enter the working mode. At the same time, exception handling and retransmission mechanisms are added to the data link layer and the communication protocol layer.
It achieves timely data transmission, improves the frequency and stability of data interaction, and reduces data transmission latency.
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Figure CN115988110B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to an inter-chip communication method and storage medium. Background Technology
[0002] In related technologies, electronic devices typically incorporate multiple chips to meet diverse functional requirements, necessitating data transmission between these chips for seamless collaboration. Currently, achieving inter-chip data transmission usually requires defining a communication mode before data transfer. Common communication methods include active mode and low-power mode. In these modes, one chip acts as the master and the other as the slave. When the master enters sleep mode, the slave needs to wait for the master to automatically enter active mode if it requires data transmission. This leads to data reception delays for the master, hindering timely data transmission. Therefore, ensuring timely data transmission has become a critical technical challenge. Summary of the Invention
[0003] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes an inter-chip communication method and storage medium that can ensure the timeliness of data transmission and make data interaction faster.
[0004] The inter-chip communication method according to a first aspect embodiment of this application, applied to a slave device, includes:
[0005] The slave data is packaged through the first communication protocol layer of the slave device to obtain a first protocol packet;
[0006] The first protocol packet is packaged through the first data link layer of the slave device to obtain the first data packet;
[0007] Pull the slave device's active data upload pin to a low level so that the master device can detect the low level and read the slave device's data based on the low level;
[0008] The first data packet is sent to the host.
[0009] The chip-to-chip communication method according to the embodiments of this application has at least the following beneficial effects: First, slave data is packaged through the slave's first communication protocol layer to obtain a first protocol packet; second, the first protocol packet is packaged through the slave's first data link layer to obtain a first data packet; then, the slave's active data upload pin is pulled low to enable the host to detect the low level and read the slave data based on the low level; finally, the first data packet is sent to the host. The chip-to-chip communication method of this application, by pulling the slave's active data upload pin low, allows the host to actively read the data sent by the slave when it detects that the active data upload pin is low. In other words, compared to the previous method where the host automatically triggers entry into working mode via software, this method allows the host to enter working mode more quickly through hardware passive triggering, shortening the time required for data transmission and thus enabling a faster data interaction frequency within the same time frame. Therefore, the chip-to-chip communication method of this application can ensure the timeliness of data transmission and make data interaction faster.
[0010] According to some embodiments of this application, the method further includes:
[0011] If the first data link layer does not receive the first management frame from the host within a preset time threshold, it records the slave data sent this time as abnormal data and resends the first data packet through the first data link layer.
[0012] If the number of resends exceeds the preset first threshold, the data transmission is determined to have failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0013] According to some embodiments of this application, the method further includes:
[0014] When the first management frame received indicates that the host has failed to receive data, it is determined that the data transmission has failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0015] According to some embodiments of this application, the method further includes:
[0016] The second data packet sent by the host is received through the first data link layer;
[0017] The data is parsed and processed sequentially through the first data link layer and the first communication protocol layer to obtain the first target data.
[0018] A second management frame is generated and sent to the host.
[0019] The chip-to-chip communication method according to a second aspect embodiment of this application, applied to a host, includes:
[0020] When the level signal of the active data transmission pin of the slave device is detected to be low, the first data packet sent by the slave device is received through the second data link layer;
[0021] The first data packet is parsed and processed sequentially through the second data link layer and the second communication protocol layer of the host to obtain the second target data;
[0022] A first management frame is generated and sent to the slave device.
[0023] According to some embodiments of this application, the method further includes:
[0024] The host data is packaged through the host's second communication protocol layer to obtain a second protocol packet;
[0025] The second protocol packet is packaged through the second data link layer of the host to obtain the second data packet;
[0026] The second data packet is sent to the slave device.
[0027] According to some embodiments of this application, the method further includes:
[0028] If the second data link layer does not receive the second management frame from the slave device within a preset time threshold, it records the host data sent this time as abnormal data and resends the second data packet through the second data link layer.
[0029] If the number of resends exceeds the preset second threshold, the data transmission is determined to have failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0030] According to some embodiments of this application, the method further includes:
[0031] When the received second management frame indicates that the slave device has failed to receive data, it is determined that the data transmission has failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0032] According to some embodiments of this application, the method further includes:
[0033] If the number of failures exceeds a preset threshold for the third failure, the I / O pin of the slave device is pulled low to enable the slave device to restart based on the low level.
[0034] An inter-chip communication system according to a third aspect embodiment of this application includes:
[0035] At least one memory;
[0036] At least one processor;
[0037] At least one program;
[0038] The program is stored in the memory, and the processor executes at least one of the programs to implement the method as described in the first aspect embodiment and the second aspect embodiment.
[0039] According to a fourth aspect embodiment of the present application, a computer-readable storage medium stores computer-executable instructions for causing a computer to perform the methods described in the first and second aspect embodiments.
[0040] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0041] The present application will be further described below with reference to the accompanying drawings and embodiments, wherein:
[0042] Figure 1 This is a flowchart illustrating an embodiment of the inter-chip communication method provided in this application.
[0043] Figure 2 A schematic flowchart illustrating an inter-chip communication method provided in another embodiment of this application;
[0044] Figure 3 This is an interactive schematic diagram of an inter-chip communication method provided in one embodiment of this application;
[0045] Figure 4 A schematic flowchart illustrating an inter-chip communication method provided in another embodiment of this application;
[0046] Figure 5 This is a schematic diagram of the structure of an inter-chip communication system provided in one embodiment of this application.
[0047] Figure label:
[0048] Memory 200, processor 300. Detailed Implementation
[0049] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0050] It should be noted that although functional modules are divided in the system diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the system or the order in the flowchart. The terminology in the specification, claims, and the foregoing figures is used to distinguish similar objects and is not necessarily used to describe a specific order or sequence.
[0051] In the description of this application, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.
[0052] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.
[0053] In the description of this application, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0054] The following reference Figure 1-4 This application describes an inter-chip communication method according to an embodiment of the present application.
[0055] Understandably, referring to Figure 1 This paper provides an inter-chip communication method for use in a slave device, the method comprising:
[0056] Step S100: The slave data is packaged through the slave's first communication protocol layer to obtain the first protocol packet;
[0057] Step S110: Pack the first protocol packet into the first data link layer of the slave device to obtain the first data packet;
[0058] Step S120: Pull the slave's active data upload pin to a low level so that the master can detect the low level and read the slave data based on the low level;
[0059] Step S130: Send the first data packet to the host.
[0060] First, the slave data is packaged through the slave's first communication protocol layer to obtain a first protocol packet. Second, the first protocol packet is packaged through the slave's first data link layer to obtain a first data packet. Then, the slave's active data upload pin is pulled low to allow the master to detect the low level and read the slave data accordingly. Finally, the first data packet is sent to the master. This chip-to-chip communication method, by pulling the slave's active data upload pin low, allows the master to actively read the data sent by the slave when it detects the low level. In other words, compared to the previous method where the master automatically enters the working mode via software, this method allows the master to enter the working mode more quickly through hardware passive triggering, shortening the data transmission time and resulting in a faster data interaction frequency within the same time frame. Therefore, this chip-to-chip communication method ensures timely data transmission and makes data interaction faster.
[0061] It should be noted that the slave data is packaged through the slave's first communication protocol layer, including:
[0062] Based on the slave data, a first length field, a first flow field, and a first type field are added, and the data is packaged through the first communication protocol layer.
[0063] It should be noted that the packaged slave data is repackaged through the slave's first data link layer, including:
[0064] Based on the first protocol packet, a first check field, a first frame header, and a first control field are added, and the packet is repackaged through the first data link layer.
[0065] It is understandable that, such as Figure 3 and Figure 4 As shown, the method also includes:
[0066] If the first data link layer does not receive the first management frame from the host within a preset time threshold, it records the slave data sent this time as abnormal data and resends the first data packet through the first data link layer.
[0067] If the number of resends exceeds the preset first threshold, the data transmission is determined to have failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0068] It should be noted that the time threshold is 20 milliseconds (ms). If the data sent by the master and slave chips during communication does not receive a reply acknowledgment packet containing a management frame within 20ms, it is determined to be a timeout and a retransmission operation is performed.
[0069] It should be noted that if the communication completion flag cannot be reset within 1 second, the communication is considered abnormal and the host will perform a communication self-restart operation.
[0070] It should be noted that the threshold for the first count is 3.
[0071] It should be noted that the first management frame is used to indicate one of the following: successful frame reception, frame full, frame lost, insufficient buffer, data frame error, or duplicate frame received.
[0072] It is understandable that, such as Figure 3 and Figure 4 As shown, the method also includes:
[0073] When the first management frame received indicates that the host has failed to receive data, it is determined that the data transmission has failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0074] It is understandable that, such as Figure 3 and Figure 4 As shown, the method also includes:
[0075] Receive the second data packet sent by the host through the first data link layer;
[0076] The data is parsed and processed sequentially through the first data link layer and the first communication protocol layer to reach the first target data.
[0077] Generate a second management frame and send it to the host.
[0078] It should be noted that the second management frame can be interpreted as indicating successful data reception or failure to receive data. If the second target data cannot be parsed, it indicates that the data reception has failed; if the first target data is obtained, it indicates that the data reception has been successful.
[0079] Understandably, referring to Figure 2 This paper provides an inter-chip communication method for use in a host computer, the method comprising:
[0080] Step S200: When the level signal of the active data transmission pin of the slave device is detected to be low, the first data packet sent by the slave device is received through the second data link layer;
[0081] Step S210: The first data packet is parsed and processed sequentially through the second data link layer and the second communication protocol layer of the host to obtain the second target data;
[0082] Step S220: Generate a first management frame and send the first management frame to the slave device.
[0083] It is understandable that, such as Figure 3 and Figure 4As shown, the method also includes:
[0084] The host data is packaged through the host's second communication protocol layer to obtain a second protocol packet;
[0085] The second protocol packet is packaged through the host's second data link layer to obtain the second data packet;
[0086] The second data packet is sent to the slave device.
[0087] It is understandable that, such as Figure 3 and Figure 4 As shown, the method also includes:
[0088] If the second data link layer does not receive the second management frame from the slave device within the preset time threshold, it records the master data sent this time as abnormal data and resends the second data packet through the second data link layer.
[0089] If the number of resends exceeds the preset second threshold, the data transmission is determined to have failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0090] It should be noted that the threshold for the second count is 3 times.
[0091] It is understandable that, such as Figure 3 and Figure 4 As shown, the method also includes:
[0092] When the received second management frame indicates that the slave device has failed to receive data, it is determined that the data transmission has failed, and the reason for the failure is recorded and the number of failures is accumulated.
[0093] It is understandable that, such as Figure 3 and Figure 4 As shown, the method also includes:
[0094] If the number of failures exceeds the preset threshold for the third failure, the slave's I / O pin will be pulled low to enable the slave to restart based on the low level.
[0095] Understandably, the threshold for the third count is 5.
[0096] In related technologies, inter-chip communication has the following problems:
[0097] The communication content and communication method are highly coupled, the code structure is complex, and when the communication method changes, the code needs to be modified significantly, resulting in low code reusability.
[0098] In active mode or low-power mode, communication can only be achieved by the master waking up the slave. When the slave has data to send, it must wait for the master to wake it up automatically before it can send data. There may be a delay in the master receiving data, which limits the application scenarios.
[0099] Poor communication stability, lack of exception handling and restart mechanisms;
[0100] The master cannot restart the slave when it detects that it cannot communicate with the slave.
[0101] Based on this, embodiments of this application provide an inter-chip communication method and a storage medium, which have the following technical effects:
[0102] By dividing both the host and slave devices into a data link layer and a communication protocol layer, the data link layer can ensure communication stability and manage frame processing, while the communication protocol layer can handle specific communication content and optimize code structure.
[0103] By setting an active data upload pin, that is, setting one of the slave's I / O pins as an active data upload pin, the master can be woken up through the I / O pin, so that the slave can also wake up the master normally and upload data.
[0104] The addition of timeout handling mechanisms, retransmission mechanisms, and communication restart mechanisms improves communication stability.
[0105] Another I / O pin of the slave device is set as a reset pin, which can actively restart the slave device when the master detects a communication abnormality.
[0106] The following reference Figure 3-4 This application describes an inter-chip communication method according to an embodiment of the present application.
[0107] Understandably, referring to Figure 3 and Figure 4 A chip-to-chip communication method is provided, the method including:
[0108] Step 1: Host data is packaged at the communication protocol layer and transmitted to the data link layer;
[0109] It should be noted that communication protocols categorize information types. If a parent class and a child class have many data types, they can be further divided into sub-subclasses.
[0110] It should be noted that packaging adds length, stream, and type fields to the useful information.
[0111] Step 2: The host's data link layer receives the data from the communication protocol layer and repackages it.
[0112] It should be noted that repackaging involves adding a check field, frame header, and control field to the protocol packet. Furthermore, the control field can be used to indicate which packet is being transmitted and to use specific values as management frames during multi-packet transmission.
[0113] Step 3: During data transmission, the data link layer performs data verification, retransmission, and confirmation, and records abnormal data. If the data is sent three times in a row without receiving a management frame or the received frame is not a successful reception frame, the transmission fails. The reason for the failure and the number of failures are recorded. When the number of failures exceeds 5, the transmission is restarted from the extreme.
[0114] It should be noted that the master pulls the slave's restart pin low, and the slave detects that the restart pin has been pulled low and then restarts.
[0115] It should be noted that if no reply is received within 20ms after the data packet is sent, it is considered a timeout while waiting for a reply, and the packet is defined as abnormal data. Abnormal data types include full frame reception, frame loss, insufficient buffer, data frame error, and duplicate frame.
[0116] It should be noted that verification involves using specific algorithms to check the data and see if it has been lost during transmission.
[0117] Retransmission: When the verification data fails, a management frame is sent to the sender to request the data again;
[0118] Confirmation: After the data verification is successful, a confirmation packet needs to be sent to the sender.
[0119] Step 4: The slave device receives the data at the data link layer, parses the data, and transmits it to the communication protocol layer.
[0120] It should be noted that data parsing refers to stripping the length field, flow field, and type field added to data packets by the data link layer.
[0121] Step 5: After the slave device's communication protocol layer processes the data and parses it into useful data, the transmission ends.
[0122] It should be noted that data processing refers to removing the checksum field, frame header, and control field added by the communication protocol layer to obtain the useful data.
[0123] Understandably, referring to Figure 3 and Figure 4 A chip-to-chip communication method is provided, the method including:
[0124] Step 1: The slave device data is packaged through the communication protocol layer and transmitted to the data link layer.
[0125] Step 2: After receiving the data from the communication protocol layer, the slave data link layer repackages it.
[0126] Step 3: When the slave device sends data, it first pulls the slave active upload pin low. The master device detects that this pin is pulled low and actively reads the slave device's data. During the data transmission process, the data is verified, retransmitted, and confirmed through the data link layer. Abnormal data is recorded. If the data is sent three times in a row without receiving a management frame or the received frame is not a successful reception frame, the transmission fails. The reason for the failure and the number of times it occurred are recorded.
[0127] Step 4: The host's data link layer receives the data, parses it, and transmits it to the communication protocol layer.
[0128] Step 5: After the host's communication protocol layer processes the data and parses it into useful data, the transmission ends.
[0129] The following reference Figure 5 This application describes an inter-chip communication system according to an embodiment of the present application.
[0130] It is understandable that, such as Figure 5 As shown, the inter-chip communication system includes:
[0131] At least one memory 200;
[0132] At least one processor 300;
[0133] At least one program;
[0134] The program is stored in memory 200, and processor 300 executes at least one program to implement the above-described inter-chip communication method. Figure 5 Take a processor 300 as an example.
[0135] The processor 300 and the memory 200 can be connected via a bus or other means. Figure 5 Take a bus connection as an example.
[0136] The memory 200, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and signals, such as the program instructions / signals corresponding to the inter-chip communication system in the embodiments of this application. The processor 300 executes various functional applications and data processing by running the non-transitory software programs, instructions, and signals stored in the memory 200, thereby implementing the inter-chip communication method of the above-described method embodiments.
[0137] The memory 200 may include a program storage area and a data storage area. The program storage area may store the operating system and application programs required for at least one function; the data storage area may store data related to the inter-chip communication method described above. Furthermore, the memory 200 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 200 may optionally include memory remotely located relative to the processor 300, and these remote memories can be connected to the inter-chip communication system via a network. Examples of such networks include, but are not limited to, the Internet of Things (IoT), software-defined networks, sensor networks, the Internet, enterprise intranets, local area networks (LANs), mobile communication networks, and combinations thereof.
[0138] One or more signals are stored in memory 200, and when executed by one or more processors 300, the inter-chip communication method in any of the above method embodiments is performed. For example, the above-described... Figure 1 and Figure 2 The method in the middle.
[0139] The following reference Figure 5 This application describes a computer-readable storage medium according to embodiments thereof.
[0140] like Figure 5 As shown, a computer-readable storage medium stores computer-executable instructions that are executed by one or more processors 300, for example, by... Figure 5 One or more processors 300 may execute the inter-chip communication method described in the above method embodiments, thereby enabling the processors 300 to perform the inter-chip communication method described above. For example, the above-described method may be executed. Figure 1 and Figure 2 The method in the middle.
[0141] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0142] Based on the above description of the embodiments, those skilled in the art will understand that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media and communication media. As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital multifunction disk or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is known to those skilled in the art that communication media typically contain computer-readable signals, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and can include any information delivery medium.
[0143] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application. Furthermore, unless otherwise specified, the embodiments and features described in the embodiments of this application can be combined with each other.
Claims
1. A chip-to-chip communication method, characterized in that, Applied to a slave device, the method includes: The slave data is packaged through the first communication protocol layer of the slave device to obtain a first protocol packet; The first protocol packet is packaged through the first data link layer of the slave device to add a first check field, a first frame header, and a first control field to the first protocol packet to obtain a first data packet; Pull the slave device's active data upload pin to a low level so that the master device can detect the low level and read the slave device's data based on the low level; Send the first data packet to the host; If the first data link layer does not receive the first management frame from the host within a preset time threshold, it records the slave data sent this time as abnormal data and resends the first data packet through the first data link layer. If the number of resends exceeds the preset first threshold, the data transmission is determined to have failed, and the reason for the failure is recorded and the number of failures is accumulated. When the first management frame received indicates that the host has failed to receive data, it is determined that the data transmission has failed, and the reason for the failure is recorded and the number of failures is accumulated.
2. The inter-chip communication method according to claim 1, characterized in that, The method further includes: The second data packet sent by the host is received through the first data link layer; The data is parsed and processed sequentially through the first data link layer and the first communication protocol layer to obtain the first target data. A second management frame is generated and sent to the host.
3. A chip-to-chip communication method, characterized in that, Applied to a host, the method includes: When the level signal of the active data transmission pin of the slave device is detected to be low, the first data packet sent by the slave device is received through the second data link layer; The first data packet is parsed sequentially through the second data link layer and the second communication protocol layer of the host to obtain the second target data; wherein, the second data link layer parses the first data packet by removing the first check field, the first frame header, and the first control field from the first data packet; Generate a first management frame and send the first management frame to the slave device; The host data is packaged through the host's second communication protocol layer to obtain a second protocol packet; The second protocol packet is packaged through the second data link layer of the host to obtain the second data packet; Send the second data packet to the slave device; Specifically, if the second data link layer does not receive the second management frame from the slave device within a preset time threshold, the master data sent this time is recorded as abnormal data, and the second data packet is resent through the second data link layer; if the number of resentments exceeds a preset second threshold, the data transmission is determined to have failed, and the reason for the failure is recorded and the number of failures is accumulated; if the received second management frame indicates that the slave device has failed to receive the data, the data transmission is determined to have failed, and the reason for the failure is recorded and the number of failures is accumulated.
4. The chip-to-chip communication method according to claim 3, characterized in that, The method further includes: If the number of failures exceeds a preset threshold for the third failure, the I / O pin of the slave device is pulled low to enable the slave device to restart based on the low level.
5. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to perform the method as described in any one of claims 1 to 4.
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