Array substrate and display device

Abstract

An embodiment of the present invention provides an array substrate and a display device. By disposing auxiliary electrode lines electrically connected to common electrodes in the display area, the auxiliary electrode lines and the common electrodes are equivalent to being connected in parallel, which can reduce the resistance of the common electrodes, thereby reducing the RC loading of the Vcom signal during transmission. In addition, the Vcom signal is not only transmitted from the edge of the display area to the center of the display area through the common signal transmission structure, but also transmitted to the auxiliary electrode lines in the display area, and then transmitted to the common electrodes by the auxiliary electrode lines. In this way, the speed at which the Vcom signal in the middle of the screen recovers to the reference value can be increased, so that the recovery speed of the Vcom signal of the entire surface is roughly the same, thereby ensuring the uniformity of the Vcom signal of the entire surface, reducing the voltage difference between positive and negative frames, improving the fliker and crosstalk problems of liquid crystal display, and enhancing the display effect.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to an array substrate and a display device. Background Art

[0002] Thin Film Transistor Liquid Crystal Displays (TFT-LCDs) feature compact size, low power consumption, high image quality, zero radiation, and portability. They have experienced rapid development in recent years, gradually replacing traditional cathode ray tube (CRT) displays and dominating the current flat-panel display market. Currently, TFT-LCDs are widely used in a variety of large, medium, and small-sized products, encompassing nearly every major electronic product in today's information society, including LCD TVs, high-definition digital TVs, computers (desktop and laptop), mobile phones, tablets, navigation systems, in-car displays, projection displays, camcorders, digital cameras, electronic watches, calculators, electronic instruments, meters, public displays, and virtual displays. Summary of the Invention

[0003] Embodiments of the present invention provide an array substrate and a display device for improving the uniformity of a Vcom signal across a liquid crystal display.

[0004] An embodiment of the present invention provides an array substrate, including:

[0005] a base substrate, the base substrate having a display area and a peripheral area arranged around the display area;

[0006] A common electrode is provided on the entire surface of the display area;

[0007] a common signal transmission structure, disposed in the peripheral area and surrounding the display area, the common signal transmission structure being electrically connected to the common electrode;

[0008] At least one auxiliary electrode line is disposed in the display area, with both ends of the auxiliary electrode line electrically connected to the common signal transmission structure, and a portion between the two ends of the auxiliary electrode line electrically connected to the common electrode.

[0009] Optionally, the above-mentioned array substrate provided in an embodiment of the present invention further includes a plurality of gate lines arranged in the display area and located between the layer where the common electrode is located and the base substrate, the auxiliary electrode lines are arranged in the same layer as the gate lines, the extension direction of the auxiliary electrode lines is the same as the extension direction of the gate lines, and the orthographic projection of the auxiliary electrode lines on the base substrate does not overlap with the orthographic projection of the gate lines on the base substrate.

[0010] Optionally, in the array substrate provided by an embodiment of the present invention, the display area includes a plurality of sub-pixels arranged in an array, and each row of the sub-pixels is correspondingly provided with one auxiliary electrode line.

[0011] Optionally, in the array substrate provided by an embodiment of the present invention, a portion between two ends of each auxiliary electrode line has a plurality of connection points electrically connected to the common electrode and arranged at intervals.

[0012] Optionally, in the array substrate provided by an embodiment of the present invention, the same number of sub-pixels are spaced between two adjacent connection points on each auxiliary electrode line.

[0013] Optionally, in the array substrate provided by an embodiment of the present invention, the connection points on two adjacent auxiliary electrode lines are staggered.

[0014] Optionally, in the array substrate provided by an embodiment of the present invention, in every two adjacent auxiliary electrode lines, one connection point on one of the auxiliary electrode lines corresponds to a middle position between two adjacent connection points on the other auxiliary electrode line.

[0015] Optionally, the array substrate provided in the embodiment of the present invention further includes a plurality of data lines arranged in the display area and located between the layer where the gate lines are located and the layer where the common electrodes are located, and the common signal transmission structure is arranged in the same layer as the data lines.

[0016] Optionally, the array substrate provided in an embodiment of the present invention further includes a plurality of connection parts arranged in the display area and in the same layer as the data lines and insulated, and each connection point on each auxiliary electrode line is electrically connected to the common electrode through the corresponding connection part.

[0017] Optionally, the array substrate provided in the embodiment of the present invention further comprises: an interlayer insulating layer provided between the layer where the gate lines are located and the layer where the data lines are located, and a planar layer provided between the layer where the data lines are located and the layer where the common electrodes are located;

[0018] The connection point on each auxiliary electrode line is electrically connected to the corresponding connection portion through a first via hole penetrating the interlayer insulating layer, and the connection portion is electrically connected to the common electrode through a second via hole penetrating the planar layer;

[0019] Both ends of each of the auxiliary electrode lines are electrically connected to the common signal transmission structure through a third via hole penetrating the interlayer insulating layer;

[0020] The common signal transmission structure is electrically connected to the common electrode through a fourth via hole penetrating the planar layer.

[0021] Optionally, in the above array substrate provided by an embodiment of the present invention, the sub-pixel includes a thin film transistor and a pixel electrode, and the pixel electrode is located on a side of the layer where the common electrode is located away from the base substrate;

[0022] The array substrate further comprises: a passivation layer disposed between the layer where the common electrode is located and the layer where the pixel electrode is located, and a gate insulating layer disposed between the layer where the gate line is located and the base substrate;

[0023] The thin film transistor includes: an active layer arranged between the gate insulating layer and the base substrate, a gate arranged on the same layer as the gate line, and a source and a drain arranged on the same layer as the data line; wherein the gate line is electrically connected to the gate, the data line is electrically connected to the source, and the pixel electrode is electrically connected to the drain via a fifth via hole that sequentially penetrates the passivation layer, the common electrode, and the planar layer.

[0024] Optionally, the above-mentioned array substrate provided in an embodiment of the present invention further includes: a buffer layer arranged between the active layer and the base substrate, and a light-shielding layer arranged between the buffer layer and the base substrate; the orthographic projection of the light-shielding layer on the base substrate at least covers the orthographic projection of the active layer on the base substrate.

[0025] Optionally, in the above-mentioned array substrate provided in an embodiment of the present invention, the peripheral area includes: a fan-shaped routing area, and a driving chip arranged on the side of the fan-shaped routing area away from the display area; the common signal transmission structure is electrically connected to the driving chip through the routing located in the fan-shaped routing area.

[0026] Optionally, the above-mentioned array substrate provided in an embodiment of the present invention further includes a first gate driving circuit and a second gate driving circuit arranged at both ends of the gate line, the first gate driving circuit is electrically connected to the first end of each of the gate lines, and the second gate driving circuit is electrically connected to the second end of each of the gate lines.

[0027] Correspondingly, an embodiment of the present invention also provides a display device, including an array substrate and an opposing substrate arranged opposite to each other, a liquid crystal layer located between the array substrate and the opposing substrate, and a backlight module located on the light incident side of the array substrate; wherein, the array substrate is the above-mentioned array substrate provided in an embodiment of the present invention.

[0028] The beneficial effects of the embodiments of the present invention are as follows:

[0029] An array substrate and a display device provided by an embodiment of the present invention include at least one auxiliary electrode line electrically connected to a common signal transmission structure provided in a display area, and a portion between the two ends of the auxiliary electrode line electrically connected to the common electrode. In this way, the auxiliary electrode line and the common electrode are equivalent to being connected in parallel, which can reduce the resistance of the common electrode, thereby reducing the RC loading of the Vcom signal during transmission. In addition, the Vcom signal is not only transmitted from the edge of the display area to the center of the display area through the common signal transmission structure, but is also transmitted to the auxiliary electrode line in the display area and transmitted to the common electrode by the auxiliary electrode line. In this way, the speed at which the Vcom signal in the middle of the screen recovers to the reference value can be increased, thereby making the recovery speed of the Vcom signal of the entire surface roughly the same, ensuring the uniformity of the Vcom signal of the entire surface, reducing the voltage difference between positive and negative frames, improving the fliker and crosstalk problems of the liquid crystal display, and enhancing the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic structural diagram of an array substrate provided in the related art;

[0031] Figure 2 A schematic structural diagram of an array substrate provided by an embodiment of the present invention;

[0032] Figure 3 A schematic diagram of a local layout of an array substrate provided in an embodiment of the present invention;

[0033] Figure 4 for Figure 3 Schematic diagram of the cross section along CC' direction;

[0034] Figure 5 Schematic diagram of simulation results when charging a conventional common electrode;

[0035] Figure 6 This is a schematic diagram of simulation results when the common electrode provided by the present invention is charged;

[0036] Figure 7 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings of the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. And in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. Based on the described embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] Unless otherwise defined, the technical or scientific terms used in the present invention shall have the usual meanings understood by persons of ordinary skill in the field to which the present invention belongs. The words “include” or “comprise” and the like used in the present invention mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as “connect” or “connected” and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Inside”, “outside”, “upper”, “lower”, etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0039] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present invention. The same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions.

[0040] LCD displays use the electric field between the pixel electrode and the common electrode to control the deflection angle of the liquid crystal. To prevent liquid crystal polarization, the pixel voltage polarity must be continuously reversed. For example, during frame inversion, when the image switches between positive and negative frames, the Vcom signal (common voltage) must promptly return to 0V to maintain a stable voltage difference between the two frames. If the voltage difference varies, the deflection angle of the liquid crystal molecules will vary, resulting in different light transmission brightness, which can cause flicker and crosstalk on the screen. Because the Vcom signal is provided by an IC, its signal strength across the screen can vary due to different RC loading locations. Drift in the Vcom signal's baseline value (0V) can cause a larger difference in pixel voltage Vp during positive and negative frame transitions, resulting in flicker. Furthermore, the varying polarity of the positive and negative signals across the entire screen caused by the varying recovery capabilities of the Vcom signal can also cause crosstalk.

[0041] The Vcom designs of the existing LCD displays on the market all use IC to directly send signals to the entire common electrode layer, such as Figure 1 As shown, Figure 1 The figure shows the common electrode layer design structure of current LCD products. The Vcom signal is input from the IC via common electrode trace 01 to Vcom ring 02 (common signal transmission structure). Vcom ring 02 is a metal ring formed by the source / drain metal layer (SD) surrounding the display area AA. Via hole 03 in the planar layer, the Vcom signal on Vcom ring 02 is connected to the common electrode layer 04, a metal layer composed of ITO (indium tin oxide) that extends across the entire display area AA. This results in a greater RC loading in the center of the screen than at the periphery. From the moment the Vcom signal enters the display area AA, the RC loading of the common electrode layer 04 gradually increases as the signal travels from the edge to the center. As a result, the Vcom signal in the center of the screen recovers more slowly to its baseline value, resulting in uneven voltage across the entire common electrode layer 04, which in turn causes fliker and crosstalk issues. Therefore, ensuring uniform recovery across the entire surface of the common electrode layer 04—that is, ensuring Vcom signal uniformity across the entire surface—is a key factor in resolving fliker and crosstalk issues.

[0042] In view of this, in order to improve the uniformity of the entire Vcom signal, an embodiment of the present invention provides an array substrate, such as Figure 2-Figure 4 As shown, Figure 2 is a planar schematic diagram of an array substrate, Figure 3 It is a schematic diagram of the local layout of the array substrate. Figure 4 for Figure 3 The cross-sectional view along the CC' direction is shown in FIG. 1 , wherein the array substrate comprises:

[0043] A base substrate 1, the base substrate 1 having a display area AA and a peripheral area BB arranged around the display area AA; optionally, the base substrate 1 may be a rigid substrate such as a glass substrate;

[0044] Common electrode 2 is provided on the entire surface of display area AA; optionally, the material of common electrode 2 includes transparent conductive materials such as indium tin oxide (ITO) and indium zinc oxide (IZO);

[0045] A common signal transmission structure 3 is provided in the peripheral area BB and surrounds the display area AA, and the common signal transmission structure 3 is electrically connected to the common electrode 2;

[0046] At least one auxiliary electrode line 4 is provided in the display area AA, both ends of the auxiliary electrode line 4 are electrically connected to the common signal transmission structure 3 , and the portion between the two ends of the auxiliary electrode line 4 is electrically connected to the common electrode.

[0047] The array substrate provided by an embodiment of the present invention has at least one auxiliary electrode line electrically connected to a common signal transmission structure provided in the display area, and the portion between the two ends of the auxiliary electrode line is electrically connected to the common electrode. In this way, the auxiliary electrode line and the common electrode are equivalent to being connected in parallel, which can reduce the resistance of the common electrode, thereby reducing the RC loading of the common voltage (hereinafter referred to as Vcom) signal during transmission. Moreover, the Vcom signal is not only transmitted from the edge of the display area to the center of the display area through the common signal transmission structure, but also transmitted to the auxiliary electrode line in the display area, and then transmitted to the common electrode by the auxiliary electrode line. In this way, the speed at which the Vcom signal in the middle of the screen recovers to the reference value can be increased, thereby making the recovery speed of the Vcom signal of the entire surface roughly the same, ensuring the uniformity of the Vcom signal of the entire surface, reducing the voltage difference between positive and negative frames, improving the fliker and crosstalk problems of the liquid crystal display, and enhancing the display effect.

[0048] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2-Figure 4 As shown, the display device further includes a plurality of gate lines (G_1, G_2, ...) disposed within the display area AA and between the layer where the common electrode 2 is located and the base substrate 1. Auxiliary electrode lines 4 are disposed on the same layer as the gate lines (G_1, G_2, ...). The auxiliary electrode lines 4 extend in the same direction as the gate lines (G_1, G_2, ...), and the orthographic projections of the auxiliary electrode lines 4 on the base substrate 1 do not overlap with the orthographic projections of the gate lines (G_1, G_2, ...) on the base substrate 1. In this way, the auxiliary electrode lines 4 and the gate line patterns can be formed in a single patterning process by simply changing the original pattern when forming the gate lines. There is no need to add a separate process for preparing the auxiliary electrode lines 4, which simplifies the preparation process, saves production costs, and improves production efficiency.

[0049] Optionally, the material of the gate line may include metals such as molybdenum (Mo), aluminum (Al), titanium (Ti), chromium (Cr), and nickel (Ni), and the gate line may be a single-layer structure or a stacked-layer structure, for example, the gate line is a single-layer structure composed of a molybdenum metal layer.

[0050] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2 As shown, the display area AA includes a plurality of sub-pixels P arranged in an array, with one auxiliary electrode line 4 corresponding to each row of sub-pixels P. This ensures that the Vcom signal at each row of sub-pixels P is simultaneously restored to the reference value, further improving the uniformity of the Vcom signal across the entire screen.

[0051] Optionally, the auxiliary electrode lines 4 corresponding to each row of sub-pixels P may be located on the upper side or the lower side of the row of sub-pixels P. Figure 2It is taken as an example that the auxiliary electrode lines 4 corresponding to each row of sub-pixels P are located at the lower side of the sub-pixels P in the row.

[0052] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2 As shown, the portion between the two ends of each auxiliary electrode line 4 has multiple connection points D that are electrically connected to the common electrode 2 and are spaced apart. This ensures that the Vcom signal reaches all points on the entire surface at the same time, further improving the uniformity of the Vcom signal on the entire surface.

[0053] It should be noted that the connection point D refers to a position on the auxiliary electrode line 4 that needs to be electrically connected to the common electrode 2 .

[0054] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2 As shown, the spacing between two adjacent connection points D on each auxiliary electrode line 4 is the same number of sub-pixels P. This allows for a uniform distribution of the electrical connection points D, further improving the uniformity of the Vcom signal across the entire surface. For example, the spacing between two adjacent connection points D is 20 sub-pixels P, but this is not limited to this.

[0055] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2 As shown, the connection points D on two adjacent auxiliary electrode lines 4 are staggered, which can make the connection points D more evenly distributed in the display area AA, and further improve the uniformity of the entire Vcom signal.

[0056] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2 As shown, in every two adjacent auxiliary electrode lines 4, a connection point D on one auxiliary electrode line 4 corresponds to the middle position between two adjacent connection points D on the other auxiliary electrode line 4. This allows connection points D to be provided at all positions within the display area AA, further improving the uniformity of the Vcom signal across the entire surface.

[0057] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 3 and Figure 4 As shown, multiple data lines (D_1, D_2, ...) are also provided in the display area AA and located between the layer where the gate lines (G_1, G_2, ...) reside and the layer where the common electrode 2 resides. The common signal transmission structure 3 is provided on the same layer as the data lines (D_1, D_2, ...). This allows the common signal transmission structure 3 and the data lines to be formed in a single patterning process simply by changing the original pattern when forming the data lines. This eliminates the need for a separate process for preparing the common signal transmission structure 3, simplifying the manufacturing process, reducing production costs, and improving production efficiency.

[0058] Optionally, the material of the data line may include metals such as molybdenum (Mo), aluminum (Al), titanium (Ti), chromium (Cr), and nickel (Ni), and the data line may be a single-layer structure or a stacked structure, for example, the data line may be a stacked structure consisting of a titanium metal layer / aluminum metal layer / titanium metal layer.

[0059] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2-Figure 4 As shown, multiple connecting portions 6 are provided in the display area AA and are insulated from and on the same layer as the data lines (D_1, D_2, ...). Each connection point D on each auxiliary electrode line 4 is electrically connected to the common electrode 2 via a corresponding connecting portion 6. Thus, the connecting portions 6 located on the layer where the data lines are located can electrically connect the auxiliary electrode lines 4 located on the layer where the gate lines are located to the common electrode 2, thereby reducing the resistance of the common electrode 2 and ensuring that the Vcom signal reaches all points on the entire screen at the same time.

[0060] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 4 As shown, it also includes: an interlayer insulating layer 7 provided between the layer where the gate lines (G_1, G_2, ...) are located and the layer where the data lines (D_1, D_2, ...) are located, and a planar layer 8 provided between the layer where the data lines (D_1, D_2, ...) are located and the layer where the common electrode 2 is located;

[0061] like Figure 2-Figure 4 As shown, the connection point D on each auxiliary electrode line 4 is electrically connected to the corresponding connection portion 6 through a first via hole V1 penetrating the interlayer insulating layer 7, and the connection portion 6 is electrically connected to the common electrode 2 through a second via hole V2 penetrating the planar layer 8;

[0062] like Figure 2 As shown, both ends of each auxiliary electrode line 4 are electrically connected to the common signal transmission structure 3 through a third via hole V3 penetrating the interlayer insulating layer 7;

[0063] like Figure 2 As shown, the common signal transmission structure 3 is electrically connected to the common electrode 2 through a fourth via hole V4 penetrating the planar layer 8 .

[0064] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2-Figure 4 As shown, the sub-pixel P includes a thin film transistor T and a pixel electrode 9. The pixel electrode 9 is located on a side of the layer where the common electrode 2 is located away from the base substrate 1.

[0065] The array substrate further includes: a passivation layer 10 disposed between the layer where the common electrode 2 is located and the layer where the pixel electrode 9 is located, and a gate insulating layer 11 disposed between the layer where the gate lines (G_1, G_2, ...) are located and the base substrate 1;

[0066] The thin film transistor includes an active layer 12 disposed between a gate insulating layer 11 and a base substrate 1, a gate G disposed on the same layer as gate lines (G_1, G_2, ...), and a source S and a drain D disposed on the same layer as data lines (D_1, D_2, ...). The gate lines (G_1, G_2, ...) are electrically connected to the gate G, the data lines (D_1, D_2, ...) are electrically connected to the source S, and the pixel electrode 9 is electrically connected to the drain D via a fifth via V5 that sequentially penetrates the passivation layer 10, the common electrode 2, and the planar layer 8. Thus, when the liquid crystal display is displaying, a Vcom signal is applied to the common electrode via the common signal transmission structure 3, and data is applied to the pixel electrode 9 via the thin film transistor T. This creates an electric field between the common electrode 2 and the pixel electrode 9, causing the liquid crystal layer to deflect under the action of the electric field, thereby achieving display.

[0067] In some embodiments, the thin film transistor can be a P-type transistor or an N-type transistor. The thin film transistor can be a top-gate transistor provided in the embodiment of the present invention, or a bottom-gate transistor or a double-gate transistor, etc., which is not limited here.

[0068] In some embodiments, the material of the active layer can be amorphous silicon (a-Si), polycrystalline silicon (poly), oxide (Oxide, such as indium gallium zinc oxide IGZO), etc., and the material of the gate insulating layer can be at least one of inorganic insulating materials such as silicon oxide, silicon nitride, and silicon oxynitride.

[0069] In some embodiments, the material of the passivation layer may be at least one of inorganic insulating materials such as silicon oxide, silicon nitride, and silicon oxynitride. The material of the planarization layer may include at least one of organic insulating materials such as polymethyl methacrylate (also known as acrylic), polyacrylic resin, polyepoxy acrylic resin, photosensitive polyimide resin, polyester acrylate, polyurethane acrylate resin, and novolac epoxy resin, without limitation herein.

[0070] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 3 and Figure 4 As shown, the thin film transistor T further includes: a buffer layer 13 disposed between the active layer 12 and the base substrate 1, and a light shielding layer 14 disposed between the buffer layer 13 and the base substrate 1; the orthographic projection of the light shielding layer 14 on the base substrate 1 at least covers the orthographic projection of the active layer 12 on the base substrate 1. This can prevent light from irradiating the active layer 12 of the thin film transistor T, thereby improving the stability of the thin film transistor.

[0071] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2As shown, the peripheral area BB includes a fan-shaped routing area EE and a driver chip (IC) located on the side of the fan-shaped routing area EE away from the display area AA. The common signal transmission structure 3 is electrically connected to the driver chip (IC) via a routing 15 located in the fan-shaped routing area EE. During display, the driver chip (IC) transmits the Vcom signal to the common signal transmission structure 3 via routing 15. The common signal transmission structure 3 then transmits the Vcom signal to the connection portions 6 at each connection point D of the auxiliary electrode line 4. This allows the Vcom signal to be simultaneously transmitted to the common electrode 2 via each connection portion 6, ensuring that the Vcom signal at any position on the common electrode 2 is simultaneously restored to the baseline value, thereby improving the uniformity of the Vcom signal across the entire surface.

[0072] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2 As shown, the peripheral area BB further includes a flexible printed circuit (FPC) disposed on a side of the driving chip (IC) away from the display area AA. The FPC can be used to transmit signals to the IC.

[0073] In a specific implementation, in the above array substrate provided in the embodiment of the present invention, if Figure 2 As shown, the system further includes a first gate driving circuit 100 and a second gate driving circuit 200 ( Figure 2 (Exhibited as a GOA circuit), a first gate drive circuit 100 is electrically connected to the first end of each gate line (G_1, G_2, ...), and a second gate drive circuit 200 is electrically connected to the second end (G_1, G_2, ...) of each gate line. In other words, in this embodiment of the present invention, the first gate drive circuit 100 and the second gate drive circuit 200 are used to simultaneously charge the gate lines, i.e., a bilateral drive method is used to drive the gate lines. This improves charging efficiency while preventing the problem of insufficient remote charging rate that occurs with unilateral drive.

[0074] Of course, in specific implementation, for small-sized products, the embodiment of the present invention may also adopt a unilateral driving method to drive the gate lines.

[0075] Specifically, the first gate driving circuit 100 and the second gate driving circuit 200 each include a plurality of cascaded shift registers (GOAs), wherein a scan signal output terminal of each shift register is electrically connected to a gate line in a one-to-one correspondence, for providing a scan signal to the gate line.

[0076] like Figure 5 and Figure 6 As shown, Figure 5This diagram shows the simulation results for conventional common electrode charging. When the gate line (represented by the gate) is turned on and off, coupling through the common electrode affects the Vcom signal. When the gate is on (high level), the pixel is charging, and its impact is generally not considered. When the gate is closed (beginning with the falling edge), pixel charging ends. At this point, the Vcom signal is pulled low (at circle A) due to coupling, while the IC's Vcom signal pulls the Vcom voltage back to 0V. At this point, due to differences in RC loading, the Vcom signal recovery across the entire surface is asynchronous, resulting in a large voltage difference at circle A, which in turn causes fliker and crosstalk. Figure 6 This is a schematic diagram of the simulation results of the common electrode charging provided by the present invention. It can be seen that by connecting auxiliary electrode lines in parallel to increase the number of points where the Vcom signal enters the common electrode, the recovery ability of the Vcom signal can be greatly improved (at the position of circle B). It can be seen that the position of circle B basically recovers to the baseline value of the Vcom signal. Therefore, the embodiment of the present invention can ensure the uniformity of the Vcom signal on the entire surface, thereby solving the fliker and crosstalk problems, and at the same time can also enhance the anti-ESD capability of the common electrode.

[0077] Based on the same inventive concept, an embodiment of the present invention provides a display device, such as Figure 7 As shown, it includes: an array substrate 001 and an opposite substrate 002 arranged opposite to each other, a liquid crystal layer 003 located between the array substrate 001 and the opposite substrate 002, and a backlight module 004 located on the light incident side of the array substrate 001; wherein the array substrate 001 is provided in an embodiment of the present invention Figure 2-Figure 4 Since the principle of the display device to solve the problem is similar to that of the above array substrate, the implementation of the display device can refer to the embodiment of the above array substrate, and the repeated parts will not be repeated.

[0078] In some embodiments, in the above-mentioned display device provided by the embodiment of the present invention, the backlight module 004 can be a direct-type backlight module or an edge-type backlight module. Optionally, the edge-type backlight module may include a light bar, a stacked reflective sheet, a light guide plate, a diffuser, a prism group, etc., and the light bar is located on one side of the thickness direction of the light guide plate. The direct-type backlight module may include a matrix light source, a reflective sheet, a diffuser and a brightening film stacked on the light-emitting side of the matrix light source, etc., and the reflective sheet includes an opening arranged directly opposite to the position of each lamp bead in the matrix light source. The lamp beads in the light bar and the lamp beads in the matrix light source can be light-emitting diodes (LEDs), such as micro light-emitting diodes (Mini LED, Micro LED, etc.).

[0079] Submillimeter or even micron-scale micro-LEDs are self-luminous devices, just like organic light-emitting diodes (OLEDs). Like organic light-emitting diodes, they have a series of advantages such as high brightness, ultra-low latency, and ultra-large viewing angles. And because inorganic light-emitting diodes emit light based on metal semiconductors with more stable properties and lower resistance, they have the advantages of lower power consumption, greater resistance to high and low temperatures, and longer service life compared to organic light-emitting diodes that emit light based on organic matter. And when micro-LEDs are used as backlight sources, more precise dynamic backlight effects can be achieved. While effectively improving screen brightness and contrast, they can also solve the glare phenomenon caused by traditional dynamic backlighting between bright and dark areas of the screen, thereby optimizing the visual experience.

[0080] In some embodiments, the above-mentioned display device provided by the embodiments of the present invention can be: a projector, a 3D printer, a virtual reality device, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, a smart watch, a fitness wristband, a personal digital assistant, and any other product or component with a display function.

[0081] An array substrate and a display device provided by an embodiment of the present invention include at least one auxiliary electrode line electrically connected to a common signal transmission structure provided in a display area, and a portion between the two ends of the auxiliary electrode line electrically connected to the common electrode. In this way, the auxiliary electrode line and the common electrode are equivalent to being connected in parallel, which can reduce the resistance of the common electrode, thereby reducing the RC loading of the Vcom signal during transmission. In addition, the Vcom signal is not only transmitted from the edge of the display area to the center of the display area through the common signal transmission structure, but is also transmitted to the auxiliary electrode line in the display area and transmitted to the common electrode by the auxiliary electrode line. In this way, the speed at which the Vcom signal in the middle of the screen recovers to the reference value can be increased, thereby making the recovery speed of the Vcom signal of the entire surface roughly the same, ensuring the uniformity of the Vcom signal of the entire surface, reducing the voltage difference between positive and negative frames, improving the fliker and crosstalk problems of the liquid crystal display, and enhancing the display effect.

[0082] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0083] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if such changes and modifications of the embodiments of the present invention fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. An array substrate, characterized in that: include: a base substrate, the base substrate having a display area and a peripheral area arranged around the display area; A common electrode is provided on the entire surface of the display area; a common signal transmission structure, disposed in the peripheral area and surrounding the display area, the common signal transmission structure being electrically connected to the common electrode; at least one auxiliary electrode line, disposed in the display area, wherein both ends of the auxiliary electrode line are electrically connected to the common signal transmission structure, and a portion between the two ends of the auxiliary electrode line is electrically connected to the common electrode; The display area includes a plurality of sub-pixels arranged in an array, and each row of the sub-pixels is correspondingly provided with one auxiliary electrode line; The auxiliary electrode lines corresponding to the sub-pixels in each row are located on the upper side or the lower side of the sub-pixels in the row.

2. The array substrate according to claim 1, wherein: It also includes a plurality of gate lines arranged in the display area and located between the layer where the common electrode is located and the base substrate, the auxiliary electrode lines are arranged in the same layer as the gate lines, the extension direction of the auxiliary electrode lines is the same as the extension direction of the gate lines, and the orthographic projection of the auxiliary electrode lines on the base substrate does not overlap with the orthographic projection of the gate lines on the base substrate.

3. The array substrate according to claim 2, wherein: A portion between two ends of each auxiliary electrode line has a plurality of connection points electrically connected to the common electrode and arranged at intervals.

4. The array substrate according to claim 3, wherein: The same number of sub-pixels is spaced between two adjacent connection points on each auxiliary electrode line.

5. The array substrate according to claim 4, wherein: The connection points on two adjacent auxiliary electrode lines are staggered.

6. The array substrate according to claim 5, wherein: In every two adjacent auxiliary electrode lines, one connection point on one of the auxiliary electrode lines corresponds to a middle position between two adjacent connection points on the other auxiliary electrode line.

7. The array substrate according to claim 6, wherein: It also includes a plurality of data lines arranged in the display area and located between the layer where the gate lines are located and the layer where the common electrodes are located, and the common signal transmission structure is arranged in the same layer as the data lines.

8. The array substrate according to claim 7, wherein: It also includes a plurality of connection parts that are arranged in the display area and in the same layer as the data lines and are insulated. Each connection point on each auxiliary electrode line is electrically connected to the common electrode through the corresponding connection part.

9. The array substrate according to claim 8, wherein: Also includes: an interlayer insulating layer provided between the layer where the gate lines are located and the layer where the data lines are located, and a planar layer provided between the layer where the data lines are located and the layer where the common electrodes are located; The connection point on each auxiliary electrode line is electrically connected to the corresponding connection portion through a first via hole penetrating the interlayer insulating layer, and the connection portion is electrically connected to the common electrode through a second via hole penetrating the planar layer; Both ends of each of the auxiliary electrode lines are electrically connected to the common signal transmission structure through a third via hole penetrating the interlayer insulating layer; The common signal transmission structure is electrically connected to the common electrode through a fourth via hole penetrating the planar layer.

10. The array substrate according to claim 9, wherein: The sub-pixel includes a thin film transistor and a pixel electrode, and the pixel electrode is located on a side of the layer where the common electrode is located away from the base substrate; The array substrate further comprises: a passivation layer disposed between the layer where the common electrode is located and the layer where the pixel electrode is located, and a gate insulating layer disposed between the layer where the gate line is located and the base substrate; The thin film transistor includes: an active layer arranged between the gate insulating layer and the base substrate, a gate arranged on the same layer as the gate line, and a source and a drain arranged on the same layer as the data line; wherein the gate line is electrically connected to the gate, the data line is electrically connected to the source, and the pixel electrode is electrically connected to the drain via a fifth via hole that sequentially penetrates the passivation layer, the common electrode, and the planar layer.

11. The array substrate according to claim 10, wherein: Also includes: a buffer layer disposed between the active layer and the base substrate, and a light shielding layer disposed between the buffer layer and the base substrate; The orthographic projection of the light shielding layer on the base substrate at least covers the orthographic projection of the active layer on the base substrate.

12. The array substrate according to any one of claims 1 to 11, wherein: The peripheral area includes: a fan-shaped wiring area, and a driver chip arranged on a side of the fan-shaped wiring area away from the display area; the common signal transmission structure is electrically connected to the driver chip through wiring located in the fan-shaped wiring area.

13. The array substrate according to any one of claims 2 to 11, wherein: It also includes a first gate driving circuit and a second gate driving circuit arranged at both ends of the gate lines, the first gate driving circuit is electrically connected to the first end of each gate line, and the second gate driving circuit is electrically connected to the second end of each gate line.

14. A display device, characterized in that: It comprises an array substrate and an opposite substrate arranged opposite to each other, a liquid crystal layer located between the array substrate and the opposite substrate, and a backlight module located on the light incident side of the array substrate; wherein the array substrate is the array substrate according to any one of claims 1 to 13.

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