Micro light emitting chip structure and micro display structure

Abstract

The present disclosure provides a micro light emitting chip structure including a first type semiconductor layer, a light emitting layer and a second type semiconductor layer. The second type semiconductor layer has a peripheral side surface and an end surface. The micro light emitting chip structure also includes a first insulating layer covering at least the peripheral side surface and the end surface, a reflective layer disposed on the first insulating layer, and a second insulating layer disposed on the reflective layer. The micro light emitting chip structure further includes an electrode disposed on the end surface and connected to the second type semiconductor layer, and a dielectric structure between the electrode and the reflective layer. The dielectric structure connects the first insulating layer and the second insulating layer and encloses a portion of the reflective layer adjacent to the electrode on the end surface, so that the electrode and the reflective layer are electrically insulated.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a micro light emitting chip structure, and in particular, to a micro light emitting chip structure comprising a reflective layer covering at least the peripheral surface and the end surface of a second-type semiconductor layer and a micro display structure using the same. BACKGROUND

[0002] With the advancement of optoelectronic technology, the volume of many optoelectronic components has gradually developed towards miniaturization. Compared with organic light-emitting diode (OLED) technology, micro light-emitting diode (mLED / μLED) has the advantages of high efficiency, long service life, and relatively stable materials that are not easily affected by the environment. Therefore, displays using micro light-emitting diodes arranged in arrays are gradually gaining attention in the market.

[0003] Recently, in order to further improve the image resolution of displays, the technical trend of micro light-emitting diodes is towards increasing the number of pixels per inch (PPI). In order to achieve the above purpose, reducing the process line width and adopting an array structure with a common electrode are one of the methods to reduce the pixel size of the micro light-emitting chip structure. However, while the pixel size is continuously reduced, the design and manufacture of the micro light-emitting chip structure still faces various challenges. For example, due to the significant reduction in the forward light-emitting area of the micro light-emitting chip structure, it is necessary to make a reflective film layer on the sidewall to recycle light in order to improve the light-emitting efficiency. When the pixel size is smaller, the difficulty of making such a film layer will also be significantly increased, and the micro light-emitting chip structure will be accompanied by more failure risks, and these related problems need to be solved by improving the design of the micro light-emitting chip structure. SUMMARY

[0004] According to some embodiments of the present disclosure, a micro light-emitting chip structure and a micro display structure using the same are provided. The micro light-emitting chip structure comprises a reflective layer covering at least the peripheral surface and the end surface of a second-type semiconductor layer, which can reflect light other than the light-emitting direction to increase the amount of forward light emission, thereby effectively improving the light-emitting efficiency of the micro light-emitting chip structure and the micro display structure using the same.

[0005] Embodiments of the present disclosure include a micro light emitting chip structure. The micro light emitting chip structure includes a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer. The light emitting layer is disposed on the first type semiconductor layer, and the second type semiconductor layer is disposed on a side of the light emitting layer opposite the first type semiconductor layer. The second type semiconductor layer has a peripheral side surface and an end surface connecting the peripheral side surface. The micro light emitting chip structure also includes a first insulating layer, a reflective layer, and a second insulating layer. The first insulating layer covers at least the peripheral side surface and the end surface. The reflective layer is disposed on the first insulating layer and covers at least the peripheral side surface and the end surface. The second insulating layer is disposed on the reflective layer and covers at least the peripheral side surface and the end surface. The micro light emitting chip structure further includes an electrode disposed on the end surface and connected to the second type semiconductor layer. The electrode is adjacent to the reflective layer on the end surface. In addition, the micro light emitting chip structure includes a dielectric structure between the electrode and the reflective layer. The dielectric structure connects the first insulating layer and the second insulating layer and encloses a portion of the reflective layer adjacent to the electrode on the end surface, electrically insulating the electrode from the reflective layer.

[0006] Embodiments of the present disclosure also include a micro display structure. The micro display structure includes a display substrate and a plurality of micro light emitting chip structures. The micro light emitting chip structure includes a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer. The light emitting layer is disposed on the first type semiconductor layer, and the second type semiconductor layer is disposed on a side of the light emitting layer opposite the first type semiconductor layer. The second type semiconductor layer has a peripheral side surface and an end surface connecting the peripheral side surface. The micro light emitting chip structure also includes a first insulating layer, a reflective layer, and a second insulating layer. The first insulating layer covers at least the peripheral side surface and the end surface. The reflective layer is disposed on the first insulating layer and covers at least the peripheral side surface and the end surface. The second insulating layer is disposed on the reflective layer and covers at least the peripheral side surface and the end surface. The micro light emitting chip structure further includes an electrode disposed on the end surface and connected to the second type semiconductor layer. The electrode is adjacent to the reflective layer on the end surface. In addition, the micro light emitting chip structure includes a dielectric structure between the electrode and the reflective layer. The dielectric structure connects the first insulating layer and the second insulating layer and encloses a portion of the reflective layer adjacent to the electrode on the end surface, electrically insulating the electrode from the reflective layer. The electrode is electrically connected to the display substrate. The first insulating layer, the reflective layer, and the second insulating layer extend along the peripheral side surface to the light emitting layer and the first type semiconductor layer and cover a portion of the light emitting layer and the first type semiconductor layer. The micro display structure also includes an ohmic contact layer patterned between the micro light emitting chip structures and electrically connected to the first type semiconductor layer of the micro light emitting chip structures. BRIEF DESCRIPTION OF DRAWINGS

[0007] Embodiments of the present disclosure will be described below with reference to the accompanying drawings. It should be noted that various features are not drawn to scale according to standard conventions in the industry. In fact, the sizes of various features can be exaggerated or reduced to clearly illustrate technical features of embodiments of the present disclosure.

[0008] Figure 1 is a cross-sectional view illustrating a portion of a micro light emitting chip structure according to some embodiments of the present disclosure;

[0009] Figure 2 is a cross-sectional view illustrating a portion of a micro light emitting chip structure according to some embodiments of the present disclosure;

[0010] Figure 3 is a cross-sectional view illustrating a portion of a micro display structure according to some embodiments of the present disclosure;

[0011] Figure 4A is a cross-sectional view illustrating a portion of a micro display structure according to some embodiments of the present disclosure;

[0012] Figure 4B is a top view illustrating a portion of a micro display structure according to some embodiments of the present disclosure;

[0013] Figure 5 is a cross-sectional view illustrating a portion of a micro display structure according to some other embodiments of the present disclosure;

[0014] Figure 6A 、 Figure 6B and Figure 6C are different embodiments of the area A, respectively; Figure 5

[0015] Figure 7 is a cross-sectional view illustrating a portion of a micro display structure according to some other embodiments of the present disclosure.

[0016] BRIEF DESCRIPTION OF THE DRAWINGS

[0017] 10, 12, 12B, 12G, 12R: micro light emitting chip structure

[0018] 21: first type semiconductor layer

[0019] 21E: light exit face

[0020] 23: light emitting layer

[0021] 23S1: first side

[0022] 23S2: second side

[0023] 25: second type semiconductor layer

[0024] 25S: peripheral side surface

[0025] 25E: end face

[0026] 31: first insulating layer

[0027] ​31R: annular contact surface of the first insulating layer

[0028] 33: second insulating layer

[0029] 33R: annular contact surface of the second insulating layer

[0030] 35: dielectric structure

[0031] 35R: annular contact surface of the dielectric structure

[0032] 37: third insulating layer

[0033] 38: hard mask layer

[0034] 39: bottom fill layer

[0035] 41: reflective layer

[0036] 43: ohmic contact layer

[0037] 51: electrode

[0038] 53: spacer

[0039] 55n, 55p: conductive channel

[0040] 60: display substrate

[0041] 60p: p-pole

[0042] 60n: n-pole

[0043] 61: refractive structure

[0044] 70: light blocking layer

[0045] 80G, 80R: color conversion structure

[0046] 100, 102, 104: micro display structure

[0047] A, E: area

[0048] D1: direction

[0049] D35: thickness of the dielectric structure

[0050] D41: thickness of the reflective layer

[0051] T: trench

[0052] B-B’: line DETAILED DESCRIPTION

[0053] The following disclosure provides many different embodiments, or examples, for implementing different features of the application. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are in no way limiting of the application. For example, if a first feature is described as being formed over or on a second feature, such terminology can include embodiments in which the first and second features are directly in contact, and embodiments in which other features can be interposed between the first and second features. Exemplary embodiments of the application are described herein with reference to the drawings. Variations of these embodiments can become apparent in light of this disclosure and the preambles recited herein. Modifications and variations of the exemplary embodiments are possible in light of the above teachings. It is therefore to be understood that, within the scope of the claims and their equivalents, the application can be practiced otherwise than as specifically described.

[0054] It is to be understood that other steps can be added before, between, and / or after the steps described herein, and in other embodiments of the method, some steps can be substituted or omitted.

[0055] Furthermore, spatially relative terms, such as "beneath", "below", "lower", "above", "upper", and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. The devices can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0056] In the present disclosure, the terms "about", "approximately", "substantially", generally mean within 20% of a given value, or within 10% of a given value, or within 5% of a given value, or within 3% of a given value, or within 2% of a given value, or within 1% of a given value, or even within 0.5% of a given value. The given value of the present disclosure is an approximate value. That is, a given value can include "about", "approximately", "substantially" unless specifically described otherwise.

[0057] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined in the embodiments of the present disclosure.

[0058] The same reference symbols and / or numbers in different drawings identify the same elements or components. The use herein of "including", "comprising", "having" and "with" and variations thereof is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. The terms "connected", "coupled", and "pathway" are used broadly and encompass both direct and indirect connections, couplings, and pathways.

[0059] Figure 1is a cross-sectional view illustrating a portion of a micro light emitting chip structure 10 according to some embodiments of the present disclosure. For example, the micro light emitting chip structure 10 can be a micro light emitting diode. It should be noted that some components of the micro light emitting chip structure 10 have been omitted for the purpose of simplicity, Figure 1

[0060] Referring to Figure 1 In some embodiments, the micro light emitting chip structure 10 includes a first type semiconductor layer 21. In some embodiments, the first type semiconductor layer 21 includes an N-type semiconductor material. For example, the first type semiconductor layer 21 can include a group II-VI material (e.g., zinc selenide (ZnSe)) or a group III-V nitride compound material (e.g., gallium nitride (GaN), aluminum nitride (AIN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)), and the first type semiconductor layer 21 can include a dopant such as silicon (Si) or germanium (Ge), although embodiments of the present disclosure are not limited as such. In addition, the first type semiconductor layer 21 can be a single layer or a multi-layer structure.

[0061] Referring to Figure 1 In some embodiments, the micro light emitting chip structure 10 includes a light emitting layer 23 disposed on the first type semiconductor layer 21. The light emitting layer 23 can include at least one undoped semiconductor layer or at least one low-doped semiconductor layer. For example, the light emitting layer 23 can be a quantum well (QW) layer that can include indium gallium nitride (InGaN) or gallium nitride (GaN), although embodiments of the present disclosure are not limited as such. Alternatively, the light emitting layer 23 can be a multiple quantum well (MQW) layer. x Ga 1-x N) or gallium nitride (GaN), although embodiments of the present disclosure are not limited as such. Alternatively, the light emitting layer 23 can be a multiple quantum well (MQW) layer.

[0062] The light emitted by the micro light emitting chip structure 10 can be determined by the light emitting layer 23. For example, the light emitting layer 23 can emit red light, green light, or blue light, although embodiments of the present disclosure are not limited as such. The light emitting layer 23 can also emit white light, cyan light, magenta light, yellow light, other suitable color light, or a combination thereof.

[0063] Referring to Figure 1 In some embodiments, the micro light emitting chip structure 10 includes a second type semiconductor layer 25 disposed on a side of the light emitting layer 23 opposite the first type semiconductor layer 21. For example, as shown in FIG. 1, the second type semiconductor layer 25 is disposed on a side of the light emitting layer 23 opposite the first type semiconductor layer 21. In some embodiments, the second type semiconductor layer 25 includes a P-type semiconductor material. For example, the second type semiconductor layer 25 can include a group II-VI material (e.g., zinc selenide (ZnSe)) or a group III-V nitride compound material (e.g., gallium nitride (GaN), aluminum nitride (AIN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)), and the second type semiconductor layer 25 can include a dopant such as silicon (Si) or germanium (Ge), although embodiments of the present disclosure are not limited as such. In addition, the second type semiconductor layer 25 can be a single layer or a multi-layer structure. Figure 1 ​As shown, the first-type semiconductor layer 21 is disposed on the first side 23S1 of the light-emitting layer 23, and the second-type semiconductor layer 25 is disposed on the second side 23S2 of the light-emitting layer 23. In some embodiments, the second-type semiconductor layer 25 includes a P-type semiconductor material. For example, the second-type semiconductor layer 25 may include a Group II-VI material (e.g., zinc selenide (ZnSe)) or a Group III-V nitrogen compound material (e.g., gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN)), and the second-type semiconductor layer 25 may include dopants such as magnesium (Mg) and carbon (C), but the embodiments of the present disclosure are not limited thereto. In addition, the second-type semiconductor layer 25 may be a single layer or a multi-layer structure.

[0064] like Figure 1 As shown, in some embodiments, the second-type semiconductor layer 25 has a peripheral side surface 25S and an end surface 25E connected to the peripheral side surface 25S. Figure 1 In the embodiment shown, the end surface 25E of the second-type semiconductor layer 25 is a single flat surface, but the disclosed embodiment is not limited thereto. In some other embodiments, the end surface 25E of the second-type semiconductor layer 25 is not limited to a single surface, but may also be a non-flat surface.

[0065] The first-type semiconductor layer 21, the light-emitting layer 23, and the second-type semiconductor layer 25 can be formed by an epitaxial growth process. For example, the epitaxial growth process can include metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), other suitable methods, or a combination thereof.

[0066] Reference Figure 1 In some embodiments, the micro-light emitting chip structure 10 includes a first insulating layer 31, which covers at least the peripheral side surface 25S and the end surface 25E of the second-type semiconductor layer 25. For example, the first insulating layer 31 may include an inorganic insulating material, such as silicon oxide (SiO2), silicon nitride (SiN x ), aluminum oxide (Al2O3), titanium oxide (TiO2), similar materials or combinations thereof, but the embodiments of the present disclosure are not limited thereto.

[0067] The first insulating layer 31 can be formed by a deposition process and a patterning process. The deposition process can include chemical vapor deposition (CVD), atomic layer deposition (ALD), other applicable methods, or a combination thereof, but embodiments of the present disclosure are not limited thereto. The patterning process can include forming a mask layer (not shown) on the aforementioned material, and then etching the portion of the aforementioned material covered by the mask layer (or the portion not covered by the mask layer), but embodiments of the present disclosure are not limited thereto. The patterning process can also include a dry etching process or a wet etching process.

[0068] Referring to Figure 1 In some embodiments, the micro light emitting chip structure 10 includes a reflective layer 41 disposed on the first insulating layer 31, and the reflective layer 41 covers at least the side surface 25S and the end surface 25E of the second-type semiconductor layer 25. In some embodiments, the reflective layer 41 is a conductor. For example, the reflective layer 41 can include a metal, such as titanium (Ti), aluminum (Al), silver (Ag), gold (Au), platinum (Pt), nickel (Ni), copper (Cu), an alloy thereof, a multilayer stack thereof, or a combination thereof, but embodiments of the present disclosure are not limited thereto. The reflective layer 41 can be formed by a deposition process and a patterning process. The deposition process and the patterning process are as described above, and will not be repeated here.

[0069] Referring to Figure 1 In some embodiments, the micro light emitting chip structure 10 includes a second insulating layer 33 disposed on the reflective layer 41, and the second insulating layer 33 covers at least the side surface 25S and the end surface 25E of the second-type semiconductor layer 25. The second insulating layer 33 can include the same or similar material as the first insulating layer 31, and can be formed by the same or similar process as the first insulating layer 31, which will not be repeated here, but embodiments of the present disclosure are not limited thereto.

[0070] In embodiments of the present disclosure, the first insulating layer 31, the reflective layer 41, and the second insulating layer 33 can form an insulator-metal-insulator (IMI) structure. As shown in FIG. 1B, in some embodiments, the first insulating layer 31, the reflective layer 41, and the second insulating layer 33 conformally cover a portion of the side surface 25S and the end surface 25E of the second-type semiconductor layer 25. In addition, as shown in FIG. 1C, in some embodiments, the first insulating layer 31, the reflective layer 41, and the second insulating layer 33 conformally cover the entire side surface 25S and the entire end surface 25E of the second-type semiconductor layer 25. Figure 1 Figure 1 ​As shown, in some embodiments, the first insulating layer 31 , the reflective layer 41 and the second insulating layer 33 extend along the peripheral side surface 25S of the second-type semiconductor layer 25 toward the light-emitting layer 23 and the first-type semiconductor layer 21 and cover a portion of the light-emitting layer 23 and the first-type semiconductor layer 21 .

[0071] Reference Figure 1 In some embodiments, the micro-light-emitting chip structure 10 includes an electrode 51. The electrode 51 is disposed on the end surface 25E of the second-type semiconductor layer 25 and is connected to the second-type semiconductor layer 25. That is, the electrode 51 is in direct contact with the second-type semiconductor layer 25. In addition, the electrode 51 and the reflective layer 41 are adjacent to each other on the end surface 25E of the second-type semiconductor layer 25. The electrode 51 may include a conductive material, such as a metal, a metal silicide, a similar material, or a combination thereof. For example, the metal may include gold (Au), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), titanium (Ti), chromium (Cr), tungsten (W), aluminum (Al), copper (Cu), a similar material, an alloy thereof, or a combination thereof, but the embodiments of the present disclosure are not limited thereto.

[0072] like Figure 1 As shown, in some embodiments, the electrode 51 and the reflective layer 41 completely cover the peripheral side surface 25S and the end surface 25E of the second-type semiconductor layer 25. In other words, the orthographic projections of the electrode 51 and the reflective layer 41 on a reference plane parallel to the light-emitting layer 23 completely cover the orthographic projections of the first-type semiconductor layer 21, the light-emitting layer 23, or the second-type semiconductor layer 25 on the reference plane.

[0073] The micro-light-emitting chip structure 10 further includes a dielectric structure 35. The dielectric structure 35 is located between the electrode 51 and the reflective layer 41. The dielectric structure 35 connects the first insulating layer 31 and the second insulating layer 33. The dielectric structure 35 also seals a portion of the reflective layer 41 adjacent to the electrode 51 on the end surface 25E of the second-type semiconductor layer 25, thereby electrically insulating the electrode 51 from the reflective layer 41.

[0074] In this embodiment, the dielectric structure 35 comprises the same or similar material as the first insulating layer 31 or the second insulating layer 33. In other words, the first insulating layer 31, the second insulating layer 33 and the dielectric structure 35 can be considered as the same component, but the embodiment of the disclosure is not limited thereto.

[0075] In some embodiments, the first insulating layer 31, the dielectric structure 35, and the second insulating layer 33 each have an annular contact surface with the electrode 51 on the end surface 25E of the second-type semiconductor layer 25, and the annular contact surface 31R of the first insulating layer 31, the annular contact surface 35R of the dielectric structure 35, and the annular contact surface 33R of the second insulating layer 33 are located in the thickness direction of the end surface 25E of the second-type semiconductor layer 25 (i.e., Figure 1 Aligned with each other in the direction D1).

[0076] like Figure 2 As shown, the peripheral side surface 25S of the second-type semiconductor layer 25 is an inclined surface, and the second-type semiconductor layer 25 is parallel to the cross-sectional width of the light-emitting layer 23 toward the electrode 51 (ie, Figure 2 In this embodiment, the first insulating layer 31, the reflective layer 41, and the second insulating layer 33 conformally cover the peripheral side surface 25S and a portion of the end surface 25E of the second-type semiconductor layer 25. In other words, the base surface covered by the insulator-metal-insulator conformal structure (i.e., the peripheral side surface 25S of the second-type semiconductor layer 25) is not a steep surface. This ensures that the reflective layer 41 is uniformly formed on the peripheral side surface 25S of the second-type semiconductor layer 25 during the deposition process.

[0077] In addition, the gradually narrowing cross-sectional width of the second-type semiconductor layer 25 can reduce the incident angle of most of the light from the light-emitting layer 23 incident on the first insulating layer 31, making it easier for the light to penetrate the reflective layer 41 for reflection, while reducing the probability of total reflection along the surface of the first insulating layer 31, thereby effectively improving the overall light extraction efficiency of the micro-light-emitting chip structure.

[0078] Figure 2 is a cross-sectional view showing a portion of a micro-light emitting chip structure 12 according to some embodiments of the present disclosure. For example, the micro-light emitting chip structure 12 can be a micro-light emitting diode. Similarly, for the purpose of simplicity, Figure 2 Some components of the micro-light emitting chip structure 12 have been omitted.

[0079] like Figure 2 As shown, in some embodiments, the dielectric structure 35 of the micro-light emitting chip structure 12 is made of different materials from the first insulating layer 31 and the second insulating layer 33. For example, the dielectric structure 35 may include organic materials, structural photoresist materials, other similar materials or combinations thereof, but the embodiments of the present disclosure are not limited thereto. Figure 3 As shown, in some embodiments, the dielectric structure 35 is a ring-shaped structure formed between the first insulating layer 31 and the second insulating layer 33 .

[0080] In this embodiment, when manufacturing the micro-light-emitting chip structure 12, the different etching selectivities of the first insulating layer 31, the second insulating layer 33, and the reflective layer 41 can be utilized to cause the reflective layer 41 to undergo a greater degree of etching (recession) than the first insulating layer 31 and the second insulating layer 33. This ensures that the reflective layer 41 is electrically insulated from the electrode 51 while ensuring that the insulator-metal-insulator conformal structure has the largest possible coverage area.

[0081] Furthermore, in the present embodiment, the dielectric structure 35 and the reflective layer 41 are located in the same stack film layer, and have the same thickness as the reflective layer 41 in the thickness direction perpendicular to the end surface 25E of the second-type semiconductor layer 25 (i.e., the direction D1 in Figure 3 . In other words, the thickness D35 of the dielectric structure 35 can be substantially the same as the thickness D41 of the reflective layer 41, but embodiments of the present disclosure are not limited thereto.

[0082] Figure 3 is a cross-sectional view showing a portion of a micro display structure 100 according to some embodiments of the present disclosure. For example, the micro display structure 100 can be a micro light emitting diode display panel. Similarly, for the purpose of brevity, Figure 3 some components of the micro display structure 100 have been omitted in

[0083] Referring to Figure 3 , in some embodiments, the micro display structure 100 includes a plurality of micro light emitting chip structures (only three of which are shown in Figure 2 ). In some embodiments, the plurality of micro light emitting chip structures can be arranged in an array. For example, the micro display structure 100 can include micro light emitting chip structures 12G, 12B, 12R, where the light emitting layer 23G of the micro light emitting chip structure 12G emits green light, the light emitting layer 23B of the micro light emitting chip structure 12B emits blue light, and the light emitting layer 23R of the micro light emitting chip structure 12R emits red light, i.e., the micro light emitting chip structures 12G, 12B, 12R emit different colors of light, but embodiments of the present disclosure are not limited thereto.

[0084] As shown in Figure 2 , in some embodiments, the micro light emitting chip structures 12G, 12B, 12R have the same or similar structure as the micro light emitting chip structure 12 shown in Figure 3 . For example, the micro light emitting chip structure 12 shown in Figure 3 may be, for example, a magnified view of the region E in Figure 3 , but embodiments of the present disclosure are not limited thereto.

[0085] Referring to Figure 3 , in some embodiments, the micro display structure 100 includes an ohmic contact layer 43, which is patterned disposed between the micro light emitting chip structures 12G, 12B, 12R and electrically connects at least a portion of the first-type semiconductor layer 21 of the micro light emitting chip structures 12G, 12B, 12R. For example, in Figure 3The ohmic contact layer 43 covers the upper portion of the first-type semiconductor layer 21 and is connected to at least one of the first insulating layer 31, the reflective layer 41, and the second insulating layer 33. In this embodiment, the ohmic contact layer 43 is connected to all three layers simultaneously, but the present disclosure is not limited to this. For example, in other embodiments described later, the ohmic contact layer 43 may contact only the first insulating layer 31 and the reflective layer 41, or only the first insulating layer 31.

[0086] In this embodiment, the ohmic contact layer 43 is essentially a common electrode structure (e.g., a patterned metal layer). Furthermore, because the ohmic contact layer 43 is connected to the reflective layer 41, the reflective layer 41 can also be considered part of the common electrode structure. This allows a portion of the current flowing through the first-type semiconductor layer 21 to be transferred through the reflective layer 41, thereby enhancing the common electrode effect of the ohmic contact layer 43. Furthermore, when the ohmic contact layer 43 comprises a light-reflective material and is connected to the reflective layer 41, it can completely enclose the side surfaces of the micro-light-emitting chip structures 12G, 12B, and 12R, preventing light leakage from the interface and enhancing the light recycling and reflection effect.

[0087] like Figure 3 As shown, there are gaps between the micro-light emitting chip structures 12G, 12B, and 12R to form a plurality of trenches T, which are perpendicular to the thickness direction of the end surface 25E of the second-type semiconductor layer 25 (ie, Figure 3 In the direction D1 in FIG. 1 ), the trenches T are located between the ohmic contact layer 43 and the electrode 51. The microdisplay structure 100 further includes a plurality of third insulating layers 37, which fill the trenches T. Filling the trenches T with the third insulating layers 37 can prevent the common electrode of the ohmic contact layer 43 from contacting the electrode 51 and causing a PN short circuit due to process deviation during deposition of the electrode 51.

[0088] It is important to note that although Figure 3 The third insulating layer 37 is shown to completely fill the trench T, but the present disclosure is not limited thereto. In some other embodiments, the third insulating layer 37 may only occupy a portion of the trench T, but still effectively isolate the ohmic contact layer 43 and the electrode 51 to prevent short circuits.

[0089] like Figure 3As shown, in some embodiments, the first-type semiconductor layer 21 has a light-emitting surface 21E on a side away from the light-emitting layer 23, and the micro-display structure 100 further includes a refractive structure 61, which is disposed on the light-emitting surface 21E of the first-type semiconductor layer 21. The refractive structure 61 can be a micro-lens. For example, the micro-lens can include a semi-convex lens or a convex lens, but the embodiments of the present disclosure are not limited to this. The refractive structure 61 can also include a micro-pyramid structure (e.g., a cone, a quadrangular pyramid, etc.) or a micro-trapezoidal structure (e.g., a flat-top cone, a flat-top quadrangular pyramid, etc.). Alternatively, the refractive structure 61 can be a gradient-index structure.

[0090] like Figure 4A As shown, in some embodiments, the microdisplay structure 100 further includes a hard mask layer 38, which is disposed between the first-type semiconductor layer 21 and the refractive structure 61. The hard mask layer 38 can serve as a protective layer for the first-type semiconductor layer 21 and can include the same or similar material as the first insulating layer 31 and the second insulating layer 33, but the embodiments of the present disclosure are not limited thereto.

[0091] like Figure 4B As shown, in some embodiments, the microdisplay structure 100 further includes a plurality of light-shielding layers 70 disposed above the ohmic contact layer 43 and between the plurality of refractive structures 61. For example, the light-shielding layers 70 may correspond to the intersections of the micro-light-emitting chip structures 12G, 12B, and 12R. The light-shielding layers 70 may include photoresist (e.g., black photoresist or other suitable non-transparent photoresist), ink (e.g., black photoresist for absorbing light or white photoresist for reflecting light), a molding compound, a solder mask, epoxy resin, other suitable materials, or a combination of the foregoing. Furthermore, the light-shielding layers 70 may be a photocurable material, a thermally curable material, or a combination of the foregoing materials, but the present disclosure is not limited thereto. The light-shielding layers 70 may form a black matrix to prevent crosstalk between the micro-light-emitting chip structures 12G, 12B, and 12R.

[0092] Figure 3 is a cross-sectional view showing a portion of a microdisplay structure 100 according to some embodiments of the present disclosure. Figure 4A is a top view showing a portion of the microdisplay structure 100 according to some embodiments of the present disclosure. For example, Figure 4A The microdisplay structure 100 shown may be Figure 4B A portion of the microdisplay structure 100 is shown, and Figure 4Amay be, for example, a cross-sectional view taken along line B-B' in Figure 4B The embodiments of the present disclosure are not limited to this. Similarly, for the purpose of brevity, Figure 4B has omitted some components of the micro display structure 100, and Figure 4A The embodiments of the present disclosure are not limited to this. Similarly, for the purpose of brevity, Figure 4B The embodiments of the present disclosure are not limited to this. Similarly, for the purpose of brevity,

[0093] Referring to Figure 4B has omitted some components of the micro display structure 100, and Figure 4A The micro display structure 100 includes a display substrate 60. The display substrate 60 can include an elemental semiconductor (e.g., silicon or germanium), a compound semiconductor (e.g., silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), or indium phosphide (InP)), an alloy semiconductor (e.g., SiGe, SiGeC, GaAsP, or GaInP), other appropriate semiconductors, or combinations of the foregoing. Figure 4A The micro light emitting chip structures 12G, 12B, 12R are arranged on the display substrate 60 and electrically connected to the display substrate 60.

[0094] The display substrate 60 can have an integrated circuit (IC) formed by various different circuit layers. As shown in Figure 5 The circuit layers can include a p-type 60p and an n-type 60n, and the micro light emitting chip structures 12G, 12B, 12R can be electrically connected to the p-type 60p of the circuit layers through the respective electrodes 51 (e.g., the electrodes 51 are connected to the conductive vias 55p), thereby independently controlling the micro light emitting chip structures 12G, 12B, 12R; and the common electrode structure formed by the ohmic contact layer 43 can be electrically connected to the n-type 60n of the circuit layers through the conductive vias 55n (e.g., the ohmic contact layer 43 is connected to the pads 53, and the pads 53 are connected to the conductive vias 55n), but the embodiments of the present disclosure are not limited to this.

[0095] As shown in Figure 5 In some embodiments, the micro display structure 100 further includes an underfill 39 for stabilizing the structure of the micro display structure 100 as a whole and blocking water vapor from entering the micro display structure 100. For example, the underfill 39 can include the same or similar material as the first insulating layer 31 and the second insulating layer 33, but the embodiments of the present disclosure are not limited to this.

[0096] Figure 3is a cross-sectional view showing a portion of a micro display structure 102 according to some other embodiments of the present disclosure. For example, the micro display structure 102 can be a micro light emitting diode display panel. Similarly, for the purpose of simplicity, Figure 5 Some components of the microdisplay structure 102 have been omitted.

[0097] and Figure 5 The main difference of the microdisplay structure 100 shown is that Figure 6A The illustrated micro display structure 102 does not include the third insulating layer 37 . In this embodiment, the second insulating layer 33 between adjacent micro light emitting chip structures 12G, 12B, 12R is not etched through and connected to each other, thereby isolating the reflective layer 41 and the electrode 51 .

[0098] also, Figure 6B The area A enclosed by the middle dotted line may have different structures. Figure 6C 、 Figure 5 and Figure 6A They are Figure 6B Different embodiments of region A. Figure 6C As shown, when forming the through hole (via) of the common electrode of the ohmic contact layer 43, the first insulating layer 31 is not etched through, so that the reflective layer 41 and the ohmic contact layer 43 are slightly interrupted. Figure 6B As shown, when forming the through hole of the common electrode of the ohmic contact layer 43, the first insulating layer 31 is etched through to expose the top portion of the reflective layer 41, but the ohmic contact layer 43 does not contact the second insulating layer 33. Figure 6C As shown, when forming the through hole of the common electrode of the ohmic contact layer 43, the first insulating layer 31 is etched through, and further etched through the top portion of the reflective layer 41, and the ohmic contact layer 43 is in direct contact with the second insulating layer 33. Figure 6B and Figure 6C In the embodiment shown, the reflective layer 41 and the ohmic contact layer 43 can form a reflective film layer connected to each other without being interrupted by the first insulating layer 31, and can cover the micro light-emitting chip structures 12G, 12B, and 12R without dead angles, thereby improving the efficiency of light reflection.

[0099] In addition, since the ohmic contact layer 43 is a common electrode structure in this embodiment, and the reflective layer 41 is also a conductive layer patterned and formed between the micro-light emitting chip structures 12G, 12B, and 12R, Figure 7 and Figure 7 In the structure, the reflective layer 41 can be regarded as an extension structure of the common electrode structure of the first-type semiconductor layer 21 (ie, an extension structure of the ohmic contact layer 43), and has the effect of improving the conductivity of the common electrode structure.

[0100] Figure 7is a cross-sectional view showing a portion of the micro display structure 104 according to some other embodiments of the present disclosure. For example, the micro display structure 104 can be a micro light emitting diode display panel. Similarly, for the purpose of brevity, ​ Some components of the micro display structure 104 have been omitted in the following figures.

[0101] Referring to ​ In some embodiments, each micro light emitting chip structure 12 emits light of the same color. In other words, the light emitting layer 23 of each micro light emitting chip structure 12 emits light of the same color, for example, blue. In the present embodiments, the micro display structure 104 further comprises a plurality of color conversion structures 80G, 80R disposed on some of the micro light emitting chip structures 12, and the color conversion structures 80G, 80R convert the light emitted by the micro light emitting chip structures 12 into light of different colors.

[0102] For example, the color conversion structure 80G can comprise green phosphor or green quantum dots (QDs) to convert the blue light emitted by the micro light emitting chip structure 12 into green light; and the color conversion structure 80R can comprise red phosphor or red quantum dots to convert the blue light emitted by the micro light emitting chip structure 12 into red light, but the embodiments of the present disclosure are not limited thereto.

[0103] In summary, the micro light emitting chip structure of the embodiments of the present disclosure comprises a reflective layer covering at least the peripheral surface and the end surface of the second-type semiconductor layer, which can reflect light other than the light to be emitted to increase the amount of light emitted in the forward direction, thereby effectively improving the light emitting efficiency of the micro light emitting chip structure and the micro display structure using the same.

[0104] The features of the above embodiments are summarized in order for those skilled in the art in the technical field of the present disclosure to have a better understanding of the viewpoints of the embodiments of the present disclosure. Those skilled in the art in the technical field of the present disclosure should understand that they can design or modify other processes and structures based on the embodiments of the present disclosure to achieve the same purposes and / or advantages as the embodiments introduced herein. Those skilled in the art in the technical field of the present disclosure should also understand that such equivalent structures do not deviate from the spirit and scope of the present disclosure, and they can make various changes, substitutions and replacements without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure should be defined by the appended patent claims. In addition, although the present disclosure has been disclosed above with several embodiments, it is not intended to limit the present disclosure.

[0105] Reference throughout this specification to features, advantages, or similar language does not mean that all of the features and advantages that can be realized by the present disclosure should or must be realized in any single

[0106] Furthermore, characteristics, advantages, and features of the disclosure described herein can be combined in any suitable manner in one or more embodiments. Upon further review of the description, those skilled in the relevant art will appreciate that the disclosure can be practiced with less than all of the features or advantages that can be realized from the technology described herein. In other instances, other features and advantages can be utilized that can not be present in all embodiments of the disclosure.

Claims

1. A micro light emitting chip structure, comprising: a first type semiconductor layer; a light emitting layer disposed over the first type semiconductor layer; a second type semiconductor layer disposed on a side of the light emitting layer opposite the first type semiconductor layer, wherein the second type semiconductor layer has a peripheral side surface and an end surface connecting the peripheral side surface; a first insulating layer covering at least the peripheral side surface and the end surface; a reflective layer disposed over the first insulating layer and covering at least the peripheral side surface and the end surface; a second insulating layer disposed over the reflective layer and covering at least the peripheral side surface and the end surface; an electrode disposed over the end surface and connected to the second type semiconductor layer, wherein the electrode is adjacent to the reflective layer over the end surface; a dielectric structure between the electrode and the reflective layer, wherein the dielectric structure connects the first insulating layer and the second insulating layer and encloses a portion of the reflective layer adjacent to the electrode over the end surface, electrically isolating the electrode from the reflective layer; and an ohmic contact layer covering at least a portion of the first type semiconductor layer, wherein the first insulating layer, the reflective layer, and the second insulating layer extend along the peripheral side surface to the light emitting layer and the first type semiconductor layer and cover a portion of the light emitting layer and the first type semiconductor layer, and the ohmic contact layer is connected to the reflective layer.

2. The micro light emitting chip structure of claim 1, wherein the electrode and the reflective layer completely cover the peripheral side surface and the end surface.

3. The micro light emitting chip structure of claim 1, wherein the first insulating layer, the reflective layer, and the second insulating layer conformally cover a portion of the peripheral side surface and the end surface.

4. The micro light emitting chip structure of claim 3, wherein the peripheral side surface is a beveled surface, and the second type semiconductor layer gradually narrows in a direction parallel to a cross-sectional width of the light emitting layer toward the electrode.

5. The micro light emitting chip structure of claim 1, wherein the dielectric structure is an annular structure formed between the first insulating layer and the second insulating layer.

6. The micro light emitting chip structure of claim 5, wherein the dielectric structure and the reflective layer are in a same stack film layer and have a same thickness in a direction perpendicular to a thickness of the end surface.

7. The micro light emitting chip structure of claim 5, wherein the dielectric structure is a different material from the first insulating layer and the second insulating layer, respectively.

8. The micro light emitting chip structure of claim 5, wherein the first insulating layer, the dielectric structure, and the second insulating layer each have an annular contact surface with the electrode over the end surface, and the annular contact surface of the first insulating layer, the annular contact surface of the dielectric structure, and the annular contact surface of the second insulating layer are aligned with each other in the direction of the thickness of the end surface.

9. The micro light emitting chip structure of claim 1, wherein the ohmic contact layer is further connected to the second insulating layer.

10. The micro light emitting chip structure of claim 9, wherein the reflective layer is a conductor.

11. The micro light emitting chip structure of claim 1, wherein the first type semiconductor layer has a light exit surface on a side distal to the light emitting layer, and the light exit surface has a refractive structure disposed thereon.

12. A micro display structure, comprising: a display substrate; a plurality of micro light emitting chip structures arranged on the display substrate, wherein each of the micro light emitting chip structures comprises: a first type semiconductor layer; a light emitting layer disposed on the first type semiconductor layer; a second type semiconductor layer disposed on a side of the light emitting layer opposite the first type semiconductor layer, wherein the second type semiconductor layer has a peripheral surface and an end surface connecting the peripheral surface; a first insulating layer covering at least the peripheral surface and the end surface; a reflective layer disposed on the first insulating layer and covering at least the peripheral surface and the end surface; a second insulating layer disposed on the reflective layer and covering at least the peripheral surface and the end surface; an electrode disposed on the end surface and connected to the second type semiconductor layer, wherein the electrode is adjacent to the reflective layer on the end surface; and a dielectric structure between the electrode and the reflective layer, wherein the dielectric structure connects the first insulating layer and the second insulating layer and encloses a portion of the reflective layer adjacent to the electrode on the end surface, such that the electrode is electrically isolated from the reflective layer, wherein the electrode is electrically connected to the display substrate, the first insulating layer, the reflective layer, and the second insulating layer extend along the peripheral surface to and cover a portion of the light emitting layer and the first type semiconductor layer; and an ohmic contact layer patterned between the plurality of micro light emitting chip structures and electrically connected to the first type semiconductor layers of the plurality of micro light emitting chip structures, wherein the ohmic contact layer is connected to the reflective layer.

13. The micro display structure of claim 12, wherein the plurality of micro light emitting chip structures emit light of the same color, and further comprising: a plurality of color conversion structures disposed on some of the plurality of micro light emitting chip structures, wherein the plurality of color conversion structures convert light emitted by the plurality of micro light emitting chip structures to light of different colors.

14. The micro display structure of claim 12, wherein the plurality of micro light emitting chip structures emit light of different colors.

15. The micro display structure of claim 12, wherein the plurality of micro light emitting chip structures have gaps therebetween forming a plurality of trenches, the plurality of trenches are between the ohmic contact layer and the plurality of electrodes in a direction perpendicular to a thickness of the end surface, and further comprising: a plurality of third insulating layers filling the plurality of trenches.

16. The micro display structure of claim 12, wherein the electrode and the reflective layer completely cover the peripheral surface and the end surface. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ 17. The microdisplay structure of claim 12, wherein the first insulating layer, the reflective layer, and the second insulating layer conformally cover a portion of the end surface and a portion of the perimeter surface, the perimeter surface being a sloped surface, and the second type semiconductor layer tapers in a direction parallel to a cross-sectional width of the light emitting layer toward the electrode.

18. The microdisplay structure of claim 12, wherein the ohmic contact layer further connects the second insulating layer.

19. The microdisplay structure of claim 18, wherein the reflective layer is a conductor.

20. The microdisplay structure of claim 12, wherein any of the first type semiconductor layers has a light exit surface on a side distal from the light emitting layer, and the microdisplay structure further comprises: a refractive structure disposed over the light exit surface. ​

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