Semiconductor light emitting element and method of manufacturing the same

Abstract

The application discloses a semiconductor light-emitting element and a preparation method thereof. The semiconductor light-emitting element comprises a semiconductor epitaxial stack, including a first conductive type semiconductor layer, a second conductive type semiconductor layer and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a side wall formed at the edge of the first conductive type semiconductor layer and the active layer; a first mesa formed on the second conductive type semiconductor layer and not overlapping with the active layer; characterized in that the side wall extends to connect with the first mesa to form a connecting part, and the connecting part has a roughening structure on one side of the first mesa. The semiconductor light-emitting element and the preparation method thereof have a roughening structure on the upper surface of the first conductive type semiconductor layer and the first mesa, can solve the electric leakage problem caused by the roughening of the side wall, and improve the light-emitting brightness of the semiconductor light-emitting element.

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor light emitting element and a preparation method thereof, and belongs to the technical field of semiconductor optoelectronic devices. BACKGROUND

[0002] Light emitting diodes (LED) have been widely used in backlight, lighting, landscape and other light source fields due to their high luminous efficiency and long service life. Further improving the luminous efficiency of LED chips is still the focus of current industry development.

[0003] The luminous efficiency of LED chips is mainly determined by two efficiencies. The first one is the radiative recombination efficiency of electrons and holes in the active region, which is usually referred to as internal quantum efficiency. The second one is the light extraction efficiency.

[0004] To improve the luminous efficiency, the following methods can be used, including improving the quality of epitaxial growth, increasing the probability of electron and hole combination, and improving the internal quantum efficiency (IQE). On the other hand, if the light generated by the light emitting diode cannot be effectively extracted, part of the light will be limited in the light emitting diode by total reflection or refraction, and finally be absorbed by the electrode or the light emitting layer, so that the brightness cannot be improved. Therefore, the external quantum efficiency (EQE) is improved by using surface roughening or changing the geometry of the structure, so as to improve the luminous brightness and luminous efficiency of the light emitting diode.

[0005] The existing light emitting diode can improve the light extraction efficiency of the light emitting diode and improve the luminous brightness by roughening the mesa and the sidewall of the semiconductor epitaxial stack. However, in the roughening process, impurities are easily left on the sidewall of the active layer, which causes the light emitting diode to have a leakage current, thereby affecting the use of the product. If the sidewall is not roughened, the luminous brightness of the light emitting diode will be affected. SUMMARY

[0006] To solve the above problems, the present application provides a semiconductor light emitting element, which comprises: a semiconductor epitaxial stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer and an active layer located between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a sidewall formed at the edge of the first conductive type semiconductor layer and the active layer; and a first mesa formed on the second conductive type semiconductor layer and not overlapping with the active layer. The sidewall extends to connect with the first mesa to form a connecting portion, and the connecting portion has a roughening structure on one side of the first mesa.

[0007] Preferably, the roughness of the roughening structure on the connecting portion on one side of the first mesa is 0.2-1 μm.

[0008] Preferably, the width of the connection part having the roughened structure on one side of the first mesa ranges from 0.5 to 3 μm.

[0009] Preferably, the area of the first mesa other than the connection part has a roughened structure.

[0010] Preferably, the surface roughness of the connection part on one side of the side wall is less than or equal to 0.2 μm.

[0011] Preferably, there is a first electrode on the first conductive type semiconductor layer and electrically connected to the first conductive type semiconductor layer, and the area of the first conductive type semiconductor layer other than the first electrode has at least a roughened area.

[0012] Preferably, the edge area of the first conductive type semiconductor layer has a roughened structure.

[0013] Preferably, the width of the edge area of the first conductive type semiconductor layer having the roughened structure ranges from 0.5 to 3 μm.

[0014] Preferably, the surface roughness of the side wall is less than the surface roughness of the first mesa.

[0015] Preferably, the surface roughness of the side wall of the active layer and the first conductive type semiconductor layer is less than or equal to 0.2 μm.

[0016] Preferably, the surface roughness of the roughened area of the first conductive type semiconductor layer ranges from 0.5 to 3 μm.

[0017] Preferably, the distance from the edge of the first mesa to the side wall is defined as the width Dl of the first mesa, and the Dl ranges from 0.5 to 10 μm.

[0018] More preferably, the Dl ranges from 4 to 7 μm.

[0019] Preferably, there is a second mesa on the edge of the semiconductor light emitting element formed on the second conductive type semiconductor layer, and the height of the second mesa is lower than the height of the first mesa.

[0020] Preferably, the distance from the second mesa to the lower surface of the semiconductor epitaxial layer is defined as the height Hl of the second mesa, and the Hl ranges from 0.2 to 3.5 μm.

[0021] Preferably, there is a metal reflective layer on the second conductive type semiconductor layer, and there is a second mesa on the edge of the semiconductor light emitting element formed on the metal reflective layer, and the height of the second mesa is lower than the height of the first mesa.

[0022] Preferably, the roughness of the second mesa surface is less than the roughness of the first mesa.

[0023] Preferably, the roughness of the second mesa surface is less than or equal to 0.2 μm.

[0024] Preferably, a second side wall is further included, located at the edge of the second conductive type semiconductor layer, characterized in that the distance from the second mesa edge to the second side wall is defined as the width D2 of the second mesa, and the range of the D2 is 0.1-30 μm.

[0025] Preferably, the range of the D2 is 8-15 μm.

[0026] Preferably, the semiconductor light emitting element radiates red light or infrared light.

[0027] The present application further discloses a preparation method of a semiconductor light emitting element, characterized in that the method comprises the following steps:

[0028] S1: forming a semiconductor epitaxial layer, including a first conductive type semiconductor layer, a second conductive type semiconductor layer and an active layer located between the first conductive type semiconductor layer and the second conductive type semiconductor layer;

[0029] S2: roughening the surface of the first conductive type semiconductor layer away from the active layer;

[0030] S3: removing part of the first conductive type semiconductor layer and the active layer to form a first mesa, the first mesa being located on the second conductive type semiconductor layer, and exposing the side wall of the active layer and the first conductive type semiconductor layer.

[0031] Preferably, in step S2, the side wall extends to form a connecting part with the first mesa, and the connecting part has a roughened structure on one side of the first mesa.

[0032] Preferably, the method further comprises the following steps: removing part of the second conductive type semiconductor layer at the edge of the first mesa to form a second mesa, exposing the side wall of the second conductive type semiconductor layer, the second mesa being located on the second conductive type semiconductor layer, and the height of the second mesa being lower than the height of the first mesa.

[0033] Preferably, the method further comprises the following steps: forming a metal reflection layer on the second conductive type semiconductor layer, removing the second conductive type semiconductor layer, and forming a second mesa on the surface of the metal reflection layer, exposing the side wall of the second conductive type semiconductor layer.

[0034] The application also provides a light emitting diode package comprising a mounting substrate and at least one semiconductor light emitting element mounted on the mounting substrate, characterized in that the semiconductor light emitting element is at least one or more or all of the semiconductor light emitting elements according to any one of the preceding aspects.

[0035] The application provides a semiconductor light emitting element and a method for manufacturing the same. By roughening the upper surface of the first conductive type semiconductor layer and the first mesa and not roughening the side wall, the problem of electric leakage caused by roughening the side wall is solved, and the luminous brightness of the semiconductor light emitting element is improved.

[0036] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art from the description, or can be learned by practice of the application. The objects and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.

[0037] While the application is susceptible to various modifications and alternative forms, specific embodiments and methods thereof have been shown by way of example in the drawings and are described in detail herein. It should be understood, however, that it is not intended to limit the application to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the application as defined by the appended claims. BRIEF DESCRIPTION OF DRAWINGS

[0038] The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. In the drawings:

[0039] Figure 1 A cross-sectional view of a semiconductor light emitting element mentioned in the prior art.

[0040] Figure 2 A cross-sectional view of a semiconductor light emitting element mentioned in Example 1, in which the first mesa is partially roughened.

[0041] Figure 3 A partially enlarged view of a connecting portion mentioned in Example 1.

[0042] Figure 4 A cross-sectional view of a semiconductor light emitting element mentioned in Example 1, in which the first mesa is entirely roughened.

[0043] Figure 5 A cross-sectional view of a semiconductor light emitting element mentioned in Example 2, in which the second mesa is located on the reflecting layer 105, and the first mesa is entirely roughened.

[0044] Figure 6A cross-sectional view of a semiconductor light emitting element having a first mesa and a second mesa on a reflective layer 105.

[0045] Figure 7 A cross-sectional view of an epitaxial structure provided in a manufacturing process mentioned in Embodiment 3, the epitaxial structure including a semiconductor epitaxial stack.

[0046] Figure 8 A cross-sectional view of a structure obtained by transferring the semiconductor epitaxial stack provided in the manufacturing process mentioned in Embodiment 3 to a substrate through a bonding process and removing a growth substrate.

[0047] Figure 9 A cross-sectional view of a structure obtained after forming a front surface electrode on a second conductive type semiconductor layer in the manufacturing process mentioned in Embodiment 3.

[0048] Figure 10 A cross-sectional view of a structure in which a surface of the semiconductor epitaxial stack is roughened in the manufacturing process mentioned in Embodiment 3.

[0049] Figure 11 A cross-sectional view of a structure in which a first mesa is formed in the manufacturing process mentioned in Embodiment 3.

[0050] Figure 12 A cross-sectional view of a structure in which a second mesa is formed in the manufacturing process mentioned in Embodiment 3.

[0051] Figure 13 A cross-sectional view of a structure in which an insulating protective layer and a back surface electrode are formed in the manufacturing process mentioned in Embodiment 3.

[0052] Figure 14 A cross-sectional view of a structure of a package of a semiconductor light emitting element mentioned in Embodiment 4.

[0053] Explanation of Reference Numerals in the Drawings: 10: growth substrate; 100: substrate; 101: first conductive type semiconductor layer; 102: active layer; 103: second conductive type semiconductor layer; 104: dielectric layer; 105: reflective layer; 106: bonding layer; 107: front surface electrode; 108: insulating protective layer; 109: back surface electrode; 1: semiconductor epitaxial stack; S1: first mesa; S2: second mesa; 10: semiconductor light emitting element; 30: mounting substrate; 301: first electrode terminal of mounting substrate; 302: second electrode terminal of mounting substrate; 303: wire; 304: sealing resin; D1: width of first mesa; D2: width of second mesa; H1: height of first mesa; dl: width of connecting portion having roughened structure on one side of first mesa. Embodiment

[0054] The present application is herein described, by way of example only, with the comprehension that the advantages and utility thereof are not limited thereto. It should be appreciated that those skilled in the art can readily conceive other embodiments of the present application from the disclosure herein with the possession of average skill in the art and can set forth these embodiments with the possession of average skill in the art without departing from the spirit of the present application.

[0055] It is to be understood that the figures provided in the present embodiment are only schematic and are intended to provide the basic understanding of the present application. In reality, the number, shape, and size of components shown in the figures can be different from what is actually implemented and the layout of components can be more complex. The present application is not limited to the figures provided.

[0056] The embodiments of the present application will be described in detail with reference to the figures and embodiments, so that the application of technical means to solve technical problems and achieve technical effects can be fully understood and implemented.

[0057] The present application provides a semiconductor light emitting element, as shown in the cross-sectional schematic diagram, which comprises a stack of layers: 10: growth substrate; 100: substrate; 101: first conductive type semiconductor layer; 102: active layer; 103: second conductive type semiconductor layer; 104: dielectric layer; 105: reflective layer; 106: bonding layer; 107: front electrode; 108: insulating protective layer; 109: back electrode; 1: semiconductor epitaxial stack; S1: first mesa; S2: second mesa; C1: connecting portion formed by the extension of the side wall and the first mesa. Figure 1 The stack of layers will be described in detail below.

[0058] The substrate 100 is a conductive substrate, which can be a silicon, silicon carbide, or metal substrate, preferably a copper, tungsten, or molybdenum substrate. In order to support the semiconductor epitaxial stack 1 with sufficient mechanical strength, the thickness of the substrate 100 is preferably 50 μm or more. In addition, in order to facilitate the mechanical processing of the substrate 100 after bonding to the semiconductor epitaxial stack 1, the thickness of the substrate 100 is preferably not more than 300 μm. In the present embodiment, the substrate 100 is preferably a silicon substrate.

[0059] The semiconductor epitaxial stack 1 comprises a first conductive type semiconductor layer 101, an active layer 102, and a second conductive type semiconductor layer 103.

[0060] The first conductive type semiconductor layer 101 can be composed of a III-V or II-VI compound semiconductor and can be doped with a first dopant. The first conductive type semiconductor layer 102 can be composed of a compound semiconductor having the chemical formula InxAl1-xAsyP1-y, where 0≤x≤1 and 0≤y≤1.

[0061] The second conductive type semiconductor layer 103 can be composed of a III-V or II-VI compound semiconductor and can be doped with a second dopant. The second conductive type semiconductor layer 103 can be composed of a compound semiconductor having the chemical formula InxAl1-xAsyP1-y, where 0≤x≤1 and 0≤y≤1.X1 Al Y1 Ga 1-X1-Y1 N (0≤X1≤1, 0≤Y1≤1, 0≤X1+Y1≤1), such as GaN, AlGaN, InGaN, InAlGaN, or a material selected from the group consisting of AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. In addition, the first dopant can be an n-type dopant, such as Si, Ge, Sn, Se, and Te. When the first dopant is an n-type dopant, the first-conductivity-type semiconductor layer doped with the first dopant is an n-type semiconductor layer. In this embodiment, the first-conductivity-type semiconductor layer 102 is preferably an n-type semiconductor doped with an n-type dopant.

[0062] The active layer 102 is disposed between the first-conductivity-type semiconductor layer 101 and the second-conductivity-type semiconductor layer 103. The active layer 102 is a region that provides light radiation by recombination of electrons and holes, and different materials can be selected depending on the wavelength of the light to be emitted. The active layer 102 can be a single quantum well or a periodic structure of multiple quantum wells. The active layer 102 includes a well layer and a barrier layer, in which the barrier layer has a larger band gap than the well layer. The composition ratio of the semiconductor material in the active layer 102 is adjusted so as to emit light of a desired wavelength.

[0063] The second-conductivity-type semiconductor layer 103 is formed on the active layer 102 and can be composed of a III-V or II-VI compound semiconductor. The second-conductivity-type semiconductor layer 103 can be doped with a second dopant. The second-conductivity-type semiconductor layer 103 can be composed of a semiconductor material having a chemical formula In X2 Al Y2 Ga 1-X2-Y2 N (0≤X2≤1, 0≤Y2≤1, 0≤X2+Y2≤1), or a material selected from the group consisting of AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. When the second dopant is a p-type dopant, such as Mg, Zn, Ca, Sr, and Ba, the second-conductivity-type semiconductor layer doped with the second dopant is a p-type semiconductor layer. In this embodiment, the second-conductivity-type semiconductor layer is preferably a p-type semiconductor doped with a p-type dopant.

[0064] The epitaxial stack structure 1 can further include other layer materials, such as a current spreading layer, a window layer, or an ohmic contact layer, etc., which are arranged as different multilayers according to different doping concentrations or component contents. The epitaxial stack structure 1 can be formed on the growth substrate 10 by physical vapor deposition (PVD), chemical vapor deposition (CVD), epitaxy growth technology, atomic layer deposition (ALD), etc. In the present embodiment, the semiconductor epitaxial stack 1 is preferably composed of AlGaInP-based materials, and the semiconductor epitaxial stack 1 radiates red light or infrared light.

[0065] The bonding layer 106 is a bonding metal material used when adhering one side of the semiconductor epitaxial stack 1 to the substrate 100, such as gold, tin, titanium, nickel, platinum, etc. The bonding layer 106 can be a single-layer structure or a multilayer structure, and can be a combination of multiple materials.

[0066] The reflective layer 105 is arranged on the side of the bonding layer 106 close to the semiconductor epitaxial stack 1, and the reflective layer 105 can be formed of a metal or an alloy containing at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf. The reflective layer 105 can reflect light radiated from the semiconductor epitaxial stack 1 toward the side of the substrate 100 back to the semiconductor epitaxial stack 1 and radiate it from the light-emitting side. The light-emitting surface of the semiconductor light-emitting element is located on the side of the first conductive-type semiconductor layer 101 away from the active layer 102.

[0067] The dielectric layer 104 is located on the side of the second conductive-type semiconductor layer 103 away from the active layer 102, and the dielectric layer 104 has a plurality of openings. The dielectric layer 104 can be formed of an insulating material having a lower conductivity than the reflective layer 105, a material having a low conductivity, or a material that forms a Schottky contact with the second conductive-type semiconductor layer 103. For example, the dielectric layer 104 can be composed of at least one of a fluoride, a nitride, or an oxide, specifically, at least one of ZnO, SiO2, SiO x x N y , Si3N4, Al2O3, TiOx, MgF, or GaF. The dielectric layer 104 is composed of at least one layer or a combination of multiple layers of dielectric layer materials having different refractive indexes, and the dielectric layer 104 is more preferably a light-transmitting dielectric layer through which at least 50% of light can pass. More preferably, the dielectric layer 104 has a lower refractive index than the semiconductor epitaxial stack 1. ​

[0068] An ohmic contact layer (not shown in the figures) may also be included between the reflective layer 105 and the dielectric layer 104. The ohmic contact layer forms multiple regions of ohmic contact with the second conductive semiconductor layer 103 by filling at least a plurality of openings in the dielectric layer 104, so as to uniformly transfer current from the reflective layer 105 and the bonding layer 106 to the semiconductor epitaxial stack 1. Therefore, the ohmic contact layer does not contact one side of the second conductive semiconductor layer 103 in a completely flat manner. The ohmic contact layer may be formed from at least one of a transparent conductive layer such as ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, and ATO. Alternatively, a light-transmitting conductive layer and a metal may be used. The metal is preferably an alloy material, such as gold-zinc, gold-germanium, gold-germanium-nickel, or gold-beryllium. The ohmic contact layer may have a single-layer or multi-layer structure.

[0069] The reflective layer 105 and the dielectric layer 104 can form an ODR reflective structure, which returns the light radiated by the semiconductor epitaxial stack 1 toward the substrate 100 to the semiconductor epitaxial stack 1 and radiates it out from the light-emitting side, thereby improving the light extraction efficiency.

[0070] In the prior art, to improve the emission efficiency of light emitted from the active layer 102 from the light-emitting side and sidewalls of the semiconductor light-emitting element, the light-emitting surface and sidewalls of the semiconductor light-emitting element are roughened. However, during the roughening process, impurities may exist on the sidewalls of the semiconductor epitaxial stack, thereby causing leakage current problems in the semiconductor light-emitting element.

[0071] To address the leakage current problem caused by sidewall roughening in semiconductor light-emitting elements, existing technologies use masks to protect the sidewalls from roughening. However, due to the influence of the mask, such as... Figure 1 As shown in the dashed box, there is a flat area at the edge of the surface of the first conductive semiconductor layer, and there is also a flat area in the connection area of ​​the first mesa near the sidewall. This will affect the improvement of the luminous brightness of the semiconductor light-emitting element.

[0072] To address the problems existing in the prior art, the present invention proposes a semiconductor light-emitting element, such as... Figure 2 As shown, excluding the area covered by the front electrode 107, the surface of the first conductive semiconductor layer 101 away from the active layer 102 has at least a roughened region. In this embodiment, it is preferable that the edge region of the first conductive semiconductor layer 101 has a roughened structure, and preferably the width of the edge region with the roughened structure on the first conductive semiconductor layer is in the range of 0.5~3μm. The surface roughness of the sidewall is less than the surface roughness of the roughened region of the first conductive semiconductor layer. Preferably, the roughness of the roughened region of the first conductive semiconductor layer is in the range of 0.5~3μm. The surface roughness of the sidewall is less than or equal to 0.2μm.

[0073] The semiconductor light emitting element further comprises a first mesa S1, as shown in Figure 2 The first mesa S1 is formed on the second conductive type semiconductor layer 103 and does not overlap with the active layer 102. The side wall extends to connect with the first mesa S1 to form a connecting part C1. Figure 3 The connecting part C1 is a partial enlarged view of the first mesa S1, as shown in Figure 3 The connecting part C1 has a rough structure on one side of the first mesa S1, and the connecting part on the side of the side wall does not have a rough structure. The width of the connecting part on the side of the first mesa with a rough structure is d1, and the range of d1 is preferably 0.5-3 μm. The surface roughness of the connecting part on the side of the first mesa with a rough structure is 0.2-1 μm, and the surface roughness of the connecting part on the side of the side wall is less than or equal to 0.2 μm. The distance from the edge of the first mesa S1 to the side wall is defined as the width D1 of the first mesa, and the range of the width of the first mesa is preferably 0.1-10 μm, and more preferably, the range of the width of the first mesa S1 is 4-7 μm.

[0074] In some optional embodiments, as shown in Figure 2 The first mesa S1 also has a flat area, which is located at the edge of the semiconductor light emitting element.

[0075] In some embodiments, the first mesa S1 has a rough structure, as shown in Figure 4 The surface roughness of the first mesa is preferably in the range of 0.2-1 μm. The roughness of the side wall is less than that of the first mesa. The surface roughness of the side wall is less than or equal to 0.2 μm.

[0076] The rough structure of the first mesa can enhance the light emitted from the active layer of the semiconductor light emitting element to exit from the first mesa, thereby enhancing the luminous brightness of the semiconductor light emitting element.

[0077] The semiconductor light emitting element further comprises a second mesa S2, as shown in Figure 2As shown, the second mesa S2 is formed on the second conductive type semiconductor layer 103, exposing the second sidewall of the second conductive type semiconductor layer 103. The distance from the edge of the second mesa to the second sidewall is defined as the width D2 of the second mesa, preferably the width of the second mesa ranges from 0.1 to 30 μm, more preferably the width of the second mesa ranges from 8 to 15 μm. The distance from the second mesa S2 to the lower surface of the semiconductor epitaxial stack 1 is defined as the height H1 of the second mesa S2, preferably the height H1 of the second mesa S2 ranges from 0.2 to 3.5 μm. The roughness of the second mesa S2 is less than the roughness of the first mesa S1. Preferably the surface roughness of the second mesa S2 is less than or equal to 0.2 μm.

[0078] The active layer 102 of the semiconductor light emitting element emits light from the second sidewall. Since the second conductive type semiconductor layer has light absorption effect, the formation of the second mesa can reduce the light absorption of the second conductive type semiconductor layer 103, thereby enhancing the light emitting brightness of the semiconductor light emitting element. Meanwhile the second mesa S2 facilitates the positioning of the subsequent cleaving and die bonding operations.

[0079] The front electrode 107 is disposed on the light emitting side of the semiconductor epitaxial stack 1. In some preferred embodiments, the front electrode 107 can include a pad electrode and an extension electrode, wherein the pad electrode is mainly used for external wire bonding during packaging. The pad electrode can be designed into different shapes according to the actual wire bonding needs, specifically like a cylinder or a square or other polygons. The extension electrode can be formed in a predetermined pattern shape, and the extension electrode can have various shapes, specifically like a strip.

[0080] The semiconductor light emitting element further includes a back electrode 109, which in the present embodiment is formed in an integral form on the back side of the substrate 100. The substrate 100 of the present embodiment is a conductive support substrate, and the front electrode 107 and the back electrode 109 are formed on both sides of the substrate 100 to achieve vertical current flow through the semiconductor epitaxial stack 1, providing uniform current density.

[0081] The front electrode 107 and the back electrode 109 are preferably made of metal materials. The front electrode 107, at least the pad electrode part and the extension electrode part, can further include a metal material to achieve good ohmic contact with the semiconductor epitaxial stack 1.

[0082] The semiconductor light emitting element further includes an insulating protective layer 108 covering the surface and sidewall of the first conductive type semiconductor layer of the semiconductor light emitting element away from the active layer, to protect the semiconductor light emitting element from environmental damage, such as moisture or mechanical damage.

[0083] In some alternative embodiments, the insulating protective layer 108 may also cover the edge of the front electrode 107 and the sidewall of the front electrode 107.

[0084] like Figure 4 As shown, the difference between this embodiment and Embodiment 1 is that in Embodiment 1, the second mesa S2 is located above the second conductive semiconductor layer 103, while in this embodiment, the second mesa S2 penetrates the second conductive semiconductor layer 103 and is located above the reflective layer 105. Since the second conductive semiconductor layer 103 has a light absorption effect, the design of the second mesa in this embodiment can reduce the light absorption of the second conductive semiconductor layer 103 and improve the light emission of the semiconductor light-emitting element. Figure 5 As shown, the surface of the first platform S1 has a roughened structure.

[0085] In some embodiments, such as Figure 6 As shown, the first platform has a roughened region and a flat region. The roughened region is located on the side of the connecting portion close to the first platform S1, and the flat region is located at the edge of the semiconductor light-emitting element.

[0086] The fabrication process of the semiconductor light-emitting element in the above embodiments will be described in detail below.

[0087] like Figure 7 As shown, an epitaxial structure is first provided, which specifically includes the following steps: providing a growth substrate 10, preferably a gallium arsenide substrate, on which a semiconductor epitaxial stack 1 is grown by an epitaxial process such as MOCVD. The semiconductor epitaxial stack 1 includes a first conductive semiconductor layer 101, a second conductive semiconductor layer 103, and an active layer 102 located between the first and second conductive semiconductor layers, sequentially stacked on the surface of the growth substrate 10. Preferably, the semiconductor epitaxial stack 1 is an AlGaInP-based material, and the active layer radiates red or infrared light.

[0088] Next, a dielectric layer 104 is prepared on the side of the second conductive semiconductor layer 103 away from the active layer 102. In this embodiment, the dielectric layer is preferably SiO2 or MgF2. An opening is formed in the dielectric layer 104 using a mask and etching process. Then, a reflective layer 105 is prepared on the side of the dielectric layer 104 away from the second conductive semiconductor layer 103. A bonding layer 106 is formed on the side of the reflective layer 105, and the substrate 100 is bonded using a bonding process. Next, the substrate 10 is removed using a wet etching process to obtain the desired result. Figure 8 The structure shown;

[0089] Next, as Figure 9As shown, a front electrode 107 is formed on the first conductive semiconductor layer 101. The front electrode 107 may include a main electrode and an extension electrode of the wire bonding portion, wherein the main electrode and the extension electrode respectively provide the wire bonding position and the horizontal current extension.

[0090] Then, as Figure 10 As shown, the surface of the first conductive semiconductor layer 101 away from the active layer 102 is roughened by masking and etching processes. In this embodiment, a wet etching method is preferred, using a mixture of one or more of sulfuric acid, phosphoric acid, nitric acid, acetic acid, oxalic acid, and hydrofluoric acid for roughening.

[0091] Then, as Figure 11 As shown, a first mesa S1 is formed by dry etching. The first mesa S1 is located above the second conductive semiconductor layer 103, exposing the sidewalls of the first conductive semiconductor layer 101 and the active layer 102. The sidewalls extend from and connect to the first mesa S1 to form a connecting portion C1. The connecting portion C1 has a roughened structure on one side of the first mesa. This roughened structure can improve the emission of light radiated from the active layer in the semiconductor light-emitting element from the first mesa S1, thereby increasing the brightness of the semiconductor light-emitting element. In some optional embodiments, the surface of the first mesa has a roughened structure. In some optional embodiments, the edge of the first mesa has a flat area.

[0092] Then, as Figure 12 As shown, a second mesa is formed on the second conductive semiconductor layer using a masking and dry etching process. Since the second conductive semiconductor layer 103 has a light-absorbing effect, preferably the second mesa S2 penetrates the second conductive semiconductor layer, exposing the sidewalls of the second conductive semiconductor layer 103. In some embodiments, the second mesa S2 may also be located above the second conductive semiconductor layer, exposing the sidewalls of the second conductive semiconductor layer.

[0093] like Figure 13 As shown, an insulating protective layer 108 is formed on the surface and sidewalls of the first conductive semiconducting layer 101 away from the active layer 102, and a back electrode 109 is formed on the back side of the substrate 100.

[0094] This invention employs a process of roughening the surface beforehand, which allows the surfaces of the first conductive semiconductor layer 101 and the first mesa S1 to have a roughened structure. The sidewalls of the first conductive semiconductor layer and the active layer remain unroughened, thus resolving the leakage problem caused by sidewall roughening. Simultaneously, the roughening of the first conductive semiconductor layer and the first mesa enhances the light emission of the semiconductor light-emitting element, improving its light extraction efficiency. This invention also proposes a method for forming the second mesa, which reduces light absorption in the second conductive semiconductor layer and increases the amount of light radiated from the active layer emitted from the second sidewall, further enhancing the brightness of the semiconductor light-emitting element.

[0095] The semiconductor light-emitting element provided by this invention can be widely used in display, indoor and outdoor lighting, plant lighting and other fields.

[0096] Specifically, this embodiment provides as follows: Figure 14 The package shown includes a mounting substrate 30, a semiconductor light-emitting element 10, and a sealing resin 304. At least one semiconductor light-emitting element in the foregoing embodiments is mounted on the mounting substrate 30, which can be a printed circuit board (PCB), such as a metal-core printed circuit board (MCPCB), a metal printed circuit board (MPCB), or a flexible printed circuit board (FPCB). One surface of the mounting substrate 30 has electrically isolated first electrode terminals 301 and second electrode terminals 302. The semiconductor light-emitting element 10 is located on one surface of the mounting substrate 30 and is electrically connected to the mounting substrate 30 via a wire 303. The sealing resin 304 may include a wavelength conversion material, such as a phosphor and / or quantum dots. The sealing resin 304 has a dome-shaped lens structure with a convex surface, and the orientation angle of the emitted light can be adjusted by introducing different structures.

[0097] It should be noted that the above embodiments are only used to illustrate the present invention and are not intended to limit the present invention. Those skilled in the art can make various modifications and changes to the present invention without departing from the spirit and scope of the present invention. Therefore, all equivalent technical solutions also fall within the scope of the present invention, and the patent protection scope of the present invention should be defined by the scope of the claims.

Claims

1. A semiconductor light emitting device, comprising: a substrate; a semiconductor epitaxial stack on the substrate, including a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active layer between the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer; a light emitting surface on a side of the first-conductivity-type semiconductor layer away from the substrate; a sidewall formed on an edge of the first-conductivity-type semiconductor layer and the active layer; a first mesa formed on the second-conductivity-type semiconductor layer and not overlapping the active layer; the sidewall extending to connect with the first mesa to form a connecting portion, the connecting portion having a roughened structure on a side of the first mesa; a roughened structure on an upper surface of the first-conductivity-type semiconductor layer away from the substrate; a reflective layer between the semiconductor epitaxial stack and the substrate; a second mesa on an edge of the semiconductor light emitting device, the second mesa being on the reflective layer; a first mesa width D1 defined as a distance from an edge of the first mesa to the sidewall, the D1 being in a range of 0.5-10 μm. The second mesa is formed on the reflective layer and not overlapping the second-conductivity-type semiconductor layer. The first-conductivity-type semiconductor layer has a roughened structure on an upper surface of the first-conductivity-type semiconductor layer away from the substrate. A first electrode is on the first-conductivity-type semiconductor layer and electrically connected to the first-conductivity-type semiconductor layer, and the first-conductivity-type semiconductor layer has at least one roughened region other than the first electrode. An edge region of the first-conductivity-type semiconductor layer has a roughened structure. The edge region of the first-conductivity-type semiconductor layer having a roughened structure has a width in a range of 0.5-3 μm. A roughness of a surface of the sidewall is less than a roughness of a surface of the first mesa. A roughness of the sidewall of the active layer and the first-conductivity-type semiconductor layer is less than or equal to 0.2 μm. A roughness of the roughened region of the first-conductivity-type semiconductor layer is in a range of 0.5-3 μm. The D1 is in a range of 4-7 μm. A roughness of a surface of the second mesa is less than a roughness of the first mesa.

2. The semiconductor light emitting element according to claim 1, wherein: The roughness of the surface of the second mesa is less than or equal to 0.2 μm.

3. The semiconductor light emitting element according to claim 1, wherein: A second mesa width D2 is defined as a distance from an edge of the second mesa to the second sidewall, the D2 being in a range of 0.1-30 μm.

4. The semiconductor light emitting element according to claim 1, wherein: The D2 is in a range of 8-15 μm.

5. The semiconductor light emitting element according to claim 4, wherein: The semiconductor light emitting device emits red light or infrared light.

6. The semiconductor light emitting element according to claim 5, wherein: The semiconductor light emitting device is at least one of the semiconductor light emitting devices of any one of claims 1-15.

7. The semiconductor light emitting element according to claim 1, wherein: ​ 8. The semiconductor light emitting element according to claim 7, wherein: ​ 9. The semiconductor light emitting element according to claim 4, wherein: ​ 10. The semiconductor light emitting element according to claim 1, wherein: ​ 11. The semiconductor light emitting element according to claim 1, wherein: ​ 12. The semiconductor light emitting element according to claim 11, wherein: ​ 13. The semiconductor light- emitting element according to claim 1, further comprising a second side wall at an edge of the second-conductivity-type semiconductor layer, characterized in that: ​ 14. The semiconductor light emitting element according to claim 13, wherein: ​ 15. The semiconductor light- emitting element according to claim 1, wherein: ​ 16. A light emitting diode package comprising a mounting substrate and at least one semiconductor light emitting element mounted on the mounting substrate, characterized by: ​

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