A memristor Lorentz chaotic signal generator with adjustable amplitude

Abstract

The invention discloses a memristor Lorentz amplitude-adjustable chaotic signal generator, comprising: a memristor, a first multiplier, a first resistor, a second resistor, a first capacitor and a second capacitor; wherein an input signal X and an input signal Y are connected to each other through the first resistor, the input signal X is connected to one end of the first capacitor, and the other end of the first capacitor is grounded; the input signal X is connected to one end of the second capacitor, and the other end of the second capacitor is grounded; meanwhile, the input signal X is connected to an input port Y1 of the first multiplier, the input port Y2 of the first multiplier is grounded, the output port W of the first multiplier is connected to each other through the second resistor, the output port Z of the first multiplier is directly connected to the input signal Y, the negative pole of a direct current power supply V1 is grounded, the positive pole is connected to the input port X1 of the first multiplier, and the memristor is connected to the input port X2 of the first multiplier.

Description

Technical Field

[0001] The invention relates to a signal generator, in particular to a memristor Lorentz amplitude-adjustable chaotic signal generator. Background Art

[0002] Regarding memristor chaotic circuits, relevant patents have given different circuit implementation schemes. For example, patent [application number CN 201810228649.7] proposes a comprehensive chaotic circuit, which consists of four multipliers and eight operational amplifiers. By selecting corresponding resistors, corresponding chaotic attractors are generated; patent [application number CN 202110353867.5] proposes a fractional-order coupled memristor chaotic circuit, which is composed of a coupled memristor module with fractional-order capacitors and a chaotic circuit module with fractional-order capacitors to form a fractional-order coupled memristor chaotic circuit, which can produce a variety of different dynamic behaviors; patent [application number CN201910561036.X] proposes a memristor-based four-dimensional hyperchaotic circuit, which consists of five AD633JN multipliers, four LF347N amplifiers, twelve resistors, and four capacitors. By adjusting the memristor weight value in the circuit, rich dynamic behaviors are generated. However, none of these patents contain content about circuit simplification.

[0003] The existing patented technology uses integral operation circuits, has many reverse proportional circuits, has a relatively simple model, and cannot achieve dynamic amplitude modulation. Summary of the invention

[0004] Purpose of the invention: The technical problem to be solved by the present invention is to provide a memristor Lorentz adjustable amplitude chaotic signal generator in view of the deficiencies in the prior art.

[0005] In order to solve the above technical problems, the present invention discloses a memristor Lorentz adjustable amplitude chaotic signal generator, comprising: a memristor, a first multiplier, a first resistor, a second resistor, a first capacitor and a second capacitor;

[0006] The input signal X and the input signal Y are connected to each other through a first resistor, the input signal X is connected to one end of the first capacitor, and the other end of the first capacitor is grounded; the input signal X is connected to one end of the second capacitor, and the other end of the second capacitor is grounded; at the same time, the input signal X is connected to an input port Y1 of the first multiplier, the input port Y2 of the first multiplier is grounded, the output port W of the first multiplier is connected to each other through the second resistor, the output port Z of the first multiplier is directly connected to the input signal Y, the negative electrode of the DC power supply V1 is grounded, the positive electrode is connected to the input port X1 of the first multiplier, and the memristor is connected to the input port X2 of the first multiplier.

[0007] Beneficial effects:

[0008] The present invention realizes the circuit simulation of the system by using a multiplier and several linear elements, and the amplitude of the chaotic signal can be adjusted by modifying the parameters of the memristor feedback circuit in the circuit. The memristor Lorentz amplitude adjustable chaotic signal generator designed by the present invention simplifies the traditional circuit design structure and reduces the application of multipliers, which not only makes the circuit more concise, but also greatly improves the utilization rate of the multiplier and reduces the circuit design cost. The system can realize the amplitude control of the chaotic signal by adjusting the parameters, so it can be widely used in the fields of Internet of Things confidential communication, signal detection, radar and communication.

[0009] The amplitude of the chaotic waveform output by the oscillation circuit can be controlled by a certain resistance parameter in the memristor circuit, that is, the size of the R6 resistor is used to control the signal amplitude, so that it can carry the transmission of different IoT data to ensure communication confidentiality. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments, and the above and / or other advantages of the present invention will become more clear.

[0011] Figure 1 Schematic diagram of a symmetrical double-wing chaotic attractor.

[0012] Figure 2 Schematic diagram of amplitude control of symmetrical double-wing chaotic attractor.

[0013] Figure 3 Schematic diagram of signal changes when the amplitude of the symmetrical double-wing chaotic attractor is controlled.

[0014] Figure 4 This is a schematic circuit diagram of the memristor Lorentz adjustable amplitude chaotic signal generator proposed in the present invention.

[0015] Figure 5 Schematic diagram of a memristor circuit.

[0016] Figure 6 Schematic diagram of the attractor on the yx plane displayed by the oscilloscope in the circuit simulation experiment.

[0017] Figure 7 Schematic diagram of the x(t) signal changes displayed by the oscilloscope in the circuit simulation experiment.

[0018] Figure 8 Schematic diagram of the attractor in the yz plane displayed by the oscilloscope in the circuit simulation experiment.

[0019] Fig. 9 This is a schematic diagram of the y(t) signal changes displayed by the oscilloscope in the circuit simulation experiment. DETAILED DESCRIPTION

[0020] As a new type of nonlinear element, memristor is widely used in chaotic systems. In recent years, with the development of memristors, some classical systems can be successfully transformed into valuable memristor chaotic systems. The construction and design of memristor chaotic circuits have important theoretical, physical significance and engineering application value.

[0021] The present invention includes a memristor feedback circuit, an integral operation circuit, and a reverse proportional circuit, and uses a diode to realize the operation of absolute value. The device parameters of the memristor can be used to change the amplitude of the memristor chaotic signal, and the amplitude control of the chaotic signal based on the system parameters is realized. In addition, the circuit simulation of the system is realized by using a multiplier and several linear elements, the number of multipliers is reduced, the circuit is more concise, and the application cost is reduced. The amplitude of the chaotic waveform output by the oscillation circuit can be controlled by a certain resistance parameter in the memristor circuit, that is, the size of the R6 resistance is used to control the signal amplitude, so that the transmission of different Internet of Things data can be carried to ensure communication confidentiality.

[0022] (1) Simplified modeling of memristor Lorentz chaotic oscillator

[0023] The dimensionless mathematical model of the memristor Lorentz adjustable amplitude chaotic signal generator is as follows:

[0024]

[0025] The corresponding memristor equation is:

[0026]

[0027] In formula (1), x, y, z are system state variables, and parameters a, b, c, and m are constants. When the parameters a = 10, b = 8 / 3, c = 28, and m = 1, and the initial values ​​are (1, 1, 1), the system expression (1) produces a symmetrical double-wing chaotic attractor similar to the Lorenz system. The attractor is as follows: Figure 1 As shown in the figure, the attractor amplitude control diagram controlled by parameter m is as follows Figure 2 As shown in Figure 2, the signal changes caused by regulating m are as follows: Figure 3 shown.

[0028] In the circuit design of system (1), the proposed Lorentz memristor system is simplified by relying on the inherent characteristics of the multiplier and the resistor-capacitor coupling method. The main circuit diagram of the simplified memristor Lorentz chaotic oscillator is shown in Figure 4 When designing the circuit, due to the voltage requirement, the quadratic product term of the second dimension is divided by 6 to meet the system requirements. Therefore, a W(z) / 6 memristor module is constructed. Here, the coefficients of each feedback term in the system are realized by the joint setting of resistance and capacitance. The circuit equation corresponding to the system expression (1) is formula (3):

[0029]

[0030] In the overall circuit of the memristor Lorentz adjustable amplitude chaotic signal generator, the input signal x and the input signal y are connected to each other through the resistor R1, the input signal x is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded; the input signal x is connected to one end of the capacitor C2, and the other end of the capacitor C2 is grounded; at the same time, the input signal x is connected to the input port Y1 of the multiplier U1, the input port Y2 of the multiplier U1 is grounded, the output port W of the multiplier U1 is connected to the input signal y through the resistor R2, and the output port Z of the multiplier U1 is directly connected to the input signal y. The negative pole of the DC power supply V1 is grounded, the positive pole is connected to the input port X1 of the multiplier U1, the memristor W(z) / 6 is connected to the input port X2 of the multiplier U1, and the multiplier model used is AD633JN.

[0031] The schematic diagram of the memristor equivalent module circuit of the memristor Lorentz adjustable amplitude chaotic signal generator is as follows: Figure 5As shown, the input signal x is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the inverting input port of the operational amplifier U2; one end of the resistor R4 is connected to the inverting input port of the operational amplifier U2, and the other end is connected to the output port of the operational amplifier U2; the output port of the operational amplifier U2 is connected to the input port X1 of the multiplier U8, the input signal x is connected to the input port Y1 of the multiplier U8, the input ports X2 and Y2 of the multiplier U8 are grounded, the output port W of the multiplier U8 is connected to one end of the resistor R6, and the output port Z of the multiplier U8 is grounded , the inverting output terminal of the operational amplifier U2 is connected to the inverting input terminal of the operational amplifier U3 through the resistor R17; the other end of the resistor R6 is connected to the inverting input port of the operational amplifier U3; one end of the resistor R5 is connected to one end of the capacitor C3, and is also connected to the inverting input terminal of the operational amplifier U3; the other end of the resistor R5 and the other end of the capacitor C3 are connected to the output port of the operational amplifier U3; one end of the resistor R7 is connected to the output port of the operational amplifier U3, and the other end of the resistor R7 is respectively connected to the inverting input port of the operational amplifier U4, the resistors R8 and R9 end; the cathode of diode D1 is connected to the anode of diode D2, and the anode of diode D1 is connected to resistor R9 and resistor R10; the cathode of diode D2 is connected to the positive input port of operational amplifier U5; the other end of resistor R10 is respectively connected to the inverting input port of operational amplifier U5 and resistor R11; the other end of resistor R11 is respectively connected to the output port of operational amplifier U5 and resistor R12; the other end of resistor R12 is connected to the inverting input port of operational amplifier U6; the positive electrode of DC power supply V2 is grounded, and the negative electrode is connected to resistor R13; resistor R13 The other end is connected to the inverting input port of the operational amplifier U6; one end of the resistor R14 is connected to the inverting input port of the operational amplifier U6, and the other end is connected to the output port of the operational amplifier U6; one end of the resistor R15 is connected to the output port of the operational amplifier U6, and the other end is connected to the inverting input port of the operational amplifier U7; one end of the resistor R16 is connected to the inverting input port of the operational amplifier U7, and the other end is connected to the output port W(z) / 6 of the operational amplifier U7; the positive input ports of the operational amplifiers U2, U3, U4, U6, and U7 are all grounded.

[0032] The circuit simulation experiment of the memristor Lorentz adjustable amplitude chaotic signal generator is shown on the oscilloscope. Figure 6 As shown, it can be seen that the circuit simulation results are consistent with the numerical simulation results. The parameters of the circuit components in the circuit simulation experiment are: C1 = 15nF, C2 = 100nF, resistor R1 = 10kΩ, resistor R2 = 0.17kΩ, V1 = 4.5V, C3 = 10nF, resistor R3 = R4 = R7 = R8 = R9 = R10 = R11 = R12 = R13 = R14 = R15 = R16 = 100kΩ, resistor R5 = 37.5kΩ, resistor R6 = 10kΩ, V2 = 0.167V, LM741CN is selected as the operational amplifier, and AD633JN is selected as the multiplier.

[0033] (2) Amplitude Control of Memristor Lorentz Adjustable Amplitude Chaotic Signal Generator

[0034] By changing the parameter m in the memristor Lorentz adjustable amplitude chaotic signal generator system (1), the amplitude of the output signal can be adjusted. When the parameters a = 10, b = 8 / 3, c = 28 and the initial value is (1, 1, 1), the chaotic attractor of the system (1) under different parameters m is as follows Figure 2 As shown, m=1 is a gray attractor and m=4 is a black attractor.

[0035] In the circuit simulation experiment, the amplitude of the output signal is controlled by changing the value of R6 in the memristor circuit, such as Figure 6 The following is the attractor of the yx plane displayed by the circuit simulation experiment oscilloscope, where Figure 6 (a) shows the attractor when the resistance R6 = 10kΩ, Figure 6 (b) shows the attractor when the resistance R6 = 5kΩ. The x(t) signal displayed by the oscilloscope in the circuit simulation experiment changes as shown in Figure 7 As shown, Figure 7 (a) shows the waveform when the resistance R6 = 10kΩ. Figure 7 (b) shows the waveform when the resistance R6 = 5kΩ. Figure 8 The following is the attractor of the yz plane displayed by the circuit simulation experiment oscilloscope, where Figure 8 (a) shows the attractor when the resistance R6 = 10kΩ, Figure 8 (b) shows the attractor when the resistance R6 = 5kΩ. The y(t) signal displayed by the oscilloscope in the circuit simulation experiment changes as shown in Fig. 9 As shown, Fig. 9 (a) shows the waveform when the resistance R6 = 10kΩ. Fig. 9 (b) shows the waveform when the resistance R6 = 5kΩ.

[0036] In a specific implementation, the present application provides a computer storage medium and a corresponding data processing unit, wherein the computer storage medium can store a computer program, and when the computer program is executed by the data processing unit, the invention content of a memristor Lorentz adjustable amplitude chaotic signal generator provided by the present invention and some or all of the steps in each embodiment can be executed. The storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0037] Those skilled in the art can clearly understand that the technical solutions in the embodiments of the present invention can be implemented by means of computer programs and their corresponding general hardware platforms. Based on this understanding, the technical solutions in the embodiments of the present invention are essentially or partly contributed to the prior art can be embodied in the form of a computer program, i.e., a software product, which can be stored in a storage medium and includes several instructions for enabling a device including a data processing unit (which can be a personal computer, a server, a single-chip microcomputer, a MUU or a network device, etc.) to execute the methods described in various embodiments of the present invention or certain parts of the embodiments.

[0038] The present invention provides a concept and method of a memristor Lorentz adjustable amplitude chaotic signal generator. There are many methods and ways to implement the technical solution. The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention. All components not specified in this embodiment can be implemented using existing technologies.

Claims

1. A memristor Lorentz amplitude-adjustable chaotic signal generator, characterized in that: include: Memristor W(z) / 6, a first multiplier (U1), a first resistor (R1), a second resistor (R2), a first capacitor (C1) and a second capacitor (C2); The input signal X and the input signal Y are connected to each other through a first resistor (R1), the input signal X is connected to one end of a first capacitor (C1), and the other end of the first capacitor (C1) is grounded; the input signal X is connected to one end of a second capacitor (C2), and the other end of the second capacitor (C2) is grounded; at the same time, the input signal X is connected to an input port Y1 of a first multiplier (U1), and an input port Y2 of the first multiplier (U1) is grounded; an output port W of the first multiplier (U1) is connected to the input signal Y through a second resistor (R2), an output port Z of the first multiplier (U1) is directly connected to the input signal Y, a negative electrode of a DC power supply V1 is grounded, and a positive electrode is connected to an input port X1 of the first multiplier (U1), and a memristor W(z) / 6 is connected to an input port X2 of the first multiplier (U1); Wherein, the memristor W(z) / 6 comprises: a third resistor (R3), a fourth resistor (R4), a fifth resistor (R5), a sixth resistor (R6), a seventh resistor (R7), an eighth resistor (R8), a ninth resistor (R9), a tenth resistor (R10), an eleventh resistor (R11), a twelfth resistor (R12), a thirteenth resistor (R13), a fourteenth resistor (R14), a fifteenth resistor (R15), a sixteenth resistor (R16), a seventeenth resistor (R17), a third capacitor (C3), a first diode (D1), a second diode (D2), a first operational amplifier (U2), a second operational amplifier (U3), a third operational amplifier (U4), a fourth operational amplifier (U5), a fifth operational amplifier (U6), a sixth operational amplifier (U7), and a second multiplier (U8); The input signal X is connected to one end of the third resistor (R3), and the other end of the third resistor (R3) is connected to the inverting input port of the operational amplifier U2; one end of the resistor R4 is connected to the inverting input port of the first operational amplifier (U2), and the other end is connected to the output port of the first operational amplifier (U2); the output port of the first operational amplifier (U2) is connected to the input port X1 of the second multiplier (U8), the input signal X is connected to the input port Y1 of the second multiplier (U8), the input ports X2 and Y2 of the second multiplier (U8) are grounded, the output port W of the second multiplier (U8) is connected to one end of the sixth resistor (R6), the output port Z of the second multiplier (U8) is grounded, and the inverting input port of the first operational amplifier (U2) is connected to the output port X1 of the second multiplier (U8). The output end is connected to the inverting input end of the second operational amplifier (U3) through a seventeenth resistor (R17); the other end of the sixth resistor (R6) is connected to the inverting input port of the second operational amplifier (U3); one end of the fifth resistor (R5) is connected to one end of the third capacitor (C3), and is connected to the inverting input end of the second operational amplifier (U3); the other end of the fifth resistor (R5) and the other end of the third capacitor (C3) are connected to the output port of the second operational amplifier (U3); one end of the seventh resistor (R7) is connected to the output port of the second operational amplifier (U3), and the other end of the seventh resistor (R7) is respectively connected to the inverting input port of the third operational amplifier (U4), one end of the eighth resistor (R8) and one end of the ninth resistor (R9) ; the cathode of the first diode (D1) is connected to the anode of the second diode (D2), and the anode of the first diode (D1) is connected to the ninth resistor (R9) and the tenth resistor (R10); the cathode of the second diode (D2) is connected to the non-inverting input port of the fourth operational amplifier (U5); the other end of the tenth resistor (R10) is respectively connected to the inverting input port of the fourth operational amplifier (U5) and the eleventh resistor (R11); the other end of the eleventh resistor (R11) is respectively connected to the output port of the fourth operational amplifier (U5) and the twelfth resistor (R12); the other end of the twelfth resistor (R12) is connected to the inverting input port of the fifth operational amplifier (U6); the positive electrode of the DC power supply V2 is grounded, and the negative electrode is connected to the thirteenth resistor ( R13); the other end of the thirteenth resistor (R13) is connected to the inverting input port of the fifth operational amplifier (U6); one end of the fourteenth resistor (R14) is connected to the inverting input port of the fifth operational amplifier (U6), and the other end of the fourteenth resistor (R14) is connected to the output port of the fifth operational amplifier (U6); one end of the fifteenth resistor (R15) is connected to the output port of the fifth operational amplifier (U6), and the other end of the fifteenth resistor (R15) is connected to the inverting input port of the sixth operational amplifier (U7); one end of the sixteenth resistor (R16) is connected to the inverting input port of the sixth operational amplifier (U7), and the other end is connected to the output port of the sixth operational amplifier (U7), as the output of the memristor W(z) / 6;The non-inverting input ports of the first operational amplifier (U2), the second operational amplifier (U3), the third operational amplifier (U4), the fourth operational amplifier (U5), the fifth operational amplifier (U6) and the sixth operational amplifier (U7) are all grounded. ; 2. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 1, characterized in that: The design method of the memristor Lorentz amplitude-adjustable chaotic signal generator comprises: Step 1, constructing a mathematical model of a memristor Lorentz amplitude-adjustable chaotic signal generator; Step 2, setting the parameters of the mathematical model and constructing a memristor equation; Step 3, construct the circuit equation.

3. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 2, characterized in that: The mathematical model described in step 1, i.e., the dimensionless mathematical model of the memristor Lorentz adjustable amplitude chaotic signal generator, is as follows: Where x, y and z are system state variables, parameters a, b, c and m are constants, and W(z) is the memristor equation. and It means to take the derivative with respect to the x, y and z variables respectively.

4. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 3, characterized in that: The specific method for setting the parameters of the mathematical model described in step 2 includes: in the dimensionless mathematical model, when the parameters a=10, b=8 / 3, c=28, m=1, and the initial value of the system state variable is (1,1,1), the dimensionless mathematical model generates a symmetric double-wing chaotic attractor similar to the Lorentz system.

5. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 4, characterized in that: The method for constructing the memristor equation described in step 2 is: Where i is the current flowing through the memristor.

6. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 5, characterized in that: The circuit equation described in step 3 is as follows: Among them, R1, R2, R5, R6 and R 17 are the resistance values ​​of the first resistor (R1), the second resistor (R2), the fifth resistor (R5), the sixth resistor (R6) and the seventeenth resistor (R17) in the memristor-Lorentz adjustable amplitude chaotic signal generator circuit, and C1, C2 and C3 are the capacitance values ​​of the first capacitor (C1), the second capacitor (C2) and the third capacitor (C3) in the memristor-Lorentz adjustable amplitude chaotic signal generator circuit.

7. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 6, characterized in that: The signal amplitude of the signal generator is adjusted and controlled by changing the resistance value of the sixth resistor (R6) in the memristor.

8. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 7, characterized in that: The model of the first multiplier (U1) is AD633JN.

9. The memristor Lorentz amplitude-adjustable chaotic signal generator according to claim 8, characterized in that: The model of the first operational amplifier (U2), the second operational amplifier (U3), the third operational amplifier (U4), the fourth operational amplifier (U5), the fifth operational amplifier (U6) and the sixth operational amplifier (U7) is LM741CN.

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