A multi-state memory cell based on antiferromagnetism

Abstract

The application discloses a multi-state memory unit based on anti-ferromagnetic, and relates to the technical field of spintronic devices, and aims to solve the problems that multi-bit storage of a single device cannot be realized and data writing is difficult in the prior art.The application comprises a magnetic tunnel junction, a bottom electrode layer serving as a current writing line, the magnetic tunnel junction is used for storing data, and the bottom electrode layer is used for providing spin-orbit torque to write data; the magnetic tunnel junction at least comprises a fixed layer, a barrier layer and a free layer; the free layer is adjacent to an anti-ferromagnetic layer, and exchange bias is formed between the anti-ferromagnetic layer and the free layer; a current is applied on the corresponding bottom electrode to reverse the direction of the free layer and the exchange bias to a direction perpendicular to the current; and the free layer and the exchange bias are controlled to reverse the angle by applying the current in the current writing line at different angles, so that more intermediate states can be obtained in the whole magnetic resistance range. Not only can the application realize magnetic field-free writing of data, but also can realize extremely stable multi-bit storage.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of spintronic devices, and in particular to a multi-state memory cell based on anti-ferromagnetic. BACKGROUND

[0002] Spin Orbit Torque-Magnetic Random Access Memory (SOT-MRAM) has the advantages of non-volatility, high speed and low power consumption data writing (<1ns, <~0.1pJ / bit) and high device durability, and is a key technology that is expected to break through the power bottleneck of integrated circuits in the post-moore era. Current multi-state MRAM memory mainly realizes data writing according to STT effect, thermal assistance, magnetic field assistance and other means, and the related operations are relatively complicated; the multi-bit storage scheme of PMA-MTJ mainly uses stacked or series-connected multiple MTJs to realize multi-bit storage, which on the one hand does not truly realize single-device multi-bit storage, and on the other hand requires specific arrays and circuits to realize multi-bit storage, which is complex in design and difficult to realize one-step data writing.

[0003] Therefore, there is an urgent need to provide a more reliable multi-state memory cell based on anti-ferromagnetic. SUMMARY

[0004] The purpose of the present application is to provide a multi-state memory cell based on anti-ferromagnetic, which solves the problem that single-device multi-bit storage cannot be realized and data writing is difficult in the prior art.

[0005] In order to achieve the above-mentioned purpose, the present application provides the following technical scheme:

[0006] In a first aspect, the present application provides a multi-state memory cell based on anti-ferromagnetic, which comprises at least:

[0007] a magnetic tunnel junction, a bottom electrode layer as a current writing line; the magnetic tunnel junction is used for storing data, and the bottom electrode layer is used for providing spin orbit torque to write data; the magnetic tunnel junction comprises at least a fixed layer, a barrier layer and a free layer; the free layer is adjacent to an anti-ferromagnetic layer, and an exchange bias is formed between the anti-ferromagnetic layer and the free layer; a current is applied to the corresponding bottom electrode layer to flip the direction of the free layer and the exchange bias to a direction perpendicular to the current; the flipping angle of the free layer and the exchange bias is regulated by applying a current in a current writing line at different angles, so as to obtain more intermediate states in the entire magnetic resistance range.

[0008] Optionally, the magnetic tunnel junction can be cylindrical, elliptical cylindrical or cuboid; when the magnetic tunnel junction is elliptical cylindrical or cuboid, the easy magnetization axis of the free layer magnetic moment is the long axis of the ellipse or the cuboid.

[0009] Optionally, the free layer of the magnetic tunnel junction is a CoFeB alloy; the barrier layer is a metal oxide; and the fixed layer is a CoFeB alloy, on which a synthetic anti-ferromagnetic structure or an anti-ferromagnetic material is grown to fix the direction of the magnetic moment of the fixed layer.

[0010] Optionally, the free layer and the exchange bias are flipped to an arbitrary angle by the equivalent field vector addition of the spin-orbit torque by controlling the current size of the two current write lines applied to the bottom electrode simultaneously to form a multi-state.

[0011] Alternatively, more flipping angles of the free layer and the exchange bias are achieved by increasing the number of angles of the bottom electrode of the bottom electrode layer.

[0012] Optionally, the bottom electrode structure in the bottom electrode layer is:

[0013] A heavy metal material, an anti-ferromagnetic layer grown on a metal buffer layer, or a heavy metal, ferromagnetic, anti-ferromagnetic structure double-interface exchange bias;

[0014] The flipping angle of the free layer and the exchange bias is controlled by controlling the positive and negative directions of the current.

[0015] Optionally, the magnetic tunnel junction is a double-barrier layer magnetic tunnel junction, which comprises:

[0016] A first free layer, a first barrier layer, a fixed layer, a second barrier layer, and a second free layer;

[0017] Each free layer is pinned by the exchange bias of an anti-ferromagnetic layer, and the pinning direction of the pinning is determined by the magnetic field annealing direction; and the overall magnetoresistance range is determined by two superimposed magnetic tunnel junctions.

[0018] Optionally, the heavy metal material is used as the top electrode layer and the bottom electrode layer; after the preparation of the multi-angle bottom electrode current write line and the double-barrier magnetic tunnel junction is completed, a planarization process is performed, the top electrode is deposited, and the top electrode is patterned into a multi-angle top electrode current write line.

[0019] Optionally, the top and bottom current write lines are multi-angle current write lines; by applying positive and negative currents in the bottom electrode, the driving current flips the exchange bias direction of the first free layer and the first anti-ferromagnetic layer to the positive and negative directions perpendicular to the bottom electrode; by applying positive and negative currents in the top electrode, the driving current flips the exchange bias direction of the second free layer and the second anti-ferromagnetic layer to the positive and negative directions perpendicular to the top electrode.

[0020] Optionally, the upper and lower current write electrodes of the double-barrier layer magnetic tunnel junction are adjusted by using a quadrature or by increasing the number of angles of the top and bottom electrode layers to adjust the angle of the free layer and the exchange bias.

[0021] Optionally, the current spin-orbit torque vector field of the double barrier layer magnetic tunnel junction and the top and bottom orthogonal electrode structure is superimposed to regulate the free layer and the exchange bias angle.

[0022] Compared with the prior art, the application provides a multi-state memory unit based on anti-ferromagnetic. The multi-state memory unit comprises a magnetic tunnel junction and a bottom electrode layer as a current write line; the magnetic tunnel junction is used for storing data, and the bottom electrode layer is used for providing spin-orbit torque to write data; the magnetic tunnel junction at least comprises a fixed layer, a barrier layer and a free layer; the free layer is adjacent to an anti-ferromagnetic layer, and an exchange bias is formed between the anti-ferromagnetic layer and the free layer; a current is applied on the corresponding bottom electrode to flip the direction of the free layer and the exchange bias to a direction perpendicular to the current; the flip angle of the free layer and the exchange bias is regulated by applying a current in a current write line at different angles to obtain more intermediate states in the entire magnetic resistance range. By flipping the exchange bias field and the free layer magnetic moment direction based on the current write mode, not only can the data be written without a magnetic field, but also the multi-state memory unit equivalent field formed by the writing bottom electrode with a multi-angle design or the control of the orthogonal direction current size can be used to accurately control the angle of the exchange bias field and the free layer relative to the fixed layer, to realize extremely stable multi-bit storage; in addition, more storage states can be expanded by using a double MTJ structure and a stacked MTJ structure. BRIEF DESCRIPTION OF DRAWINGS

[0023] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:

[0024] Figure 1 (a) is a structure schematic diagram of the SOT device when the free layer has IMA provided by the application;

[0025] Figure 1 (b) is a top view of the SOT device when the MTJ is a cylinder provided by the application;

[0026] Figure 1 (c) is a top view of the SOT device when the MTJ is an elliptical cylinder provided by the application;

[0027] Figure 2 (a) is a schematic diagram of a basic orthogonal bottom electrode structure provided by embodiment 1 of the application;

[0028] Figure 2 (b) is a schematic diagram of a multi-angle bottom electrode structure provided by embodiment 1 of the application;

[0029] Figure 3(a) A schematic diagram of a structure using heavy metal as the bottom electrode to drive the antiferromagnetic exchange bias and free layer flipping for the embodiment 1 of the present application;

[0030] Figure 3 (b) A schematic diagram of a structure using an antiferromagnetic layer grown on a metal buffer layer as the bottom electrode to drive the antiferromagnetic exchange bias and free layer flipping for the embodiment 1 of the present application;

[0031] Figure 3 (c) A schematic diagram of a structure using "heavy metal / ferromagnetic / antiferromagnetic" bi- interface exchange bias as the bottom electrode to drive the antiferromagnetic exchange bias and free layer flipping for the embodiment 1 of the present application;

[0032] Figure 4 (a) A schematic diagram of a basic orthogonal top and bottom electrode structure for a double barrier magnetic tunnel junction for the embodiment 2 of the present application;

[0033] Figure 4 (b) A schematic diagram of a multi-angle top and bottom electrode structure for a double barrier magnetic tunnel junction for the embodiment 2 of the present application;

[0034] Figure 5 (a) A schematic diagram of using heavy metal as the bottom electrode to drive the free layer / antiferromagnetic exchange bias for a double barrier magnetic tunnel junction for the embodiment 2 of the present application;

[0035] Figure 5 (b) A schematic diagram of using an antiferromagnetic layer grown on a metal buffer layer as the bottom electrode to drive the free layer / antiferromagnetic exchange bias for a double barrier magnetic tunnel junction for the embodiment 2 of the present application;

[0036] Figure 5 (c) A schematic diagram of using "heavy metal / ferromagnetic / antiferromagnetic" bi- interface exchange bias as the bottom electrode to drive the free layer / antiferromagnetic exchange bias for a double barrier magnetic tunnel junction for the embodiment 2 of the present application;

[0037] Figure 6 A schematic diagram of different magnetic resistance states formed by driving current through a single bottom electrode for the embodiment 1 of the present application;

[0038] Figure 7 A schematic diagram of multiple states formed by driving current through orthogonal bottom electrodes simultaneously and vector field superposition for the embodiment 1 of the present application;

[0039] Figure 8 A schematic diagram of different magnetic resistance states formed by driving current through a single top and bottom electrode for the embodiment 2 of the present application;

[0040] Figure 9 A schematic diagram of multiple states formed by driving current through top or bottom orthogonal bottom electrodes simultaneously and vector field superposition for the embodiment 2 of the present application.

[0041] Reference signs:

[0042] 1 - magnetic tunnel junction, 2 - bottom electrode layer, 3 - fixed layer, 4 - barrier layer, 5 - free layer, 6 - anti-ferromagnetic layer, 7 - first bottom electrode, 8 - second bottom electrode, 9 - third bottom electrode, 10 - heavy metal layer, 11 - metal buffer layer, 12 - ferromagnetic layer, 13 - double barrier layer magnetic tunnel junction, 14 - first top electrode, 15 - second top electrode, 16 - third top electrode, 17 - first anti-ferromagnetic layer, 18 - second anti-ferromagnetic layer, 19 - first free layer, 20 - second free layer, 21 - first barrier layer, 22 - second barrier layer, 23 - first heavy metal layer, 24 - second heavy metal layer, 25 - first ferromagnetic layer, 26 - second ferromagnetic layer, 27 - capping layer. DETAILED DESCRIPTION

[0043] In order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, the words "first", "second" and the like are used to distinguish the same or similar items or items with basically the same function and role. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and do not limit the order. Those skilled in the art can understand that the words "first", "second" and the like do not limit the number and execution order, and the words "first", "second" and the like do not necessarily mean different.

[0044] It should be noted that in the present application, the words "exemplary" or "for example" are used to represent an example, illustration or description. Any embodiment or design scheme described as "exemplary" or "for example" in the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the words "exemplary" or "for example" are intended to present the relevant concept in a specific manner.

[0045] In the present application, "at least one" means one or more, and "multiple" means two or more. The association relationship of the associated objects is described, which means that there can be three relationships, for example, A and / or B, which can represent the following cases: A exists alone, A and B exist together, B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the front and rear associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single item or multiple items. For example, at least one of a, b or c can represent: a, b, c, a and b, a and c, b and c, or a, b and c, where a, b and c can be single or multiple.

[0046] The core structure of the SOT device mainly includes a magnetic tunnel junction (MTJ) for storing data and a SOT bottom electrode layer for providing spin orbit torque (SOT) to write data. The core structure of the MTJ is a fixed layer composed of ferromagnetic (FM) metal, a barrier layer composed of oxide, and a free layer composed of ferromagnetic metal. The magnetic moment direction of the free layer can be changed by external excitation, so as to switch in two directions of the easy magnetization axis, while the magnetic moment direction of the fixed layer is not easy to be changed by external excitation, so as to be fixed in a certain direction. When the magnetic moment directions of the free layer and the fixed layer are parallel, the MTJ presents low resistance; when the magnetic moment directions of the free layer and the fixed layer are anti-parallel, the MTJ presents high resistance. In this way, the high and low resistance states of the MTJ can be used to store data "1" and "0" respectively. The free layer in the MTJ can be perpendicular magnetic anisotropy (PMA) or in-plane magnetic anisotropy (IMA), Figure 1 (a) is a structure diagram of the SOT device when the free layer 5 has IMA provided by the application, Figure 1 (b) is a top view of the SOT device when the MTJ is a cylinder provided by the application; Figure 1 (c) is a top view of the SOT device when the MTJ is an elliptical cylinder provided by the application. When the free layer 5 has IMA, see Figure 1 (a), the magnetic moment of the free layer 5 is switched in the in-plane direction, that is, Figure 1 the ±y direction of (a). However, at this time, in order to make the free layer 5 have sufficient thermal stability, it is necessary to prepare the MTJ into an elliptical cylinder or a cuboid. Figure 1 (c) shows a top view of the SOT device when the MTJ is an elliptical cylinder, and the easy magnetization axis of the magnetic moment of the free layer 5 is the long axis of the ellipse. Of course, the MTJ can also be a cylindrical shape.

[0047] However, conventional SOT-MRAM (Spin Orbit Torque Magnetic Random Access Memory) can only store 1 bit per cell, and if the storage density of MRAM devices is to be further improved to compete with existing Flash multi-bit storage technology, the MRAM storage cell needs to be further designed and optimized. There are different multi-bit solutions in IMA-MTJ (in-plane magnetic anisotropy magnetic tunnel junction) and PMA-MTJ (perpendicular magnetic anisotropy magnetic tunnel junction). The multi-bit storage scheme of PMA-MTJ mainly uses the method of stacking or connecting multiple MTJs to achieve multi-bit storage, on the one hand, it does not truly realize multi-bit storage of a single device, on the other hand, the implementation of multi-bit storage requires specific arrays and circuits, the design and preparation process is more complex, it is difficult to produce and difficult to realize one-step writing of data. IMA-MTJ devices can also use the method of stacking or connecting multiple MTJs to achieve multi-bit storage, and IMA-MTJ devices can easily use the different angles between the free layer 5 and the fixed layer 3 in the parallel state (Parallel, P) and the anti-parallel state (Antiparallel, AP) to realize multi-bit storage of a single device. In order to ensure the thermal stability of IMA-MTJ, the length / width (also known as Aspect Ratio: AR) of the ellipse or rectangle device needs to reach 3-4, which makes it difficult for in-plane magnetic anisotropy MTJ (IMA-MTJ) to be below 50 nm, which is not conducive to high-density storage; the performance of the IMA-MTJ device with a special shape is also very susceptible to the influence of each link in the patterning process.

[0048] To this end, the application provides a multi-state memory cell based on anti-ferromagnetic.

[0049] Next, the scheme provided by the embodiments of the present application will be described in conjunction with the drawings:

[0050] Embodiment 1

[0051] Figure 2 (a) is a schematic diagram of the basic orthogonal bottom electrode structure provided by Embodiment 1 of the application; Figure 2 (b) is a schematic diagram of the multi-angle bottom electrode structure provided by Embodiment 1 of the application. As shown in Figure 2 The multi-state memory cell can at least include:

[0052] A magnetic tunnel junction 1, a current write line and a bottom electrode layer 2; the magnetic tunnel junction 1 is used for storing data, and the bottom electrode layer 2 is used for providing spin-orbit torque to write data; the magnetic tunnel junction 1 at least comprises a fixed layer 3, a barrier layer 4 and a free layer 5; the free layer 5 is adjacent to an anti-ferromagnetic layer 6, and an exchange bias is formed between the anti-ferromagnetic layer 6 and the free layer 5; a current is applied on the corresponding bottom electrode layer 2 to flip the direction of the free layer 5 and the exchange bias to a direction perpendicular to the current; the flipping angle of the free layer 5 and the exchange bias is regulated by applying a current in a current write line at different angles, so that more intermediate states can be obtained in the entire magnetoresistance range.

[0053] More specifically, Figure 2 In (a), the device comprises a storage unit composed of two orthogonal current write lines and a magnetic tunnel junction 1, and the core structure of the magnetic tunnel junction 1 is a fixed layer 3 composed of a ferromagnetic metal, a barrier layer 4 composed of an oxide and a free layer 5 composed of a ferromagnetic metal, wherein the storage layer comprises the free layer 5 and an anti-ferromagnetic layer 6. By annealing with an in-plane magnetic field, an exchange bias is formed between the anti-ferromagnetic layer and the free layer 5, and the strong pinning effect can fix the free layer 5 and make it not affected by an external magnetic field. A current is applied on the selected bottom electrode to flip the direction of the free layer 5 and the exchange bias to a direction perpendicular to the current. Therefore, the flipping angle of the free layer 5 and the exchange bias can be regulated by applying a current in a current write line at different angles, so that more intermediate states can be obtained in the entire magnetoresistance range. Figure 2 On the basis of the (a) type device, the size of the current applied on the two orthogonal bottom electrodes can be controlled, and the free layer 5 and the exchange bias can be flipped to any angle to form multiple states by adding the SOT equivalent field vectors. In addition, in Figure 2 In the (b) type device, the flipping angle of the free layer 5 and the exchange bias can be controlled by increasing the number of bottom electrode write lines at different angles, Figure 2 In (b), a first bottom electrode 7, a second bottom electrode 8 and a third bottom electrode 9 are included. In this type of device, the number of magnetoresistance states is N+1, where N is the number of angles that the free layer 5 and the exchange bias can form with the fixed layer 3.

[0054] In the present application, the free layer 5 of the IMA-MTJ is adjacent to an antiferromagnetic (AFM) material, the thermal stability of the free layer 5 is provided by the exchange bias field generated by the AFM / FM interface, and under the action of the exchange bias field, the free layer 5 only has a single magnetization state under zero magnetic field. Therefore, in this device, the IMA-MTJ can be prepared into a cylindrical shape, solving the problem of high-density integration of IMA-MTJ. In addition, by reversing the exchange bias field and the magnetic moment direction of the free layer 5 based on the current writing mode, not only can the data be written without a magnetic field, but also by designing a multi-angle writing bottom electrode or controlling the size of the orthogonal current to form a specific angle SOT equivalent field to accurately control the angle of the exchange bias field and the free layer 5 relative to the fixed layer 3, realize high-density, high-stability multi-bit data storage; In addition, more storage states can also be expanded by using double MTJ structure and stacked MTJ structure. It can solve the problem of realizing multi-bit data storage of the current MRAM device unit, and the regulation of the antiferromagnetic exchange bias not only realizes the cylindrical in-plane magnetic tunnel junction 1 device and has good device size miniaturization potential, but also under the pinning effect of the exchange bias, the intermediate state has extremely excellent thermal stability.

[0055] Based on the method, Figure 2 The embodiments of the present specification also provide some specific implementations of the scheme, which are described below.

[0056] Optionally, Figure 2 The free layer 5 of the magnetic tunnel junction 1 device in the present application is CoFeB alloy, and the commonly used element ratio can be Co 20 Fe 60 B 20 , Co 40 Fe 40 B 20 or Co 60 Fe 20 B 20 and the like, where the numbers represent the percentage of elements, but are not limited to the element ratios described herein. The barrier layer 4 is a metal oxide, including MgO and Al2O3. The fixed layer 3 is a CoFeB alloy, and the commonly used element ratio can be Co 20 Fe 60 B 20 , Co 40 Fe 40 B 20 or Co 60 Fe 20 B 20and the like, where the numbers represent percentages of the elements, but are not limited to the element ratios described herein. A synthetic antiferromagnetic structure or an antiferromagnetic material is grown on top of the fixed layer 3 to pin the direction of the magnetic moment of the fixed layer 3. The antiferromagnetic material includes, but is not limited to, IrMn, FeMn, PtMn, NiMn, NiO, CoO, CoGd, CoTb, GdFeCo, and the like, and each material is not limited to the element ratios listed, for example, the antiferromagnetic IrMn can be IrMn or IrMn3, and the like.

[0057] Further, the current size applied to the two bottom electrodes is controlled by two current write lines, and the free layer 5 and the exchange bias are flipped to an arbitrary angle by the addition of the equivalent field vectors of the spin-orbit torque to form a multi-state; alternatively, the number of bottom electrode angles of the bottom electrode layer 2 is increased to control the flipping angle of the free layer 5 and the exchange bias. Optionally, the bottom electrode structure in the bottom electrode layer 2 is: a heavy metal material, an antiferromagnetic layer 6 grown on a metal buffer layer 11, or a heavy metal, ferromagnetic, antiferromagnetic structure double-interface exchange bias; as shown in Figure 3 Figure 3 Various structures for driving the antiferromagnetic exchange bias and the flipping of the free layer 5 are shown in Figure 3 (a) a heavy metal is used as the bottom electrode, and the device structure includes a fixed layer 3, a barrier layer 4, a free layer 5, an antiferromagnetic layer 6, and a heavy metal layer 10. Figure 3 (b) the antiferromagnetic layer 6 grown on the metal buffer layer 11 is directly used as the bottom electrode, and the device structure includes a fixed layer 3, a barrier layer 4, a free layer 5, an antiferromagnetic layer 6, and a metal buffer layer 11; Figure 3 (c) a "heavy metal / ferromagnetic / antiferromagnetic" double-interface exchange bias is used as the bottom electrode, and the device structure includes: a fixed layer 3, a barrier layer 4, a free layer 5, an antiferromagnetic layer 6, a heavy metal layer 10, and a ferromagnetic layer 12. Under the three bottom electrode structures, the flipping angle of the free layer 5 and the exchange bias can be controlled by the positive and negative directions of the current.

[0058] The scheme in Example 1, in particular in preparation, the corresponding preparation process is:

[0059] First, according to Figure 3 ​The structure described in the text involves depositing film layers for a specific film stack structure and performing magnetic field annealing to define the exchange bias direction. In micro / nano fabrication, the film layer above the heavy metal is patterned into a cylindrical shape, while the heavy metal layer 10 is fabricated into orthogonal cross electrodes. By applying positive and negative currents to the first bottom electrode 7, the driving current can flip the free layer / antiferromagnetic exchange bias direction to the positive and negative directions perpendicular to the current. Similarly, applying positive and negative driving currents to the second bottom electrode 8 can also flip the free layer / antiferromagnetic exchange bias direction to the positive and negative directions perpendicular to the second bottom electrode 8. The maximum magnetoresistance range of the device is from the high-resistance state of the antiparallel state to the low-resistance state of the parallel state. By applying different directions to the orthogonal bottom electrodes, it is possible to achieve... Figure 6 The diagram shows three magnetoresistive states: AP, 90°, and P. Additionally, as shown... Figure 7 As shown, by adding the SOT vector fields formed by simultaneously applying currents of different magnitudes to the orthogonal bottom electrodes, the arbitrary angle between the free layer 5 and the exchange bias field can be achieved.

[0060] Example 2

[0061] like Figure 4 As shown, compared with Example 1, the scheme in Example 2 changes the basic magnetic tunnel junction 1 to a double barrier layer magnetic tunnel junction 13 based on Example 1. The magnetization and exchange bias direction of the top and bottom antiferromagnetic / free layer composite structure can be controlled by the current passing through the top and bottom electrodes, respectively. Figure 4 (a) Similarly, the free layer 5 and the exchange bias angle can be controlled by superimposing the current SOT vector field under the double barrier layer magnetic tunnel junction 13 and the double electrode structure. The device includes the double barrier layer magnetic tunnel junction 13, the first top electrode 14, the second top electrode 15, the first bottom electrode 7, and the second bottom electrode 8. Figure 4 (b) is a multi-angle electrode control structure under a double-barrier layer magnetic tunnel junction 13 and a two-electrode structure. The device includes: a first bottom electrode 7, a second bottom electrode 8, a third bottom electrode 9, a double-barrier layer magnetic tunnel junction 13, a first top electrode 14, a second top electrode 15, and a third top electrode 16. Under this device structure, more magnetoresistive states can be generated throughout the entire magnetoresistive range, with a total of 2N+1 polymorphisms, where N is the number of angles that the free layer 5 and the exchange-biased relative fixed layer 3 can form.

[0062] Figure 4 The structure in the diagram, wherein the magnetic tunnel junction 1 is a double-barrier magnetic tunnel junction 13; the double-barrier magnetic tunnel junction 13 may include:

[0063] The first free layer 19, the first barrier layer 21, the fixed layer 3, the second barrier layer 22, and the second free layer 20;

[0064] The first free layer 19 and the first exchange bias direction are controlled by the current passing through the top electrode; the second free layer 20 and the second exchange bias direction are controlled by the current passing through the bottom electrode.

[0065] The current write line in the present application can be two orthogonal current write lines; when the heavy metal material is used as the bottom electrode layer 2, the bottom electrode layer 2 is a cross electrode, including a first bottom electrode 7 and a second bottom electrode 8; by applying positive and negative current in the first bottom electrode 7, the free layer 5 and the anti-ferromagnetic exchange bias direction are flipped to the positive and negative directions perpendicular to the first electrode; by applying positive and negative driving current in the second bottom electrode 8, the free layer 5 and the anti-ferromagnetic exchange bias direction are flipped to the positive and negative directions perpendicular to the second bottom electrode.

[0066] As shown in Figure 5 The free layer 5 and the exchange bias in the double barrier magnetic tunnel junction 1 can have various structures. Figure 5 In (a), the double barrier layer magnetic tunnel junction 13 uses heavy metal as the bottom electrode to drive the free layer 5 / anti-ferromagnetic exchange bias, and the device structure is from top to bottom: a second heavy metal layer 24, a second anti-ferromagnetic layer 18, a second free layer 20, a second barrier layer 22, a fixed layer 3, a first barrier layer 21, a first free layer 19, a first anti-ferromagnetic layer 17, and a first heavy metal layer 23.

[0067] Figure 5 In (b), the double barrier layer magnetic tunnel junction 13 uses the anti-ferromagnetic layer 6 grown on the metal buffer layer 11 as the bottom electrode to drive the free layer / anti-ferromagnetic exchange bias, and the device structure includes a capping layer 27, a second anti-ferromagnetic layer 18, a second free layer 20, a second barrier layer 22, a fixed layer 3, a first barrier layer 21, a first free layer 19, a first anti-ferromagnetic layer 17, and a metal buffer layer 11. Figure 5 In (c), the double barrier layer magnetic tunnel junction 13 uses the "heavy metal / ferromagnetic / anti-ferromagnetic" double interface exchange bias as the bottom electrode to drive the free layer 5 / anti-ferromagnetic exchange bias, and the device structure includes: a second heavy metal layer 24, a second ferromagnetic layer 26, a second anti-ferromagnetic layer 18, a second free layer 20, a second barrier layer 22, a fixed layer 3, a first barrier layer 21, a first free layer 19, a first anti-ferromagnetic layer 17, a first ferromagnetic layer 25, and a first heavy metal layer 23. Each free layer 5 is pinned by the exchange bias of the anti-ferromagnetic layer 6, and the pinning direction is determined by the magnetic field annealing direction. The top and bottom electrodes can control the corresponding free layer 5 and exchange bias direction, respectively, and the overall magnetoresistance range is determined by two superimposed magnetic tunnel junction 1 devices.

[0068] The anti-ferromagnetic-based multi-state memory cell in Example 2 is prepared by the following process:

[0069] To make the device, first follow Figure 5The specific film stack structure is shown to deposit the film layers and perform magnetic field annealing to define the exchange bias direction. In micro-nano processing, the heavy metal film layer is patterned to form a cylindrical shape, and the heavy metal layer 10 is patterned into a cross-shaped electrode. After a planarization process, the top electrode is deposited and patterned into a cross-shaped electrode identical to the bottom electrode. By applying positive and negative currents to the bottom electrode, the driving current can flip the exchange bias direction of the first free layer 19 and the first anti-ferromagnetic layer 17 to the positive and negative directions of the bottom electrode. Similarly, by applying positive and negative driving currents to the top electrode, the exchange bias direction of the second free layer 20 and the second anti-ferromagnetic layer 18 can also be flipped to the positive and negative directions of the top electrode. Since the maximum magnetic resistance range of the double-barrier layer magnetic tunnel junction 13 device is from the high resistance state of the anti-parallel state of the upper and lower barriers to the low resistance state of the parallel state of the upper and lower barriers. Therefore, by using the orthogonal top and bottom electrodes, five kinds of magnetic resistance states of AP / AP, 90° / AP, P / AP, P / 90°, and P / P can be formed as shown. Figure 8 As shown, by applying different currents to the orthogonal top and bottom electrodes to make the SOT vector field add up, the top and bottom free layers 5 and the exchange bias field can be set to any angle. Figure 9

[0070] The schemes in Embodiment 1 and Embodiment 2 of the present application can change the state of the exchange bias field by the electrode at the lower end of the MTJ or the electrode at each angle through the current without heating the current or needing another write line to generate a magnetic field, which simplifies the write mechanism and the structure of the device, and through the simplified write step, a larger number of multi-state storage can be formed. The anti-ferromagnetic layer is used to generate the exchange bias, and the present application has higher stability compared with the spin-orbit torque magnetic memory.

[0071] Although the present application is described herein in conjunction with various embodiments, other variations of the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed application, from an inspection of the drawings, the disclosure, and the appended claims. The word "comprising" does not exclude other components or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. A single processor or other unit can fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to an advantage.

[0072] ​Although the present application has been described in connection with the preferred embodiments thereof with reference to the specific content thereof, it will be apparent to those skilled in the art that various modifications and changes can be made thereto without departing from the spirit and scope of the application. Accordingly, it is intended that the present application cover all such modifications and changes as fall within the scope of the application, along with all equivalents thereof. It will be understood by those within the art that, in general, terms used herein, and especially to the immediately preceding description and claims attached hereto, are intended to be given their broadest interpretation consistent with the specification and the patent statutes.

Claims

1. An antiferromagnetic-based multi-state memory cell, comprising: A polymorphic memory cell includes at least: A magnetic tunnel junction and a bottom electrode layer serving as a current writing line; the magnetic tunnel junction is used to store data, and the bottom electrode layer is used to provide spin-orbit torque for writing data; The magnetic tunnel junction includes at least: a fixed layer, a barrier layer, and a free layer; the free layer is adjacent to the antiferromagnetic layer, and an exchange bias is formed between the antiferromagnetic layer and the free layer; a current is applied to the corresponding bottom electrode layer to flip the orientation of the free layer and the exchange bias to be perpendicular to the current direction; the flip angle of the free layer and the exchange bias is controlled by applying current in current write lines at different angles to obtain more intermediate states throughout the magnetoresistance range.

2. The multi-state memory cell of claim 1, wherein, The magnetic tunnel junction is cylindrical, elliptical, or cuboid in shape; when the magnetic tunnel junction is elliptical or cuboid, the easy magnetization axis of the free layer magnetic moment is the major axis of the ellipse or rectangle.

3. The multi-state memory cell of claim 1, wherein, The free layer of the magnetic tunnel junction is a CoFeB alloy; the barrier layer is a metal oxide; the fixed layer is a CoFeB alloy, and a synthetic antiferromagnetic structure or antiferromagnetic material is grown on the fixed layer to fix the magnetic moment direction of the fixed layer.

4. The multi-state memory cell of claim 1, wherein, By setting the number of bottom electrode angles of the bottom electrode layer, the free layer and the exchange bias flip angle can be achieved; Alternatively, by controlling the magnitude of the current applied simultaneously to the two current writing lines of the bottom electrode, the equivalent field vectors of the spin orbit moments are added together to flip the free layer and the exchange bias to any angle to form polymorphism.

5. The multi-state memory cell of claim 1, wherein, The bottom electrode structure in the bottom electrode layer is as follows: Heavy metal materials, antiferromagnetic layers grown on metal buffer layers, Alternatively, heavy metal, ferromagnetic, and antiferromagnetic structures with dual-interface exchange bias; The free layer and the switching bias flip angle are controlled by controlling the positive and negative directions of the current.

6. The polymorphic memory cell according to claim 1, characterized in that, The magnetic tunnel junction is a double-barrier layer magnetic tunnel junction; The dual-barrier layer magnetic tunnel junction includes: The system comprises a first free layer, a first barrier layer, a fixed layer, a second barrier layer, and a second free layer; each free layer is pinned by the exchange bias of an antiferromagnetic layer, the pinning direction being determined by the magnetic field annealing direction; the overall magnetic reluctance range is determined by two superimposed magnetic tunnel junctions.

7. The polymorphic memory cell according to claim 5, characterized in that, The heavy metal material is used as the top electrode layer and the bottom electrode layer. After the preparation of the multi-angle bottom electrode current writing line and the double barrier magnetic tunnel junction is completed, the top electrode is deposited and patterned into a multi-angle top electrode current writing line through a planarization process.

8. The polymorphic memory cell according to claim 6, characterized in that, By applying positive and negative currents to the bottom electrode, the driving current flips the bias directions of the first free layer and the first antiferromagnetic layer to the positive and negative directions perpendicular to the bottom electrode. By applying positive and negative currents to the top electrode, the driving current flips the bias directions of the second free layer and the second antiferromagnetic layer to the positive and negative directions perpendicular to the top electrode.

9. The polymorphic memory cell according to claim 8, characterized in that, The upper and lower current writing electrodes of the dual-barrier layer magnetic tunnel junction are orthogonal or the free layer and the bias angle are adjusted by increasing the number of angles of the top and bottom electrode layers.

10. The polymorphic memory cell according to claim 8, characterized in that, The vector field superposition of the current spin orbit moments under the dual-barrier layer magnetic tunnel junction and the top and bottom orthogonal electrode structure is used to control the free layer and exchange bias angle.

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