Active matrix substrate, display panel, and display device

Abstract

Provided are an active matrix substrate, a display panel, and a display device, which can effectively detect a touch on an end portion on the border region side in a pixel region, can reduce the defect rate of the structures within a pixel in the pixel region, and can prevent a short circuit from occurring within the border region. The active matrix substrate (1) includes: a touch electrode (16) disposed within the pixel region (R1); a border touch electrode (26) disposed within the border region (R2); and a virtual array portion (27) disposed within the border region (R2). The border region (R2) includes: a first virtual region (Rd1) where the border touch electrode (26) is disposed at a position adjacent to the pixel region (R1); and a second virtual region (Rd2) provided on a side opposite to the pixel region (R1) with respect to the first virtual region (Rd1). The virtual array portion (27) is disposed in the second virtual region (Rd2) instead of the border touch electrode (26).

Description

Technical Field

[0001] The present disclosure relates to an active matrix substrate, a display panel, and a display device. Background Art

[0002] In recent years, display panels provided in liquid crystal display devices have been put into practical use. For example, a display panel including an active matrix substrate is widely used as a display screen of a liquid crystal display device such as a smart phone or a tablet terminal. Various structures of the active matrix substrate used in these display panels have been proposed by those skilled in the art.

[0003] For example, for the purpose of suppressing defects in the manufacturing process and stabilizing the performance of the active matrix substrate, an active matrix substrate has been proposed in which a structure similar to that of a structure provided in a pixel region, but a structure that does not perform the same function as the corresponding structure in the pixel region (hereinafter, referred to as a "virtual structure") is disposed in a part of a border region around the pixel region. In such an active matrix substrate, typically, outside a rectangular pixel region, multiple rows or columns of virtual structures are disposed along each side of the pixel region. For example, in Patent Document 1, virtual structures are used as virtual pixels, and a common electrode facing a plurality of virtual pixels is provided. The arrangement interval of the virtual pixels is smaller than the interval of the plurality of pixels in the pixel region. In addition, the common electrode is formed to cover the border region provided with a plurality of virtual pixels and to cover the pixel region.

[0004] In addition, in the active matrix substrate of Patent Document 2, a virtual structure is a virtual semiconductor layer that intersects a gate line and a gate line, and the arrangement interval thereof is smaller than the interval of the plurality of semiconductor layers in the pixel region.

[0005] In addition, an in-cell touch panel in which a display panel has a touch panel function has been proposed. For example, such an in-cell touch panel is disclosed in Patent Documents 3 and 4. In the in-cell touch panel, a common electrode formed to cover the pixel region is divided into a plurality of electrodes. Moreover, the divided common electrodes each serve as a touch electrode. In addition, in Patent Document 4, in order to improve the touch sensitivity of an edge portion in the in-cell touch panel, a touch electrode that receives a touch input is disclosed to be disposed in a border region outside the pixel region.

[0006] Prior Art Documents

[0007] Patent Documents

[0008] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2007-17478

[0009] Patent Document 2: Japanese Unexamined Patent Application Publication No. 2016-57344

[0010] Patent Document 3: Japanese Unexamined Patent Application Publication No. 2014-164752

[0011] Patent Document 4: Japanese Unexamined Patent Application Publication No. 2015-64854 Summary of the Invention

[0012] Problems to be Solved by the Invention

[0013] Here, in the active matrix substrate, static electricity sometimes invades from the surroundings. Therefore, among the plurality of pixels arranged in a matrix in the active matrix substrate, the pixels closer to the ends of each row and each column have a higher defect rate. Therefore, by disposing a structure in the border region of the active matrix substrate, even when static electricity invades from the surroundings, it is possible to prevent damage to the pixels due to damage to the structure. As a result, it is possible to reduce the defect rate of the structures in the pixels in the pixel region closer to the inside than the border region. Thereby, the yield of the active matrix substrate can be improved.

[0014] In addition, in order to effectively detect a touch on the end portion on the border region side in the pixel region of the in-cell touch panel, it is considered to also dispose a structure for detecting a touch in the border region.

[0015] However, in the case where both the structure for detecting a touch and the structure for reducing the defect rate of the structures in the pixel region are disposed in the border region, the overlapping area of these structures when viewed from above becomes large. As a result, in the manufacturing process, there is a problem that the possibility of short-circuit between the structure for detecting a touch and the structure for reducing the defect rate increases due to foreign matter mixed into the border region.

[0016] Therefore, the present disclosure is completed to solve the above technical problems, and an object thereof is to provide an active matrix substrate, a display panel, and a display device that can effectively detect a touch on the end portion on the border region side in the pixel region, can reduce the defect rate of the structures in the pixels in the pixel region, and can prevent a short circuit from occurring in the border region.

[0017] Solutions to the Problems

[0018] To solve the above problems, the active matrix substrate according to the first aspect of the present disclosure includes: a plurality of scan wirings; a plurality of data wirings that are arranged to cross the plurality of scan wirings; a plurality of switching elements that are respectively arranged in a plurality of pixels defined by the plurality of scan wirings and the plurality of data wirings; and a plurality of pixel electrodes that are connected to the switching elements. When viewed from above, the active matrix substrate has a pixel region where the plurality of pixel electrodes are provided and a frame region that surrounds the pixel region. The active matrix substrate further includes: a touch electrode that is arranged opposite to the plurality of pixel electrodes within the pixel region; a frame touch electrode that is formed in a first layer within the frame region and is not electrically connected to the touch electrode; a frame element that is formed in a second layer different from the first layer within the frame region and suppresses electrostatic breakdown of at least one of the plurality of pixels. The frame region includes: a first region where the frame touch electrode is arranged at a position adjacent to the pixel region; a second region that is provided at a position opposite to the first region with respect to the pixel region, and where the frame element is arranged instead of the frame touch electrode.

[0019] The display panel according to the second aspect includes: the active matrix substrate according to the first aspect; and a counter substrate that is arranged opposite to the active matrix substrate.

[0020] The display device according to the third aspect has the display panel according to the first aspect and a control circuit that controls the display panel.

[0021] Advantageous Effects of the Invention

[0022] According to the above configuration, since the frame touch electrode is provided in the frame region, it is possible to effectively detect a touch on the end portion on the frame region side of the pixel region. In addition, since the frame element that suppresses electrostatic breakdown of the pixel is arranged in the frame region, it is possible to prevent the occurrence of defects in the structures within the pixel in the pixel region caused by static electricity. Moreover, since the frame touch electrode is not arranged in the second region of the frame region, it is possible to prevent a short circuit between the frame touch electrode and the frame element compared to the case where the frame touch electrode is formed in both the first region and the second region. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a block diagram of a display device 100 according to a first embodiment.

[0024] Figure 2 is a perspective view schematically showing the configuration of a display panel 10.

[0025] Figure 3 is a plan view schematically showing the arrangement relationship between a touch electrode 16 and a frame touch electrode 26 according to a first embodiment.

[0026] Figure 4 is Figure 3 an enlarged view of part A1 of

[0027] Figure 5 is Figure 4 a cross-sectional view of the active matrix substrate 1 along line B1 - B1 in

[0028] Figure 6 a diagram for explaining a part of the configuration of the display device 200 according to the second embodiment.

[0029] Figure 7 a plan view for explaining the configuration of the frame touch electrode 226 according to the second embodiment.

[0030] Figure 8 is along Figure 6 a cross-sectional view of the active matrix substrate 201 along line B2 - B2 of

[0031] Figure 9 a diagram for explaining a part of the configuration of the display device 300 according to the third embodiment.

[0032] Figure 10 is along Figure 9 a cross-sectional view of the active matrix substrate 301 along line B3 - B3 of

[0033] Figure 11 a plan view for explaining the configuration of the frame touch electrode 326 according to the third embodiment.

[0034] Figure 12 a plan view for explaining the configuration of the frame touch electrode 426 according to a modification of the first to third embodiments. Detailed Embodiments

[0035] Hereinafter, embodiments of the present disclosure will be described based on the drawings. The present disclosure is not limited to the content described in the following embodiments, and design changes can be appropriately made within the scope that satisfies the configuration of the present invention. In addition, in the following description, the same reference numerals are commonly used between different drawings for the same parts or parts having the same function, and repeated description thereof is appropriately omitted. Further, the respective configurations described in the embodiments and modifications can be appropriately combined or changed without departing from the gist of the present disclosure. In addition, in the following drawings referred to, in order to make the description easy to understand, the configuration is shown in a simplified or schematic manner, or a part of the constituent members is omitted. Also, the dimensional ratios between the constituent members shown in each figure do not necessarily represent the actual dimensional ratios.

[0036] [First Embodiment]

[0037] Figure 1 is a block diagram of the display device 100 according to the first embodiment. Figure 2 is a perspective view schematically showing the configuration of the display panel 10. The display device 100 is not limited thereto, and may be configured as, for example, a smart phone, a tablet terminal, and a personal computer. As Figure 1 shown, the display device 100 includes a display panel 10 and a control circuit 20. The control circuit 20 includes a timing controller that sends a control signal to a driving circuit 3 (refer to Figure 2 ) disposed on the display panel 10.

[0038] (Overall configuration of the display panel)

[0039] In the first embodiment, the display panel 10 is a liquid crystal panel of the in-plane switching (FFS) mode having a function of detecting touch by an indicator. As Figure 2 shown, the display panel 10 includes an active matrix substrate 1 and a counter substrate 2. The active matrix substrate 1 is also referred to as an array substrate. The counter substrate 2 is provided with a color filter (not shown in the figure) and is also referred to as a color filter substrate. The active matrix substrate 1 and the counter substrate 2 are bonded to each other with a sealing material (not shown in the figure) so as to face each other and maintain a predetermined gap. A liquid crystal material (not shown in the figure) is filled in the gap between the active matrix substrate 1 and the counter substrate 2.

[0040] As Figure 2 shown, the active matrix substrate 1 and the counter substrate 2 are not of the same size. For example, the length of the active matrix substrate 1 in the Y direction is larger than the length of the counter substrate 2 in the Y direction. And, a driving circuit 3 is disposed in an area on the active matrix substrate 1 that is not covered by the counter substrate 2. The driving circuit 3 includes an integrated circuit. In addition, the driving circuit 3 is connected to the control circuit 20 (refer to Figure 1 ) via a flexible printed circuit board (not shown). In addition, although not shown, optical plates such as a retardation plate and a polarizing plate are disposed on the display surface and the back surface of the display panel 10. In addition, a backlight (not shown) is disposed on the back surface of the display panel 10.

[0041] (Configuration of the counter substrate)

[0042] The counter substrate 2 includes a glass plate. In addition, a light-shielding film (black matrix) and a color filter are formed on the surface of the counter substrate 2 that contacts the liquid crystal layer side. Then, an overcoat film is formed on the liquid crystal layer side of the light-shielding film and the color filter. In addition, on the counter substrate 2, light spacers are disposed to maintain the interval from the active matrix substrate 1 (the thickness of the liquid crystal layer).

[0043] (Configuration of the active matrix substrate)

[0044] As Figure 2As shown, on the active matrix substrate 1, a pixel region R1 in which a plurality of pixels 11 are formed and a frame region R2 around the pixel region R1 are provided. A "pixel" is a part of the active matrix substrate 1 that serves as a display unit for an image or picture, and is each region divided by a plurality of scan wirings 12 and a plurality of data wirings 13. A thin film transistor 14 (hereinafter referred to as "TFT14") and a pixel electrode 15 are disposed within the pixel 11. In other words, the pixel region R1 is a display region for displaying an image or picture. In other words, the frame region R2 is a non-display region that does not display an image or picture. The frame region R2 is a region where circuits and wirings are disposed. In addition, a light-shielding film is disposed at a position on the counter substrate 2 that faces the frame region R2, and light from the frame region R2 is shielded at the counter substrate 2. As a result, the structure (circuits, wirings) within the frame region R2 cannot be visually confirmed by the user.

[0045] Figure 3 is a plan view schematically showing the arrangement relationship between the touch electrode 16 and the frame touch electrode 26 according to the first embodiment. Figure 4 is Figure 3 an enlarged view of part A1 of. As Figure 3 shown, in the first embodiment, a virtual region Rd is provided at a position in the frame region R2 adjacent to the pixel region R1. The virtual region Rd is a region where either a frame touch electrode 26 or a virtual array unit 27 described later is disposed. The pixel region R1 has, for example, a rectangular shape in a plan view. The virtual region Rd is formed in a frame shape so as to surround the rectangular pixel region R1.

[0046] Figure 5 is Figure 4 a cross-sectional view of the active matrix substrate 1 along line B1-B1 in. As Figure 5 shown, the active matrix substrate 1 includes a glass substrate 1a. Then, scan wirings 12 (refer to Figure 5 ), data wirings 13, pixel electrodes 15, touch electrodes 16, and terminals (not shown) are formed on the surface of the glass substrate 1a on the liquid crystal layer side ( Figure 4 ) in the Z direction). In addition, in the first embodiment, TFT14 formed by a low-temperature polysilicon process is formed on the active matrix substrate 1. In addition, as Figure 2 shown, a scan wiring driving circuit 12a formed as a single chip is disposed on the active matrix substrate 1. And the scan wiring driving circuit 12a supplies a gate signal to the scan wirings 12. The scan wiring driving circuit 12a is connected to the driving circuit 3 via a scan wiring driving circuit wiring 12b. The driving circuit 3 sends a control signal to the scan wiring driving circuit 12a to control the scan wiring driving circuit 12a. In addition, the data wirings 13 are connected to the driving circuit 3. Then, a data signal is supplied from the driving circuit 3 to the data wirings 13.

[0047] As shown Figure 4 in the figure, a TFT 14 and a pixel electrode 15 connected to the TFT 14 are disposed on each pixel 11. In addition, a touch electrode 16 commonly disposed for a plurality of pixel electrodes 15 is disposed on the active matrix substrate 1. Furthermore, in Figure 4 , an example in which one touch electrode 16 is disposed for four pixel electrodes 15 is shown, but one touch electrode 16 may be disposed for three or less or five or more pixel electrodes 15.

[0048] The plurality of touch electrodes 16 are arranged in a matrix. As Figure 2 shown, the plurality of touch electrodes 16 are connected to the drive circuit 3 via touch electrode wirings 16a. The drive circuit 3 functions as both a touch detection circuit and a display control circuit. During display by the display panel 10, the drive circuit 3 supplies a common electrode voltage for generating an electric field with the pixel electrode 15 to each touch electrode 16. During touch detection by the display panel 10, the drive circuit 3 supplies a scan signal for detecting a touch to each touch electrode 16. For example, the drive circuit 3 alternately repeats the display period and the touch detection period in a time-division manner.

[0049] (Configuration of each part in the active matrix substrate)

[0050] As Figure 4 shown, the scan wiring 12 is a wiring for supplying a gate signal to each pixel electrode 15 in the pixel region R1 in units of rows to become a write state. The scan wiring 12 is a wiring extending in the right direction (X direction) of the paper surface from the scan wiring drive circuit wiring 12b. The scan wiring 12 is connected to the gate 14a of the TFT 14 of each pixel disposed adjacent to the scan wiring 12 (see Figure 5 ). By supplying a gate signal to the scan wiring 12, the TFT 14 in units of rows becomes conductive.

[0051] The data wiring 13 is a wiring for supplying a voltage corresponding to an image to each pixel electrode 15. The data wiring 13 is a wiring extending in the longitudinal direction (Y direction) of the paper surface. In the first embodiment, since the display device 100 adopts the FFS method, a part of the contour of the pixel electrode 15 extending in the longitudinal direction includes a bent portion that is bent when viewed from above as Figure 4 shown. In addition, in order to ensure the aperture ratio of the display panel 10, the data wiring 13 has a shape along the bent portion of the pixel electrode 15 when viewed from above. That is, a bent portion is provided on the data wiring 13.

[0052] As Figure 5As shown, the TFT 14 includes a gate 14a, a semiconductor layer 14b, a source 14c, and a drain 14d. The TFT 14 has, for example, a top-gate structure. That is, the gate 14a is disposed on the upper layer (liquid crystal layer side) of the semiconductor layer 14b. In addition, the source 14c is connected to the data wiring 13. Further, a part of the source 14c is disposed in the contact hole and is in contact with the semiconductor layer 14b. In addition, the drain 14d is connected to the pixel electrode 15. Further, a part of the drain 14d is disposed in the contact hole and is in contact with the semiconductor layer 14b.

[0053] The pixel electrode 15 is disposed in each pixel 11. In addition, in the case of color display, each pixel 11 is composed of three sub-pixels corresponding to the three primary colors of RGB. In this case, the pixel electrode 15 has elongated sub-pixels arranged with a vertical-to-horizontal ratio of 3:1. However, in Figure 4 the above figure, the pixel is illustrated as having a square shape.

[0054] The touch electrode 16 is an electrode for touch detection and is also an electrode for controlling the liquid crystal layer. In addition, the touch electrode wiring 16a is a wiring for supplying a signal to the touch electrode 16. As Figure 4 shown, a plurality of touch electrode wirings 16a are arranged and disposed at a predetermined interval in the left-right direction of the paper surface within the pixel region R1. In addition, the touch electrode wiring 16a has a shape along the bent portion of the data wiring 13 so as to increase the aperture ratio of the display panel 10 and not be too close to the data wiring 13. The plurality of touch electrode wirings 16a are respectively connected to the respective touch electrodes 16 (one-to-one relationship). In addition, the right and left sides of the touch electrode 16 in the paper surface direction respectively include bent portions bent along the bent portion of the data wiring 13. In addition, on the touch electrode 16, a slit portion 16b that is bent in plan view is formed for each pixel 11 (sub-pixel).

[0055] (Configuration within the virtual area)

[0056] As Figure 4As shown, the virtual region Rd is set between the pixel region R1 and the scanning wiring driving circuit 12a in the border region R2. The virtual region Rd is an area from the boundary between the pixel region R1 and the border region R2 to the position where a virtual array section 27 described later is arranged and is the area farthest from the boundary. The virtual region Rd includes a first virtual region Rd1 arranged at a position adjacent to the pixel region R1 and a second virtual region Rd2 arranged at a position on the side opposite to the pixel region R1 with respect to the first virtual region Rd1 (a position farther from the pixel region R1 than the first virtual region Rd1). For example, the second virtual region Rd2 is arranged on the side closer to the scanning wiring driving circuit 12a of the first virtual region Rd1. Here, in the present disclosure, the configuration within the first virtual region Rd1 is different from the configuration within the second virtual region Rd2. For example, the presence or absence or the form of the border touch electrode 26 is different corresponding to the regions of the first virtual region Rd1 and the second virtual region Rd2 respectively, and in addition, the presence or absence or the form of the virtual array section 27 is different. In the first embodiment, the border touch electrode 26 is arranged in the first virtual region Rd1. The border touch electrode 26 is not arranged in the second virtual region Rd2, and the virtual array section 27 is arranged. That is, the first virtual region Rd1 is a range from the end on the pixel region R1 side in the virtual region Rd to the end on the side opposite to the pixel region R1 in the border touch electrode 26. In addition, the second virtual region Rd2 is a range from the end on the side opposite to the pixel region R1 in the border touch electrode 26 to the end on the side opposite to the pixel region R1 in the region where the virtual array section 27 is arranged.

[0057] 〈First virtual region: Configuration of border touch electrode〉

[0058] The first virtual region Rd1 is a region for the purpose of improving the sensitivity of touch detection at the end or near the end of the pixel region R1. As Figure 3As shown, a frame touch electrode 26 is disposed in the first virtual region Rd1. The frame touch electrode 26 is not electrically connected to the touch electrode 16 within the pixel region R1. Further, the frame touch electrode 26 has a frame shape surrounding the pixel region R1 in a plan view. In addition, a frame touch electrode wiring 26a is connected to an end portion of the frame touch electrode 26 on the side of the driving circuit 3. The frame touch electrode 26 is connected to the driving circuit 3 via the frame touch electrode wiring 26a. The driving circuit 3 supplies a virtual common electrode voltage and a virtual scan signal for touch detection to the frame touch electrode 26. Here, the "virtual common electrode voltage" is not used for an image or picture, but is a voltage supplied at the same voltage value during the same period (the period of display). Further, the "virtual scan signal for touch detection" is not used for touch detection at the position where the frame touch electrode 26 is disposed, but is a signal supplied to improve the sensitivity of touch detection at an end portion in the pixel region R1. That is, the "virtual scan signal for touch detection" is a signal for touch detection at an end portion and near the end portion on the side of the frame region R2 in the pixel region R1. Further, the "virtual scan signal for touch detection" is transmitted during the period of touch detection.

[0059] Here, in a case where the entire frame touch electrode and the entire virtual array portion are arranged to overlap in a plan view, the size of the frame touch electrode needs to be set to a multiple size (a multiple size) of the size of the virtual pixel within the virtual array portion. In contrast, in the first embodiment, as Figure 4 shown, only a part of the frame touch electrode 26 and the virtual array portion 27 overlap in a plan view. Therefore, the width W1 of the frame touch electrode 26 in the X direction can be arbitrarily set to ensure the area required for the frame touch electrode 26. That is, in the first embodiment, the width W1 of the frame touch electrode 26 is set to an independent size not affected by the size of the virtual array portion 27, and the size (area) necessary from the viewpoint of the operation of the frame touch electrode 26 can be ensured. In addition, in the frame touch electrode 26, in addition to a part of the virtual array portion 27, the scan wiring 12 overlaps in a plan view, but since there are substantially no other electrodes or wirings, the possibility of short circuit due to foreign matter mixing between the frame touch electrode 26 and other electrodes or wirings is reduced. In addition, in Figure 4 , the width W1 of the frame touch electrode 26 is shown to be larger than the width W2 of the virtual array portion 27, but the width W1 may be configured to be equal to or less than the width W2.

[0060] According to the above structure, a border touch electrode 26 is provided in a first virtual region Rd1 adjacent to the pixel region R1. Therefore, compared with the virtual array section 27, the border touch electrode 26 can be preferentially arranged closer to the touch electrode 16. As a result, the sensitivity of touch detection at the end and near the end of the pixel region R1 can be improved. In addition, as described above, the area of the border touch electrode 26 can be arbitrarily set. Therefore, the load on the border touch electrode 26 can be reduced, and the magnitude of the signal from the border touch electrode 26 can be increased. In addition, since no border touch electrode 26 is provided in the second virtual region Rd2, foreign matter can be prevented from mixing and short-circuiting between the border touch electrode 26 and other wirings or electrodes. As a result, the possibility of the active matrix substrate 1 becoming defective (yield improvement) can be reduced.

[0061] In addition, as Figure 3 shown, in a region Rd1a of the virtual region Rd that is further below the paper surface (the drive circuit 3 side) than the pixel region R1, the second virtual region Rd2 (virtual array section 27) is not provided, and only the first virtual region Rd1 (border touch electrode 26) is provided. In addition, in a region Rd1b of the virtual region Rd that is further above the paper surface than the pixel region R1, the second virtual region Rd2 (virtual array section 27) is not provided, and only the first virtual region Rd1 (border touch electrode 26) is provided.

[0062] 〈Second Virtual Region: Configuration of Virtual Array Section〉

[0063] The second virtual region Rd2 is a region for the purpose of suppressing defects (yield improvement) in the manufacturing process of the active matrix substrate 1. Specifically, a virtual array section 27 is arranged in the second virtual region Rd2 to protect the wirings, pixel electrodes 15, and TFTs 14 in the pixel region R1 from static electricity generated in the manufacturing process. Here, the virtual array section 27 is formed in a layer different from the layer in which the border touch electrode 26 is formed within the border region R2. The virtual array section 27 itself is damaged by static electricity from the periphery of the active matrix substrate 1, thereby suppressing the static electricity damage of the pixels 11 in the pixel region R1. That is, in the manufacturing process of the active matrix substrate 1 and after completion, even when static electricity invades the active matrix substrate 1 from the periphery, since the virtual array section 27 is damaged by static electricity before the static electricity is transmitted to the pixels 11 in the pixel region R1, the structures in the pixels 11 can be prevented from becoming defective. That is, the virtual array section 27 functions as an electrostatic protection element.

[0064] As Figure 4As shown, the virtual array section 27 has an array-like structure that mimics at least a part of the structure in the pixel 11 of the pixel region R1. Specifically, the virtual array section 27 includes a part of the scanning wiring 12, a virtual data wiring 23, a virtual thin film transistor 24 (hereinafter referred to as "virtual TFT 24"), and a virtual pixel electrode 25. The virtual data wiring 23, the virtual TFT 24, and the virtual pixel electrode 25 are respectively composed of the same layers and the same materials as the data wiring 13, the TFT 14, and the pixel electrode 15, and have the same shape in a top view. Thus, in the process of manufacturing the data wiring 13, the data wiring 13 can be protected from being damaged by static electricity invading from the periphery of the active matrix substrate 1 through the virtual data wiring 23. In addition, in the process of manufacturing a plurality of TFTs 14, the TFT 14 can be protected from being damaged by static electricity invading from the periphery of the active matrix substrate 1 through the virtual TFT 24. In addition, in the process of manufacturing a plurality of pixel electrodes 15, the pixel electrode 15 can be protected from being damaged by static electricity invading from the periphery of the active matrix substrate 1 through the virtual pixel electrode 25. Thus, in the manufacturing process of the active matrix substrate 1, the structures in the pixel 11 of the pixel region R1 can also be protected from static electricity. As a result, the defect rate of the structures in the pixel 11 of the pixel region R1 is reduced.

[0065] As described above, when the frame touch electrode 26 overlaps with other electrodes or wirings in a top view, the load on the frame touch electrode 26 becomes large, and it is likely to be short-circuited with the other electrodes or wirings. In contrast, in the first embodiment, the virtual array section 27 is disposed substantially entirely in the second virtual region Rd2. As Figure 5 shown, a part of the virtual pixel electrode 25 of the virtual array section 27 and a part of the frame touch electrode 26 are disposed so as to overlap with each other with the fourth insulating film 1e therebetween in a top view. In addition, when the pixel region R1 is smaller than the Figure 5 example shown, the length of the frame touch electrode 26 becomes smaller and the load becomes smaller. Therefore, compared with the Figure 5 example shown, the overlapping area of the virtual array section 27 and the frame touch electrode 26 in a top view can also be increased.

[0066] In addition, when the area of the virtual pixel electrode 25 included in the virtual array section 27 is configured to be smaller than the area of the pixel electrode 15, the portion other than the virtual pixel electrode 25 in the virtual array section 27 and the frame touch electrode 26 can also be disposed to overlap with each other in a top view. When the overlapping area of the virtual array section 27 and the frame touch electrode 26 is increased, the frame region R2 can be miniaturized.

[0067] As Figure 3As shown, in regions Rd1a and Rd1b, the border touch electrodes 26 are arranged, and the virtual array portion 27 is not arranged. Thus, the border touch electrodes 26 will not interfere with other drive circuits or wirings, especially the data wiring 13 and the touch electrode wiring 16a in region Rd1a, and the virtual array portion 27 of the second virtual region Rd2. As a result, in order to prevent the data wiring and the touch electrode wiring from interfering with the virtual array portion of the second virtual region, compared with the case of arranging bypassing the virtual array portion, the border region R2 of the display panel 10 can be reduced. In addition, in the present disclosure, when there is no problem even if the border region R2 is enlarged, the second virtual region Rd2 can also be provided in regions Rd1a and Rd1b.

[0068] (Method of manufacturing an active matrix substrate)

[0069] Next, with reference to Figure 5 , the method of manufacturing the active matrix substrate 1 will be described.

[0070] <Formation of the bottom coating film>

[0071] As Figure 5 shown, on the surface of the glass substrate 1a made of non-alkali glass or the like, a bottom coating film 1b (first insulating film) made of at least one of silicon oxide and silicon nitride is formed. The bottom coating film 1b is continuously formed on the pixel region R1 and the border region R2.

[0072] <Formation of the semiconductor layer and the virtual semiconductor layer>

[0073] Next, a silicon thin film is formed on the bottom coating film 1b. Then, after heating this silicon thin film by laser or the like and then cooling it, the semiconductor layer 14b made of a polycrystalline silicon thin film and the virtual semiconductor layer 24b of the virtual TFT 24 are formed as the same layer. After that, the semiconductor layer 14b and the virtual semiconductor layer 24b are patterned into a prescribed shape. In the first embodiment, the semiconductor layer 14b and the virtual semiconductor layer 24b have the same shape.

[0074] <Formation of the gate insulating film>

[0075] Then, a gate insulating film 1c (second insulating film) made of a thin film of silicon oxide or silicon nitride is formed so as to cover the semiconductor layer 14b and the virtual semiconductor layer 24b, so that the semiconductor layer 14b does not contact the gate 14a and the virtual semiconductor layer 24b does not contact the virtual gate 24a. The gate insulating film 1c is continuously formed on the pixel region R1 and the border region R2.

[0076] <Formation of the gate and the virtual gate>

[0077] Further, on the gate insulating film 1c, the gate 14a of the TFT 14, the dummy gate 24a of the dummy TFT 24, and the scanning wiring 12 made of a metal thin film of a high melting point such as tantalum or tungsten are formed as the same layer and are respectively patterned into a predetermined shape. In the first embodiment, the gate 14a and the dummy gate 24a are formed into the same shape using the same material.

[0078] <Formation of Interlayer Film>

[0079] Further, a third insulating film 1d (interlayer film) made of a thin film such as silicon oxide or silicon nitride is formed so as to cover the gate 14a, the dummy gate 24a, and the scanning wiring 12. The third insulating film 1d is continuously formed on the pixel region R1 and the frame region R2. After the third insulating film 1d is formed, various contact holes are formed in the gate insulating film 1c and the third insulating film 1d. Specifically, there are formed: a contact hole for connecting the semiconductor layer 14b and the source 14c, which is disposed with a part of the source 14c; and a contact hole for connecting the semiconductor layer 14b and the drain 14d, which is disposed with a part of the drain 14d. In addition, there are formed: a contact hole for connecting the dummy semiconductor layer 24b and the dummy source 24c, which is disposed with a part of the dummy source 24c; and a contact hole for connecting the dummy semiconductor layer 24b and the dummy drain 24d, which is disposed with a part of the dummy drain 24d.

[0080] <Formation of Source, Data Wiring, Drain, Dummy Source, Dummy Data Wiring, Dummy Drain, and Touch Electrode Wiring>

[0081] Then, the source 14c, the data wiring 13, the drain 14d, the dummy source 24c, the dummy data wiring 23, the dummy drain 24d, and the touch electrode wiring 16a made of a thin film of a low-resistance metal (second metal thin film) are formed as the same layer. As the "low-resistance metal", a single film such as aluminum or chromium, an alloy film, or a laminated metal thin film with titanium or the like can be used. One end of the semiconductor layer 14b is connected to the source 14c, and the other end of the semiconductor layer 14b is connected to the drain 14d. One end of the dummy semiconductor layer 24b is connected to the dummy source 24c, and the other end of the dummy semiconductor layer 24b is connected to the dummy drain 24d. Thus, the TFT 14 and the dummy TFT 24 are completed. In addition, through the above process, a single-chip scanning wiring driving circuit 12a is formed on the glass substrate 1a (refer to Figure 2)。In addition, using the transparent oxide film described later, the terminals for connection to the driving circuit 3 and the flexible printed circuit board are formed in the border area R2 of the active matrix substrate 1 and in the area not covered by the counter substrate 2. In addition, the planar shape of the dummy TFT 24 is the same as that of the TFT 14 in the pixel area R1, but is not limited thereto. For example, the area of the dummy TFT 24 can be made smaller than that of the TFT 14, making it easier to be damaged by static electricity. Thus, compared with the TFT 14 in the pixel area R1, the dummy TFT 24 is preferentially damaged by static electricity, and therefore, the defect rate of the TFT 14 in the pixel area R1 can be further reduced.

[0082] <Formation of planarization film>

[0083] A fourth insulating film 1e (planarization film) is formed on the scanning wiring 12, TFT 14, dummy TFT 24, data wiring 13, dummy data wiring 23, and touch electrode wiring 16a formed as described above. As the fourth insulating film 1e, a photosensitive resin made of an acrylic resin can be used. Then, contact holes 15a for connecting the drain 14d and the pixel electrode 15, contact holes 25a for connecting the dummy drain 24d and the dummy pixel electrode 25, and contact holes 16e for connecting the touch electrode wiring 16a and the touch electrode 16 are formed in the fourth insulating film 1e.

[0084] <Formation of pixel electrode>

[0085] Moreover, the pixel electrode 15 and the dummy pixel electrode 25 made of the first transparent oxide film are formed as the same layer and patterned into a prescribed shape. As the first transparent oxide film, ITO (Indium Tin Oxide) or IZO (Indium / inc Oxide) can be used. The pixel electrode 15 is patterned to be separated for each pixel (each dummy pixel), and has an overall shape that is bent in a top view for the FFS mode.

[0086] <Formation of separation film>

[0087] After the above, a separation film 1f (fifth insulating film) is formed to electrically separate the pixel electrode 15 and the touch electrode 16, and to electrically separate the dummy pixel electrode 25 and the border touch electrode 26. As the separation film 1f, silicon oxide or silicon nitride is used. And a contact hole 16e for connecting the touch electrode 16 and the touch electrode wiring 16a is formed in the separation film 1f.

[0088] <Formation of touch electrode and border touch electrode>

[0089] Then, the touch electrode 16 and the frame touch electrode 26 formed of the second transparent oxide film are patterned into a prescribed shape. As the second transparent oxide film, ITO or IZO can be used. Then, a slit portion 16b is formed in the touch electrode 16. Thus, the active matrix substrate 1 is completed.

[0090] [Second Embodiment]

[0091] Next, with reference to Figures 6 to 8 , the configuration of the display device 200 according to the second embodiment will be described. In addition, the same structures as those in the first embodiment are denoted by the same reference numerals as in the first embodiment, and the description thereof is omitted. For example, the structure within the pixel region R1 in the display device 200 is the same as the structure within the pixel region R1 in the display device 100 of the first embodiment.

[0092] Figure 6 is a diagram for explaining a part of the configuration of the display device 200 according to the second embodiment. Figure 7 is a plan view for explaining the configuration of the frame touch electrode 226 according to the second embodiment. Figure 8 is along Figure 6 a cross-sectional view of the active matrix substrate 201 taken along line B2 - B2.

[0093] In addition, the manner of arranging the frame touch electrode 226 in the first virtual region Rda1 in the second embodiment is different from that of the frame touch electrode 26 in the first embodiment. Specifically, the frame touch electrode 226 includes a convex portion 226b that protrudes toward the pixel region R1. The convex portion 226b has a shape along the side 16c on the frame touch electrode 226 side in the touch electrode 16 in a top view. Specifically, the side 16c has a curved portion that is recessed in the X direction in a top view. Moreover, the end edge on the pixel region R1 side of the convex portion 226b has a curved portion that protrudes in the X direction toward the curved portion of the side 16c. The first virtual region Rda1 includes a third virtual region Rda3 where the convex portion 226b is provided. The third virtual region Rda3 is provided on the pixel region R1 side in the first virtual region Rda1. In addition, in the first embodiment, between the scan wiring drive circuit 12a and the pixel region R1, the end edge on the pixel region R1 side of the frame touch electrode 26 is formed in a straight line shape parallel to the Y direction.

[0094] In addition, the manner of arranging the virtual array portion 227 in the second virtual region Rda2 in the second embodiment is different from that of the virtual array portion 27 in the first embodiment. Specifically, in the virtual array portion 227 of the second embodiment, the virtual pixel electrode 25 is not provided and includes a plurality of virtual TFTs 224. In addition, a part of the plurality of virtual TFTs 224 is arranged at a position that overlaps with the frame touch electrode 226 in a top view.

[0095] As Figure 7 shown, in the portion of the pixel region R1 in the border touch electrode 226 that is closer to the right side of the paper surface, a recess 226c having a shape along the side 16d of the touch electrode 16 is provided. As a result, at both the left end (one end) and the right end (the other end) of the pixel region R1 in the paper surface direction, the border touch electrode 226 has a shape along the sides 16c and 16d of the touch electrode 16, respectively. As a result, the border touch electrodes 226 at one end and the other end of the pixel region R1 are of the same size, and the sensitivity of the touch electrode 16 can be improved.

[0096] As Figure 6 shown, the display device 200 of the second embodiment includes a border touch electrode wiring 226a. The border touch electrode wiring 226a is formed of, for example, a metal thin film. As a result, the load on the border touch electrode 226 can be reduced. The border touch electrode wiring 226a is formed of the above-described second metal thin film (a thin film of a low-resistance metal) that is the material of the data wiring 13. And, as Figure 8 shown, the border touch electrode 226 and the border touch electrode wiring 226a are connected via a contact hole 226d provided in the fourth insulating film 1e (planarization film). In addition, the border touch electrode wiring 226a is disposed under the border touch electrode 226. In addition, as Figure 7 shown, the border touch electrode wiring 226a is disposed to overlap at least a part of the virtual TFT 224 in a top view. In this way, a part of the border touch electrode 226, a part of the border touch electrode wiring 226a, and a part of the virtual TFT 224 are disposed to overlap, and thus the area for disposing these can be reduced.

[0097] In the second embodiment, compared with the first embodiment, more virtual array portions 227 are disposed, and the area where the virtual array portion 227 overlaps with the frame edge touch electrode 226 is large. However, in the second embodiment, since the virtual array portion 227 does not include a virtual pixel electrode and is only composed of the virtual TFT 224, the overlapping area of the border touch electrode 226 and the virtual array portion 227 in a top view is reduced. As a result, the possibility of short-circuiting due to foreign matter between the border touch electrode 226 and other electrodes can be reduced.

[0098] In addition, the size P1 (pitch) of the arrangement intervals of the plurality of virtual TFTs 224 in the left-right direction on the paper surface is smaller than the size P2 (pitch) of the arrangement intervals of the TFTs 14 in the pixel region R1. Thus, even if the size of the virtual region Rda is the same as that of the virtual region Rd in the first embodiment, compared with the first embodiment, a plurality of virtual TFTs 224 can be arranged. As a result, even if ESD breakdown occurs sequentially from the end of the active matrix substrate 1 due to static electricity, the possibility of the TFTs 14 in the pixel region R1 being damaged can be reduced. In addition, the planar shape of the virtual TFT 224 is the same as that of the TFT 14 in the pixel region R1, but is not limited thereto. For example, the virtual TFT 224 may not have a virtual source electrode or a virtual drain electrode connected through a contact hole. In addition, for example, the arrangement direction of the virtual TFT 224 may be different from that of the TFT 14 in the pixel region R1. In addition, the virtual TFT 224 is composed of a virtual gate 224a, a gate insulating film 1c, and a virtual semiconductor layer 224b that intersects the virtual gate, but the virtual gate 224a may be a pattern branched from a scan wiring 12, or the virtual gate 224a may be the scan wiring 12 itself.

[0099] The third virtual region Rda3 is a region for suppressing a reduction in display quality caused by non-uniformity (discontinuity) of circuit constants of structures in a plurality of pixels 11 in the pixel region R1. One of the factors having a great influence on the circuit constants is the parasitic capacitance. Therefore, a parasitic capacitance is formed in the third virtual region Rda3 to prevent a reduction in display quality.

[0100] Here, the parasitic capacitance is generated between adjacent electrodes. Therefore, the third virtual region Rda3 is provided in a portion of the first virtual region Rda1 closer to the pixel region R1. In addition, the third virtual region Rda3 is close to the data wiring 13 and the touch electrode 16 in the pixel region R1.

[0101] As Figure 6 shown, the touch electrode 16 has a non-linearly symmetric shape centered on the Y axis. Thus, the shape of the convex portion 226b of the border touch electrode 226 on the left side of the paper surface compared with the touch electrode 16 is as Figure 7 shown, and may also be a shape different from the shape of the concave portion 226c of the border touch electrode 226 on the right side of the paper surface compared with the touch electrode 16.

[0102] As Figure 7As shown, the size d2 of the gap between the convex portion 226b of the frame touch electrode 226 and the touch electrode 16 is equal to the size d1 of the gap between two adjacent touch electrodes 16 in the horizontal direction on the paper surface. Thus, it is possible to make the circuit constants of the structures in the pixels 11 near the end of the pixel region R1 the same as those of the structures in the pixels 11 in the central portion of the pixel region R1. As a result, uniform display can be achieved.

[0103] [Third Embodiment]

[0104] Next, with reference to Figures 9 to 11 , the configuration of the display device 300 according to the third embodiment will be described. In addition, the same structures as those in the first or second embodiment are denoted by the same reference numerals as in the first or second embodiment, and the description thereof is omitted.

[0105] Figure 9 is a diagram for explaining a part of the configuration of the display device 300 according to the third embodiment. Figure 10 is a cross-sectional view of the active matrix substrate 301 along the Figure 9 B3 - B3 line. Figure 11 is a plan view for explaining the configuration of the frame touch electrode 326 according to the third embodiment.

[0106] As Figure 9 shown, in the third embodiment, in addition to the first virtual region Rdb1, the second virtual region Rdb2, and the third virtual region Rdb3, a fourth virtual region Rdb4 is further provided within the first virtual region Rdb1.

[0107] The fourth virtual region Rdb4 is a region in the first virtual region Rdb1 that is closer to the pixel region R1 side, and is a region where the pattern density of the frame touch electrode 326 is adjusted. In addition, the fourth virtual region Rdb4 is a region for ensuring the patterning accuracy of the pixel electrode 15 and the touch electrode 16. Here, the pixel electrode 15 and the touch electrode 16 can be patterned using the above manufacturing method (semiconductor formation process). However, when comparing the central portion and the end of the pixel region R1, the density of the patterns sometimes changes sharply at the end. Therefore, at the end, the patterning sometimes cannot achieve the desired shape or size. In contrast, in the third embodiment, through the fourth virtual region Rdb4, it is possible to prevent the patterning at the end of the pixel region R1 from not achieving the desired shape or size.

[0108] Specifically, the frame touch electrode 326 has a virtual slit portion 326d having the same shape as the slit portion 16b of the touch electrode 16 provided in the pixel region R1. Thus, the patterning of the touch electrode 16 is formed uniformly across the entire pixel region R1. In addition, the virtual slit portion 326d is not provided over the entire frame touch electrode 326, but is provided only in a partial region (fourth virtual region Rdb4) on the side closer to the pixel region R1. Thus, it is possible to prevent the area of the frame touch electrode 326 from becoming too small. For example, as Figure 11 shown, one virtual slit portion 326d is provided for each row of pixels on the left and right sides of the paper surface of the pixel region R1. In addition, the virtual slit portions 326e formed on the fourth virtual regions Rdb4 on the upper and lower sides of the paper surface of the pixel region R1 are provided in the frame touch electrode 326 in the same number as the slit portions 16b adjacent in the upward or downward direction of the paper surface. In addition, the length L2 in the Y direction of the virtual slit portion 326e is shorter than the length L1 of the slit portion 16b, for example, about one-third.

[0109] The above describes the embodiments, but the above embodiments are merely examples for implementing the present invention. Therefore, the present disclosure is not limited to the above embodiments, and can be appropriately modified and implemented within the scope not departing from the gist thereof.

[0110] (1) In the above first to third embodiments, an example in which the pixel electrode is formed in a layer lower than the touch electrode is shown, but the present disclosure is not limited thereto. For example, the pixel electrode may be formed in a layer higher than the touch electrode.

[0111] (2) In the above first to third embodiments, an example in which the frame touch electrode is formed of the same layer as the touch electrode and the same material (second transparent oxide) is shown, but the present disclosure is not limited thereto. For example, the frame touch electrode may be constituted by a laminated film of the first transparent oxide for the pixel electrode and the second transparent oxide for the touch electrode. In addition, the frame touch electrode may not be constituted by a transparent conductive film, but may be constituted by a metal thin film, a laminated film of metal thin films.

[0112] (3) In the above first to third embodiments, an example in which the touch electrode wiring is formed in the same layer as the data wiring is shown, but the present disclosure is not limited thereto. For example, the touch electrode wiring may be constituted by a material different from the data wiring. In this case, the touch electrode wiring and the data wiring may be arranged in parallel so as not to overlap in a top view, or the data wiring and the touch electrode wiring may be laminated with an insulating film therebetween.

[0113] (4) In the above first to third embodiments, an example in which the frame touch electrodes are arranged so as to surround the pixel region is shown, but the present disclosure is not limited thereto. For example, only the sides where the touch operation in the pixel region is likely to become unstable may be targeted, and the frame touch electrodes may be partially arranged. That is, the line width W1 (refer to Figure 4 ) of the frame touch electrodes may not be fixed around the pixel region. For example, the line width of the frame touch electrodes may be widened at the ends (sides) of the pixel region where the touch sensitivity is likely to become unstable. Here, if the line width of the frame touch electrodes is uniformly widened, the border of the display panel may sometimes become larger. In addition, since the number of intersections between the frame touch electrodes and the scanning wirings and data wirings increases, it becomes a cause of unexpected defects. According to the experiments (opinions) of the inventors of the present application, in the case of a rectangular pixel region, the touch sensitivity is stable at the side where the terminals are present (the lower side), and the touch sensitivity is likely to be unstable at the sides (the left and right sides) in the direction intersecting the side where the terminals are present and the side (the upper side) away from the terminals. Therefore, as in the case of the frame touch electrode 426 of the modified example shown in Figure 12 , when the line width of the portion arranged on the side where the terminals are present (the lower side: the negative side of the Y axis) is set to W1B, the line width of the portion arranged on the side (the upper side: the positive side of the Y axis) away from the terminals across the pixel region is set to W1T, and the line widths of the frame touch electrode 426 on the left and right sides in the direction intersecting the side of the terminal side are set to W1L and W1R respectively, for example, the frame touch electrode 426 may be configured in such a way as to have the relationship of the following formula (1). In addition, not limited to formula (1), the frame touch electrode 426 may be configured in such a way as to have the relationship of formula (2) or formula (3).

[0114] W1B < W1L = W1R < W1T...(1)

[0115] W1B < W1L = W1R = W1T...(2)

[0116] W1B = W1L = W1R < W1T...(3)

[0117] In addition, in the above formula (1) (3), the line width W1L of the portion of the frame touch electrode 426 arranged on the left side and the line width W1R of the portion arranged on the right side are set to be the same, but it is not limited thereto. On the basis of satisfying the above size relationship, the frame touch electrode 426 may be further configured in such a way that the line width W1L of the portion arranged on the left side is different from the line width W1R of the portion arranged on the right side.

[0118] (5) In the above-described first to third embodiments, an example in which the frame touch electrode wiring is formed of the same material as the frame touch electrode or a second metal thin film (a thin film of a low-resistance metal) is shown, but the present disclosure is not limited thereto. For example, the frame touch electrode wiring may be formed of a metal thin film different from the thin film of the low-resistance metal. Further, a dummy data wiring may be formed under the frame touch electrode, and the dummy data wiring may be used as the frame touch electrode wiring.

[0119] (6) In the above-described first to third embodiments, an example in which the number of touch electrode wirings provided for each touch electrode is one is shown, but the present disclosure is not limited thereto. For example, a plurality of touch electrode wirings may be provided for one touch electrode. Further, the number of touch electrode wirings provided for each touch electrode may not be the same, and a larger number of touch electrode wirings may be provided for a touch electrode for which the touch electrode wiring is long. Further, the frame touch electrode applies a scan signal for detecting a virtual common electrode voltage and a virtual touch time-divisionally via the touch electrode wiring, but is not limited thereto. For example, although the contribution to the stabilization of touch detection is limited, a virtual common electrode voltage may be always applied to the frame touch electrode for the purpose of equalizing the parasitic capacitance around the touch electrode.

[0120] (7) In the above-described first to third embodiments, an example in which the end portion of the touch electrode is disposed near the boundary between the pixel region and the frame region is shown, but the present disclosure is not limited thereto. The touch electrode may also extend slightly outward beyond the boundary between the pixel region and the frame region. In this case, even within the frame region, since the frame touch electrode cannot be disposed in the region where the touch electrode exists, the first virtual region extends from the end portion on the outer edge side of the end portion of the pixel region or the touch electrode to the contour of the frame touch electrode on the side away from the pixel region.

[0121] (8) In the above-described first to third embodiments, as an example of the frame element, an example in which a virtual array portion including at least one of a virtual switching element and a virtual pixel electrode is disposed in the second virtual region is shown, but is not limited thereto. For example, the frame element may be constituted by a structure in which scan wirings are connected to other scan wirings by diodes or meandering resistance elements, or a structure in which data wirings are connected to other data wirings by diodes or meandering resistance elements. Further, the frame element may be connected to the wiring of the common electrode, and / or may be constituted by virtual scan wirings and virtual data wirings connected to the ground wire, and such virtual wirings are configured as electrostatic receivers (structures that receive static electricity in place of the structures within the pixel).

[0122] (9) In the above first to third embodiments, a dummy array section is provided as a measure for improving the yield of the active matrix substrate, but the present disclosure is not limited thereto. In order to improve the yield, wirings and electrodes may also be arranged so as to surround the pixel region. In addition, as a management unit for improving the yield, for example, a pattern for identifying the row position / column position of the wirings and pixels may be arranged. For example, letters, numbers, etc. may be formed by patterning any one of the semiconductor layer, metal thin film, transparent electrode, or insulating film in a region that overlaps with the frame touch electrode when viewed from above. Since these marks are electrically floating, even if they are short-circuited with the frame touch electrode, there is no problem in driving. In addition, a region for arranging the symbols is not required, and the advantage of not increasing the frame is achieved.

[0123] (10) In the above first to third embodiments, an example in which the frame touch electrode overlaps a part of the dummy array section in the first virtual region is shown, but the present disclosure is not limited thereto. That is, in the first virtual region, the frame touch electrode does not overlap the dummy array section.

[0124] The above display device may also be described as follows.

[0125] The active matrix substrate according to the first configuration includes: a plurality of scan wirings; a plurality of data wirings arranged to cross the plurality of scan wirings; a plurality of switching elements respectively arranged in a plurality of pixels divided by the plurality of scan wirings and the plurality of data wirings; and a plurality of pixel electrodes connected to the switching elements. The active matrix substrate has, when viewed from above, a pixel region where the plurality of pixel electrodes are provided and a frame region surrounding the pixel region. The active matrix substrate further includes: a touch electrode arranged opposite to the plurality of pixel electrodes in the pixel region; a frame touch electrode formed in a first layer in the frame region and not electrically connected to the touch electrode; and a frame element formed in a second layer different from the first layer in the frame region to suppress electrostatic breakdown of at least one of the plurality of pixels. The frame region includes: a first region where the frame touch electrode is arranged adjacent to the pixel region; and a second region arranged on the side opposite to the first region with respect to the pixel region, where the frame element is arranged instead of the frame touch electrode (first configuration).

[0126] According to the above first configuration, since the frame touch electrodes are provided in the frame region, it is possible to effectively detect a touch on the end portion on the frame region side of the pixel region. In addition, since the frame elements for suppressing electrostatic breakdown of the pixels are arranged in the frame region, it is possible to prevent the occurrence of defects in the structures within the pixels in the pixel region due to static electricity. Moreover, since the frame touch electrodes are not arranged in the second region of the frame region, it is possible to prevent short - circuiting between the frame touch electrodes and the frame elements as compared with the case where the frame touch electrodes are formed in both the first region and the second region.

[0127] In the first configuration, the frame element may also include at least one of a dummy switch element and a dummy pixel electrode. The dummy switch element is formed of the same material as the plurality of switch elements and on the same layer, and the dummy pixel electrode is formed of the same material as the plurality of pixel electrodes and on the same layer (second configuration).

[0128] According to the above second configuration, in the case where the frame element includes a dummy switch element, during the process of manufacturing the plurality of switch elements, it is possible to suppress the breakdown of the switch elements due to static electricity invading from the periphery of the active matrix substrate by the dummy switch element. In addition, in the case where the frame element includes a dummy pixel electrode, during the process of manufacturing the plurality of pixel electrodes, it is possible to suppress the electrostatic breakdown of the pixel electrodes by the dummy pixel electrode invading from the periphery of the active matrix substrate.

[0129] In the first or second configuration, within the first region, at least a part of the frame touch electrode overlaps with a part of the frame element in a top view (third configuration).

[0130] According to the above third configuration, it is possible to miniaturize the frame region by an amount corresponding to the overlap of at least a part of the frame touch electrode and a part of the frame element within the first region.

[0131] In any one of the first to third configurations, the frame touch electrode may also be formed to surround the pixel region in a top view (fourth configuration).

[0132] According to the above fourth configuration, it is possible to improve the overall touch sensitivity of the edge portion of the pixel region.

[0133] In any one of the first to fourth configurations, the end edge on the first - region side of the touch electrode includes a curved line portion that is curved in a top view, and the end edge on the pixel - region side of the frame touch electrode includes a portion having a shape along the curved line portion at a position opposite to the curved line portion (fifth configuration).

[0134] According to the above fifth configuration, since the end edge on the pixel region side of the frame touch electrode has a shape along the curved line portion of the touch electrode, the gap between the frame touch electrode and the touch electrode can be reduced.

[0135] In any one of the first to fifth configurations, the touch electrode may include a plurality of slit portions, and the frame touch electrode has a hole portion or a notch portion formed in a portion on the pixel region side in the frame touch electrode (sixth configuration).

[0136] Here, in the semiconductor formation process, at a portion where the density of the electrode changes rapidly, the desired shape or size may not be achieved. In contrast, according to the above sixth configuration, since a hole portion or a notch portion is formed in a portion on the pixel region side in the frame touch electrode, the density of the portion on the pixel region side in the frame touch electrode can be made close to the density of the touch electrode provided with the slit. As a result, between the touch electrode and the frame touch electrode, the density of the electrode does not change rapidly, so that it is possible to prevent the touch electrode from not becoming the desired shape or size.

[0137] In the sixth configuration, the hole portion or the notch portion of the frame touch electrode may have the same shape as at least one of the plurality of slit portions in a top view (seventh configuration).

[0138] According to the above seventh configuration, the density of the portion on the pixel region side in the frame touch electrode can be made the same as the density of the touch electrode provided with the slit.

[0139] The display panel according to the eighth configuration includes: an active matrix substrate having any one of the first to seventh configurations; and a counter substrate disposed opposite to the active matrix substrate (eighth configuration).

[0140] According to the above eighth configuration, it is possible to provide a display panel that can effectively detect a touch on the end portion on the frame region side in the pixel region, can reduce the defect rate of the structures in the pixel in the pixel region, and can prevent a short circuit from occurring in the frame region.

[0141] The display device according to the ninth configuration has the display panel of the eighth configuration and a control circuit for controlling the display panel (ninth configuration).

[0142] According to the above ninth configuration, it is possible to provide a display device that can effectively detect a touch on the end portion on the frame region side in the pixel region, can reduce the defect rate of the structures in the pixel in the pixel region, and can prevent a short circuit from occurring in the frame region.

[0143] Description of Reference Numerals

[0144] 1, 201, 301... active matrix substrate, 2... counter substrate, 3... driving circuit, 10... display panel, 11... pixel, 12... scanning wiring, 13... data wiring, 14... thin film transistor, 15... pixel electrode, 16... touch electrode, 16b... slit portion, 16c, 16d... sides, 20... control circuit, 23... virtual data wiring, 24, 224... virtual thin film transistor, 24a, 224a... virtual gate, 24b, 224b... virtual semiconductor layer, 25... virtual pixel electrode, 26, 226, 326, 426... frame touch electrode, 27, 227... virtual array portion, 100, 200, 300... display device, 226b... convex portion, 226c... concave portion, 326d, 326e... virtual slit portion, R1... pixel region, R2... frame region, Rd, Rda, Rdb... virtual region, Rd1, Rdb1... first virtual region, Rd2, Rdb2... second virtual region, Rda3... third virtual region, Rdb4... fourth virtual region.

Claims

1. An active matrix substrate, comprising: a plurality of scan wirings; a plurality of data wirings, which are arranged to cross the plurality of scan wirings; A plurality of switching elements, which are respectively disposed in a plurality of pixels divided by the plurality of scanning wirings and the plurality of data wirings; and a plurality of pixel electrodes, which are connected to the switching elements, wherein the active matrix substrate is characterized in that when viewed from above, the active matrix substrate has a pixel region where the plurality of pixel electrodes are provided and a frame region surrounding the pixel region, the active matrix substrate further comprises: a touch electrode, which is arranged opposite to the plurality of pixel electrodes within the pixel region; a frame touch electrode, which is formed in a first layer within the frame region and is not electrically connected to the touch electrode; a frame element, which is formed in a second layer different from the first layer within the frame region and suppresses electrostatic breakdown of at least one of the plurality of pixels, the frame region includes: a first region where the frame touch electrode is arranged at a position adjacent to the pixel region; a second region, which is arranged at a position opposite to the first region with respect to the pixel region, and where the frame element is arranged instead of the frame touch electrode.

2. The active matrix substrate according to claim 1, wherein The frame element includes at least one of a dummy switching element and a dummy pixel electrode. The dummy switching element is formed of the same material as the plurality of switching elements and on the same layer, and the dummy pixel electrode is formed of the same material as the plurality of pixel electrodes and on the same layer.

3. The active matrix substrate according to claim 1 or 2, characterized in that, Within the first region, at least a part of the frame touch electrode overlaps with a part of the frame element when viewed from above.

4. The active matrix substrate according to any one of claims 1 to 3, characterized in that, The frame touch electrode surrounds the pixel region when viewed from above.

5. The active matrix substrate according to any one of claims 1 to 4, characterized in that an end edge on the first region side of the touch electrode includes a curved line portion that is curved when viewed from above, an end edge on the pixel region side of the frame touch electrode includes a portion having a shape along the curved line portion at a position opposite to the curved line portion.

6. The active matrix substrate according to any one of claims 1 to 5, characterized in that the touch electrode includes a plurality of slit portions, the frame touch electrode has a hole portion or a notch portion formed in a portion on the pixel region side of the frame touch electrode.

7. The active matrix substrate according to claim 6, wherein The hole portion or the notch portion has the same shape as at least one of the plurality of slit portions when viewed from above.

8. A display panel, characterized in that, An active matrix substrate according to any one of claims 1 to 7; and a counter substrate arranged opposite to the active matrix substrate.

9. A display device, characterized in that, A display panel according to claim 8; and a control circuit for controlling the display panel.

Images