Display panel, voltage compensation method thereof and display device

Abstract

Embodiments of the present application provide a display panel, a voltage compensation method thereof and a display device. The display panel comprises a first power voltage signal line and a pixel circuit. A first switch module in the pixel circuit is electrically connected with a first scanning signal line, a first end of a driving module and the first power voltage signal line, respectively. A storage module in the pixel circuit is electrically connected with a second power voltage signal line, a voltage acquisition and processing module and a second end of the first switch module, respectively. In a light emitting stage, the first switch module is turned on, and the driving module drives a light emitting element to emit light. In a first detection stage, the first switch module is turned off, and the voltage acquisition and processing module acquires a first voltage value of the second end of the storage module. The voltage acquisition and processing module is configured to calculate a compensation value of a data voltage according to the first voltage value and a reference voltage value of the first power voltage signal line, and adjust the data voltage provided to the pixel circuit according to the compensation value. Embodiments of the present application can improve the brightness uniformity of the display panel.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of display, and particularly relates to a display panel, a voltage compensation method thereof and a display device. BACKGROUND

[0002] With the development of display technology, people have higher and higher requirements on the display quality of display panels. A first power voltage signal line and a pixel circuit are arranged in the display panel, and the first power voltage signal line is used to provide a first power voltage signal to the pixel circuit. However, the first power voltage signal is affected by line voltage drop loss in the transmission process, resulting in different potential losses of the first power voltage signal transmitted to different positions, and further resulting in different driving currents flowing through different pixel circuits, which affects the brightness uniformity of the display panel. SUMMARY

[0003] The embodiments of the present application provide a display panel, a voltage compensation method thereof and a display device, which can improve the brightness uniformity of the display panel.

[0004] In a first aspect, the embodiments of the present application provide a display panel, which comprises a first power voltage signal line and a pixel circuit, and the first power voltage signal line is electrically connected with the pixel circuit. The pixel circuit comprises a driving module, a first switch module and a storage module. The control end of the first switch module is electrically connected with a first scan signal line. The first end of the first switch module is electrically connected with the first end of the driving module. The second end of the first switch module is electrically connected with the first power voltage signal line. The first end of the storage module is electrically connected with a second power voltage signal line. The second end of the storage module is electrically connected with a voltage acquisition and processing module and the second end of the first switch module. In a light-emitting stage, the first switch module is turned on under the control of the first scan signal line, and the driving module drives a light-emitting element to emit light. In a first detection stage, the first switch module is turned off under the control of the first scan signal line, and the voltage acquisition and processing module is used to acquire a first voltage value of the second end of the storage module. The voltage acquisition and processing module is further used to calculate a compensation value of a data voltage according to the first voltage value and a reference voltage value provided by the first power voltage signal line, and adjust the voltage value of a data signal provided to the pixel circuit according to the compensation value.

[0005] In a second aspect, the embodiments of the present application provide a voltage compensation method of a display panel, which is applied to the display panel provided in the first aspect. The voltage compensation method comprises the following steps: in a light-emitting stage, a conductive level is provided to the first scan signal line, so that the first switch module is turned on under the control of the first scan signal line; in a first detection stage, a cut-off level is provided to the first scan signal line, and a first voltage value of the second end of the storage module is acquired; a compensation value of a data voltage is calculated according to the first voltage value and a reference voltage value provided by the first power voltage signal line; and the voltage value of a data signal provided to the pixel circuit is adjusted according to the compensation value.

[0006] Thirdly, embodiments of this application provide a display device, which includes a display panel as provided in the first aspect.

[0007] The display panel and its voltage compensation method and display device according to the embodiments of this application, on the one hand, the voltage acquisition and processing module calculates the compensation value of the data voltage based on the first voltage value of the second terminal of the storage module in the pixel circuit and the reference voltage value provided by the first power supply voltage signal line, and adjusts the voltage value of the data signal provided to the pixel circuit according to the compensation value, which can compensate for the influence caused by the line impedance loss of the first power supply voltage signal line and improve the brightness uniformity of the display panel; on the other hand, by adding a first switch module, the first switch module is turned off in the first detection stage, which can avoid the transfer of the charge stored in the storage module to the light-emitting element due to the conduction of the drive module or leakage current, thereby avoiding the light-emitting element from emitting light, and at the same time ensuring the accuracy of the acquired first voltage value, thereby ensuring the accuracy of the final compensation result; furthermore, the light-emitting stage and the first detection stage are performed separately, which can ensure that the light-emitting element is not affected by the voltage detection process when emitting light, so that the brightness of the light-emitting element can reach the expected brightness. Attached Figure Description

[0008] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 A circuit diagram of a display panel provided in an embodiment of this application;

[0010] Figure 2 Another circuit diagram of the display panel provided in the embodiments of this application;

[0011] Figure 3 Another circuit diagram of a display panel provided in an embodiment of this application;

[0012] Figure 4 for Figure 3 The diagram shown is a driving timing diagram corresponding to a display panel.

[0013] Figure 5 Another circuit diagram of a display panel provided in an embodiment of this application;

[0014] Figure 6 Another circuit diagram of a display panel provided in an embodiment of this application;

[0015] Figure 7 for Figure 6A driving timing diagram corresponding to the display panel shown;

[0016] Figure 8 Another circuit diagram of the display panel provided by the embodiment of the present application;

[0017] Figure 9 Another circuit diagram of the display panel provided by the embodiment of the present application;

[0018] Figure 10 Another circuit diagram of the display panel provided by the embodiment of the present application;

[0019] Figure 11 Another circuit diagram of the display panel provided by the embodiment of the present application;

[0020] Figure 12 A flow diagram of the voltage collection and processing module;

[0021] Figure 13 Another flow diagram of the voltage collection and processing module;

[0022] Figure 14 A flow diagram of the voltage compensation method of the display panel provided by the embodiment of the present application;

[0023] Figure 15 A structure diagram of the display device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0024] The features and exemplary embodiments of various aspects of the present application will be described in detail below, in order to make the purposes, technical solutions and advantages of the present application clearer and more apparent, the present application will be further described in detail below in combination with the drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, but not to limit the present application. The present application can be implemented without some of these specific details for those skilled in the art. The following description of the embodiments is only to provide a better understanding of the present application by showing examples of the present application.

[0025] It should be noted that the relative terms, such as first and second, and the like are used herein only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between such entities or operations. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by an "includes" statement does not exclude the existence of additional elements of the same nature as those included in the process, method, article, or apparatus.

[0026] It should be understood that the term "and / or" used herein only describes an association relationship of associated objects, which means that there can be three relationships, for example, A and / or B, which can represent three cases of existence of A alone, existence of A and B simultaneously, and existence of B alone. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.

[0027] It should be noted that the transistors in the embodiments of the present application can be N-type transistors or P-type transistors. For an N-type transistor, the on level is high and the off level is low. That is, when the gate of the N-type transistor is high, the first electrode and the second electrode thereof are turned on, and when the gate of the N-type transistor is low, the first electrode and the second electrode thereof are turned off. For a P-type transistor, the on level is low and the off level is high. That is, when the control electrode of the P-type transistor is low, the first electrode and the second electrode thereof are turned on, and when the control electrode of the P-type transistor is high, the first electrode and the second electrode thereof are turned off. In specific implementation, the gate of each transistor is used as its control electrode, and according to the signal of the gate of each transistor and its type, the first electrode can be used as the source electrode and the second electrode as the drain electrode, or the first electrode can be used as the drain electrode and the second electrode as the source electrode, which is not distinguished herein. In addition, the on level and the off level in the embodiments of the present application are generic, the on level refers to any level that can turn on the transistor, and the off level refers to any level that can turn off / turn off the transistor.

[0028] In the embodiments of the present application, the term "electrically connected" can refer to direct electrical connection between two components, or can refer to electrical connection between two components via one or more other components.

[0029] Various modifications and changes can be made to the present application in matters of form and detail without departing from the spirit and scope of the application. It is intended that the application cover all such modifications and changes as fall within the scope of the claims (technical solutions claimed to be protected) and their equivalents. It should be noted that the embodiments provided in the present application can be combined with each other as long as they do not conflict with each other.

[0030] Before the technical solutions provided by the embodiments of the present application are described, the problems existing in the related art will be specifically described in order to facilitate the understanding of the embodiments of the present application:

[0031] The display panel is provided with a first power voltage signal line (such as a positive power voltage signal line PVDD) and a pixel circuit, and the first power voltage signal line is used to provide a first power voltage signal to the pixel circuit. However, the first power voltage signal is affected by line voltage drop loss in the transmission process, resulting in different potential losses of the first power voltage signal transmitted to different positions, and further resulting in differences in driving current flowing through different pixel circuits, thereby affecting the brightness uniformity of the display panel.

[0032] Specifically, when there is a voltage drop in the first power voltage signal line, the expression of the driving current of the pixel circuit is as follows:

[0033] Id=k(PVDD’-Id△R-Vdata-|Vth|) 2 (1)

[0034] Wherein, Id represents the driving current of the pixel circuit, k=(W*Cox*μ) / 2L, W is the channel width of the driving transistor in the pixel circuit; L is the channel length of the driving transistor; Cox is the capacitance constant, that is, the channel capacitance per unit area of the driving transistor; μ is the carrier mobility, that is, the average drift rate of the carrier in the semiconductor under the unit electric field, PVDD’ represents the reference voltage value of the first power voltage signal line, △R represents the resistance loss of the first power voltage signal line, Vdata represents the voltage value of the data signal, and Vth represents the threshold voltage of the driving transistor in the pixel circuit.

[0035] Due to the existence of differences in the threshold voltage Vth of each pixel circuit, the driving current of each pixel circuit will be different. The resistance loss △R of the first power voltage signal line will increase the driving current difference between the pixel circuits, thereby causing the degree of uneven brightness of the display panel to be aggravated.

[0036] In view of the above research findings of the inventor, the embodiments of the present application provide a display panel and a voltage compensation method thereof and a display device, which can solve the technical problem of uneven brightness of the display panel in the related art.

[0037] The technical concept of the embodiment of the present application is that: the voltage acquisition processing module acquires the first voltage value of the second end of the storage module in the pixel circuit, then the voltage acquisition processing module calculates the compensation value of the data voltage according to the actually acquired first voltage value of the second end of the storage module in the pixel circuit and the reference voltage value provided by the first power voltage signal line, and adjusts the voltage value of the data signal provided to the pixel circuit according to the compensation value, so as to compensate the influence caused by the line impedance loss of the first power voltage signal line, and improve the brightness uniformity of the display panel.

[0038] In addition, in order to improve the accuracy of the detection and compensation results, the first switch module is additionally provided in the first detection stage, and the first switch module is turned off, so that the charge stored in the storage module is prevented from being transmitted to the light emitting element due to the conduction of the driving module or the leakage current, thereby avoiding the light emitting element from emitting light, and at the same time ensuring the accuracy of the acquired first voltage value, and further ensuring the accuracy of the final compensation result. Further, the light emitting stage and the first detection stage in the embodiment of the present application are performed separately, so that the light emitting element can emit light without being affected by the voltage detection process, and the brightness of the light emitting element can reach the expected brightness.

[0039] Firstly, the display panel provided by the embodiment of the present application will be introduced.

[0040] Figure 1 A circuit schematic diagram of the display panel provided by the embodiment of the present application is shown in FIG. 1. Figure 1 As shown in FIG. 1, the display panel 10 provided by the embodiment of the present application includes a first power voltage signal line PVDD and a pixel circuit 100. It should be noted that, in order to facilitate the illustration, Figure 1 only one pixel circuit 100 is shown, but it can be understood that the display panel 10 can include a plurality of pixel circuits 100 arranged in an array, and the embodiment of the present application does not limit the arrangement mode of the pixel circuit 100.

[0041] The first power voltage signal line PVDD can be electrically connected with the pixel circuit 100, and is used to provide the pixel circuit 100 with a first power voltage signal. Exemplarily, the voltage value of the first power voltage signal can be greater than 0V, i.e. a positive power voltage signal.

[0042] The pixel circuit 100 can include a driving module 101, a first switch module 102 and a storage module 103. The control end of the first switch module 102 can be electrically connected with a first scan signal line S1, the first end of the first switch module 102 is electrically connected with the first end of the driving module 101, and the second end of the first switch module 102 is electrically connected with the first power voltage signal line PVDD.

[0043] The first end of the storage module 103 is electrically connected with the second power voltage signal line PVEE, and the second end of the storage module 103 is electrically connected with the voltage acquisition and processing module 20 and the second end of the first switch module 102. The voltage acquisition and processing module 20 may, for example, include a driving chip or a separately added processing chip. The second power voltage signal provided by the second power voltage signal line PVEE has a voltage value different from that of the first power voltage signal provided by the first power voltage signal line PVDD, for example, the voltage value of the first power voltage signal is greater than 0V, and the voltage value of the second power voltage signal is less than 0V.

[0044] In the embodiment of the present application, one light emitting period (i.e. one frame) of the pixel circuit 100 can include at least a light emitting stage and a first detection stage, and the light emitting stage and the first detection stage are performed in time division and do not overlap in time sequence. In the light emitting stage, the first switch module 102 can be turned on under the control of the first scan signal line S1, and the driving module 101 drives the light emitting element D to emit light. In the first detection stage, the first switch module 102 can be turned off under the control of the first scan signal line S1, and the voltage acquisition and processing module 20 is used to acquire the first voltage value of the second end of the storage module 103. The voltage acquisition and processing module 20 can also be used to calculate a compensation value of the data voltage according to the first voltage value and a reference voltage value provided by the first power voltage signal line PVDD, and adjust the voltage value of the data signal provided to the pixel circuit according to the compensation value.

[0045] In the embodiment of the present application, one light emitting period (i.e. one frame) of the pixel circuit 100 can include at least a light emitting stage and a first detection stage, and the light emitting stage and the first detection stage are performed in time division and do not overlap in time sequence. In the light emitting stage, the first switch module 102 can be turned on under the control of the first scan signal line S1, and the driving module 101 drives the light emitting element D to emit light. In the first detection stage, the first switch module 102 can be turned off under the control of the first scan signal line S1, and the voltage acquisition and processing module 20 is used to acquire the first voltage value of the second end of the storage module 103. The voltage acquisition and processing module 20 can also be used to calculate a compensation value of the data voltage according to the first voltage value and a reference voltage value provided by the first power voltage signal line PVDD, and adjust the voltage value of the data signal provided to the pixel circuit according to the compensation value.

[0046] As shown in expression (1), Id=k(PVDD'-Id△R-Vdata-|Vth|) 2 To eliminate the influence of the pressure drop loss Id△R of the first power voltage signal line PVDD on the driving current of the pixel circuit, Id△R needs to be compensated in the driving current, i.e. +Id△R. The above expression (1) can be transformed into =k(PVDD-(Id△R+Vdata)-|Vth|) 2 =k(PVDD-Vdata'|Vth|) 2In other words, the aforementioned compensation Id△R can be seen as compensation for Vdata. Therefore, compensating Vdata with Id△R can compensate for the impact of the voltage drop loss Id△R of the first power supply voltage signal line PVDD on the driving current of the pixel circuit.

[0047] Thus, in the display panel of this application embodiment, on the one hand, the voltage acquisition and processing module calculates the compensation value of the data voltage based on the first voltage value of the second terminal of the storage module in the pixel circuit and the reference voltage value provided by the first power supply voltage signal line, and adjusts the voltage value of the data signal provided to the pixel circuit according to the compensation value, which can compensate for the influence caused by the line impedance loss of the first power supply voltage signal line and improve the brightness uniformity of the display panel; on the other hand, by adding a first switch module, the first switch module is turned off in the first detection stage, which can avoid the transfer of the charge stored in the storage module to the light-emitting element due to the conduction of the drive module or leakage current, thereby avoiding the light-emitting element from emitting light, and at the same time ensuring the accuracy of the acquired first voltage value, thereby ensuring the accuracy of the final compensation result; furthermore, the light-emitting stage and the first detection stage are performed separately, which can ensure that the light-emitting element is not affected by the voltage detection process when emitting light, so that the brightness of the light-emitting element can reach the expected brightness.

[0048] The inventors of this application further realized that, in the first detection stage, the voltage acquisition and processing module 20 acquires the first voltage value at the second terminal of the storage module 103, and the second terminal of the storage module 103 is also electrically connected to the first power supply voltage signal line PVDD. Therefore, the first power supply voltage signal provided by the first power supply voltage signal line PVDD may affect the result of the first voltage value acquired by the voltage acquisition and processing module 20.

[0049] Figure 2 Another circuit diagram of the display panel provided in an embodiment of this application. For example... Figure 2 As shown, according to some embodiments of this application, optionally, the display panel 10 may further include a second switch module 201, the control terminal of the second switch module 201 being electrically connected to the second scan signal line S2, the first terminal of the second switch module 201 being electrically connected to the first power supply voltage signal line PVDD, and the second terminal of the second switch module 201 being electrically connected to the second terminal of the storage module 103 and the second terminal of the first switch module 102.

[0050] During the first detection phase, the second switch module 201 can be turned off under the control of the second scan signal line S2. Thus, since the second switch module 201 is turned off, the first power supply voltage signal provided by the first power supply voltage signal line PVDD can be effectively prevented from being transmitted to the second terminal of the storage module 103 during the first detection phase, thereby improving the accuracy of the first voltage value acquired by the voltage acquisition and processing module 20, and consequently improving the accuracy of the final compensation result.

[0051] Figure 3 Another circuit schematic diagram of the display panel is provided for the embodiments of the present application. As shown in Figure 3 some embodiments of the present application, optionally, the pixel circuit 100 can further include a third switch module 301, a control end of the third switch module 301 being electrically connected with a third scan signal line S3, a first end of the third switch module 301 being electrically connected with a second end of the storage module 103, and a second end of the third switch module 301 being electrically connected with a second end of the first switch module 102.

[0052] In the first detection stage, the third switch module 301 can be turned on under the control of the third scan signal line S3, and the charge stored in the storage module 103 can be transmitted to the second end of the third switch module 301 via the third switch module 301. The voltage acquisition processing module 20 can be specifically configured to acquire the first voltage value of the second end of the third switch module 301.

[0053] The third switch module 301 can serve as a switch of a channel for acquiring the first voltage value, and when the storage module 103 is charged and the first voltage value is acquired, the third switch module 301 can be turned on to realize the charging of the storage module 103 and the acquisition of the first voltage value.

[0054] Figure 4 A driving timing diagram corresponding to the display panel shown in Figure 3 is shown. In combination with Figure 3 and Figure 4 some embodiments of the present application, optionally, the light emitting stage F can include a first light emitting stage f1 and a second light emitting stage f2 located after the first light emitting stage f1. In the first light emitting stage f1 and the second light emitting stage f2, the light emitting element D can emit light.

[0055] In the first light emitting stage f1, the third switch module 301 can be turned off under the control of the third scan signal line S3. At this time, the first power voltage signal provided by the first power voltage signal line PVDD flows to the light emitting element D through the first switch module 102 and the driving module 101, and the light emitting element D emits light. However, since the third switch module 301 is turned off, the first power voltage signal provided by the first power voltage signal line PVDD will not flow to the storage module 103, i.e., the storage module 103 is not charged.

[0056] During the second light-emitting stage f2, the third switch module 301 is turned on under the control of the third scan signal line S3, and the first power supply voltage signal line PVDD charges the storage module 103. Specifically, the first power supply voltage signal provided by the first power supply voltage signal line PVDD flows to the storage module 103 through the turned-on third switch module 301, and the storage module 103 is charged. At the same time, the first power supply voltage signal provided by the first power supply voltage signal line PVDD flows to the light-emitting element D through the first switch module 102 and the driving module 101, and the light-emitting element D emits light.

[0057] The advantage of this configuration is that, as discovered by the inventors of this application, during the first light-emitting stage f1, if the third switch module 301 is turned on, a portion of the current from the first power supply voltage signal line PVDD flows to the light-emitting element D, while the other portion flows to the storage module 103. Therefore, the storage module 103 experiences current shunting, resulting in a longer charging time for the light-emitting element D and a slower lighting process. However, once the light-emitting element D has stabilized and is emitting light, i.e., during the second light-emitting stage f2, turning on the third switch module 301 ensures that the charging time of the light-emitting element D is not affected.

[0058] To ensure the accuracy of the compensation results, in some embodiments, the reference voltage value provided by the first power supply voltage signal line PVDD can be obtained by measurement or acquisition, so that the obtained reference voltage value is more in line with the actual situation.

[0059] Figure 5 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 5 As shown, specifically, according to some embodiments of this application, optionally, the non-display area NA of the display panel 10 may be provided with a first power supply voltage signal input terminal 501, wherein the first power supply voltage signal input terminal 501 includes, but is not limited to, bonding pads. The first power supply voltage signal line PVDD may include a first sub-power supply voltage signal line PVDD1 located in the non-display area NA and a second sub-power supply voltage signal line PVDD2 located in the display area AA. The second sub-power supply voltage signal line PVDD2 is electrically connected to the pixel circuit 100, and the first sub-power supply voltage signal line PVDD1 is used to connect the first power supply voltage signal input terminal 501 and the second sub-power supply voltage signal line PVDD2. This application does not limit the wiring method and extension direction of the first sub-power supply voltage signal line PVDD1 and the second sub-power supply voltage signal line PVDD2. For example, the second sub-power supply voltage signal line PVDD2 may be a mesh trace, and the first sub-power supply voltage signal line PVDD1 may extend along the first direction X or along the second direction Y. Figure 5 The diagram is illustrated by taking the first sub-power supply voltage signal line PVDD1 extending along the second direction Y as an example.

[0060] The voltage acquisition and processing module 20 can be electrically connected to the first connection node X1 on the first sub-power supply voltage signal line PVDD1. The first connection node X1 can include any node on the first sub-power supply voltage signal line PVDD1 or the first power supply voltage signal input terminal 501.

[0061] According to some embodiments of this application, optionally, a second detection stage may be included before the luminescence stage. See also... Figure 5 In the second detection stage, the voltage acquisition and processing module 20 can be used to acquire the voltage value of the first connection node X1 and use the voltage value of the first connection node X1 as the reference voltage value provided by the first power supply voltage signal line PVDD.

[0062] The inventors of this application recognized that, due to the voltage drop loss of the first power supply voltage signal line PVDD, the farther the acquisition point (first connection node X1) is from the first power supply voltage signal input terminal 501, the greater the deviation between the acquired reference voltage value of the first power supply voltage signal line PVDD and the actual reference voltage value. Therefore, in some embodiments, this application acquires the voltage value of the nodes on the first power supply voltage signal input terminal 501 or the first sub-power supply voltage signal line PVDD1. Since there is no trace or a short trace between the nodes on the first power supply voltage signal input terminal 501 or the first sub-power supply voltage signal line PVDD1 and the first power supply voltage signal input terminal 501, the influence of the voltage drop loss of the first power supply voltage signal line PVDD on the reference voltage value detection result can be reduced, ensuring that the acquired reference voltage value of the first power supply voltage signal line PVDD is close to the actual reference voltage value, thereby improving the accuracy of the final compensation result.

[0063] Figure 6 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 6 As shown, according to some embodiments of this application, optionally, the pixel circuit 100 may further include a data writing module 701. The control terminal of the data writing module 701 may be electrically connected to the fourth scan signal line S4, the first terminal of the data writing module 701 may be electrically connected to the data signal terminal data, and the second terminal of the data writing module 701 may be electrically connected to the control terminal of the driving module 101. In some examples, the data signal terminal data may be electrically connected to the output terminal of the voltage acquisition and processing module 20, and the voltage acquisition and processing module 20 provides a data signal to the data signal terminal data. Of course, in other examples, the data signal terminal data may also be electrically connected to the output terminal of the driving chip, and the driving chip provides a data signal to the data signal terminal data. This application does not limit this aspect.

[0064] Figure 7 for Figure 6A driving timing diagram corresponding to the display panel shown is shown. The display panel shown corresponds to the pixel circuit 100 shown in FIG. 1. Figure 6 and Figure 7 As shown, in the light emitting stage F, the data writing module 701 can be turned on under the control of the fourth scan signal line S4, and the data signal of the data signal terminal data can be written to the control terminal of the driving module 101 through the data writing module 701 to control the driving module 101 to turn on. The first switch module 102 can be turned on under the control of the first scan signal line S1, and the first power voltage signal provided by the first power voltage signal line PVDD flows to the light emitting element D through the first switch module 102 and the driving module 101, and the light emitting element D emits light.

[0065] Continuing to refer to Figure 6 In some specific embodiments, optionally, the driving module 101 can include a first transistor T1, the first switch module 102 can include a second transistor T2, the second switch module 201 can include a third transistor T3, the third switch module 301 can include a fourth transistor T4, the data writing module 701 can include a fifth transistor T5, and the storage module 103 can include a first storage capacitor C1. The pixel circuit 100 can further include a second storage capacitor Cst. The first plate of the second storage capacitor Cst is electrically connected with the gate of the first transistor T1, and the second plate of the second storage capacitor Cst is electrically connected with the first electrode of the first transistor T1, and the second storage capacitor Cst is used to maintain the potential of the gate of the first transistor T1. The connection relationship of each transistor and the first storage capacitor C1 can refer to the description of the connection relationship of each module above, and will not be described here.

[0066] In combination with Figure 6 and Figure 7 As shown, according to some embodiments of the present application, optionally, taking each transistor in the pixel circuit 100 as a P-type transistor as an example, in the second detection stage t0, the second scan signal line S2 outputs a low level, and the other scan signal lines output a high level. The third transistor T3 is turned on, and the other transistors are turned off. The voltage acquisition processing module 20 can be used to acquire the reference voltage value provided by the first power voltage signal line PVDD.

[0067] In the first light emitting stage f1, the third scan signal line S3 outputs a high level, and the other scan signal lines output low levels. The first transistor T1, the second transistor T2, the third transistor T3 and the fifth transistor T5 are turned on, the data signal of the data signal terminal data can be written into the gate of the first transistor T1 through the fifth transistor T5, and the first transistor T1 is controlled to be turned on. The first power voltage signal provided by the first power voltage signal line PVDD flows to the light emitting element D through the third transistor T3, the second transistor T2 and the first transistor T1, and the light emitting element D emits light. The fourth transistor T4 is turned off, and the first power voltage signal provided by the first power voltage signal line PVDD cannot flow to the first storage capacitor C1, that is, the first storage capacitor C1 is not charged.

[0068] In the second light emitting stage f2, each scan signal line outputs a low level, and the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are turned on. The first power voltage signal provided by the first power voltage signal line PVDD flows to the light emitting element D through the third transistor T3, the second transistor T2 and the first transistor T1, and the light emitting element D emits light. The first power voltage signal provided by the first power voltage signal line PVDD flows to the first storage capacitor C1 through the fourth transistor T4, and the first storage capacitor C1 is charged.

[0069] In the first detection stage t1, the third scan signal line S3 outputs a low level, and the other scan signal lines output high levels. The first transistor T1, the second transistor T2, the third transistor T3 and the fifth transistor T5 are turned off. The fourth transistor T4 is turned on, and the voltage acquisition and processing module 20 can be used to acquire the first voltage value of the second plate of the first storage capacitor C1.

[0070] As described above, the voltage acquisition and processing module 20 can calculate the compensation value of the data voltage according to the first voltage value of the second end of the storage module actually acquired in the pixel circuit and the reference voltage value provided by the first power voltage signal line, and adjust the voltage value of the data signal provided to the pixel circuit according to the compensation value, so as to compensate the influence caused by the line impedance loss of the first power voltage signal line, and improve the brightness uniformity of the display panel.

[0071] Figure 8 Another circuit schematic diagram of the display panel provided by the embodiment of the present application is provided. As shown in FIG. 6, the display panel comprises a plurality of pixel circuits 10 arranged in an array, and a voltage acquisition and processing module 20. Figure 8As shown, according to some embodiments of the present application, optionally, the first scan signal line S1 can extend along the first direction X. The voltage collection processing module 20 can be electrically connected with the pixel circuit 100 through the collection signal line 81 extending along the second direction Y. The voltage collection processing module 20 can collect the voltage value, such as the first voltage value V1, through the collection signal line 81. The second direction Y is perpendicular to the first direction X. Exemplarily, the first direction X can be the row direction of the display panel, and the second direction Y can be the column direction of the display panel.

[0072] As shown, Figure 8 at least part of the second sub-power voltage signal line PVDD2 can be multiplexed with part of the collection signal line 81. For example, part of the second sub-power voltage signal line PVDD2 extending along the second direction Y can be multiplexed with the collection signal line 81.

[0073] In this way, the collection signal line 81 can be used not only for auxiliary collection of the voltage value, but also for transmission of the first power voltage signal, so as to realize multiplexing of the wiring, reduce the length of the wiring in the display panel, facilitate the wiring design, and reduce the production cost.

[0074] Figure 9 Another circuit schematic diagram of the display panel provided by the embodiments of the present application is shown in FIG. 2B. As shown, Figure 9 according to some embodiments of the present application, optionally, the display panel 10 can include N columns of pixel circuits 100 and N collection signal lines 81, N being a positive integer. Each column of pixel circuits 100 can include a plurality of pixel circuits 100 arranged along the second direction Y, and the plurality of pixel circuits 100 in each column of pixel circuits 100 can be electrically connected with the same collection signal line 81.

[0075] In this way, since one collection signal line 81 is connected with the plurality of pixel circuits 100 in one column of pixel circuits 100, the number of the collection signal lines 81 in the display panel 10 can be reduced, the wiring design can be facilitated, and the production cost can be reduced.

[0076] The inventors of the present application further realize that, when one collection signal line 81 is connected with the plurality of pixel circuits 100 in one column of pixel circuits 100, if the first voltage value of a single pixel circuit 100 is to be collected, the third switch module 301 in the other pixel circuits 100 in the same column of pixel circuits 100 needs to be turned off, otherwise the first voltage values of the plurality of pixel circuits 100 can be collected at the same time. Therefore, in combination with Figure 8 and Figure 9As shown, the third switch modules 301 of the plurality of pixel circuits 100 in the same column of pixel circuits 100 can be turned on in time division. For example, the third switch module 301 of the first pixel circuit 100 can be turned on first, the third switch modules 301 of the other pixel circuits 100 in the same column of pixel circuits 100 are turned off, and the first voltage value of the first pixel circuit 100 in the same column of pixel circuits 100 is collected. Then, the third switch module 301 of the second pixel circuit 100 is turned on, the third switch modules 301 of the other pixel circuits 100 in the same column of pixel circuits 100 are turned off, and the first voltage value of the second pixel circuit 100 in the same column of pixel circuits 100 is collected. In this way, the first voltage values of the pixel circuits 100 in the same column of pixel circuits 100 are collected in sequence.

[0077] In this way, the third switch modules 301 of the plurality of pixel circuits 100 in the same column of pixel circuits 100 are turned on in time division, and the first voltage values of the pixel circuits 100 in the same column of pixel circuits 100 can be collected in sequence.

[0078] Figure 10 Another circuit schematic diagram of the display panel provided by the embodiments of the present application is shown in FIG. 6. As shown in FIG. 6, according to some embodiments of the present application, the display panel 10 can include at least one partition 90, and the plurality of pixel circuits 100 in one partition 90 can be electrically connected with the same second switch module 201. Figure 10 As shown, according to some embodiments of the present application, the display panel 10 can include at least one partition 90, and the plurality of pixel circuits 100 in one partition 90 can be electrically connected with the same second switch module 201. When the first voltage value of any one pixel circuit 100 in the same partition 90 is collected, the second switch module 201 corresponding to the partition 90 can be in an off state, so as to improve the accuracy of the first voltage value collected by the voltage collection processing module 20, and further improve the accuracy of the final compensation result.

[0079] It should be noted that the display panel 10 can include only one partition 90, that is, all the pixel circuits 100 in the display panel 10 are electrically connected with the same second switch module 201. Of course, the display panel 10 can also include a plurality of different partitions 90, and the pixel circuits 100 in different partitions 90 can be electrically connected with different second switch modules 201. The number and distribution of the partitions 90 can be flexibly adjusted according to actual conditions, and the embodiments of the present application do not limit this.

[0080] The inventors of the present application realize that, since the display panel is scanned row by row, when one row of pixel circuits 100 are connected with the same second switch module 201, the timing control can be facilitated.

[0081] Figure 11 Another circuit schematic diagram of the display panel provided by the embodiments of the present application is shown in FIG. 6. As shown in FIG. 6, according to some embodiments of the present application, the display panel 10 can include at least one partition 90, and the plurality of pixel circuits 100 in one partition 90 can be electrically connected with the same second switch module 201. Figure 11As shown, according to some embodiments of the present application, optionally, one partition 90 can include one row of pixel circuits 100, and one row of pixel circuits 100 can include a plurality of pixel circuits 100 arranged along the first direction X. The plurality of pixel circuits 100 in one row of pixel circuits 100 can be electrically connected with the same second switch module 201.

[0082] Specifically, the driving timing corresponding to the plurality of pixel circuits 100 in the same row of pixel circuits 100 can be the same. In combination with Figure 7 and Figure 11 As shown, in the second detection stage t0 and the light emitting stage F of any one row of pixel circuits 100, the second switch module 201 corresponding to the row of pixel circuits 100 can be turned on to realize the light emitting of the light emitting element and the charging of the storage module. In the first detection stage t1 of any one row of pixel circuits 100, the second switch module 201 corresponding to the row of pixel circuits 100 can be turned off to effectively avoid the first power supply voltage signal provided by the first power supply voltage signal line PVDD from being transmitted to the second end of the storage module, improve the accuracy of the first voltage value collected by the voltage collection and processing module 20, and further improve the accuracy of the final compensation result.

[0083] In some other embodiments, optionally, one pixel circuit 100 can be connected with one second switch module 201, and different pixel circuits 100 can be connected with different second switch modules 201, which are not limited in the embodiments of the present application.

[0084] In some other embodiments, optionally, one acquisition signal line 81 can be connected with one pixel circuit 100, and different acquisition signal lines 81 can be connected with different pixel circuits 100, which are not limited in the embodiments of the present application.

[0085] The present application further considers that, since the number of pixel circuits in the display panel is large, the calculation amount of the compensation value can be large. Therefore, the embodiments of the present application consider using matrix operation to facilitate the calculation of the compensation value and avoid the error of the compensation value.

[0086] Figure 12 A flowchart of the voltage collection and processing module. As Figure 12 As shown, according to some embodiments of the present application, the voltage collection and processing module can specifically be used to execute the following steps S1101 to S1105.

[0087] S1101, collect the first voltage value corresponding to each of the plurality of pixel circuits.

[0088] S1102, convert the first voltage value corresponding to each of the plurality of pixel circuits into a first voltage value matrix, and generate a reference voltage value matrix with the same size as the first voltage value matrix according to the reference voltage value provided by the first power supply voltage signal line.

[0089] Taking m*n pixel circuits as an example, the expression of the first voltage value matrix is as follows:

[0090]

[0091] wherein Vmn represents the first voltage value corresponding to the pixel circuit in the mth column and the nth row.

[0092] Taking m*n pixel circuits as an example, the expression of the reference voltage value matrix is as follows:

[0093]

[0094] wherein V'mn represents the reference voltage value corresponding to the pixel circuit in the mth column and the nth row.

[0095] S1103, obtaining a compensation value matrix according to the first voltage value matrix and the reference voltage value matrix.

[0096] Specifically, the reference voltage value matrix and the first voltage value matrix can be subjected to difference operation to obtain the compensation value matrix. The specific expression is as follows:

[0097]

[0098] S1104, adjusting a data voltage matrix composed of data voltages of the plurality of pixel circuits before compensation based on the compensation value matrix to obtain a data voltage matrix after compensation.

[0099] Specifically, the data voltage matrix and the compensation value matrix can be subjected to addition operation to obtain the data voltage matrix after compensation. The specific expression is as follows:

[0100]

[0101] wherein Vdata'mn represents the data voltage after compensation corresponding to the pixel circuit in the mth column and the nth row, Vdatamn represents the data voltage corresponding to the pixel circuit in the mth column and the nth row, and Id△Rmn represents the compensation value corresponding to the pixel circuit in the mth column and the nth row.

[0102] S1105, providing data signals of corresponding voltage values to the plurality of pixel circuits according to the data voltage matrix after compensation.

[0103] Specifically, after obtaining the data voltage matrix after compensation, data signals of corresponding voltage values can be provided to corresponding pixel circuits according to the size of each data voltage after compensation in the data voltage matrix after compensation, so as to compensate the influence caused by the line impedance loss of the first power voltage signal line and improve the brightness uniformity of the display panel.

[0104] The application further realizes that the driving current of the pixel circuit can be different when the brightness is different, and the voltage drop of the IRdrop can also be different. Therefore, the compensation value of the data voltage can be calculated for different brightness intervals, and the differential compensation of the data voltage is realized.

[0105] Figure 13 Another flowchart of the voltage acquisition and processing module is shown in FIG. 12. As shown in FIG. 12, according to some embodiments of the application, the voltage acquisition and processing module can be used to perform the following steps S1201-S1203. Figure 13

[0106] S1201, in different brightness intervals, the first voltage value of the pixel circuit and the reference voltage value provided by the first power supply voltage signal line are acquired respectively, to obtain the first voltage value corresponding to each brightness interval and the reference voltage value corresponding to each brightness interval.

[0107] For example, one of the brightness intervals can be 200 nit, or can be 200-240 nit, or can be the brightness corresponding to 100 gray scales, or can be the brightness range corresponding to 100-180 gray scales. The specific size of the brightness interval can be flexibly adjusted according to the actual situation, and the embodiments of the application do not limit this.

[0108] S1202, according to the first voltage value corresponding to each brightness interval and the reference voltage value corresponding to each brightness interval, the compensation value of the data voltage corresponding to each brightness interval is obtained.

[0109] For example, one of the brightness intervals can be 200 nit, or can be 200-240 nit, or can be the brightness corresponding to 100 gray scales, or can be the brightness range corresponding to 100-180 gray scales. The specific size of the brightness interval can be flexibly adjusted according to the actual situation, and the embodiments of the application do not limit this.

[0110] S1203, when the brightness of the display panel is in a target brightness interval, the voltage value of the data signal provided to the pixel circuit is adjusted according to the compensation value of the data voltage corresponding to the target brightness interval.

[0111] For example, one of the brightness intervals can be 200 nit, or can be 200-240 nit, or can be the brightness corresponding to 100 gray scales, or can be the brightness range corresponding to 100-180 gray scales. The specific size of the brightness interval can be flexibly adjusted according to the actual situation, and the embodiments of the application do not limit this.

[0112] In this way, the compensation value of the data voltage is calculated for different brightness intervals, the differential compensation of the data voltage is realized, the accuracy of the compensation effect is improved, and the brightness uniformity of the display panel can be improved better.

[0113] ​For example, in some embodiments, three luminance intervals are divided, for example. The first luminance interval is the luminance range corresponding to 0-99 gray scales, the second luminance interval is the luminance range corresponding to 100-180 gray scales, and the third luminance interval is the luminance range corresponding to 181-255 gray scales. For the second luminance interval and the third luminance interval, the compensation value of the data voltage corresponding to the second luminance interval and the compensation value of the data voltage corresponding to the third luminance interval can be calculated according to the steps S1201-S1203, respectively, to realize the differential compensation of the second luminance interval and the third luminance interval. For the first luminance interval, that is, when the luminance is relatively low, the driving current of the pixel circuit is relatively small, and the IR drop voltage drop is also relatively small. Therefore, the data voltage compensation can not be performed on the first luminance interval, thereby reducing the data calculation amount. Of course, the data voltage compensation can also be performed on the first luminance interval, which is not limited in the embodiments of the present application.

[0114] Based on the display panel 10 provided in the above embodiments, correspondingly, the present application further provides a voltage compensation method of a display panel. The voltage compensation method of the display panel can be applied to the display panel 10 provided in the above embodiments. Please refer to the following embodiments.

[0115] Figure 14 A flowchart of the voltage compensation method of the display panel provided in the embodiments of the present application is shown in FIG. 13. As shown in FIG. 13, the voltage compensation method of the display panel can include the following steps: Figure 14

[0116] S1301, in the light-emitting stage, a conductive level is provided to the first scan signal line, so that the first switch module is turned on under the control of the first scan signal line;

[0117] S1302, in the first detection stage, a cutoff level is provided to the first scan signal line, and a first voltage value of the second end of the storage module is collected;

[0118] S1303, according to the first voltage value and the reference voltage value provided by the first power supply voltage signal line, the compensation value of the data voltage is calculated;

[0119] S1304, according to the compensation value, the voltage value of the data signal provided to the pixel circuit is adjusted.

[0120] The specific processes of steps S1301-S1304 have been described in detail in the above, which will not be repeated here.

[0121] ​The voltage compensation method of the display panel provided in the embodiments of the present application can compensate the influence caused by the line impedance loss of the first power voltage signal line, improve the brightness uniformity of the display panel, and can ensure the accuracy of the first voltage value and the accuracy of the final compensation result.

[0122] According to some embodiments of the present application, the display panel can comprise a plurality of pixel circuits.

[0123] S1302, the first voltage value of the second end of the storage module is collected, which can specifically include the following steps: collecting the respective first voltage values of the plurality of pixel circuits.

[0124] Accordingly, S1303, the compensation value of the data voltage is calculated according to the first voltage value and the reference voltage value provided by the first power voltage signal line, which can specifically include the following steps:

[0125] The respective first voltage values of the plurality of pixel circuits are converted into a first voltage value matrix, and a reference voltage value matrix of the same size as the first voltage value matrix is generated according to the reference voltage value provided by the first power voltage signal line.

[0126] The compensation value matrix is obtained according to the first voltage value matrix and the reference voltage value matrix.

[0127] S1304, the voltage value of the data signal provided to the pixel circuit is adjusted according to the compensation value, which can specifically include the following steps:

[0128] The data voltage matrix composed of the data voltage of the plurality of pixel circuits before compensation is adjusted based on the compensation value matrix to obtain a data voltage matrix after compensation.

[0129] According to the data voltage matrix after compensation, the data signal of the corresponding voltage value is provided to the plurality of pixel circuits.

[0130] The above process is described in the description of steps S1101 to S1105 above, and will not be described here.

[0131] According to some embodiments of the present application, optionally, S1302, collecting the first voltage value of the second end of the storage module, specifically comprising the following steps: collecting the first voltage value of the pixel circuit and the reference voltage value provided by the first power voltage signal line respectively in different brightness intervals, to obtain the first voltage value corresponding to each brightness interval and the reference voltage value corresponding to each brightness interval; the brightness interval includes at least one brightness value or at least one gray scale corresponding brightness value.

[0132] S1303, according to the first voltage value and the reference voltage value provided by the first power voltage signal line, calculating the compensation value of the data voltage, specifically comprising the following steps: according to the first voltage value corresponding to each brightness interval and the reference voltage value corresponding to each brightness interval, obtaining the compensation value of the data voltage corresponding to each brightness interval.

[0133] S1304, adjusting the voltage value of the data signal provided to the pixel circuit according to the compensation value, specifically comprising the following steps: when the brightness of the display panel is in the target brightness interval, adjusting the voltage value of the data signal provided to the pixel circuit according to the compensation value of the data voltage corresponding to the target brightness interval. The target brightness interval is any one of the brightness intervals.

[0134] The above process is described in the above steps S1201 to S1203, which will not be repeated here.

[0135] Based on the display panel provided in the above embodiments, the present application further provides a display device comprising the display panel provided by the present application. Please refer to Figure 15 , Figure 15 A structural schematic diagram of the display device provided in the embodiments of the present application. Figure 15 The display device 1000 provided comprises the display panel 10 provided in any of the above embodiments of the present application. Figure 15 The embodiments are described by taking a mobile phone as an example, and it can be understood that the display device provided in the embodiments of the present application can be a wearable product, a computer, a television, a vehicle-mounted display device, or other display devices with display function, which are not limited in the present application. The display device provided in the embodiments of the present application has the beneficial effects of the display panel 10 provided in the embodiments of the present application, and the specific description of the display panel 10 can be referred to the above embodiments, which will not be repeated here.

[0136] It should be understood that the specific structure of the circuit provided in the drawings of the embodiments of the present application is only some examples, and is not used to limit the present application. In addition, the above embodiments provided by the present application can be combined with each other without contradiction.

[0137] It is to be understood that the embodiments described herein are merely exemplary and that a person skilled in the art can make many modifications and variations thereto without departing from the scope of the application. The embodiments have been chosen and described so that others skilled in the art can best understand the principles and practical application of the application. It is intended that the application be construed as including all such modifications and variations as fall within the scope of the appended claims and their equivalents.

[0138] It will be understood by those skilled in the art that the above-described embodiments are merely exemplary and not limiting. The various technical features appearing in the different embodiments can be combined to achieve beneficial effects. Other embodiments which are variations of the disclosed embodiments can be understood and implemented by those skilled in the art based on the drawings, the specification and the claims. In the claims, the term "comprising" does not exclude other structures; the number "one" does not exclude a plurality; the term "first", "second" etc. are used to distinguish names but not to indicate any particular order. Any reference signs in the claims should not be construed as limiting the scope of the protection. The mere fact that different features are recited in mutually different dependent claims does not indicate that a combination of these features cannot be used to advantage.

Claims

1. A display panel, characterized by, The display panel comprises a first power voltage signal line and a pixel circuit, and the first power voltage signal line is electrically connected with the pixel circuit. The pixel circuit comprises a driving module, a first switch module and a storage module, a control end of the first switch module is electrically connected with a first scan signal line, a first end of the first switch module is electrically connected with a first end of the driving module, and a second end of the first switch module is electrically connected with the first power voltage signal line. A first end of the storage module is electrically connected with a second power voltage signal line, and a second end of the storage module is electrically connected with a voltage acquisition and processing module and the second end of the first switch module. In the light-emitting stage, the first switch module is turned on under the control of the first scan signal line, and the driving module drives the light-emitting element to emit light. In the first detection stage, the first switch module is turned off under the control of the first scan signal line, and the voltage acquisition and processing module is used to acquire a first voltage value of the second end of the storage module. The voltage acquisition and processing module is further used to calculate a compensation value of a data voltage according to the first voltage value and a reference voltage value provided by the first power voltage signal line, and adjust a voltage value of a data signal provided to the pixel circuit according to the compensation value.

2. The display panel of claim 1, wherein, The display panel further comprises a second switch module, a control end of the second switch module is electrically connected with a second scan signal line, a first end of the second switch module is electrically connected with the first power voltage signal line, and a second end of the second switch module is electrically connected with the second end of the storage module and the second end of the first switch module. In the first detection stage, the second switch module is turned off under the control of the second scan signal line.

3. The display panel of claim 1, wherein, The pixel circuit further comprises a third switch module, a control end of the third switch module is electrically connected with a third scan signal line, a first end of the third switch module is electrically connected with the second end of the storage module, and a second end of the third switch module is electrically connected with the second end of the first switch module. In the first detection stage, the third switch module is turned on under the control of the third scan signal line, and the charge stored in the storage module is transmitted to the second end of the third switch module via the third switch module, and the voltage acquisition and processing module is specifically used to acquire a first voltage value of the second end of the third switch module.

4. The display panel of claim 3, wherein, The light-emitting stage comprises a first light-emitting stage and a second light-emitting stage located after the first light-emitting stage. In the first light-emitting stage, the third switch module is turned off under the control of the third scan signal line. In the second light-emitting stage, the third switch module is turned on under the control of the third scan signal line, and the first power voltage signal line charges the storage module.

5. The display panel of claim 1, wherein, The non-display area of ​​the display panel is provided with a first power voltage signal input terminal. The first power voltage signal line includes a first sub-power voltage signal line located in the non-display area and a second sub-power voltage signal line located in the display area. The second sub-power voltage signal line is electrically connected to the pixel circuit. The first sub-power voltage signal line is used to connect the first power voltage signal input terminal and the second sub-power voltage signal line. The voltage acquisition and processing module is electrically connected to the first connection node on the first sub-power supply voltage signal line. The first connection node includes any node on the first sub-power supply voltage signal line or the first power supply voltage signal input terminal. Before the light emission stage, there is a second detection stage. In the second detection stage, the voltage acquisition and processing module is used to acquire the voltage value of the first connection node and use the voltage value of the first connection node as the reference voltage value provided by the first power supply voltage signal line.

6. The display panel of claim 5, wherein, The first scan signal line extends along a first direction; The voltage acquisition and processing module is electrically connected to the pixel circuit via an acquisition signal line extending along a second direction, which intersects the first direction. At least a portion of the second sub-power supply voltage signal line reuses the acquisition signal line.

7. The display panel of claim 3, wherein, The display panel includes N columns of pixel circuits and N acquisition signal lines. Each column of pixel circuits includes a plurality of pixel circuits arranged along a second direction. The plurality of pixel circuits in a column of pixel circuits are electrically connected to the same acquisition signal line. The third switching modules of multiple pixel circuits in the same column of pixel circuits are turned on in a time-division manner.

8. The display panel of claim 2, wherein, The display panel includes at least one partition, and a plurality of pixel circuits in one partition are electrically connected to the same second switching module.

9. The display panel of claim 8, wherein, The first scan signal line extends along a first direction; One of the partitions includes a row of pixel circuits, and the row of pixel circuits includes a plurality of the pixel circuits arranged along the first direction.

10. The display panel of claim 1, wherein, The voltage acquisition and processing module is specifically used for: Collect the first voltage value corresponding to each of the multiple pixel circuits; The first voltage values ​​corresponding to each of the multiple pixel circuits are converted into a first voltage value matrix, and a reference voltage value matrix of the same size as the first voltage value matrix is ​​generated based on the reference voltage value provided by the first power supply voltage signal line. Based on the first voltage value matrix and the reference voltage value matrix, the compensation value matrix is ​​obtained; Based on the compensation value matrix, the data voltage matrix composed of the data voltages of the multiple pixel circuits before compensation is adjusted to obtain the compensated data voltage matrix. Based on the compensated data voltage matrix, data signals with corresponding voltage values ​​are provided to each of the pixel circuits.

11. The display panel of claim 1, wherein, The voltage acquisition and processing module is specifically used for: In different brightness ranges, the first voltage value of the pixel circuit and the reference voltage value provided by the first power supply voltage signal line are collected respectively to obtain the first voltage value and the reference voltage value corresponding to each brightness range. The brightness range includes at least one brightness value or at least one brightness value corresponding to a gray level; Based on the first voltage value corresponding to each brightness range and the reference voltage value corresponding to each brightness range, the compensation value of the data voltage corresponding to each brightness range is obtained. When the brightness of the display panel is within the target brightness range, the voltage value of the data signal provided to the pixel circuit is adjusted according to the compensation value of the data voltage corresponding to the target brightness range; the target brightness range is any brightness range.

12. A voltage compensation method of a display panel, the method comprising: Applied to a display panel as described in any one of claims 1-11, the method comprises: During the light-emitting phase, a conductive level is provided to the first scan signal line so that the first switching module is turned on under the control of the first scan signal line; In the first detection phase, a cutoff level is provided to the first scan signal line, and a first voltage value at the second terminal of the storage module is acquired; The compensation value of the data voltage is calculated based on the first voltage value and the reference voltage value provided by the first power supply voltage signal line; The voltage value of the data signal supplied to the pixel circuit is adjusted according to the compensation value.

13. The method of claim 12, wherein, The display panel includes multiple pixel circuits; The acquisition of the first voltage value at the second terminal of the storage module specifically includes: Collect the first voltage value corresponding to each of the multiple pixel circuits; The step of calculating the data voltage compensation value based on the first voltage value and the reference voltage value provided by the first power supply voltage signal line specifically includes: The first voltage values ​​corresponding to each of the multiple pixel circuits are converted into a first voltage value matrix, and a reference voltage value matrix of the same size as the first voltage value matrix is ​​generated based on the reference voltage value provided by the first power supply voltage signal line. Based on the first voltage value matrix and the reference voltage value matrix, the compensation value matrix is ​​obtained; The step of adjusting the voltage value of the data signal provided to the pixel circuit according to the compensation value specifically includes: Based on the compensation value matrix, the data voltage matrix composed of the data voltages of the multiple pixel circuits before compensation is adjusted to obtain the compensated data voltage matrix. Based on the compensated data voltage matrix, data signals with corresponding voltage values ​​are provided to each of the pixel circuits.

14. The method according to claim 12, characterized in that, The acquisition of the first voltage value at the second terminal of the storage module specifically includes: In different brightness ranges, the first voltage value of the pixel circuit and the reference voltage value provided by the first power supply voltage signal line are collected respectively to obtain the first voltage value and the reference voltage value corresponding to each brightness range; the brightness range includes at least one brightness value or at least one brightness value corresponding to a gray level. The step of calculating the data voltage compensation value based on the first voltage value and the reference voltage value provided by the first power supply voltage signal line specifically includes: Based on the first voltage value corresponding to each brightness range and the reference voltage value corresponding to each brightness range, the compensation value of the data voltage corresponding to each brightness range is obtained. The step of adjusting the voltage value of the data signal provided to the pixel circuit according to the compensation value specifically includes: When the brightness of the display panel is within the target brightness range, the voltage value of the data signal provided to the pixel circuit is adjusted according to the compensation value of the data voltage corresponding to the target brightness range; the target brightness range is any brightness range.

15. A display device comprising: Includes the display panel as described in any one of claims 1-11.

Images