A power-oriented end-to-end control service wireless communication one-way delay test method

Abstract

The application relates to the technical field of wireless communication, and particularly discloses a kind of wireless communication one-way delay test methods for power end-to-end control service, comprising: the test terminal of two sides is connected by wireless network and completes the clock synchronization of the test terminal of two sides, wherein the test terminal of two sides includes source side test terminal and opposite side test terminal;Test message is sent to opposite side test terminal by source side test terminal, and test message carries sending timestamp;When opposite side test terminal receives test message, the receiving timestamp of test message is recorded, and sending timestamp is parsed from test message;Opposite side test terminal calculates the wireless communication one-way delay from source side test terminal to opposite side test terminal according to the receiving timestamp and sending timestamp of test message, to obtain wireless communication one-way delay test result.The application can test end-to-end one-way delay and jitter value, and provides data support for communication side optimization and bearing service.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of wireless communication, and more particularly to a wireless communication one-way delay test method for power end-to-end control services. BACKGROUND

[0002] The power grid is a real-time control operation system, in which part of the protection control service functions rely on end-to-end communication, and the real-time requirement is very high, which needs low delay and high reliable communication technology as support.

[0003] The traditional power grid end-to-end protection control service relies on optical fiber communication, and its technical indicators can meet the operation requirements. However, optical fibers need paths, and it is difficult to lay and maintain, especially for the current rapidly developing distribution network, it is difficult to realize large-scale coverage of optical fibers in point-to-point services.

[0004] With the development of wireless communication technology, especially the emergence of 5G communication technology, the communication delay, jitter and other indicators have been greatly improved. As long as the corresponding network configuration and optimization are done, the requirements of the distribution network end-to-end protection control service can be met.

[0005] The quality of wireless communication is affected by many factors such as signal coverage and communication configuration, and needs to be optimized to meet the application requirements. Considering that the distribution network end-to-end protection control service is point-to-point one-way communication, it is necessary to carry out wireless communication one-way delay test before carrying the distribution network end-to-end control service, and then optimize the network according to the test results to ensure that the service carrying requirements are met before construction, so as to prevent the problem of unable to run due to communication reasons after construction. At the same time, since the end-to-end delay is real-time, it will change with network load and other factors, so it is also necessary to test for a period of time and make comprehensive analysis.

[0006] The current test method for communication delay mainly uses the PING command, which can measure the end-to-end round-trip delay, but cannot test the one-way delay, and it is difficult to meet the test requirements. The simple delay loopback test method can be used when the test points are together in geography, but the different ends of the power end-to-end protection control service are usually far apart in geography, so it cannot be applied. SUMMARY

[0007] In order to solve the problems in the prior art, the present application provides a wireless communication one-way delay test method for power end-to-end control services, which can test the end-to-end one-way delay and jitter value, and provide data support for communication side optimization and service carrying.

[0008] As a first aspect of the present application, a wireless communication one-way delay test method for power end-to-end control services is provided, comprising the following steps:

[0009] Step S101: the two test terminals are connected through wireless network, and the clock of the two test terminals is synchronized, wherein the two test terminals include a source test terminal and a target test terminal;

[0010] Step S102: the source test terminal sends a test message with a sending time stamp to the target test terminal;

[0011] Step S103: when the target test terminal receives the test message, the receiving time stamp of the test message is recorded, and the sending time stamp of the test message is parsed from the test message;

[0012] Step S104: the target test terminal calculates the one-way delay of the wireless communication from the source test terminal to the target test terminal according to the receiving time stamp and the sending time stamp of the test message, so as to obtain the one-way delay test result of the wireless communication.

[0013] Further, the source test terminal and the target test terminal are connected with a wireless terminal access equipment through wired communication mode, the two wireless terminal access equipments are connected through wireless network, and the source test terminal and the target test terminal receive external second pulse time signal at the same time, so as to synchronize the clock of the source test terminal and the target test terminal;

[0014] The step S102 further includes:

[0015] The source test terminal starts to send the test message, each frame of the test message is marked with a sending time stamp according to the clock of the source test terminal before being sent, and then is sent to the target test terminal through the wireless terminal access equipment of the source and the wireless terminal access equipment of the target; wherein the frame number of the test message is numbered from the time when the source test terminal starts to send, and the sending time stamp of the ith frame of the test message is T 1i , which is sent to the target test terminal through the wireless terminal access equipment of the source and the wireless terminal access equipment of the target;

[0016] The steps S103 and S104 further include:

[0017] The wireless terminal access equipment of the target receives the ith frame of the test message and forwards it to the target test terminal;

[0018] The target test terminal records the receiving time stamp T 2i of the ith frame of the test message and parses the sending time stamp T 1i of the ith frame of the test message from the ith frame of the test message;

[0019] The target test terminal calculates the one-way delay of the wireless communication from the source test terminal to the target test terminal according to the receiving time stamp T 2i and the sending time stamp T1i calculating the one-way delay ΔT of the i-th frame test packet from the source-side test terminal to the opposite-side test terminal i The calculation formula is as follows:

[0020] ΔT i = T 2i - T 1i - T s - T r

[0021] Wherein, T 2i is the time when the opposite-side test terminal receives the i-th frame test packet, T 1i is the time when the source-side test terminal sends the i-th frame test packet, T s is the time from when the source-side test terminal sends the i-th frame test packet to when the source-side wireless terminal access device sends the i-th frame test packet, T r is the time from when the opposite-side wireless terminal access device receives the i-th frame test packet to when the opposite-side test terminal receives the i-th frame test packet, T s and T r are fixed times;

[0022] The source-side test terminal stops the one-way delay test, the opposite-side test terminal records the frame number of the final test packet as k, and calculates the one-way delay calculation result of the k-th frame test packet;

[0023] The opposite-side test terminal calculates the real-time index of the wireless network according to the one-way delay calculation result of the k-th frame test packet, to obtain the one-way delay test result of the wireless communication, and the real-time index of the wireless network is as follows:

[0024] The average delay ΔT avg :

[0025] The delay variance ΔT s :

[0026] The maximum jitter ΔT τ : ΔT τ = ΔT max - ΔT min ;

[0027] Wherein, ΔT max is the maximum one-way delay in the recorded k one-way delays, and ΔT min is the minimum one-way delay in the recorded k one-way delays.

[0028] Further, the clock synchronization of the two test terminals is completed, wherein the two test terminals include the source-side test terminal and the opposite-side test terminal, and further comprising:

[0029] The clock synchronization mode is that the source-side test terminal and the opposite-side test terminal obtain a second pulse signal from the outside to adjust their internal crystal clock. The source-side test terminal and the opposite-side test terminal obtain the second pulse synchronization signal in the following three ways:

[0030] The first way is to configure a time synchronization device for the source-side test terminal and the opposite-side test terminal respectively. Both of the time synchronization devices obtain a Beidou / GPS signal and output a second pulse synchronization signal to the source-side test terminal and the opposite-side test terminal respectively to realize the time synchronization of the source-side test terminal and the opposite-side test terminal.

[0031] The second way is to adopt an accurate network time service mode. A SIB9 signaling frame in a system message block is sent by a wireless base station to a source-side wireless terminal access device and an opposite-side wireless terminal access device respectively. The SIB9 signaling frame includes UTC time and timing advance TA between the test terminal and the wireless base station. The source-side wireless terminal access device and the opposite-side wireless terminal access device obtain accurate local time according to the SIB9 signaling frame and output the accurate local time to the respective test terminal through a time synchronization protocol to realize the time synchronization of the source-side test terminal and the opposite-side test terminal.

[0032] The third way is that the source-side test terminal and the opposite-side test terminal respectively access a network containing a time service server through a wired line. The time service server sends a synchronization signal to the corresponding test terminal to realize the time synchronization of the source-side test terminal and the opposite-side test terminal.

[0033] Further, it further comprises:

[0034] (1) Linear compensation method

[0035] The internal crystal clock of the test terminal is compared with the synchronization clock. If the deviation per second exceeds a set value, the whole second synchronization and compensation of the internal crystal clock are performed.

[0036] The compensation adopts a linear compensation method within a second, that is, the internal crystal clock is linearly compensated within a second.

[0037] First, the compensation coefficient is initialized. The compensation coefficient is calculated second by second:

[0038]

[0039] wherein a j is the compensation coefficient of the jth second, f co is the internal crystal time frequency, N j-1 is the crystal cumulative value of the j-1th second external synchronization time second pulse trigger time, N j is the crystal cumulative value of the jth second external synchronization time second pulse trigger time, tbj tj is the time of the external synchronization time second pulse trigger moment of the jth second bj-1 tj-1 is the time of the external synchronization time second pulse trigger moment of the (j-1)th second

[0040] Then the compensation coefficient a is initialized, the initialization can be set for a certain time, and the initialized compensation coefficient a can be obtained:

[0041]

[0042] wherein p is the number of seconds of the period for initialization;

[0043] On this basis, linear compensation is performed in the internal crystal oscillator time second, and the test terminal time T uks is:

[0044] T uks =a*(N ks -N k ) / f co +T uk

[0045] wherein f co is the internal crystal oscillator time frequency, N k is the crystal oscillator cumulative value of the external synchronization time second pulse trigger moment of the kth second, N ks is the crystal oscillator cumulative value of the current moment between the kth second and the (k+1)th second, T uk is the time of the external synchronization time second pulse trigger moment of the kth second;

[0046] (2) High-frequency clock construction method

[0047] The high-frequency clock is constructed by using the CPU of the test terminal to replace the internal crystal oscillator clock of the test terminal;

[0048] When the CPU is used as the clock, based on the working frequency f of the CPU, the CPU count value Q k of the last whole second and the CPU count value Q ks of the current moment in the current second, the test terminal time T ks of the current moment is:

[0049] T ks =(Q ks -Q k ) / f+T uk .

[0050] As another aspect of the present application, a power end-to-end control service wireless communication one-way delay test method is provided, comprising the following steps:

[0051] Step S201: connecting the two test terminals through wireless network, and synchronizing the clocks of the two test terminals, wherein the two test terminals include a source test terminal and a counter test terminal;

[0052] Step S202: sending a test message and a time record message to the counter test terminal through the source test terminal, wherein the time record message carries the sending timestamp of the test message;

[0053] Step S203: recording the receiving timestamp of the test message and analyzing the sending timestamp of the test message from the time record message when the counter test terminal receives the test message and the time record message;

[0054] Step S204: calculating the one-way delay of wireless communication from the source test terminal to the counter test terminal according to the receiving timestamp and the sending timestamp of the test message, so as to obtain the one-way delay test result of wireless communication.

[0055] Further, the source test terminal and the counter test terminal are connected to a wireless terminal access device through wired communication mode respectively, the two wireless terminal access devices are connected through wireless network, and the source test terminal and the counter test terminal receive external second pulse time signal at the same time, so as to synchronize the clocks of the source test terminal and the counter test terminal;

[0056] The step S202 further includes:

[0057] A monitoring module is arranged in the source test terminal, the source test terminal starts sending the test message, each frame of test message carries a sending serial number i, and then the test message is sent to the counter wireless terminal access device through the source wireless terminal access device, each frame of test message is recorded by the monitoring module when being sent from the source test terminal, and the sending timestamp T 1i is recorded. 1i Then, the test message sending timestamp T i recorded by the monitoring module and the test message sending serial number i are composed into a time record message and sent to the counter test terminal;

[0058] The steps S203 and S204 further include:

[0059] After the counter test terminal receives the test message and the time record message, the receiving timestamp of the test message is recorded, and the sending timestamp and the sending serial number of the test message are analyzed from the time record message; for the i-th frame of test message, the receiving timestamp T2 i of the i-th frame of test message is recorded by the counter test terminal, and the sending timestamp T 1i and the sending serial number i of the i-th frame of test message are analyzed from the time record message;

[0060] The opposite side test terminal calculates the wireless communication one-way delay AT of the ith frame test message from the source side test terminal to the opposite side test terminal according to the receiving time stamp T 2i and the sending time stamp T 1i i The calculation formula is as follows:

[0061] ΔT i = T 2i - T 1i - T s - T r

[0062] Wherein, T 2i is the time when the opposite side test terminal receives the ith frame test message, T 1i is the time when the source side test terminal sends the ith frame test message, T s is the time when the source side test terminal sends the ith frame test message to the source side wireless terminal access equipment, T r is the time when the opposite side wireless terminal access equipment receives the ith frame test message to the opposite side test terminal, T s and T r are fixed time;

[0063] The source side test terminal stops the wireless communication one-way delay test, the opposite side test terminal records the frame number of the final test message as k, and calculates the one-way delay calculation result of the kth frame test message;

[0064] The opposite side test terminal calculates the real-time index of the wireless network according to the recorded one-way delay calculation result of the k frames of test messages to obtain the wireless communication one-way delay test result, and the real-time index of the wireless network is as follows:

[0065] The delay average value AT avg :

[0066] The delay variance value AT s :

[0067] The maximum jitter value AT τ : AT τ = AT max - AT min ;

[0068] Wherein, AT max is the maximum one-way delay in the recorded k one-way delays, and AT min is the minimum one-way delay in the recorded k one-way delays.

[0069] ​Further, the clock synchronization of the two-side test terminals is completed, wherein the two-side test terminals include a source-side test terminal and a counter-side test terminal, and the method further comprises:

[0070] The clock synchronization method is that the source-side test terminal and the counter-side test terminal obtain a second pulse signal from the outside to adjust their internal crystal clock, and the source-side test terminal and the counter-side test terminal obtain the second pulse synchronization signal in the following three ways:

[0071] Firstly, time synchronization devices are configured to the source-side test terminal and the counter-side test terminal respectively, both of the time synchronization devices obtain Beidou / GPS signals and output second pulse synchronization signals to the source-side test terminal and the counter-side test terminal respectively to realize the time synchronization of the source-side test terminal and the counter-side test terminal;

[0072] Secondly, an accurate network time service method is adopted, the SIB9 signaling frame in the system message block is sent to the source-side wireless terminal access equipment and the counter-side wireless terminal access equipment by the wireless base station, the SIB9 signaling frame includes UTC time and timing advance TA between the test terminal and the wireless base station, the source-side wireless terminal access equipment and the counter-side wireless terminal access equipment obtain accurate local time according to the SIB9 signaling frame and output the accurate local time to the test terminal through the time synchronization protocol to realize the time synchronization of the source-side test terminal and the counter-side test terminal;

[0073] Thirdly, the source-side test terminal and the counter-side test terminal access the network containing a time service server through a wired line, the time service server sends a synchronization signal to the corresponding test terminal to realize the time synchronization of the source-side test terminal and the counter-side test terminal.

[0074] Further, the method further comprises:

[0075] (1) Linear compensation method

[0076] The internal crystal clock of the test terminal is compared with the synchronization clock, if the deviation per second exceeds the set value, the whole second synchronization and the compensation of the internal crystal clock are performed;

[0077] The compensation adopts a linear compensation method within a second, that is, the internal crystal clock is linearly compensated within a second;

[0078] Firstly, the compensation coefficient is initialized, the compensation coefficient is calculated second by second:

[0079]

[0080] Wherein, a j is the compensation coefficient of the jth second, f co is the internal crystal time frequency, and N j-1N is the crystal cumulative value of the external synchronization time second pulse trigger time of the j-1th second j t is the time of the external synchronization time second pulse trigger time of the jth second bj t is the time of the external synchronization time second pulse trigger time of the jth second bj-1 t is the time of the external synchronization time second pulse trigger time of the j-1th second

[0081] Then the compensation coefficient a is initialized, the initialization can be set for a certain time, and the initialized compensation coefficient a can be obtained:

[0082]

[0083] Wherein, p is the number of seconds of this period of time for initialization;

[0084] On this basis, the linear compensation of the internal crystal time second is carried out, and the test terminal time T uks is:

[0085] T uks =a*(N ks -N k ) / f co +T uk

[0086] Wherein, f co is the internal crystal time frequency, N k is the crystal cumulative value of the external synchronization time second pulse trigger time of the kth second, N ks is the crystal cumulative value of the current time between the kth second and the k+1th second, T uk is the time of the external synchronization time second pulse trigger time of the kth second

[0087] (2) High frequency clock construction method

[0088] The high frequency clock is constructed by using the CPU of the test terminal to replace the internal crystal clock of the test terminal;

[0089] When the CPU is used as the clock, based on the working frequency f of the CPU, the CPU count value Q k of the last whole second and the CPU count value Q ks of the current time within the second, the test terminal time T ks of the current time is:

[0090] T ks =(Q ks -Q k ) / f+T uk .

[0091] As another aspect of the present application, a method for testing one-way delay of wireless communication of power end-to-end control service is provided, comprising the following steps:

[0092] Step S301: connecting the two test terminals through wireless network for communication, and synchronizing the clocks of the two test terminals, wherein the two test terminals include a source test terminal and a target test terminal;

[0093] Step S302: sending a test message from the source test terminal to the target test terminal, and recording the sending timestamp of the test message;

[0094] Step S303: recording the receiving timestamp of the test message when the target test terminal receives the test message, and sending the recorded receiving timestamp of the test message to the source test terminal as a time record message;

[0095] Step S304: receiving the time record message by the source test terminal, parsing the receiving timestamp of the test message from the time record message, and reading the sending timestamp of the test message;

[0096] Step S305: calculating the one-way delay of wireless communication from the source test terminal to the target test terminal according to the receiving timestamp and the sending timestamp of the test message, and obtaining the test result of one-way delay of wireless communication.

[0097] Further, the method further comprises:

[0098] setting a monitoring module in the source test terminal, starting the test message sending by the source test terminal, carrying a sending serial number i in each test message, sending the test message with the sending serial number i to the target test terminal through the wireless terminal access equipment of the source, and recording the sending timestamp T 1i of each test message by the monitoring module when the test message is sent from the source test terminal, and storing the sending timestamp in the local memory of the source test terminal;

[0099] receiving the test message by the target test terminal, recording the receiving timestamp of the test message, and parsing the sending serial number i of the test message from the test message; wherein, for the i-th test message, recording the receiving timestamp T 2i of the i-th test message by the target test terminal, and sending the parsed sending serial number i of the test message and the recorded receiving timestamp T 2i to the source test terminal as a time record message through the wireless terminal access equipment of the target;

[0100] The source-side test terminal receives the time record message, parses the time stamp T 2i and the sending sequence number i of the i-th test message from the time record message, and reads the sending time stamp T 1i of the test message with the sending sequence number i from the local memory;

[0101] The source-side test terminal calculates the wireless communication one-way delay ΔT 2i from the source-side test terminal to the opposite-side test terminal according to the receiving time stamp T 1i and the sending time stamp T i of the i-th test message, and the calculation formula is as follows:

[0102] ΔT i = T 2i -T 1i -T s -T r

[0103] Wherein, T 2i is the time when the opposite-side test terminal receives the i-th test message, T 1i is the time when the source-side test terminal sends the i-th test message, T s is the time when the source-side test terminal sends the i-th test message to the source-side wireless terminal access device, T r is the time when the opposite-side wireless terminal access device receives the i-th test message to the opposite-side test terminal, T s and T r are fixed times;

[0104] The source-side test terminal stops the wireless communication one-way delay test, records the frame number of the final test message as k, and calculates the one-way delay calculation result of the k-th test message;

[0105] The source-side test terminal calculates the real-time index of the wireless network according to the one-way delay calculation result of the k-th test message recorded in the local memory to obtain the wireless communication one-way delay test result, and the real-time index of the wireless network is as follows:

[0106] The delay average value ΔT avg :

[0107] The delay variance value ΔT s :

[0108] The maximum jitter value ΔT τ : ΔT τ = ΔT max - ΔT min ;

[0109] wherein, ΔT max is the maximum one-way delay in the recorded k one-way delays, ΔT min is the minimum one-way delay in the recorded k one-way delays.

[0110] The power-oriented end-to-end control service wireless communication one-way delay test method provided by the application has the following advantages:

[0111] ①The wireless communication end-to-end one-way delay and jitter value test can be realized;

[0112] ②A variety of system implementation schemes are provided under a unified test scheme to meet different test requirements on site;

[0113] ③In the case of inaccurate internal crystal oscillator of the test instrument, a compensation method is used to improve the time synchronization accuracy on both sides and further improve the time delay test accuracy. BRIEF DESCRIPTION OF DRAWINGS

[0114] The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and serve to explain the principles of the application, but do not limit the application.

[0115] Figure 1 The flow chart of one embodiment of the power-oriented end-to-end control service wireless communication one-way delay test method provided by the application.

[0116] Figure 2 The flow chart of another embodiment of the power-oriented end-to-end control service wireless communication one-way delay test method provided by the application.

[0117] Figure 3 The flow chart of another embodiment of the power-oriented end-to-end control service wireless communication one-way delay test method provided by the application.

[0118] Figure 4 The architecture diagram of the power-oriented end-to-end control service wireless communication one-way delay test system provided by the application.

[0119] Figure 5 The first test packet sending schematic diagram provided by the application.

[0120] Figure 6 The second test packet sending schematic diagram provided by the application.

[0121] Figure 7 The third test packet sending schematic diagram provided by the application.

[0122] Figure 8 The first way of obtaining a second pulse time synchronization signal provided by the application.

[0123] Figure 9 The second way of obtaining the second pulse time signal provided by the present application is shown in the schematic diagram.

[0124] Figure 10 The third way of obtaining the second pulse time signal provided by the present application is shown in the schematic diagram. DETAILED DESCRIPTION

[0125] In order to further clarify the technical means and effects adopted by the present application to achieve the predetermined inventive objectives, the specific implementation, structure, features and effects of the power end-to-end control service wireless communication one-way delay test method according to the present application are described in detail below in combination with the drawings and preferred embodiments. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application.

[0126] In the present embodiment, a power end-to-end control service wireless communication one-way delay test method is provided, as shown in Figure 1 The power end-to-end control service wireless communication one-way delay test method comprises the following steps:

[0127] Step S101: The two sides of the test terminal are connected by wireless network for communication, and the clock synchronization of the two sides of the test terminal is completed, wherein the two sides of the test terminal include the source side test terminal and the opposite side test terminal;

[0128] Step S102: The test message carrying the sending time stamp is sent by the source side test terminal to the opposite side test terminal;

[0129] It should be noted that the test message sending requirements of the source side test terminal are configured, including the sending length and sending frequency of the test message, for simulating the actual business.

[0130] Step S103: When the opposite side test terminal receives the test message, the receiving time stamp of the test message is recorded, and the sending time stamp of the test message is parsed from the test message;

[0131] Step S104: The opposite side test terminal calculates the wireless communication one-way delay from the source side test terminal to the opposite side test terminal according to the receiving time stamp and the sending time stamp of the test message, so as to obtain the wireless communication one-way delay test result.

[0132] Preferably, as shown in Figure 4As shown, each of the two test points provides one test terminal and one wireless terminal access device. The wireless terminal access device completes the corresponding hardware and software configuration to achieve communication with the wireless network. The source-side test terminal and the counterpart-side test terminal are each connected to one wireless terminal access device via wired communication (such as a network cable). The two wireless terminal access devices communicate with each other through the wireless network. The source-side test terminal and the counterpart-side test terminal simultaneously receive external second pulse time synchronization signals to achieve clock synchronization between the source-side test terminal and the counterpart-side test terminal.

[0133] The one-way delay test from test point 1 to test point 2 is divided into two categories: one is to calculate the one-way delay on the source side (test point 1), and the other is to calculate the one-way delay on the opposite side (test point 2).

[0134] The process for calculating the one-way latency on the opposite terminal (test terminal 2) is shown below. The process from test point 2 to test point 1 is similar:

[0135] First, the wireless terminal access devices at test points 1 and 2 are configured with both hardware and software, enabling them to communicate with the wireless network and exchange information. Both test terminals 1 and 2 can acquire time synchronization signals, and the accuracy of the synchronized terminal clocks should meet the test requirements. The test terminals on both sides are connected to the wireless access devices via wired connections, fulfilling the functional requirement of sending messages to the wireless terminal access devices for forwarding to the wireless network. Data link layer message protocol is used for transmission between the test terminals and the wireless terminal access devices (power protection and control services have high real-time requirements, typically using Layer 2 messages, i.e., data link layer message protocol). The message sending requirements for test terminal 1 are configured, including message length and frequency, to simulate actual business operations.

[0136] Secondly, such as Figure 5 As shown, the source-side test terminal initiates the transmission of the test message. Before each frame of the test message is sent, a transmission timestamp is added according to the clock of the source-side test terminal (to minimize errors, the timestamp can be added at the data link layer; if the error is permissible, it can also be added at the application layer). Then, it is sent to the wireless terminal access device on the other side (test point 2) through the wireless terminal access device on the source side, and then the wireless terminal access device on the other side sends it to the test terminal on the other side. The frame number of the test message starts from when the source-side test terminal starts sending, and the transmission timestamp of the i-th frame of the test message is T. 1i It is sent to the wireless terminal access device on the other side through the wireless terminal access device on the source side;

[0137] After receiving the i-th frame test message, the wireless terminal access device on the other side forwards it to the test terminal 2 on the other side.

[0138] The test terminal 2 on the other side records the timestamp T of the received i-th frame test message. 2iand the sending time stamp T of the ith frame of test packet is parsed from the ith frame of test packet 1i ;

[0139] The receiving time stamp T of the ith frame of test packet is recorded by the opposite side test terminal 2 2i and the sending time stamp T 1i , the wireless communication one-way delay ΔT of the ith frame of test packet from the source side test terminal to the opposite side test terminal is calculated i and stored in the memory of the test terminal 2, the one-way delay ΔT of the test point 1 to the test point 2 is calculated i The calculation formula is as follows:

[0140] ΔT i = T 2i - T 1i - T s - T r

[0141] Wherein, T 2i is the time when the opposite side test terminal receives the ith frame of test packet, T 1i is the time when the source side test terminal sends the ith frame of test packet, T s is the time from the source side test terminal sending the ith frame of test packet to the source side wireless terminal access equipment sending the ith frame of test packet, T r is the time from the opposite side wireless terminal access equipment receiving the ith frame of test packet to the opposite side test terminal receiving the ith frame of test packet, T s and T r are fixed time;

[0142] The source side test terminal 1 stops the wireless communication one-way delay test, the opposite side test terminal 2 records the frame number of the final test packet as k, and calculates the one-way delay calculation result of the kth frame of test packet;

[0143] The opposite side test terminal 2 calculates the real-time index of the wireless network according to the one-way delay calculation result of the kth frame of test packet recorded in the memory, so as to obtain the wireless communication one-way delay test result, and the real-time index of the wireless network is as follows:

[0144] The delay average value ΔT avg :

[0145] The delay variance value ΔT s :

[0146] The maximum jitter value ΔT τ : ΔT τ = ΔT max - ΔT min ;

[0147] Wherein, ΔTmax ΔΤ is the maximum one-way delay in the k recorded one-way delays min ΔΤ is the minimum one-way delay in the k recorded one-way delays.

[0148] As another embodiment of the present application, a method for testing one-way delay of wireless communication of power end-to-end control service is provided, as shown in the following. Figure 2 The method for testing one-way delay of wireless communication of power end-to-end control service includes the following steps.

[0149] Step S201: The two test terminals are connected through wireless network for communication, and the clock synchronization of the two test terminals is completed, wherein the two test terminals include a source-side test terminal and a counter-side test terminal.

[0150] Step S202: The source-side test terminal sends a test packet and a time record packet to the counter-side test terminal, wherein the time record packet carries the sending timestamp of the test packet.

[0151] Step S203: When the counter-side test terminal receives the test packet and the time record packet, the receiving timestamp of the test packet is recorded, and the sending timestamp of the test packet is parsed from the time record packet.

[0152] Step S204: The counter-side test terminal calculates the wireless communication one-way delay from the source-side test terminal to the counter-side test terminal according to the receiving timestamp and the sending timestamp of the test packet, so as to obtain the wireless communication one-way delay test result.

[0153] Since Figure 5 there is a processing time between the source-side test terminal 1 marking the sending timestamp on the test packet and sending it out, which brings additional error to the end-to-end one-way delay test. In order to eliminate this error and further improve the accuracy, a listening program can be set in the test terminal 1 (source side) on the basis of the above process to listen to and record the sending time of the test packet, and then the timestamp is loaded into the time record packet and sent to the test terminal 2 (counter side), so as to realize further optimization of the delay test. The specific optimization part is as follows, and the rest is the same as the embodiment of Figure 5 .

[0154] As shown in Figure 6 , a listening module is set in the source-side test terminal, the source-side test terminal starts to send the test packet, each frame of the test packet carries a sending serial number i, and then the test packet is sent to the wireless terminal access equipment of the counter side (test point 2) through the wireless terminal access equipment of the source side, and each frame of the test packet is recorded by the listening module when it is sent from the source-side test terminal 1, and the sending timestamp T 1i is recorded. Then, the sending timestamp T 1iThe test message and the time record message are sent to the opposite test terminal 2.

[0155] After the opposite test terminal 2 receives the test message and the time record message, the receiving time stamp of the test message is recorded, and the sending time stamp and the sending serial number of the test message are parsed from the time record message; wherein, for the ith frame test message, the opposite test terminal 2 records the receiving time stamp T 2i of the ith frame test message, and parses the sending time stamp T 1i and the sending serial number i of the ith frame test message from the time record message.

[0156] According to the receiving time stamp T 2i and the sending time stamp T 1i of the ith frame test message, the opposite test terminal calculates the wireless communication one-way delay ΔT i of the ith frame test message from the source side test terminal to the opposite test terminal, and the calculation formula is as follows:

[0157] ΔT i = T 2i - T 1i - T s - T r

[0158] Wherein, T 2i is the time when the opposite test terminal receives the ith frame test message, T 1i is the time when the source side test terminal sends the ith frame test message, T s is the time when the source side test terminal sends the ith frame test message to the source side wireless terminal access device, T r is the time when the opposite side wireless terminal access device receives the ith frame test message to the opposite test terminal, T s and T r are fixed times.

[0159] The source side test terminal stops the wireless communication one-way delay test, the opposite test terminal records the frame number of the final test message as k, and calculates the one-way delay calculation result of the kth frame test message.

[0160] According to the recorded one-way delay calculation result of the kth frame test message, the opposite test terminal calculates the real-time index of the wireless network to obtain the wireless communication one-way delay test result, and the real-time index of the wireless network is as follows:

[0161] The delay average value ΔT avg :

[0162] The delay variance value ΔT s :

[0163] Maximum jitter value ΔT τ : ΔT τ = ΔT max - ΔT min ;

[0164] wherein, ΔT max is the maximum one-way latency in the recorded k one-way latencies, and ΔT min is the minimum one-way latency in the recorded k one-way latencies.

[0165] As another embodiment of the present application, a power-oriented end-to-end control service wireless communication one-way latency testing method is provided, as shown in Figure 3 The power-oriented end-to-end control service wireless communication one-way latency testing method comprises:

[0166] Step S301: The two sides of the test terminal are connected through the wireless network for communication, and the clock synchronization of the two sides of the test terminal is completed, wherein the two sides of the test terminal include the source side test terminal and the opposite side test terminal;

[0167] Step S302: The test message is sent from the source side test terminal to the opposite side test terminal, and the sending timestamp of the test message is recorded when the test message is sent;

[0168] Step S303: When the opposite side test terminal receives the test message, the receiving timestamp of the test message is recorded, and the recorded receiving timestamp of the test message is sent to the source side test terminal as a time record message;

[0169] Step S304: After the source side test terminal receives the time record message, the receiving timestamp of the test message is parsed from the time record message, and the sending timestamp of the test message is read;

[0170] Step S305: The source side test terminal calculates the wireless communication one-way latency from the source side test terminal to the opposite side test terminal according to the receiving timestamp and the sending timestamp of the test message, so as to obtain the wireless communication one-way latency testing result.

[0171] The process of calculating the one-way latency in the source side test terminal (test terminal 1) is as follows, and the process of test point 2 to test point 1 is similar:

[0172] First, the wireless terminal access devices at test points 1 and 2 are configured with both hardware and software, enabling them to communicate with the wireless network and exchange information. Both test terminals 1 and 2 can acquire time synchronization signals, and the accuracy of the synchronized terminal clocks should meet the test requirements. The test terminals on both sides are connected to the wireless access devices via wired connections, fulfilling the functional requirement of sending messages to the wireless terminal access devices for forwarding to the wireless network. Data link layer message protocol is used for transmission between the test terminals and the wireless terminal access devices (power protection and control services have high real-time requirements, typically using layer 2 messages, i.e., data link layer message protocol). The message sending requirements for test terminal 1 are configured, including message length and sending frequency, to simulate actual services.

[0173] Secondly, such as Figure 7 As shown, a listening module is set up in the source-side test terminal 1. The source-side test terminal 1 initiates the transmission of test messages. Each frame of the test message carries a transmission sequence number i. The test message containing the transmission sequence number i is then sent to the wireless terminal access device on the opposite side (test point 2) through the source-side wireless terminal access device. The listening module records the transmission timestamp T of each frame of the test message when it is sent from the source-side test terminal. 1i And store it in the local memory of the source-side test terminal; for the test message with sequence number i, record the sending time as T. 1i ;

[0174] After receiving the test message, the remote test terminal 2 records the reception timestamp of the test message and parses the transmission sequence number i of the test message from the test message; wherein, for the i-th frame of the test message, the remote test terminal 2 records the reception timestamp T of the i-th frame of the test message. 2i The parsed test message will be sent with sequence number i and recorded receive timestamp T. 2i The time recording message is composed and sent to the source test terminal 1 through the wireless terminal access device on the other side;

[0175] After receiving the time recording message, the source-side test terminal 1 parses the timestamp T from the time recording message to obtain the timestamp T of the i-th frame test message received by the counterpart test terminal. 2i And the sequence number i of the i-th test message, and read the transmission timestamp T of the test message with sequence number i from local memory. 1i ;

[0176] Source-side test terminal 1 receives the i-th test message based on the timestamp T. 2i and sending timestamp T 1i Calculate the one-way wireless communication delay ΔT of the i-th frame test message from the source test terminal to the counterpart test terminal. i The time delay ΔT between test point 1 and test point 2 is stored in the memory of test terminal 1.i The calculation formula is as follows:

[0177] ΔT i =T 2i -T 1i -T s -T r

[0178] Among them, T 2i T is the time when the test terminal on the other side receives the i-th frame of the test message. 1i T is the time when the source-side test terminal sends the i-th test frame. s T is the time from when the source-side test terminal sends the i-th test frame to when the source-side wireless terminal access device sends the i-th test frame. r T is the time from when the wireless terminal access device on the other side receives the i-th test frame to when the test terminal on the other side receives the i-th test frame. s and T r For a fixed time;

[0179] The source-side test terminal 1 stops the one-way delay test of wireless communication, records the number of frames of the final test message as k, and calculates the one-way delay calculation result of the k-th frame test message;

[0180] The source-side test terminal 1 calculates the real-time performance indicators of the wireless network based on the one-way delay calculation results of the k-frame test messages recorded in its local memory, in order to obtain the one-way delay test results of the wireless communication. The real-time performance indicators of the wireless network are as follows:

[0181] Average delay ΔT avg :

[0182] Delay variance ΔT s :

[0183] Maximum jitter value ΔT τ ΔT τ =ΔT max -ΔT min ;

[0184] Where, ΔT max Let ΔT be the maximum one-way delay among the k recorded one-way delays. min It is the minimum one-way delay among the k recorded one-way delays.

[0185] From the above process, the accuracy of one-way delay test depends on the clock of the test terminal on both sides, and the time of the test terminal on both sides needs to be completely consistent, so the internal clock synchronization of the terminal on both sides needs to be completed. The clock synchronization method is usually that the test terminal obtains the second pulse signal from the outside (which contains UTC time information), and adjusts its own internal crystal clock according to the second pulse signal. There are three ways for the test terminal to obtain the second pulse signal:

[0186] The first way is to configure a time synchronization device for the source side test terminal and the opposite side test terminal respectively, as shown in Figure 8 Both of the two time synchronization devices obtain Beidou / GPS signals and output second pulse time signal to the source side test terminal and the opposite side test terminal respectively, so as to realize the time synchronization of the source side test terminal and the opposite side test terminal.

[0187] The second way is to use precise network time service, as shown in Figure 9 The wireless base station sends SIB9 signaling frame in system information block (SIB) to the source side wireless terminal access equipment and the opposite side wireless terminal access equipment respectively, the SIB9 signaling frame includes UTC time and timing advance (TA) between the test terminal and the wireless base station, and the source side wireless terminal access equipment and the opposite side wireless terminal access equipment obtain accurate local time according to the SIB9 signaling frame, and output the accurate local time to the test terminal through the time synchronization protocol, so as to realize the time synchronization of the source side test terminal and the opposite side test terminal.

[0188] The third way is that the source side test terminal and the opposite side test terminal access the network containing the time service server through wired access, as shown in Figure 10 The time service server sends synchronization signal to the corresponding test terminal, so as to realize the time synchronization of the source side test terminal and the opposite side test terminal.

[0189] The above three second pulse time synchronization methods can solve the problem of time synchronization of the test terminal on both sides every second, and when the internal crystal of the test terminal has high accuracy, the one-way delay can be measured to obtain more accurate one-way delay; when the internal crystal of the test terminal has low accuracy, there will be a certain cumulative error in one second, which will affect the accuracy of one-way delay test, and further optimization is needed. Here, two optimization schemes are adopted:

[0190] 1. Linear compensation method

[0191] Compare the internal crystal clock of the test terminal with the synchronization clock, and if the deviation per second exceeds the set value, perform whole second synchronization and compensation on the internal crystal clock;

[0192] The compensation adopts the linear compensation method in one second, that is, the internal crystal clock is linearly compensated in one second to further improve the accuracy of the internal clock.

[0193] First, the compensation coefficient initialization is carried out, and the compensation coefficient is calculated per second:

[0194]

[0195] Wherein, a j is the compensation coefficient of the jth second, f co is the internal crystal time frequency, N j-1 is the crystal cumulative value of the external synchronization time second pulse trigger time of the j-1th second, N j is the crystal cumulative value of the external synchronization time second pulse trigger time of the jth second, t bj is the time of the external synchronization time second pulse trigger time of the jth second, t bj-1 is the time of the external synchronization time second pulse trigger time of the j-1th second;

[0196] Then, the compensation coefficient a is initialized, and the initialization can be set for a certain time (usually several seconds, the value is p), and the initialized compensation coefficient a can be obtained:

[0197]

[0198] Wherein, p is the number of seconds of the period for initialization;

[0199] On this basis, the linear compensation of the internal crystal time second is carried out, and the test terminal time T uks of the current time is:

[0200] T uks =a*(N ks -N k ) / f co +T uk

[0201] Wherein, f co is the internal crystal time frequency, N k is the crystal cumulative value of the external synchronization time second pulse trigger time of the current kth second, N ks is the crystal cumulative value of the current time between the kth second and the k+1th second, T uk is the time of the external synchronization time second pulse trigger time of the kth second;

[0202] Considering the possible change of the crystal frequency, the compensation coefficient initialization should be carried out again every period of time (such as 5 minutes), the compensation coefficient a is recalculated, and is used for the subsequent linear compensation of the internal clock second.

[0203] 2. High-frequency clock construction method

[0204] The CPU of the test terminal operates at a fixed frequency, and can also be used as a clock. When the accuracy of the crystal oscillator is insufficient, the CPU of the test terminal is used to build a high-frequency clock to replace the internal crystal oscillator clock of the test terminal; when the CPU is used as a clock, based on the working frequency f of the CPU, the CPU count value Q of the last whole second k and the CPU count value Q of the current time in the current second ks , the test terminal time T of the current time is ks :

[0205] T ks =(Q ks -Q k ) / f+T uk .

[0206] The linear compensation method and the high-frequency clock construction method can be combined to further improve the accuracy.

[0207] The application provides a wireless one-way time delay test method for power end-to-end control service, which has the following advantages: ① wireless end-to-end one-way time delay and jitter value test can be realized; ② multiple system implementation schemes are provided under a unified test scheme to meet different test requirements on site; ③ in the case that the internal crystal oscillator of the test instrument is inaccurate, a compensation method is adopted to improve the time synchronization accuracy on both sides, and then the time delay test accuracy is improved.

[0208] The above description is only the preferred embodiment of the application, and does not limit the application in any form. Although the application has been disclosed as above, it is not intended to limit the application. Any person skilled in the art can make some changes or modifications to the above disclosed technical content without departing from the technical solution of the application, and the equivalent embodiments with equivalent changes are equivalent. Any simple modification, equivalent change and modification of the above embodiments based on the technical essence of the application are still within the scope of the technical solution of the application.

Claims

1. A method for testing one-way latency of a power end-to-end control service wireless communication, characterized in that, The method comprises the following steps: Step S101: connecting the two test terminals through a wireless network, and synchronizing the clocks of the two test terminals, wherein the two test terminals comprise a source-side test terminal and a counter-side test terminal; Step S102: sending a test message carrying a sending timestamp from the source-side test terminal to the counter-side test terminal; Step S103: when the counter-side test terminal receives the test message, recording a receiving timestamp of the test message, and parsing the sending timestamp of the test message from the test message; Step S104: calculating a one-way delay of the wireless communication from the source-side test terminal to the counter-side test terminal according to the receiving timestamp and the sending timestamp of the test message, so as to obtain a one-way delay test result of the wireless communication; Further comprising: (1) Linear compensation method Comparing the internal crystal clock of the test terminal with the synchronized clock, if the deviation per second exceeds the set value, performing second synchronization and compensating the internal crystal clock; The compensation adopts a linear compensation method within a second, that is, linearly compensating the internal crystal clock within a second; Firstly, initializing the compensation coefficient, and calculating the compensation coefficient per second: ， wherein, a j is the first j second compensation coefficient, f co is the internal crystal time frequency, N j-1 is the j-1 second crystal cumulative value of the external synchronization time second pulse trigger time, N j is the j second crystal cumulative value of the external synchronization time second pulse trigger time, t bj is the first j second time of the external synchronization time second pulse trigger time, t bj-1 is the first j-1 second time of the external synchronization time second pulse trigger time; Then the compensation coefficient a is initialized, the initialization can set a certain time, the initialized compensation coefficient a can be obtained: , wherein, p is the number of seconds for this period of initialization; On this basis, the internal crystal oscillator time second linear compensation is carried out, and then the test terminal time T of the current time is uks T = T + T + T ， wherein, f co is an internal crystal time frequency, N k is a crystal cumulative value at the current kth second external synchronization time second pulse trigger moment, N ks is a crystal cumulative value at the current moment between the kth second and the k+1th second, T uk is a time at the kth second external synchronization time second pulse trigger moment; (2) High-frequency clock construction method Using the CPU of the test terminal to construct a high-frequency clock to replace the internal crystal clock of the test terminal; When a CPU is used as a clock, a CPU-based working frequency f , a CPU count value of the previous whole second Q k and a CPU count value of the current time within the present second Q ks , then the test terminal time of the current time T ks is: .

2. The method of claim 1, wherein, The source-side test terminal and the counter-side test terminal are each connected to a wireless terminal access device through a wired communication mode, the two wireless terminal access devices are connected through a wireless network, and the source-side test terminal and the counter-side test terminal simultaneously receive external second pulse time signal to synchronize the clocks of the source-side test terminal and the counter-side test terminal; The step S102 further comprises: The source-side test terminal initiates the sending of the test message. Each frame of the test message is marked with a sending time stamp according to the clock of the source-side test terminal before being sent, and is sent to the opposite-side wireless terminal access equipment through the source-side wireless terminal access equipment, and then sent to the opposite-side test terminal by the opposite-side wireless terminal access equipment. The frame number of the test message is numbered from the time when the source-side test terminal initiates the sending. i The sending time stamp of the frame of the test message is T 1i , and sent to the opposite-side wireless terminal access equipment through the source-side wireless terminal access equipment. The steps S103 and S104 further comprise: The wireless terminal access device on the opposite side receives the first i frame test message and forwards it to the test terminal on the opposite side. The opposite side test terminal records the first i The receiving time stamp of the frame test message T 2i And the first i The sending time stamp of the frame test message is parsed from the first i The sending time stamp of the frame test message T 1i ; The counterpart test terminal according to the first i Frame test message reception timestamp T 2i and sending timestamp T 1i Calculate the first i One-way delay of frame test messages from the source test terminal to the counterpart test terminal in wireless communication The calculation formula is as follows: ， wherein, T 2i the time for the source side test terminal to receive the first frame test message, i the time for the source side test terminal to receive the first frame test message, T 1i the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, T s the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, T r the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, T s and T r is a fixed time; The source-side test terminal stops the wireless communication one-way delay test, and the opposite-side test terminal records the frame number of the final test message as k and calculates the one-way delay of the first k frame test message. The opposite side test terminal calculates the real-time index of the wireless network according to the recorded k The frame test packet one-way delay calculation result, calculates the real-time index of the wireless network, in order to obtain the wireless communication one-way delay test result, the real-time index of the wireless network is as follows: Average value of latency ; Latency variance value ; maximum jitter value ; wherein, is the maximum one-way latency of the k is the minimum one-way latency of the is the maximum one-way latency of the k is the minimum one-way latency of the 3. The method of claim 1, wherein, The step of synchronizing the clocks of the two test terminals further comprises: The clock synchronization mode is that the source-side test terminal and the counter-side test terminal obtain the second pulse signal from the outside to adjust their internal crystal clocks, and the source-side test terminal and the counter-side test terminal obtain the external second pulse time signal in the following three ways: Firstly, configuring a time synchronization device for the source-side test terminal and the counter-side test terminal respectively, both of the time synchronization devices obtain Beidou / GPS signals, and output second pulse time signals to the source-side test terminal and the counter-side test terminal respectively to realize the time synchronization of the source-side test terminal and the counter-side test terminal; Secondly, adopting an accurate network time service mode, a wireless base station sends SIB9 signaling frames in a system message block to a source-side wireless terminal access device and a counter-side wireless terminal access device respectively, the SIB9 signaling frames comprise UTC time and timing advance TA between the test terminal and the wireless base station, the source-side wireless terminal access device and the counter-side wireless terminal access device obtain accurate local time according to the SIB9 signaling frames, and output the accurate local time to the respective test terminals through a time synchronization protocol to realize the time synchronization of the source-side test terminal and the counter-side test terminal; Thirdly, the source-side test terminal and the opposite-side test terminal respectively access a network containing a time server through wired connection, and the time server sends a synchronization signal to the corresponding test terminal to realize time synchronization of the source-side test terminal and the opposite-side test terminal.

4. A method for testing one-way latency of a power end-to-end control service wireless communication, characterized in that, The method comprises the following steps: Step S201: the test terminals on both sides are connected through a wireless network for communication, and clock synchronization of the test terminals on both sides is completed, wherein the test terminals on both sides include a source-side test terminal and an opposite-side test terminal; Step S202: a test message and a time record message are sent by the source-side test terminal to the opposite-side test terminal, and the time record message carries a sending timestamp of the test message; Step S203: when the opposite-side test terminal receives the test message and the time record message, a receiving timestamp of the test message is recorded, and the sending timestamp of the test message is parsed from the time record message; Step S204: the opposite-side test terminal calculates a one-way time delay of wireless communication from the source-side test terminal to the opposite-side test terminal according to the receiving timestamp and the sending timestamp of the test message, to obtain a one-way time delay test result of wireless communication; Further comprising: (1) Linear compensation method The internal crystal clock of the test terminal is compared with the synchronized clock, and if the deviation per second exceeds a set value, the whole second is synchronized and the internal crystal clock is compensated; The compensation adopts a linear compensation method within a second, that is, the internal crystal clock is linearly compensated within a whole second; First, the compensation coefficient is initialized, and the compensation coefficient is calculated second by second: ， wherein, a j is the first j second compensation coefficient, f co is the internal crystal time frequency, N j-1 is the j-1 second crystal cumulative value of the external synchronization time second pulse trigger time, N j is the j second crystal cumulative value of the external synchronization time second pulse trigger time, t bj is the first j second external synchronization time second pulse trigger time, t bj-1 is the first j-1 second external synchronization time second pulse trigger time; Then the compensation coefficient a is initialized, the initialization can set a certain time, the initialized compensation coefficient a can be obtained: , wherein, p is the number of seconds for this period of initialization; On this basis, the internal crystal oscillator time second linear compensation is carried out, and then the test terminal time T of the current time is uks T = T + T + T + T + T + T + T + T + T + T + T + T + T + T + T + T + T + T + ， wherein, f co is an internal crystal time frequency, N k is a crystal cumulative value at a current kth second external synchronization time second pulse trigger moment, N ks is a crystal cumulative value at a current moment between the kth second and the k+1th second, T uk is a time at the kth second external synchronization time second pulse trigger moment. (2) High-frequency clock construction method A high-frequency clock is constructed using the CPU of the test terminal to replace the internal crystal clock of the test terminal; When a CPU is used as a clock, a CPU-based working frequency f , a CPU count value of the previous whole second Q k and a CPU count value of the current time within the present second Q ks , then the test terminal time of the current time T ks is: .

5. The method of claim 4, wherein, The source-side test terminal and the opposite-side test terminal are each connected to a wireless terminal access device through wired communication, and the two wireless terminal access devices communicate with each other through a wireless network, and the source-side test terminal and the opposite-side test terminal simultaneously receive external second pulse time signal to complete clock synchronization of the source-side test terminal and the opposite-side test terminal; The step S202 further comprises: The source-side test terminal is provided with a monitoring module, and the source-side test terminal starts sending the test messages, each frame of the test messages carrying a sending serial number i The test messages are sent to the opposite-side wireless terminal access equipment through the source-side wireless terminal access equipment, and each frame of the test messages is recorded with a sending time stamp by the monitoring module when being sent from the source-side test terminal T 1i Then, the test message sending time stamp recorded by the monitoring module T 1i and the test message sending serial number i are composed into a time recording message and sent to the opposite-side test terminal The steps S203 and S204 further comprise: The opposite side test terminal records the receiving time stamp of the test message and parses the sending time stamp and sending serial number of the test message from the time record message after receiving the test message and the time record message; wherein, for the ith frame test message, the opposite side test terminal records the receiving time stamp of the ith frame test message T 2i and parses the sending time stamp of the ith frame test message from the time record message T 1i and the sending serial number i ​ The opposite side test terminal calculates the wireless communication one-way delay of the frame test message from the source side test terminal to the opposite side test terminal according to the first i The receiving time stamp of the frame test message T 2i And the sending time stamp T 1i The wireless communication one-way delay of the frame test message from the source side test terminal to the opposite side test terminal is calculated according to the first i The calculation formula is as follows: The receiving time stamp of the frame test message T 2i And the sending time stamp T 1i The wireless communication one-way delay of the frame test message from the source side test terminal to the opposite side test terminal is calculated according to the first i The calculation formula ， wherein, T 2i the time for the source side test terminal to receive the first frame test message, i the time for the source side test terminal to send the first frame test message, T 1i the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, T s the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, T r the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the first frame test message, T s and T r is a fixed time; The source-side test terminal stops the wireless communication one-way delay test, and the opposite-side test terminal records the frame number of the final test message as k and calculates the one-way delay of the first k frame test message; The opposite side test terminal calculates the real-time index of the wireless network according to the recorded k The frame test packet one-way delay calculation result, calculates the real-time index of the wireless network, in order to obtain the wireless communication one-way delay test result, the real-time index of the wireless network is as follows: Average value of latency ; Latency variance value ; maximum jitter value ; wherein, is the maximum one-way latency of the k is the minimum one-way latency of the is the maximum one-way latency of the k is the minimum one-way latency of the 6. The method of claim 4, wherein, The clock synchronization of the test terminals on both sides, wherein the test terminals on both sides include a source-side test terminal and an opposite-side test terminal, further comprises: The clock synchronization method is that the source-side test terminal and the opposite-side test terminal obtain a second pulse signal from the outside to adjust their internal crystal clocks, and the source-side test terminal and the opposite-side test terminal obtain the external second pulse time signal in the following three ways: Firstly, time synchronization devices are respectively configured for the source-side test terminal and the opposite-side test terminal, both of which obtain Beidou / GPS signals and output second pulse time signals to the source-side test terminal and the opposite-side test terminal respectively to realize time synchronization of the source-side test terminal and the opposite-side test terminal; Secondly, the source-side test terminal and the opposite-side test terminal are respectively connected to a wireless terminal access device through wired communication, and the two wireless terminal access devices communicate with each other through a wireless network, and the source-side test terminal and the opposite-side test terminal simultaneously receive external second pulse time signal to complete clock synchronization of the source-side test terminal and the opposite-side test terminal; Thirdly, the source-side test terminal and the opposite-side test terminal respectively access a network containing a time server through wired connection, and the time server sends a synchronization signal to the corresponding test terminal to realize time synchronization of the source-side test terminal and the opposite-side test terminal. Second, the wireless base station sends SIB9 signaling frame in the system message block to the source side wireless terminal access equipment and the opposite side wireless terminal access equipment, respectively, the SIB9 signaling frame includes UTC time and timing advance TA between the test terminal and the wireless base station, and the source side wireless terminal access equipment and the opposite side wireless terminal access equipment obtain accurate local time according to the SIB9 signaling frame, and output the accurate local time to the respective test terminal through the time protocol, so as to realize time synchronization of the source side test terminal and the opposite side test terminal; Third, the source side test terminal and the opposite side test terminal respectively access the network containing the time server through the wire, and the time server sends the synchronization signal to the corresponding test terminal, so as to realize time synchronization of the source side test terminal and the opposite side test terminal.

7. A method for testing one-way latency of a power end-to-end control service wireless communication, characterized in that, The method comprises the following steps: Step S301: the test terminals on both sides are connected through wireless network communication, and the clock synchronization of the test terminals on both sides is completed, wherein the test terminals on both sides include a source side test terminal and an opposite side test terminal; Step S302: the source side test terminal sends a test message to the opposite side test terminal, and records the sending timestamp of the test message when the test message is sent; Step S303: when the opposite side test terminal receives the test message, the receiving timestamp of the test message is recorded, and the recorded receiving timestamp of the test message is sent to the source side test terminal to form a time record message; Step S304: after the source side test terminal receives the time record message, the receiving timestamp of the test message is parsed from the time record message, and the sending timestamp of the test message is read; Step S305: the source side test terminal calculates the one-way time delay of wireless communication from the source side test terminal to the opposite side test terminal according to the receiving timestamp and the sending timestamp of the test message, so as to obtain the one-way time delay test result of wireless communication; Further comprising: (1) Linear compensation method Compare the internal crystal clock of the test terminal with the synchronous clock, if the deviation per second exceeds the set value, perform whole second synchronization and compensation on the internal crystal clock; The compensation adopts the linear compensation method within the second, that is, the internal crystal clock is linearly compensated within the whole second; First, initialize the compensation coefficient, calculate the compensation coefficient second by second: ， in, a j For the first j The compensation coefficient per second, f co This refers to the internal crystal oscillator frequency. N j-1 for j-1 The external synchronization time in seconds and the accumulated value of the crystal oscillator at the moment of the second pulse trigger. N j for j The external synchronization time in seconds and the accumulated value of the crystal oscillator at the moment of the second pulse trigger. t bj For the first j The external synchronization time in seconds, the time of the second pulse trigger. t bj-1 For the first j-1 The external synchronization time in seconds; the time of the second pulse trigger. Then the compensation coefficient a is initialized, the initialization can set a certain time, the initialized compensation coefficient a can be obtained: , wherein, p is the number of seconds for this period of initialization; On this basis, the internal crystal oscillator time second linear compensation is carried out, and then the test terminal time T of the current time is uks T = T + T + T + T ， wherein, f co is an internal crystal oscillator time frequency, N k is a crystal oscillator cumulative value at a current kth second external synchronization time second pulse trigger moment, N ks is a crystal oscillator cumulative value at a current moment between the kth second and the k+1th second, T uk is a time at the kth second external synchronization time second pulse trigger moment, (2) High frequency clock construction method Use the CPU of the test terminal to build a high frequency clock to replace the internal crystal clock of the test terminal; When a CPU is used as a clock, a CPU-based working frequency f , a CPU count value of the previous whole second Q k and a CPU count value of the current time within the present second Q ks , then the test terminal time of the current time T ks is: .

8. The method of claim 7, wherein, Further comprising: The source-side test terminal is provided with a monitoring module, and the test message is sent by starting the test terminal i The test message containing the sending serial number is sent to the wireless terminal access equipment on the opposite side through the source-side wireless terminal access equipment i The sending time stamp of each frame of test message is recorded by the monitoring module when the test message is sent from the source-side test terminal T 1i and stored in the local memory of the source-side test terminal The opposite side test terminal receives the test message, records the receiving time stamp of the test message, and analyzes the sending serial number of the test message from the test message i ; wherein, for the i-th frame test message, the opposite side test terminal records the receiving time stamp of the i-th frame test message i T 2i , and the analyzed sending serial number of the test message i and the recorded receiving time stamp T 2i composes a time record message, and sends the time record message to the source side test terminal through the opposite side wireless terminal access equipment;​ The source-side test terminal receives the time record message, parses the time record message to obtain the time when the opposite-side test terminal receives the test message i The time stamp of the frame test message T 2i And the sending serial number of the frame test message i The time stamp of the test message sent from the local memory i i T 1i ;​​ Source-side test terminal according to the first i Frame test message reception timestamp T 2i and sending timestamp T 1i Calculate the first i One-way delay of frame test messages from the source test terminal to the counterpart test terminal in wireless communication The calculation formula is as follows: ， wherein, T 2i the time for the source side test terminal to receive the first frame test message, i the time for the source side test terminal to receive the frame test message, T 1i the time for the source side test terminal to send the first frame test message, i the time for the source side test terminal to send the frame test message, T s the time for the source side test terminal to send the first frame test message to the source side wireless access device, i the time for the source side test terminal to send the frame test message to the source side wireless access device, i the time for the source side test terminal to send the first frame test message to the source side wireless access device, T r the time for the source side wireless access device to receive the first frame test message from the source side test terminal, i the time for the source side wireless access device to receive the frame test message from the source side test terminal, i the time for the source side wireless access device to receive the first frame test message from the source side test terminal, T s and T r is a fixed time; The source-side test terminal stops the wireless communication one-way delay test, and records the frame number of the final test message as k and calculates the one-way delay of the first k frame test message; The source-side test terminal uses data recorded in its local memory. k The one-way delay of the frame test message is used to calculate the real-time performance index of the wireless network, thereby obtaining the one-way delay test result of the wireless communication. The real-time performance index of the wireless network is as follows: Average value of latency ; Latency variance value ; maximum jitter value ; wherein, is the maximum one-way latency of the k recorded one-way latencies, is the minimum one-way latency of the k recorded one-way latencies.

Images