Chip configuration methods, apparatus, equipment and media

Abstract

This invention relates to the field of integrated circuit technology and discloses a chip configuration method, apparatus, device, and medium, comprising: dividing a module to be configured into at least two serial configuration structures; determining configuration data of the module to be configured in the serial configuration structures and writing the configuration data into a configuration cache module; the configuration cache module sending the configuration data to the module to be configured through a broadcast bus matrix to configure the module; and the broadcast bus matrix returning a write response to the configuration cache module so that the configuration cache module can continue to send configuration data to the module to be configured. This improves the efficiency of chip configuration.

Description

Technical Field

[0001] This invention relates to the field of chip integration technology, and in particular to a chip configuration method, apparatus, device, and medium. Background Technology

[0002] With the development of integrated circuit technology, the performance and functionality of chips have improved along with the enhanced circuit integration capabilities. Before a chip is put into use, integration work, such as functional configuration, is required.

[0003] For example, large-scale switching integrated circuits are becoming increasingly larger, with more and more modules integrated onto a single chip, and these modules are becoming physically closer together. Switch chips often have hundreds of millions of gates and integrate dozens or even hundreds of physically separate modules. Before the chip can operate, the entire chip needs to be initialized and configured, and the initial configuration values ​​will differ depending on the operating scenario, requiring a large number of address write operations. Furthermore, if some modules malfunction during chip operation, it may be necessary to reinitialize and configure a batch of modules, again requiring a large number of address write operations.

[0004] The configuration method involves the CPU performing write operations on the internal registers or memory of each module.

[0005] One approach is for the on-chip CPU or host computer to directly write to each address. Since most modules are physically far apart, and disregarding CPU fetch latency, if each address requires an average of 20 clock cycles from the CPU issuing the write operation to completion, and considering 100 modules need configuration with an average of 1000 registers per module, it would take at least 20 x 100 x 1000 = 2,000,000 clock cycles to complete the configuration. This only considers register configuration; in reality, many modules on the switch need to initialize memory, and memory capacity is several orders of magnitude larger than registers, making each configuration cycle even longer.

[0006] Therefore, how to configure chips to reduce the complexity and difficulty of chip configuration is one of the technical issues worth considering. Summary of the Invention

[0007] This invention provides a chip configuration method, apparatus, computer device, and medium.

[0008] Firstly, a chip configuration method is provided, including:

[0009] Divide the module to be configured into at least two serial configuration structures;

[0010] Determine the configuration data of the module to be configured in the serial configuration structure, and write the configuration data into the configuration cache module;

[0011] The configuration cache module sends the configuration data to the module to be configured through the broadcast bus matrix to configure the module to be configured.

[0012] The broadcast bus matrix returns a write response to the configuration cache module, enabling the configuration cache module to continue sending configuration data to the module to be configured.

[0013] In some embodiments, dividing the module to be configured into at least two serial configuration structures includes:

[0014] Display the configuration interface of the serial configuration structure to the user;

[0015] Group the user-selected modules of the same type into one group;

[0016] According to the grouping restriction rules, modules to be configured that belong to the same group are divided into at least two serial configuration structures.

[0017] In some embodiments, grouping user-selected modules of the same type into a group includes:

[0018] According to the preset classification rules, modules of the same type and with a configuration data overlap rate greater than the first preset threshold are grouped into the same group.

[0019] In some embodiments, the grouping restriction rules include:

[0020] Each serial configuration structure in the same group contains the same number of modules to be configured.

[0021] In some embodiments, the grouping restriction rules include:

[0022] At least two serial configuration structures can form an association relationship. If the first serial configuration structure and the second serial configuration structure are associated, then at least one module to be configured in the first serial configuration structure is associated with a module to be configured in the second serial configuration structure. The modules to be configured in the associated structure have the same sorting position in their respective serial configuration structures, and the overlap rate of configuration data is greater than a second preset threshold.

[0023] In some embodiments, determining the configuration data of the module to be configured in the serial configuration structure and writing the configuration data into the configuration cache module includes:

[0024] Obtain the first configuration data of the module to be configured in a serial configuration structure, and write the first configuration data into the configuration cache module;

[0025] The first configuration data is copied and written to the configuration cache module to obtain configuration data of the serial configuration structure that is associated with the serial configuration structure.

[0026] In some embodiments, the configuration cache module sends the configuration data to the module to be configured via a broadcast bus matrix, including:

[0027] The configuration cache module sends the configuration data to the module to be configured via a broadcast bus matrix at a preset write command cycle.

[0028] Secondly, a chip configuration device is provided, comprising:

[0029] A grouping unit is used to divide the module to be configured into at least two serial configuration structures;

[0030] A generation unit is used to determine the configuration data of the module to be configured in the serial configuration structure and write the configuration data into the configuration cache module;

[0031] A configuration unit is used by the configuration cache module to send the configuration data to the module to be configured via a broadcast bus matrix, and to configure the module to be configured.

[0032] A response unit is used for the broadcast bus matrix to return a write response to the configuration cache module, so that the configuration cache module can continue to send configuration data to the module to be configured.

[0033] Thirdly, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the chip configuration method described above.

[0034] Fourthly, a computer-readable storage medium is provided, which stores a computer program that, when executed by a processor, implements the steps of the chip configuration method described above.

[0035] In the aforementioned chip configuration method, apparatus, computer device, and storage medium, the module to be configured can be divided into at least two serial configuration structures; the configuration data of the module to be configured in the serial configuration structure can be determined and written to the configuration cache module; the configuration cache module can send the configuration data to the module to be configured through a broadcast bus matrix to configure the module; the broadcast bus matrix can return a write response to the configuration cache module so that the configuration cache module can continue to send configuration data to the module to be configured. In this invention, an additional mode, the broadcast mode, is added. In this mode, the response is generated by the BUS Matrix and returned to the DMA channel after the command is sent out (ARM's BUSMatrix is ​​for cross-connection and arbitration of multiple masters (Core, DMA, etc.) and multiple slaves (internal RAM, APB, external bus, etc.). The purpose is to improve bandwidth when different hosts access different peripherals, and also to simplify the BusMaster protocol design). This greatly accelerates the configuration process. Attached Figure Description

[0036] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of an application environment for a chip configuration method according to an embodiment of the present invention;

[0038] Figure 2 This is a flowchart illustrating a chip configuration method in one embodiment of the present invention;

[0039] Figure 3 This is a flowchart illustrating a chip configuration method in one embodiment of the present invention;

[0040] Figure 4 This is a flowchart illustrating a chip configuration method in one embodiment of the present invention;

[0041] Figure 5 This is a schematic diagram of a chip configuration device in one embodiment of the present invention;

[0042] Figure 6 This is a schematic diagram of the structure of a computer device according to an embodiment of the present invention;

[0043] Figure 7 This is another structural schematic diagram of a computer device according to one embodiment of the present invention. Detailed Implementation

[0044] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0045] The chip configuration method provided in this embodiment of the invention can be applied to, for example... Figure 1 In this application environment, the client communicates with the server via a network. The server can obtain the configuration files corresponding to each group based on the grouping information of the serial configuration structure for the module to be configured. These configuration files include a transmission port call file, a pin multiplexing file, a port pin connection file, and a register file. The server then generates configuration data for the module to be configured based on the configuration files. The configuration bus sends the configuration data to the module to be configured, and the module is configured. Once the configuration is complete, the module returns a configuration response to the configuration bus. This invention improves the efficiency of chip configuration. The client can be, but is not limited to, various personal computers, laptops, smartphones, tablets, and portable wearable devices. The server can be implemented using a standalone server or a server cluster consisting of multiple servers. The invention will be described in detail below through specific embodiments.

[0046] Please see Figure 2 As shown, Figure 2 A schematic flowchart of a chip configuration method provided in an embodiment of the present invention includes the following steps:

[0047] S10. Divide the module to be configured into at least two serial configuration structures;

[0048] The chip to be configured can be a chip that requires design and configuration. For example, chip configuration includes I / O (input and output) instantiation and pin multiplexing. During the I / O instantiation and pin multiplexing configuration of the chip, multiple configuration files need to be generated, and the correspondence between the hardware functional modules corresponding to each configuration file needs to be determined to obtain the relevant files used to configure the chip to be configured.

[0049] In some embodiments, S10 may include:

[0050] S101. Display the configuration interface of the serial configuration structure to the user;

[0051] S102. Group the modules of the same type selected by the user for configuration into a group;

[0052] Understandably, chips may include multiple types (such as port configurations and cache configurations). Each type can be the same physical module or a functional module. Based on this, module configuration is divided by type. The selected serial channels generally need to belong to the same type. That is, first select a serial channel within a type, and then configure the modules to be configured connected to that channel in sequence.

[0053] S103. According to the grouping restriction rules, the modules to be configured belonging to the same group are divided into at least two serial configuration structures.

[0054] In some embodiments, S102 above, which groups the user-selected modules of the same type into a group, may include:

[0055] According to the preset classification rules, modules of the same type and with a configuration data overlap rate greater than the first preset threshold are grouped into the same group.

[0056] It is understandable that switches are often divided into multiple PIPEs. The hardware and components of each PIPE are basically the same, so the configuration is also basically the same. This allows a PIPE to be placed in a ring, and these PIPEs to be grouped together. When configuring a ring, the configuration is also copied and sent to the other PIPEs, which improves the configuration efficiency several times over.

[0057] In some embodiments, the above grouping restriction rules include:

[0058] Each serial configuration structure of the same group of modules to be configured contains the same number of modules to be configured.

[0059] In some embodiments, the above grouping restriction rules include:

[0060] At least two serial configuration structures can form an association relationship. If the first serial configuration structure and the second serial configuration structure are associated, then at least one module to be configured in the first serial configuration structure is associated with a module to be configured in the second serial configuration structure. The modules to be configured in the associated structure have the same sorting position in their respective serial configuration structures, and the overlap rate of configuration data is greater than a second preset threshold.

[0061] In an application scenario, such as Figure 3 and 4 As shown, the grouping is done as follows Figure 3The structure shown allows configuration data to reside either in the host computer (CPU or PCIe) or in the on-chip main memory (Main Mem in the diagram). Each module to be configured (BLK) is connected in series in a ring configuration, divided into multiple rings (ring0-ringN in the diagram) for parallel configuration. If two DMA (Direct Memory Access) channels are configured on different rings, they can be configured in parallel. For example, DMA CH0 configures Ring 0, DMA CH1 configures Ring 1, and so on. Since their configuration paths do not conflict, they can be sent in parallel.

[0062] Meanwhile, when building a loop, similar configured modules are symmetrically placed on the same group of loops. When the configuration data on one loop is sent out, it is simultaneously copied to other loops in the same group. In this way, the configuration of a group of loops can now be completed instead of configuring one loop at a time, which further speeds up the configuration process.

[0063] For example, in terms of hardware, rings 0-3 are grouped together, and the hardware of different rings is basically the same. For example, the first ring has 4 BLKs, and the second and third rings also have 4 BLKs. The configuration of the first BLK of the first ring is similar to the configuration of the first BLK of the second and third rings, and so on. The configurations of the subsequent rings are also basically similar. Any special configurations that are different can be configured separately through the normal configuration.

[0064] Configure DB 0-n as the configuration address (which BLM to configure in the DB, the data address) and configuration size of the modules 0-n, and write it to Main Mem. Configure Configured_data0-n as the configuration data to be configured for modules 0-n and write it to Main Mem. Set DMA CH0 to process these DBs and configuration data. After completion, DMA CH0 will retrieve the DB from Main Mem, then retrieve the configuration data according to the DB content, copy the configuration data, and send it to Ring 0-3. The sent command has a broadcast flag. All configured modules that receive this command will not respond. Responses are generated at Bus Marix and can be quickly sent back to the corresponding DMA CH0. In this way, commands are continuously sent to all modules on ring 0-3 to configure them. Figure 4 As shown.

[0065] As you can see, write commands can be issued almost continuously. Based on the previous calculation scenario, 100 modules are divided into 4 rings. Each configuration only requires one clock cycle, and a total of 1 x 25 x 1000 = 25,000 clock cycles are needed, which is 80 times faster under ideal conditions.

[0066] In some embodiments, grouping constraints include that the number of modules to be configured in related groups is the same, and that modules to be configured with the same configuration data are in the same sorting position in the serial configuration structure.

[0067] In some embodiments, the configuration cache module sends configuration data to the module to be configured via a broadcast bus matrix, including:

[0068] The configuration cache module sends configuration data to the module to be configured via the broadcast bus matrix at a preset write command cycle.

[0069] Understandably, if the configured module cannot process the configuration data quickly, a broadcast gap can be set. Without configuration, commands are sent continuously. With configuration, the broadcast command is timed each time a command is sent, and the next command can only be sent when the timer reaches the set value of the broadcast gap, thus dealing with situations where the module cannot respond quickly.

[0070] In some embodiments, S1031 may include: grouping restrictions include that the number of modules to be configured in related groups is the same, and the modules to be configured with the same configuration data are in the same sorting position in the serial configuration structure.

[0071] S20. Determine the configuration data of the module to be configured in the serial configuration structure and write the configuration data into the configuration cache module.

[0072] S30. The configuration cache module sends configuration data to the module to be configured through the broadcast bus matrix to configure the module to be configured.

[0073] In some embodiments, the above-described S30 may include: the configuration bus sending configuration data to the module to be configured at a preset configuration period.

[0074] S40. The broadcast bus matrix returns a write response to the configuration cache module, enabling the configuration cache module to continue sending configuration data to the module to be configured.

[0075] Understandably, after each write operation, the configured module typically needs to return a response to indicate completion. Although the host can support "outstanding" (meaning the host can initiate multiple read / write transactions without receiving a response), after a command of similar depth is sent, a response must be waited for before the next command can be sent. Furthermore, the initial configuration process generates a large number of write commands and responses, which need to be routed back to the corresponding DMA channel, significantly slowing down the configuration process. Therefore, an additional mode, broadcast mode, was added. In this mode, the response is generated by the BUS Matrix and returned to the DMA channel after the command is sent (ARM's BUSMatrix is ​​for cross-connection and arbitration between multiple masters (Core, DMA, etc.) and multiple slaves (internal RAM, APB, external bus, etc.). Its purpose is to improve bandwidth when different hosts access different peripherals, and also to simplify the BusMaster protocol design). This greatly accelerates the configuration process.

[0076] In some embodiments, the above method further includes: converting configuration data into code files.

[0077] As can be seen, the above scheme adds an extra mode, broadcast mode. In this mode, the response is generated by the BUS Matrix after the command is sent out (ARM's BUSMatrix is ​​the cross-connection and arbitration of multiple masters (Core, DMA, etc.) and multiple slaves (internal RAM, APB, external bus, etc.). The purpose is to improve the bandwidth when different hosts access different peripherals, and also to simplify the protocol design of the BusMaster). This greatly speeds up the configuration process.

[0078] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0079] In one embodiment, a chip configuration apparatus is provided, which corresponds one-to-one with the chip configuration method in the above embodiments. For example... Figure 5 As shown, the chip configuration device includes a grouping unit 101, a generation unit 102, a configuration unit 103, and a response unit 104. Detailed descriptions of each functional module are as follows:

[0080] A grouping unit is used to divide the module to be configured into at least two serial configuration structures;

[0081] A generation unit is used to determine the configuration data of the module to be configured in the serial configuration structure and write the configuration data into the configuration cache module;

[0082] A configuration unit is used by the configuration cache module to send the configuration data to the module to be configured via a broadcast bus matrix, and to configure the module to be configured.

[0083] A response unit is used for the broadcast bus matrix to return a write response to the configuration cache module, so that the configuration cache module can continue to send configuration data to the module to be configured.

[0084] Specific limitations regarding the chip configuration device can be found in the limitations of the chip configuration method described above, and will not be repeated here. Each module in the aforementioned chip configuration device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in the computer device, or stored in software in the memory of the computer device, so that the processor can call and execute the operations corresponding to each module.

[0085] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 6 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile and / or volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface is used to communicate with external clients via a network connection. When the computer program is executed by the processor, it implements the functions or steps of a chip configuration method on the server side.

[0086] In one embodiment, a computer device is provided, which may be a client, and its internal structure diagram may be as follows: Figure 7 As shown, the computer device includes a processor, memory, network interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The network interface is used to communicate with an external server via a network connection. When the computer program is executed by the processor, it implements the functions or steps of a chip configuration method on the client side.

[0087] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0088] Based on the user's grouping information for the serial configuration structure of the module to be configured, the configuration file corresponding to each group is obtained according to the grouping information. The configuration file includes a transmission port call file, a pin multiplexing file, a port pin connection file, and a register file.

[0089] The configuration data for the module to be configured is generated based on the configuration file;

[0090] The configuration bus sends the configuration data to the module to be configured, and configures the module to be configured.

[0091] Once the module to be configured is configured, it returns a configuration response to the configuration bus.

[0092] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0093] Based on the user's grouping information for the serial configuration structure of the module to be configured, the configuration file corresponding to each group is obtained according to the grouping information. The configuration file includes a transmission port call file, a pin multiplexing file, a port pin connection file, and a register file.

[0094] The configuration data for the module to be configured is generated based on the configuration file;

[0095] The configuration bus sends the configuration data to the module to be configured, and configures the module to be configured.

[0096] Once the module to be configured is configured, it returns a configuration response to the configuration bus.

[0097] It should be noted that the functions or steps that can be implemented by the computer-readable storage medium or computer device described above can be referred to the relevant descriptions on the server side and client side in the foregoing method embodiments. To avoid repetition, they will not be described one by one here.

[0098] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0099] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0100] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A chip configuration method, characterized in that, include: Divide the module to be configured into at least two serial configuration structures; Determine the configuration data of the module to be configured in the serial configuration structure, and write the configuration data into the configuration cache module; The configuration cache module sends the configuration data to the module to be configured through the broadcast bus matrix to configure the module to be configured. The broadcast bus matrix returns a write response to the configuration cache module, enabling the configuration cache module to continue sending configuration data to the module to be configured. The step of dividing the module to be configured into at least two serial configuration structures includes: Display the configuration interface of the serial configuration structure to the user; The user-selected modules to be configured are grouped into the same group according to the preset classification rules, and the modules of the same type and whose configuration data overlap rate is greater than the first preset threshold. According to the grouping restriction rules, modules to be configured that belong to the same group are divided into at least two serial configuration structures.

2. The chip configuration method as described in claim 1, characterized in that, The grouping restriction rules include: Each serial configuration structure in the same group contains the same number of modules to be configured.

3. The chip configuration method as described in claim 1, characterized in that, The grouping restriction rules include: At least two serial configuration structures can form an association relationship. If the first serial configuration structure and the second serial configuration structure are associated, then at least one module to be configured in the first serial configuration structure is associated with a module to be configured in the second serial configuration structure. The modules to be configured in the associated structure have the same sorting position in their respective serial configuration structures, and the overlap rate of configuration data is greater than a second preset threshold.

4. The chip configuration method as described in claim 3, characterized in that, The step of determining the configuration data of the module to be configured in the serial configuration structure and writing the configuration data into the configuration cache module includes: Obtain the first configuration data of the module to be configured in a serial configuration structure, and write the first configuration data into the configuration cache module; The first configuration data is copied and written to the configuration cache module to obtain configuration data of the serial configuration structure that is associated with the serial configuration structure.

5. The chip configuration method as described in claim 1, characterized in that, The configuration cache module sends the configuration data to the module to be configured via a broadcast bus matrix, including: The configuration cache module sends the configuration data to the module to be configured via a broadcast bus matrix at a preset write command cycle.

6. A chip configuration device, characterized in that, include: A grouping unit is used to divide the module to be configured into at least two serial configuration structures; A generation unit is used to determine the configuration data of the module to be configured in the serial configuration structure and write the configuration data into the configuration cache module; A configuration unit is used by the configuration cache module to send the configuration data to the module to be configured via a broadcast bus matrix, and to configure the module to be configured. A response unit is used for the broadcast bus matrix to return a write response to the configuration cache module, so that the configuration cache module can continue to send configuration data to the module to be configured; The grouping unit is specifically used for: Display the configuration interface of the serial configuration structure to the user; The user-selected modules to be configured are grouped into the same group according to preset classification rules, and modules of the same type with a configuration data overlap rate greater than the first preset threshold are classified into the same group. According to the grouping restriction rules, modules to be configured that belong to the same group are divided into at least two serial configuration structures.

7. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the chip configuration method as described in any one of claims 1 to 5.

8. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the chip configuration method as described in any one of claims 1 to 5.

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