Display panel and display device

Abstract

The present application relates to a display panel and a display device. The display panel includes an array substrate, and the array substrate includes: a substrate; a data line layer disposed on the substrate for laying data lines to transmit data signals; a connection layer covering a partial surface of the data line layer facing away from the substrate and opening through holes at positions corresponding to the data line layer; a first color resist layer disposed on a partial surface of the connection layer facing away from the substrate and extending into the through holes; a second color resist layer disposed on a partial surface of the connection layer facing away from the substrate and a partial surface of the first color resist layer facing away from the data line layer, and an overlapping portion is formed at a position corresponding to the through hole by the first color resist layer and the second color resist layer. In the display panel and the display device of the present application, the protective layer is opened with holes so that the first color resist layer and the second color resist layer are overlapped, avoiding the problem that abnormal overlapping of different color resists caused by unreasonable layer structures affects the display effect of the display device.

Description

Technical Field

[0001] This application relates to the field of display technologies, and particularly to a display panel and a display device having the display panel. Background Art

[0002] The curved panel of a monitor (MNT) usually adopts the COA (Color-filter On Array) technology. That is, in order to avoid abnormal display of the picture caused by the offset of the pixel opening area and the color resist area when the panel is bent, the color resist is fabricated on the array substrate (Array) side. At the same time, in order to avoid abnormal light shielding of the black matrix (BM) when the panel is bent, an indium tin oxide (ITO) layer is added to shield the voltage influence of the data signal on the pixel display area.

[0003] However, due to the offset of the color resist and the error of the critical dimension (CD), abnormal overlay of the color resist between pixels may occur, resulting in a large capacitance between the data signal and the ITO layer at the pixel position due to the close distance, and a large data signal loading, leading to abnormal display of the picture and the appearance of watermark mura, that is, the problem of uneven display of the picture.

[0004] Therefore, how to solve the problem that the large capacitance generated between the data signal and the ITO layer at the pixel position due to the close distance and the large data signal loading, which in turn leads to abnormal display of the picture and the appearance of watermark mura, is an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0005] In view of the deficiencies of the prior art, the purpose of this application is to provide a display panel and a display device, by opening holes in the protective layer, so that the first color resist layer and the second color resist layer are overlapped, avoiding the problem that the unreasonable layer structure causes abnormal overlay of different color resists and affects the display effect of the display device.

[0006] In a first aspect, this application provides a display panel, which includes an array substrate. The array substrate includes: a substrate; a data line layer disposed on the substrate for laying data lines to transmit data signals; a connection layer covering a part of the surface of the data line layer facing away from the substrate, and the connection layer opens a through hole at a position corresponding to the data line layer; a first color resist layer disposed on a part of the surface of the connection layer facing away from the substrate, and extending into the through hole and covering the surface of the data line layer facing away from the substrate; a second color resist layer disposed on a part of the surface of the connection layer facing away from the substrate and a part of the surface of the first color resist layer facing away from the data line layer, and the first color resist layer and the second color resist layer form an overlapping part at a position corresponding to the through hole.

[0007] In some embodiments, the first color-resist layer includes an overlapping portion and a non-overlapping portion. The thickness of the overlapping portion is less than that of the non-overlapping portion. The overlapping portion is disposed on a surface of the data line layer away from the substrate. A part of the second color-resist layer is disposed on the overlapping portion. The overlapping portion and the part of the second color-resist layer disposed on the overlapping portion together form the overlapping part.

[0008] In some embodiments, the array substrate further includes: a metal layer disposed in a partial area on the substrate; an insulating layer disposed on the substrate and on a side of the metal layer facing away from the substrate; a channel layer and an interface layer, the channel layer, the interface layer, and the data line layer are sequentially stacked on a side of the insulating layer facing away from the substrate; a protection layer disposed on surfaces of the first color-resist layer and the second color-resist layer away from the connection layer; a conductive layer disposed on a partial surface of the protection layer facing away from the first color-resist layer and the second color-resist layer; the connection layer is disposed on the insulating layer, on a surface of the interface layer that does not cover the data line layer, and on a partial surface of the data line layer on a side facing away from the interface layer.

[0009] In some embodiments, the display panel further includes a data signal output circuit. The data signal output circuit includes a storage module and a reading and output module. The reading and output module is electrically connected to the storage module and the data line layer. The storage module is used for storing gamma data and first grayscale data. The reading and output module is used for reading the gamma data and outputting the data signal to the data line layer according to the gamma data.

[0010] In some embodiments, the data signal output circuit further includes an identification module. The identification module is electrically connected to both the storage module and the pixel unit of the display panel. The identification module is used for obtaining second grayscale data of the pixel unit, comparing the second grayscale data with the first grayscale data, and transmitting a marking signal to the storage module according to the comparison result to adjust the gamma data.

[0011] In some embodiments, the pixel unit of the display panel includes a plurality of display blocks, the gamma data includes first gamma data and second gamma data respectively corresponding to the plurality of display blocks, and the first gamma data is less than the second gamma data; the recognition module obtains the second grayscale data of each display block, and compares the second grayscale data with the first grayscale data. When the second grayscale data is inconsistent with the first grayscale data, the recognition module transmits the marking signal to the storage module, and the storage module receives the marking signal and makes a mark at the corresponding display block position; when the reading and output module does not read the mark, the reading and output module reads the first gamma data and outputs the data signal to the data line layer according to the first gamma data; when the reading and output module reads the mark, the reading and output module reads the second gamma data and outputs the data signal to the data line layer according to the second gamma data.

[0012] In some embodiments, the pixel unit includes a plurality of display blocks respectively corresponding to the gamma data, and the gamma data includes first gamma data, second gamma data, third gamma data, first corrected gamma data, second corrected gamma data and third corrected gamma data. Among them, the first corrected gamma data is greater than the first gamma data, the second corrected gamma data is greater than the second gamma data, and the third corrected gamma data is greater than the third gamma data; the first gamma data and the first corrected gamma data are used to generate data signals at the overlapping position of the first color resistance layer and the second color resistance layer, the second gamma data and the second corrected gamma data are used to generate data signals at the overlapping position of the first color resistance layer and the third color resistance layer, and the third gamma data and the third corrected gamma data are used to generate data signals at the overlapping position of the second color resistance layer and the third color resistance layer; the recognition module obtains the second grayscale data at different overlapping positions, and compares the second grayscale data with the first grayscale data. When the second grayscale data is inconsistent with the first grayscale data, the recognition module transmits a marking signal to the storage module, and the storage module receives the marking signal and makes a mark at the corresponding display block position; when the reading and output module does not read the mark, the reading and output module reads the first gamma data, the second gamma data or the third gamma data, and outputs the data signal to the data line layer according to the first gamma data, the second gamma data or the third gamma data; when the reading and output module reads the mark, the reading and output module reads the first corrected gamma data, the second corrected gamma data or the third corrected gamma data, and outputs the data signal to the data line layer according to the first corrected gamma data, the second corrected gamma data or the third corrected gamma data.

[0013] In some embodiments, the size of the through hole is 3 micrometers to 4 micrometers.

[0014] In a second aspect, the present application further provides a display device, which includes a power supply module and the above-mentioned display panel, and the power supply module provides a power supply voltage for the display panel to perform image display.

[0015] In some embodiments, the display device further includes a test block and a detection module. The test block is disposed on the array substrate, and the test block is electrically connected to the detection module. The detection module detects the critical dimension and the coverage dimension of the test block in real time, and adjusts the backlight parameters according to the detected critical dimension and coverage dimension.

[0016] In summary, in the display panel and the display device of the present application, by improving the layer structure of the array substrate of the display panel, mainly by opening holes in the protective layer so that the first color resist layer and the second color resist layer are overlapped, the problem that different color resists are abnormally overlapped due to the unreasonable layer structure of the array substrate, thereby affecting the display effect of the display device, is avoided.

[0017] At the same time, by setting a data signal output circuit in the display panel, by obtaining the second gray scale data of different regions or different color resist overlapping positions of the pixel units of the display panel in real time, and adjusting the data signal transmitted to this position according to the comparison result of the obtained second gray scale data and the first gray scale data, so as to increase the load (loading) of the data signal Data at this position, and further adjust the problem of abnormal display of the display screen of the display device caused by overlapping abnormality.

[0018] In addition, a test block and a detection module are additionally provided in the display device to obtain data of the critical dimension and the coverage dimension in real time, so as to adjust variable parameters such as illumination accordingly, thereby further effectively improving the display effect of the display device. Description of the Drawings

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.

[0020] Figure 1 It is a schematic cross-sectional structure diagram of an array substrate in a display panel of the prior art;

[0021] Figure 2 For Figure 1 a schematic diagram of color resist overlapping of the shown array substrate;

[0022] Figure 3 Schematic diagram of the layer structure of the array substrate in the display panel disclosed in the embodiment of the present application;

[0023] Figure 4 is Figure 3 Schematic diagram of the overlap of the color resist layer of the array substrate shown;

[0024] Figure 5 Schematic diagram of the structure of the data signal output circuit in the display panel disclosed in the embodiment of the present application;

[0025] Figure 6 Partial structure schematic diagram of a display device disclosed in the present application;

[0026] Figure 7 is Figure 3 Schematic diagram of the structure of the array substrate shown from the angle of the self-metal layer;

[0027] Figure 8 is Figure 3 Schematic diagram of the structure of the array substrate shown from the angle of the self-data line layer;

[0028] Figure 9 is Figure 7 Partial enlarged schematic diagram of the array substrate shown.

[0029] Explanation of reference numerals:

[0030] 1000 - Display device; 100 - Array substrate; 110 - Pixel unit; 200 - Data signal output circuit; 1 - Base layer; 2 - First metal layer; 3 - Insulating layer; 4 - Channel layer; 5 - Interface layer; 6 - Second metal layer; 7 - First protective layer; 9 - Second protective layer; 10 - Conductive layer; 8a - Red resist layer; 8b - Green resist layer; 8c - Blue resist layer; 21 - Substrate; 23 - Data line layer; 24 - Connecting layer; 25 - First color resist layer; 26 - Second color resist layer; 32 - Metal layer; 34 - Insulating layer; 35 - Channel layer; 36 - Interface layer; 37 - Spacer layer; 38 - Conductive layer; 27 - Third color resist layer; 40 - Storage module; 50 - Identification module; 60 - Reading and output module; 321 - First opening; 231 - Second opening; 300 - Test block; 310 - PCBA; Data - Data signal; m - Critical dimension; n - Coverage dimension. Detailed implementation manners

[0031] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0032] The description of the following embodiments refers to the attached drawings for illustrating specific embodiments in which the present application can be implemented. The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the described objects and do not have any sequential or technical meanings. The terms "connection" and "coupling" as used in the present application, unless otherwise specified, both include direct and indirect connections (couplings). The directional terms mentioned in the present application, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms are used to better and more clearly illustrate and understand the present application, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application.

[0033] In the description of the present application, it should be noted that unless otherwise clearly specified and limited, the terms "install", "connect", and "couple" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances. It should be noted that the terms "first", "second", etc. in the description, claims, and drawings of the present application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include", "may include", "contain", or "may contain" used in the present application indicate the existence of the corresponding functions, operations, elements, etc. disclosed, and do not limit one or more other functions, operations, elements, etc. In addition, the term "include" or "contain" means the existence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, and does not exclude the existence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and is intended to cover non-exclusive inclusion. It should also be understood that the meaning of "at least one" described herein is one and more than one, such as one, two, or three, etc., and the meaning of "a plurality" is at least two, such as two or three, etc., unless otherwise specifically limited. The terms "step 1", "step 2", etc. in the description, claims, and drawings of the present application are used to distinguish different objects, rather than to describe a specific order.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0035] Generally, a display panel includes a display area and a non-display area. The display area is used for image display, and the non-display area is disposed around the display area to set other auxiliary components or modules. Specifically, the display panel includes an array substrate (AS) and a color film substrate, and a liquid crystal layer sandwiched between the array substrate and the color film substrate. Driving elements are provided on the array substrate and the color film substrate to generate corresponding electric fields according to data signals Data, thereby driving the rotation angle of liquid crystal molecules in the liquid crystal layer to emit light of corresponding brightness for image display.

[0036] It can be understood that the display area includes pixel units for performing screen display.

[0037] Please refer to Figure 1 and Figure 2 , Figure 1 which is a schematic cross-sectional structure diagram of an array substrate in a prior art display panel. Figure 2 is Figure 1 a schematic diagram of color resist overlapping of the array substrate shown. In the embodiments of this application, three color resist layers are disposed on the array substrate, namely a red (R) resist layer 8a, a green (G) resist layer 8b, and a blue (B) resist layer 8c (see Figure 2 ), and signal lines for transmitting data signals Data are provided between adjacent color resists.

[0038] Such as Figure 1As shown, the array substrate includes a base layer 1, a first metal layer 2, an insulating layer 3, a channel layer 4, an interface layer 5, a second metal layer 6, a first protective layer 7, an R color resist layer 8a, a G color resist layer 8b, a second protective layer 9, and a conductive layer 10. Among them, the base layer 1 is the bottom layer of the array substrate, which is used to support other layer structures located thereon. The first metal layer 2 is disposed in a partial area on the base layer 1, and the insulating layer 3 is disposed on the base layer 1 and on the side of the first metal layer 2 facing away from the base layer 1, that is, the insulating layer 3 is partially disposed on the base layer 1, and the remaining part of the insulating layer 3 is disposed on the first metal layer 2. The channel layer 4, the interface layer 5, and the second metal layer 6 are sequentially stacked on the side of the insulating layer 3 facing away from the base layer 1, that is, the channel layer 4, the interface layer 5, and the second metal layer 6 are sequentially stacked on the partial area of the insulating layer 3 that does not cover the first metal layer 2.

[0039] The first protective layer 7 is disposed on the insulating layer 3, on the surface of the second metal layer 6 that does not cover the interface layer 5, and on the surface of the second metal layer 6 facing away from the interface layer 5. The R color resist layer 8a and the G color resist layer 8b are spaced apart on the first protective layer 7, that is, there is a gap between the R color resist layer 8a and the G color resist layer 8b, and the first protective layer 7 is exposed at this gap. The second protective layer 9 is disposed on the surfaces of the R color resist layer 8a and the G color resist layer 8b away from the first protective layer 7 and extends into the above-mentioned gap and exposes the first protective layer 7. The conductive layer 10 is disposed on a partial area of the second protective layer 9.

[0040] As Figure 2 shown, the R color resist layer 8a and the G color resist layer 8b do not overlap at the position corresponding to the data signal Data. It can be seen that this layer structure will cause insufficient overlap, thereby affecting the display effect of the display screen.

[0041] Based on the above problems, the present application provides a display panel, which includes an array substrate and a data signal output circuit. By overlapping the first color resist layer and the second color resist layer, the problem of uneven display caused by insufficient overlap between the two is avoided.

[0042] Please refer to Figure 3 , Figure 3 which is a schematic diagram of the layer structure of the array substrate in the display panel disclosed in the embodiment of the present application. As Figure 3As shown, the array substrate 100 may at least include a substrate 21, a data line layer 23, a connection layer 24, a first color resist layer 25, and a second color resist layer 26. The substrate 21 is disposed at the bottom layer of the array substrate 100. The data line layer 23 is disposed on the substrate 21 and is used to lay out data lines to transmit data signals Data. The connection layer 24 covers a partial surface of the data line layer 23 on the side facing away from the substrate 21, and a through hole is formed in the connection layer 24 at a position corresponding to the data line layer 23.

[0043] The first color resist layer 25 is disposed on a partial surface of the connection layer 24 facing away from the substrate 21, extends into the through hole, and covers the surface of the data line layer 23 facing away from the substrate 21, that is, the first color resist layer 25 is connected to the data line layer 23 through the through hole. The second color resist layer 26 is disposed on a partial surface of the connection layer 24 facing away from the substrate 21 and a partial surface of the first color resist layer 25 facing away from the data line layer 23. Specifically, the second color resist layer 26 is disposed on a partial surface of the connection layer 24 facing away from the substrate 21, extends and is disposed on the surface of the first color resist layer 25 on the side facing away from the data line layer 23, and an overlapping portion is formed at a position corresponding to the data line layer 23 between the first color resist layer 25 and the second color resist layer 26, that is, an overlapping portion is formed at a position corresponding to the through hole between the first color resist layer 25 and the second color resist layer 26. Wherein, the overlapping portion refers to a region where the orthographic projection of the first color resist layer 25 and the second color resist layer 26 on the data line layer 23 partially overlaps.

[0044] In a specific embodiment of the present application, the first color resist layer 25 includes an overlapping portion and a non-overlapping portion. The thickness of the overlapping portion is less than the thickness of the non-overlapping portion. The overlapping portion of the first color resist layer 25 is disposed on the surface of the data line layer 23 away from the substrate 21, and a part of the second color resist layer 26 is disposed on the overlapping portion. The overlapping portion and a part of the second color resist layer 26 disposed on the overlapping portion together form the overlapping portion.

[0045] In some embodiments of the present application, the first color resist layer 25 may be an R color resist layer, that is, a red color resist layer. The second color resist layer 26 may be a G color resist layer, that is, a green color resist layer. The present application does not make specific limitations thereto.

[0046] Such as Figure 3As shown, in other embodiments of the present application, the array substrate 100 may further include a metal layer 32, an insulating layer 34, a channel layer 35, an interface layer 36, a protective layer 37, and a conductive layer 38. Among them, the metal layer 32 is disposed in a partial area on the substrate 21. The insulating layer 34 is disposed on the substrate 21 and on the side of the metal layer 32 facing away from the substrate 21, that is, the insulating layer 34 is partially disposed on the substrate 21, and the remaining part of the insulating layer 34 is disposed on the side of the metal layer 32 facing away from the substrate 21.

[0047] The channel layer 35, the interface layer 36, and the data line layer 23 are sequentially stacked on the side of the insulating layer 34 facing away from the substrate 21, that is, the channel layer 35, the interface layer 36, and the data line layer 23 are sequentially stacked on the partial area of the insulating layer 34 that does not cover the metal layer 32.

[0048] The connection layer 24 is disposed on the insulating layer 34, on the surface of the interface layer 36 that does not cover the data line layer 23, and on a partial surface of the data line layer 23 facing away from the interface layer 36. Among them, a through hole is opened at the position where the connection layer 24 covers the data line layer 23. The through hole penetrates through the connection layer 24 and extends to the surface of the data line layer 23, and forms an accommodation space with the surface of the data line layer 23. The accommodation space is used to accommodate the overlapping portion of the first color resist layer 25. In this way, by changing the position of the Data line to a hole-digging design, the position of the Data line will be lowered, which is beneficial to the overlapping of the color resist.

[0049] In a specific embodiment of the present application, the size of the through hole may be 3 micrometers (μm). It can be understood that this is also the width of the color resist overlay (which will be explained later in the text). The present application does not make specific limitations on this.

[0050] In other embodiments of the present application, the size of the through hole may be 3 micrometers (μm) to 4 micrometers (μm), that is, the width of the color resist overlay. For example, 3.0μm, 3.2μm, 3.4μm, 3.8μm, 4.0μm, or other values. Thus, the overlapping of the color resist can be further increased, and at the same time, crosstalk will not occur due to too large an overlapping width. The present application does not make specific limitations on this.

[0051] In a specific embodiment of the present application, the width of the color resist overlay may be 4.0μm.

[0052] The isolation layer 37 is disposed on the surfaces of the first color resistance layer 25 and the second color resistance layer 26 away from the connection layer 24. The conductive layer 38 is disposed on a partial surface of the isolation layer 37 facing away from the first color resistance layer and the second color resistance layer.

[0053] It should be noted that the array substrate may include a first color resistance layer 25, a second color resistance layer 26, and a third color resistance layer 27 (see Figure 4 ). Among them, when the second color resistance layer 26 and the third color resistance layer 27, and the first color resistance layer 25 and the third color resistance layer 27 are in adjacent positions, the layer structure settings may be the same as those of the embodiments disclosed above in this application, or may continue to be set as the existing structure. Among them, the first color resistance layer 25, the second color resistance layer 26, and the third color resistance layer 27 may be a red resistance layer, a green resistance layer, and a blue resistance layer respectively, and this application does not make specific limitations thereon.

[0054] The reason for this is that since the color resistance film thicknesses of the R color resistance layer and the G color resistance layer are relatively thin and the overlapping effect is small, overlapping anomalies are likely to occur. If the above layer structure is adopted when the R color resistance layer and the G color resistance layer are in adjacent positions, the problem of overlapping anomalies can be improved to a large extent. At the same time, the film thickness of the B color resistance layer is relatively thick and the overlapping effect is large and it is easy to overlap. However, when the B color resistance layer is in adjacent positions with the R color resistance layer or the G color resistance layer, the layer structure disclosed in this application may also be adopted.

[0055] Please refer to Figure 4 , Figure 4 for Figure 3 a schematic diagram of the overlapping of the color resistance layers of the array substrate shown. As Figure 4 shown, in the embodiment of this application, the regions indicated by 25, 26, and 27 are the first color resistance layer 25, the second color resistance layer 26, and the third color resistance layer 27 respectively, and the structure for transmitting the data signal Data is between two adjacent color resistance layers. It can be seen that the adjacent two color group layers at the corresponding positions of the data signal Data overlap sufficiently, ensuring the display effect of the display panel.

[0056] Please refer to Figure 5 , Figure 5 which is a schematic diagram of the structure of the data signal output circuit in the display panel disclosed in the embodiment of this application. As Figure 5 shown, in the embodiment of this application, the data signal output circuit 200 includes a storage module 40 and a reading and output module 60. The storage module 40 is electrically connected to the reading and output module 60 respectively. The reading and output module 60 is also electrically connected to the data line layer 23. The storage module 40 is used for storing gamma data and first gray-scale data. The reading and output module 60 is used for reading the gamma data and outputting the data signal Data applied to the pixel unit 110 according to the gamma data.

[0057] In other embodiments of the present application, the data signal output circuit 200 further includes an identification module 50, and the identification module 50 is electrically connected to the storage module 40 and the pixel unit 110 of the display panel. The identification module 50 is used to obtain the second grayscale data of the pixel unit 110, compare the obtained second grayscale data with the first grayscale data, and transmit a flag signal to the storage module 40 according to the comparison result to adjust the gamma data.

[0058] In a specific embodiment of the present application, the data signal output circuit 200 can be arranged in the non-display area of ​​the display panel, or can be arranged in the printed circuit board assembly (PCBA) 310 (see Figure 6 The PCBA 310 is electrically connected to the display panel to achieve signal transmission between the display panel and the detection module, and this application does not make any specific restrictions on this.

[0059] In the embodiment of the present application, the pixel unit 110 of the display panel includes a plurality of display blocks, and the gamma data of the storage module 40 includes first gamma data and second gamma data corresponding to the plurality of display blocks, respectively, and the first gamma data is smaller than the second gamma data. The first gamma data is a preset gamma data value designed by the manufacturer when producing the display panel. The second gamma data is a reference gamma data value set according to the degree of actual display unevenness of the display panel.

[0060] The recognition module 50 obtains the second grayscale data of each display block of the pixel unit 110, and compares the obtained second grayscale data with the first grayscale data. When the second grayscale data is inconsistent with the first grayscale data, the recognition module 50 transmits a corresponding marking signal to the storage module 40, and the storage module 40 receives the marking signal and marks the corresponding display block position. When the second grayscale data is consistent with the first grayscale data, the recognition module 50 does not transmit the marking signal.

[0061] It can be understood that a flag is set before the gamma data of each display block, and the flag is 0 by default, and the reading and outputting module 60 reads the first gamma data according to the flag being 0. In the embodiment of the present application, when the second grayscale data is inconsistent with the first grayscale data, the identification module 50 transmits a marking signal to the storage module 40, and the storage module 40 receives the marking signal and marks the flag of the corresponding display block as 1, and the reading and outputting module 60 reads the second gamma data according to the flag being 1.

[0062] When the reading and output module 60 does not read the mark, the reading and output module 60 reads the first gamma data and outputs a data signal applied to the pixel unit 110 according to the first gamma data. When the reading and output module 60 reads the mark, the reading and output module 60 reads the second gamma data and outputs a data signal applied to the pixel unit 110 according to the second gamma data.

[0063] In other embodiments of the present application, the gamma data includes first gamma data, second gamma data, and third gamma data. Among them, the first gamma data is used to generate a data signal Data at the overlapping position of the first color resist layer 25 and the second color resist layer 26, the second gamma data is used to generate a data signal Data at the overlapping position of the first color resist layer 25 and the third color resist layer 27, and the third gamma data is used to generate a data signal Data at the overlapping position of the second color resist layer 26 and the third color resist layer 27. At the same time, the gamma data further includes first corrected gamma data, second corrected gamma data, and third corrected gamma data, and the first corrected gamma data is greater than the first gamma data, the second corrected gamma data is greater than the second gamma data, and the third corrected gamma data is greater than the third gamma data.

[0064] Similarly, the first corrected gamma data is used to generate a data signal Data at the overlapping position of the first color resist layer 25 and the second color resist layer 26, the second corrected gamma data is used to generate a data signal Data at the overlapping position of the first color resist layer 25 and the third color resist layer 27, and the third corrected gamma data is used to generate a data signal Data at the overlapping position of the second color resist layer 26 and the third color resist layer 27.

[0065] The identification module 50 obtains second grayscale data at different overlapping positions of the pixel unit 110 and compares the obtained second grayscale data with the first grayscale data. When the second grayscale data is inconsistent with the first grayscale data, the identification module 50 transmits a mark signal to the storage module 40, and the storage module 40 receives the mark signal and marks it at the corresponding position. When the second grayscale data is consistent with the first grayscale data, the identification module 50 does not transmit a mark signal.

[0066] It can be understood that a flag bit is set before the gamma data of each of the display blocks, and this flag bit defaults to 0. The reading and output module 60 reads the first gamma data, the second gamma data, and the third gamma data according to this flag bit being 0. In the embodiment of the present application, when the second grayscale data is inconsistent with the first grayscale data, the recognition module 50 transmits a marking signal to the storage module 40, and the storage module 40 receives the marking signal and marks the flag bit of the corresponding display block as 1. The reading and output module 60 reads the first corrected gamma data, the second corrected gamma data, and the third corrected gamma data according to this flag bit being 1.

[0067] When the reading and output module 60 does not read the mark, the reading and output module 60 reads the first gamma data, the second gamma data, or the third gamma data, and outputs the data signal Data to the data line layer 23 according to the first gamma data, the second gamma data, or the third gamma data. When the reading and output module 60 reads the mark, the reading and output module 60 reads the first corrected gamma data, the second corrected gamma data, or the third corrected gamma data, and outputs a data signal to the data line layer 23 according to the first corrected gamma data, the second corrected gamma data, or the third corrected gamma data.

[0068] In the embodiment of the present application, it should be noted that when the second grayscale data at the overlapping position of the first color resistance layer 25 and the second color resistance layer 26 is inconsistent with the first grayscale data, the recognition module 50 transmits a marking signal to the storage module 40, and the storage module 40 receives the marking signal and sets a mark before the first gamma data. When the reading and output module 60 reads the mark, the reading and output module 60 reads the first corrected gamma data and outputs the data signal to the data line layer 23 according to the first corrected gamma data.

[0069] When the second grayscale data at the overlapping position of the first color resistance layer 25 and the third color resistance layer 27 is inconsistent with the first grayscale data, the recognition module 50 transmits a marking signal to the storage module 40, and the storage module 40 receives the marking signal and sets a mark before the second gamma data. When the reading and output module 60 reads the mark, the reading and output module 60 reads the second corrected gamma data and outputs a data signal to the data line layer 23 according to the second corrected gamma data.

[0070] When the second grayscale data at the overlapping position of the second color resist layer 26 and the third color resist layer 27 is inconsistent with the first grayscale data, the recognition module 50 transmits a marking signal to the storage module 40. The storage module 40 receives the marking signal and sets a mark before the third gamma data. When the reading and output module 60 reads the mark, the reading and output module 60 reads the third corrected gamma data and outputs a data signal to the data line layer 23 according to the third corrected gamma data.

[0071] Please refer to Figure 6 , Figure 6 which is a partial structural schematic diagram of a display device disclosed in the present application.

[0072] Based on the same concept, the present application also provides a display device 1000, which includes the above-mentioned display panel and a power supply module. The power supply module provides a power supply voltage for the display panel to perform image display.

[0073] As Figure 6 shown, in an embodiment of the present application, the display device 1000 further includes a test block 300 and a detection module. The test block 300 is disposed on the array substrate 100. The test block 300 is electrically connected to the detection module. The detection module detects the critical dimension (CD) and the overlay dimension of the test block 300 in real time, and adjusts parameters such as backlight intensity according to the detected critical dimension and overlay dimension.

[0074] In a specific embodiment of the present application, the detection module may be disposed on the PCBA 310. The PCBA 310 is electrically connected to the display panel to achieve signal transmission between the detection module and the display panel.

[0075] Please refer to Figures 7 to 9 , Figure 7 which is Figure 3 a structural schematic diagram of the array substrate from the angle of the self-metal layer as shown. Figure 8 which is Figure 3 a structural schematic diagram of the array substrate from the angle of the self-data line layer as shown. Figure 9 which is Figure 7 a partial enlarged schematic diagram of the array substrate as shown. As Figure 7 and Figure 8As shown, the first color filter layer 25, the second color filter layer 26, and the third color filter layer 27 are arranged in an array on the array substrate 100. The metal layer 32 is provided with a plurality of first openings 321, and the data line layer 23 is provided with a plurality of second openings 231. The first openings 321 and the second openings 231 are used to measure the critical dimension (CD) and the overlay dimension of the test block 300, and this application does not make specific limitations thereon.

[0076] As Figure 9 shown, the dimension m can be the critical dimension (CD) of the first color filter layer 25, the second color filter layer 26, or the third color filter layer 27, that is, the dimension enlarged after the first color filter layer 25, the second color filter layer 26, or the third color filter layer 27 is irradiated with light. The dimension n can be the overlay dimension of the first color filter layer 25, the second color filter layer 26, or the third color filter layer 27, that is, the closest distance between the first color filter layer 25, the second color filter layer 26, or the third color filter layer 27 enlarged after irradiation with light and the edge of the first opening 321.

[0077] In an embodiment of the present application, the array substrate 100 includes a display area and a non-display area, wherein the non-display area is provided with a measurement area. The first color filter layer 25, the second color filter layer 26, and the third color filter layer 27 are arranged in an array in the display area of the array substrate 100. In other words, the display area of the array substrate 100 includes a plurality of color filters arranged in an array. One of any two adjacent columns of color filters extends along the length or width direction of the color filter to the measurement area, and a test block 300 is formed in the measurement area. The detection module grabs the dimension of the test block 300 in the direction perpendicular to the extension direction through the first opening 321 and the second opening 231. Since the test block 300 is formed by the extension of the color filter, the dimension in the direction perpendicular to the extension direction is equal to the critical dimension of the color filter.

[0078] At the same time, the detection module grabs the closest distance between the corresponding color filter and the edge of the first opening 321 or the second opening 231 through the first opening 321 and the second opening 231. Since the test block 300 is formed by the extension of the color filter, the closest distance between the color filter and the edge of the first opening 321 or the second opening 231 is equal to the overlay dimension of the color filter.

[0079] In summary, in the display panel and the display device 1000 of the present application, by improving the layer structure of the array substrate 100 of the display panel, mainly by opening holes in the protective layer so that the first color filter layer and the second color filter layer are overlapped, the problem that the abnormal overlay of different color filters caused by the unreasonable layer structure of the array substrate 100 affects the display effect of the display device is avoided.

[0080] Meanwhile, by providing a data signal output circuit 200 in the display panel, second gray-scale data of different regions or overlapping positions of different color resistors of the pixel units 110 of the display panel is obtained in real time, and the data signal transmitted to this position is adjusted according to the comparison result between the obtained second gray-scale data and the first gray-scale data, so as to increase the load (loading) of the data signal Data at this position, and further adjust the problem of abnormal display of the display screen of the display device caused by overlapping abnormality.

[0081] In addition, a test block 300 and a detection module are additionally provided in the display device to obtain data of critical dimensions and coverage dimensions in real time, so as to adjust variable parameters such as illumination accordingly, thereby further effectively improving the display effect of the display device 1000.

[0082] All possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0083] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples" or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0084] It should be understood that the above embodiments only represent several embodiments of the present application, and the description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A display panel, comprising an array substrate, characterized in that, The array substrate includes: a substrate substrate; a data line layer disposed on the substrate substrate for laying out data lines to transmit data signals; a connection layer covering a partial surface of the data line layer on the side facing away from the substrate substrate, and a through hole is formed in the connection layer at a position corresponding to the data line layer; a first color resist layer disposed on a partial surface of the connection layer facing away from the substrate substrate, extending into the through hole and covering the surface of the data line layer facing away from the substrate substrate; a second color resist layer disposed on a partial surface of the connection layer facing away from the substrate substrate and a partial surface of the first color resist layer facing away from the data line layer, and an overlapping portion is formed at a position corresponding to the through hole by the first color resist layer and the second color resist layer; a third color resist layer disposed on a partial surface of the connection layer facing away from the substrate substrate, and opposite ends of the third color resist layer respectively extend into the through holes corresponding to the data line layer, and the third color resist layer respectively forms an overlapping portion with the first color resist layer and the second color resist layer at positions corresponding to the through hole; The display panel further includes a data signal output circuit, the data signal output circuit includes a storage module, an identification module, and a reading and output module, the storage module is used for storing gamma data and first grayscale data, the reading and output module is used for reading the gamma data and outputting the data signal to the data line layer according to the gamma data, the identification module is used for obtaining second grayscale data of pixel units of the display panel, comparing the second grayscale data with the first grayscale data, and transmitting a marking signal to the storage module according to the comparison result to adjust the gamma data; The pixel unit includes a plurality of display blocks respectively corresponding to the gamma data, the gamma data includes first gamma data, second gamma data, third gamma data, first corrected gamma data, second corrected gamma data, and third corrected gamma data, the first gamma data and the first corrected gamma data are used for generating data signals at the overlapping position of the first color resist layer and the second color resist layer, the second gamma data and the second corrected gamma data are used for generating data signals at the overlapping position of the first color resist layer and the third color resist layer, the third gamma data and the third corrected gamma data are used for generating data signals at the overlapping position of the second color resist layer and the third color resist layer; the identification module obtains second grayscale data at different overlapping positions, compares the second grayscale data with the first grayscale data, and when the second grayscale data is inconsistent with the first grayscale data, the identification module transmits the marking signal to the storage module, and the storage module receives the marking signal and marks at the corresponding display block position.

2. The display panel according to claim 1, characterized in that, The first color-resist layer includes an overlapping portion and a non-overlapping portion. The thickness of the overlapping portion is less than that of the non-overlapping portion. The overlapping portion is disposed on a surface of the data line layer away from the substrate. The second color-resist layer is partially disposed on the overlapping portion. The overlapping portion and the partial second color-resist layer disposed on the overlapping portion together form the overlapping part.

3. The display panel according to claim 1, characterized in that, The array substrate further includes: a metal layer disposed in a partial area on the substrate; an insulating layer disposed on the substrate and on a side of the metal layer facing away from the substrate; a channel layer and an interface layer, where the channel layer, the interface layer, and the data line layer are sequentially stacked on a side of the insulating layer facing away from the substrate; a protective layer disposed on surfaces of the first color-resist layer and the second color-resist layer away from the connection layer; a conductive layer disposed on a partial surface of the protective layer facing away from the first color-resist layer and the second color-resist layer; The connection layer is disposed on the insulating layer, on a surface of the interface layer that does not cover the data line layer, and on a partial surface of the data line layer facing away from the interface layer.

4. The display panel according to claim 1, characterized in that, The reading and output module is electrically connected to the storage module and the data line layer.

5. The display panel according to claim 4, characterized in that, The identification module is electrically connected to both the storage module and the pixel unit of the display panel.

6. The display panel according to claim 5, characterized in that, The pixel unit of the display panel includes a plurality of display blocks. The gamma data includes first gamma data and second gamma data respectively corresponding to the plurality of display blocks, and the first gamma data is less than the second gamma data; The identification module obtains the second gray-scale data of each display block, and compares the second gray-scale data with the first gray-scale data. When the second gray-scale data is inconsistent with the first gray-scale data, the identification module transmits the marking signal to the storage module, and the storage module receives the marking signal and makes a mark at the corresponding display block position; When the reading and output module does not read the mark, the reading and output module reads the first gamma data and outputs the data signal to the data line layer according to the first gamma data; When the reading and output module reads the mark, the reading and output module reads the second gamma data and outputs the data signal to the data line layer according to the second gamma data.

7. The display panel according to claim 5, characterized in that, The first corrected gamma data is greater than the first gamma data, the second corrected gamma data is greater than the second gamma data, and the third corrected gamma data is greater than the third gamma data; When the reading and output module does not read the mark, the reading and output module reads the first gamma data, the second gamma data, or the third gamma data, and outputs the data signal to the data line layer according to the first gamma data, the second gamma data, or the third gamma data; when the reading and output module reads the mark, the reading and output module reads the first corrected gamma data, the second corrected gamma data, or the third corrected gamma data, and outputs the data signal to the data line layer according to the first corrected gamma data, the second corrected gamma data, or the third corrected gamma data.

8. The display panel according to any one of claims 1-7, characterized in that, The size of the through hole is 3 microns to 4 microns.

9. A display device, characterized in that, The display device includes a power supply module and a display panel according to any one of claims 1-8, and the power supply module provides a power supply voltage for the display panel to perform image display.

10. The display device according to claim 9, characterized in that, The display device further includes a test block and a detection module. The test block is disposed on the array substrate. The test block is electrically connected to the detection module. The detection module detects the critical dimension and the coverage dimension of the test block in real time, and adjusts the backlight parameters according to the detected critical dimension and coverage dimension.

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